2 * nct6775 - Driver for the hardware monitoring functionality of
3 * Nuvoton NCT677x Super-I/O chips
5 * Copyright (C) 2012 Guenter Roeck <linux@roeck-us.net>
7 * Derived from w83627ehf driver
8 * Copyright (C) 2005-2012 Jean Delvare <khali@linux-fr.org>
9 * Copyright (C) 2006 Yuan Mu (Winbond),
10 * Rudolf Marek <r.marek@assembler.cz>
11 * David Hubbard <david.c.hubbard@gmail.com>
12 * Daniel J Blueman <daniel.blueman@gmail.com>
13 * Copyright (C) 2010 Sheng-Yuan Huang (Nuvoton) (PS00)
15 * Shamelessly ripped from the w83627hf driver
16 * Copyright (C) 2003 Mark Studebaker
18 * This program is free software; you can redistribute it and/or modify
19 * it under the terms of the GNU General Public License as published by
20 * the Free Software Foundation; either version 2 of the License, or
21 * (at your option) any later version.
23 * This program is distributed in the hope that it will be useful,
24 * but WITHOUT ANY WARRANTY; without even the implied warranty of
25 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
26 * GNU General Public License for more details.
28 * You should have received a copy of the GNU General Public License
29 * along with this program; if not, write to the Free Software
30 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
33 * Supports the following chips:
35 * Chip #vin #fan #pwm #temp chip IDs man ID
36 * nct6775f 9 4 3 6+3 0xb470 0xc1 0x5ca3
37 * nct6776f 9 5 3 6+3 0xc330 0xc1 0x5ca3
38 * nct6779d 15 5 5 2+6 0xc560 0xc1 0x5ca3
40 * #temp lists the number of monitored temperature sources (first value) plus
41 * the number of directly connectable temperature sensors (second value).
44 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
46 #include <linux/module.h>
47 #include <linux/init.h>
48 #include <linux/slab.h>
49 #include <linux/jiffies.h>
50 #include <linux/platform_device.h>
51 #include <linux/hwmon.h>
52 #include <linux/hwmon-sysfs.h>
53 #include <linux/hwmon-vid.h>
54 #include <linux/err.h>
55 #include <linux/mutex.h>
56 #include <linux/acpi.h>
62 enum kinds { nct6775, nct6776, nct6779 };
64 /* used to set data->name = nct6775_device_names[data->sio_kind] */
65 static const char * const nct6775_device_names[] = {
71 static unsigned short force_id;
72 module_param(force_id, ushort, 0);
73 MODULE_PARM_DESC(force_id, "Override the detected device ID");
75 static unsigned short fan_debounce;
76 module_param(fan_debounce, ushort, 0);
77 MODULE_PARM_DESC(fan_debounce, "Enable debouncing for fan RPM signal");
79 #define DRVNAME "nct6775"
82 * Super-I/O constants and functions
85 #define NCT6775_LD_ACPI 0x0a
86 #define NCT6775_LD_HWM 0x0b
87 #define NCT6775_LD_VID 0x0d
89 #define SIO_REG_LDSEL 0x07 /* Logical device select */
90 #define SIO_REG_DEVID 0x20 /* Device ID (2 bytes) */
91 #define SIO_REG_ENABLE 0x30 /* Logical device enable */
92 #define SIO_REG_ADDR 0x60 /* Logical device address (2 bytes) */
94 #define SIO_NCT6775_ID 0xb470
95 #define SIO_NCT6776_ID 0xc330
96 #define SIO_NCT6779_ID 0xc560
97 #define SIO_ID_MASK 0xFFF0
99 enum pwm_enable { off, manual, thermal_cruise, speed_cruise, sf3, sf4 };
102 superio_outb(int ioreg, int reg, int val)
105 outb(val, ioreg + 1);
109 superio_inb(int ioreg, int reg)
112 return inb(ioreg + 1);
116 superio_select(int ioreg, int ld)
118 outb(SIO_REG_LDSEL, ioreg);
123 superio_enter(int ioreg)
126 * Try to reserve <ioreg> and <ioreg + 1> for exclusive access.
128 if (!request_muxed_region(ioreg, 2, DRVNAME))
138 superio_exit(int ioreg)
142 outb(0x02, ioreg + 1);
143 release_region(ioreg, 2);
150 #define IOREGION_ALIGNMENT (~7)
151 #define IOREGION_OFFSET 5
152 #define IOREGION_LENGTH 2
153 #define ADDR_REG_OFFSET 0
154 #define DATA_REG_OFFSET 1
156 #define NCT6775_REG_BANK 0x4E
157 #define NCT6775_REG_CONFIG 0x40
160 * Not currently used:
161 * REG_MAN_ID has the value 0x5ca3 for all supported chips.
162 * REG_CHIP_ID == 0x88/0xa1/0xc1 depending on chip model.
163 * REG_MAN_ID is at port 0x4f
164 * REG_CHIP_ID is at port 0x58
167 #define NUM_TEMP 10 /* Max number of temp attribute sets w/ limits*/
168 #define NUM_TEMP_FIXED 6 /* Max number of fixed temp attribute sets */
170 #define NUM_REG_ALARM 4 /* Max number of alarm registers */
172 /* Common and NCT6775 specific data */
174 /* Voltage min/max registers for nr=7..14 are in bank 5 */
176 static const u16 NCT6775_REG_IN_MAX[] = {
177 0x2b, 0x2d, 0x2f, 0x31, 0x33, 0x35, 0x37, 0x554, 0x556, 0x558, 0x55a,
178 0x55c, 0x55e, 0x560, 0x562 };
179 static const u16 NCT6775_REG_IN_MIN[] = {
180 0x2c, 0x2e, 0x30, 0x32, 0x34, 0x36, 0x38, 0x555, 0x557, 0x559, 0x55b,
181 0x55d, 0x55f, 0x561, 0x563 };
182 static const u16 NCT6775_REG_IN[] = {
183 0x20, 0x21, 0x22, 0x23, 0x24, 0x25, 0x26, 0x550, 0x551, 0x552
186 #define NCT6775_REG_VBAT 0x5D
187 #define NCT6775_REG_DIODE 0x5E
189 #define NCT6775_REG_FANDIV1 0x506
190 #define NCT6775_REG_FANDIV2 0x507
192 #define NCT6775_REG_CR_FAN_DEBOUNCE 0xf0
194 static const u16 NCT6775_REG_ALARM[NUM_REG_ALARM] = { 0x459, 0x45A, 0x45B };
196 /* 0..15 voltages, 16..23 fans, 24..31 temperatures */
198 static const s8 NCT6775_ALARM_BITS[] = {
199 0, 1, 2, 3, 8, 21, 20, 16, /* in0.. in7 */
200 17, -1, -1, -1, -1, -1, -1, /* in8..in14 */
202 6, 7, 11, -1, -1, /* fan1..fan5 */
203 -1, -1, -1, /* unused */
204 4, 5, 13, -1, -1, -1, /* temp1..temp6 */
205 12, -1 }; /* intrusion0, intrusion1 */
207 #define FAN_ALARM_BASE 16
208 #define TEMP_ALARM_BASE 24
209 #define INTRUSION_ALARM_BASE 30
211 static const u8 NCT6775_REG_CR_CASEOPEN_CLR[] = { 0xe6, 0xee };
212 static const u8 NCT6775_CR_CASEOPEN_CLR_MASK[] = { 0x20, 0x01 };
214 /* DC or PWM output fan configuration */
215 static const u8 NCT6775_REG_PWM_MODE[] = { 0x04, 0x04, 0x12 };
216 static const u8 NCT6775_PWM_MODE_MASK[] = { 0x01, 0x02, 0x01 };
218 /* Advanced Fan control, some values are common for all fans */
220 static const u16 NCT6775_REG_TARGET[] = { 0x101, 0x201, 0x301, 0x801, 0x901 };
221 static const u16 NCT6775_REG_FAN_MODE[] = { 0x102, 0x202, 0x302, 0x802, 0x902 };
222 static const u16 NCT6775_REG_FAN_STEP_DOWN_TIME[] = {
223 0x103, 0x203, 0x303, 0x803, 0x903 };
224 static const u16 NCT6775_REG_FAN_STEP_UP_TIME[] = {
225 0x104, 0x204, 0x304, 0x804, 0x904 };
226 static const u16 NCT6775_REG_FAN_STOP_OUTPUT[] = {
227 0x105, 0x205, 0x305, 0x805, 0x905 };
228 static const u16 NCT6775_REG_FAN_START_OUTPUT[]
229 = { 0x106, 0x206, 0x306, 0x806, 0x906 };
230 static const u16 NCT6775_REG_FAN_MAX_OUTPUT[] = { 0x10a, 0x20a, 0x30a };
231 static const u16 NCT6775_REG_FAN_STEP_OUTPUT[] = { 0x10b, 0x20b, 0x30b };
233 static const u16 NCT6775_REG_FAN_STOP_TIME[] = {
234 0x107, 0x207, 0x307, 0x807, 0x907 };
235 static const u16 NCT6775_REG_PWM[] = { 0x109, 0x209, 0x309, 0x809, 0x909 };
236 static const u16 NCT6775_REG_PWM_READ[] = { 0x01, 0x03, 0x11, 0x13, 0x15 };
238 static const u16 NCT6775_REG_FAN[] = { 0x630, 0x632, 0x634, 0x636, 0x638 };
239 static const u16 NCT6775_REG_FAN_MIN[] = { 0x3b, 0x3c, 0x3d };
240 static const u16 NCT6775_REG_FAN_PULSES[] = { 0x641, 0x642, 0x643, 0x644, 0 };
242 static const u16 NCT6775_REG_TEMP[] = {
243 0x27, 0x150, 0x250, 0x62b, 0x62c, 0x62d };
245 static const u16 NCT6775_REG_TEMP_CONFIG[ARRAY_SIZE(NCT6775_REG_TEMP)] = {
246 0, 0x152, 0x252, 0x628, 0x629, 0x62A };
247 static const u16 NCT6775_REG_TEMP_HYST[ARRAY_SIZE(NCT6775_REG_TEMP)] = {
248 0x3a, 0x153, 0x253, 0x673, 0x678, 0x67D };
249 static const u16 NCT6775_REG_TEMP_OVER[ARRAY_SIZE(NCT6775_REG_TEMP)] = {
250 0x39, 0x155, 0x255, 0x672, 0x677, 0x67C };
252 static const u16 NCT6775_REG_TEMP_SOURCE[ARRAY_SIZE(NCT6775_REG_TEMP)] = {
253 0x621, 0x622, 0x623, 0x624, 0x625, 0x626 };
255 static const u16 NCT6775_REG_TEMP_SEL[] = {
256 0x100, 0x200, 0x300, 0x800, 0x900 };
258 static const u16 NCT6775_REG_WEIGHT_TEMP_SEL[] = {
259 0x139, 0x239, 0x339, 0x839, 0x939 };
260 static const u16 NCT6775_REG_WEIGHT_TEMP_STEP[] = {
261 0x13a, 0x23a, 0x33a, 0x83a, 0x93a };
262 static const u16 NCT6775_REG_WEIGHT_TEMP_STEP_TOL[] = {
263 0x13b, 0x23b, 0x33b, 0x83b, 0x93b };
264 static const u16 NCT6775_REG_WEIGHT_DUTY_STEP[] = {
265 0x13c, 0x23c, 0x33c, 0x83c, 0x93c };
266 static const u16 NCT6775_REG_WEIGHT_TEMP_BASE[] = {
267 0x13d, 0x23d, 0x33d, 0x83d, 0x93d };
269 static const u16 NCT6775_REG_TEMP_OFFSET[] = { 0x454, 0x455, 0x456 };
271 static const u16 NCT6775_REG_AUTO_TEMP[] = {
272 0x121, 0x221, 0x321, 0x821, 0x921 };
273 static const u16 NCT6775_REG_AUTO_PWM[] = {
274 0x127, 0x227, 0x327, 0x827, 0x927 };
276 #define NCT6775_AUTO_TEMP(data, nr, p) ((data)->REG_AUTO_TEMP[nr] + (p))
277 #define NCT6775_AUTO_PWM(data, nr, p) ((data)->REG_AUTO_PWM[nr] + (p))
279 static const u16 NCT6775_REG_CRITICAL_ENAB[] = { 0x134, 0x234, 0x334 };
281 static const u16 NCT6775_REG_CRITICAL_TEMP[] = {
282 0x135, 0x235, 0x335, 0x835, 0x935 };
283 static const u16 NCT6775_REG_CRITICAL_TEMP_TOLERANCE[] = {
284 0x138, 0x238, 0x338, 0x838, 0x938 };
286 static const char *const nct6775_temp_label[] = {
300 "PCH_CHIP_CPU_MAX_TEMP",
310 static const u16 NCT6775_REG_TEMP_ALTERNATE[ARRAY_SIZE(nct6775_temp_label) - 1]
311 = { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0x661, 0x662, 0x664 };
313 static const u16 NCT6775_REG_TEMP_CRIT[ARRAY_SIZE(nct6775_temp_label) - 1]
314 = { 0, 0, 0, 0, 0xa00, 0xa01, 0xa02, 0xa03, 0xa04, 0xa05, 0xa06,
317 /* NCT6776 specific data */
319 static const s8 NCT6776_ALARM_BITS[] = {
320 0, 1, 2, 3, 8, 21, 20, 16, /* in0.. in7 */
321 17, -1, -1, -1, -1, -1, -1, /* in8..in14 */
323 6, 7, 11, 10, 23, /* fan1..fan5 */
324 -1, -1, -1, /* unused */
325 4, 5, 13, -1, -1, -1, /* temp1..temp6 */
326 12, 9 }; /* intrusion0, intrusion1 */
328 static const u16 NCT6776_REG_TOLERANCE_H[] = {
329 0x10c, 0x20c, 0x30c, 0x80c, 0x90c };
331 static const u8 NCT6776_REG_PWM_MODE[] = { 0x04, 0, 0 };
332 static const u8 NCT6776_PWM_MODE_MASK[] = { 0x01, 0, 0 };
334 static const u16 NCT6776_REG_FAN_MIN[] = { 0x63a, 0x63c, 0x63e, 0x640, 0x642 };
335 static const u16 NCT6776_REG_FAN_PULSES[] = { 0x644, 0x645, 0x646, 0, 0 };
337 static const u16 NCT6776_REG_WEIGHT_DUTY_BASE[] = {
338 0x13e, 0x23e, 0x33e, 0x83e, 0x93e };
340 static const u16 NCT6776_REG_TEMP_CONFIG[ARRAY_SIZE(NCT6775_REG_TEMP)] = {
341 0x18, 0x152, 0x252, 0x628, 0x629, 0x62A };
343 static const char *const nct6776_temp_label[] = {
358 "PCH_CHIP_CPU_MAX_TEMP",
369 static const u16 NCT6776_REG_TEMP_ALTERNATE[ARRAY_SIZE(nct6776_temp_label) - 1]
370 = { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0x401, 0x402, 0x404 };
372 static const u16 NCT6776_REG_TEMP_CRIT[ARRAY_SIZE(nct6776_temp_label) - 1]
373 = { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0x709, 0x70a };
375 /* NCT6779 specific data */
377 static const u16 NCT6779_REG_IN[] = {
378 0x480, 0x481, 0x482, 0x483, 0x484, 0x485, 0x486, 0x487,
379 0x488, 0x489, 0x48a, 0x48b, 0x48c, 0x48d, 0x48e };
381 static const u16 NCT6779_REG_ALARM[NUM_REG_ALARM] = {
382 0x459, 0x45A, 0x45B, 0x568 };
384 static const s8 NCT6779_ALARM_BITS[] = {
385 0, 1, 2, 3, 8, 21, 20, 16, /* in0.. in7 */
386 17, 24, 25, 26, 27, 28, 29, /* in8..in14 */
388 6, 7, 11, 10, 23, /* fan1..fan5 */
389 -1, -1, -1, /* unused */
390 4, 5, 13, -1, -1, -1, /* temp1..temp6 */
391 12, 9 }; /* intrusion0, intrusion1 */
393 static const u16 NCT6779_REG_FAN[] = { 0x4b0, 0x4b2, 0x4b4, 0x4b6, 0x4b8 };
394 static const u16 NCT6779_REG_FAN_PULSES[] = {
395 0x644, 0x645, 0x646, 0x647, 0x648 };
397 static const u16 NCT6779_REG_CRITICAL_PWM_ENABLE[] = {
398 0x136, 0x236, 0x336, 0x836, 0x936 };
399 static const u16 NCT6779_REG_CRITICAL_PWM[] = {
400 0x137, 0x237, 0x337, 0x837, 0x937 };
402 static const u16 NCT6779_REG_TEMP[] = { 0x27, 0x150 };
403 static const u16 NCT6779_REG_TEMP_CONFIG[ARRAY_SIZE(NCT6779_REG_TEMP)] = {
405 static const u16 NCT6779_REG_TEMP_HYST[ARRAY_SIZE(NCT6779_REG_TEMP)] = {
407 static const u16 NCT6779_REG_TEMP_OVER[ARRAY_SIZE(NCT6779_REG_TEMP)] = {
410 static const u16 NCT6779_REG_TEMP_OFFSET[] = {
411 0x454, 0x455, 0x456, 0x44a, 0x44b, 0x44c };
413 static const char *const nct6779_temp_label[] = {
432 "PCH_CHIP_CPU_MAX_TEMP",
443 static const u16 NCT6779_REG_TEMP_ALTERNATE[ARRAY_SIZE(nct6779_temp_label) - 1]
444 = { 0x490, 0x491, 0x492, 0x493, 0x494, 0x495, 0, 0,
445 0, 0, 0, 0, 0, 0, 0, 0,
446 0, 0x400, 0x401, 0x402, 0x404, 0x405, 0x406, 0x407,
449 static const u16 NCT6779_REG_TEMP_CRIT[ARRAY_SIZE(nct6779_temp_label) - 1]
450 = { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0x709, 0x70a };
452 static enum pwm_enable reg_to_pwm_enable(int pwm, int mode)
454 if (mode == 0 && pwm == 255)
459 static int pwm_enable_to_reg(enum pwm_enable mode)
470 /* 1 is DC mode, output in ms */
471 static unsigned int step_time_from_reg(u8 reg, u8 mode)
473 return mode ? 400 * reg : 100 * reg;
476 static u8 step_time_to_reg(unsigned int msec, u8 mode)
478 return clamp_val((mode ? (msec + 200) / 400 :
479 (msec + 50) / 100), 1, 255);
482 static unsigned int fan_from_reg8(u16 reg, unsigned int divreg)
484 if (reg == 0 || reg == 255)
486 return 1350000U / (reg << divreg);
489 static unsigned int fan_from_reg13(u16 reg, unsigned int divreg)
491 if ((reg & 0xff1f) == 0xff1f)
494 reg = (reg & 0x1f) | ((reg & 0xff00) >> 3);
499 return 1350000U / reg;
502 static unsigned int fan_from_reg16(u16 reg, unsigned int divreg)
504 if (reg == 0 || reg == 0xffff)
508 * Even though the registers are 16 bit wide, the fan divisor
511 return 1350000U / (reg << divreg);
514 static u16 fan_to_reg(u32 fan, unsigned int divreg)
519 return (1350000U / fan) >> divreg;
522 static inline unsigned int
529 * Some of the voltage inputs have internal scaling, the tables below
530 * contain 8 (the ADC LSB in mV) * scaling factor * 100
532 static const u16 scale_in[15] = {
533 800, 800, 1600, 1600, 800, 800, 800, 1600, 1600, 800, 800, 800, 800,
537 static inline long in_from_reg(u8 reg, u8 nr)
539 return DIV_ROUND_CLOSEST(reg * scale_in[nr], 100);
542 static inline u8 in_to_reg(u32 val, u8 nr)
544 return clamp_val(DIV_ROUND_CLOSEST(val * 100, scale_in[nr]), 0, 255);
548 * Data structures and manipulation thereof
551 struct nct6775_data {
552 int addr; /* IO base of hw monitor block */
556 struct device *hwmon_dev;
558 u16 reg_temp[4][NUM_TEMP]; /* 0=temp, 1=temp_over, 2=temp_hyst,
561 u8 temp_src[NUM_TEMP];
562 u16 reg_temp_config[NUM_TEMP];
563 const char * const *temp_label;
570 const s8 *ALARM_BITS;
573 const u16 *REG_IN_MINMAX[2];
575 const u16 *REG_TARGET;
577 const u16 *REG_FAN_MODE;
578 const u16 *REG_FAN_MIN;
579 const u16 *REG_FAN_PULSES;
580 const u16 *REG_FAN_TIME[3];
582 const u16 *REG_TOLERANCE_H;
584 const u8 *REG_PWM_MODE;
585 const u8 *PWM_MODE_MASK;
587 const u16 *REG_PWM[7]; /* [0]=pwm, [1]=pwm_start, [2]=pwm_floor,
588 * [3]=pwm_max, [4]=pwm_step,
589 * [5]=weight_duty_step, [6]=weight_duty_base
591 const u16 *REG_PWM_READ;
593 const u16 *REG_AUTO_TEMP;
594 const u16 *REG_AUTO_PWM;
596 const u16 *REG_CRITICAL_TEMP;
597 const u16 *REG_CRITICAL_TEMP_TOLERANCE;
599 const u16 *REG_TEMP_SOURCE; /* temp register sources */
600 const u16 *REG_TEMP_SEL;
601 const u16 *REG_WEIGHT_TEMP_SEL;
602 const u16 *REG_WEIGHT_TEMP[3]; /* 0=base, 1=tolerance, 2=step */
604 const u16 *REG_TEMP_OFFSET;
606 const u16 *REG_ALARM;
608 unsigned int (*fan_from_reg)(u16 reg, unsigned int divreg);
609 unsigned int (*fan_from_reg_min)(u16 reg, unsigned int divreg);
611 struct mutex update_lock;
612 bool valid; /* true if following fields are valid */
613 unsigned long last_updated; /* In jiffies */
615 /* Register values */
616 u8 bank; /* current register bank */
617 u8 in_num; /* number of in inputs we have */
618 u8 in[15][3]; /* [0]=in, [1]=in_max, [2]=in_min */
624 u8 has_fan; /* some fan inputs can be disabled */
625 u8 has_fan_min; /* some fans don't have min register */
628 u8 num_temp_alarms; /* 2 or 3 */
629 u8 temp_fixed_num; /* 3 or 6 */
630 u8 temp_type[NUM_TEMP_FIXED];
631 s8 temp_offset[NUM_TEMP_FIXED];
632 s16 temp[4][NUM_TEMP]; /* 0=temp, 1=temp_over, 2=temp_hyst,
636 u8 pwm_num; /* number of pwm */
637 u8 pwm_mode[5]; /* 1->DC variable voltage, 0->PWM variable duty cycle */
638 enum pwm_enable pwm_enable[5];
641 * 2->thermal cruise mode (also called SmartFan I)
642 * 3->fan speed cruise mode
644 * 5->enhanced variable thermal cruise (SmartFan IV)
646 u8 pwm[7][5]; /* [0]=pwm, [1]=pwm_start, [2]=pwm_floor,
647 * [3]=pwm_max, [4]=pwm_step,
648 * [5]=weight_duty_step, [6]=weight_duty_base
654 u32 target_speed_tolerance[5];
655 u8 speed_tolerance_limit;
657 u8 temp_tolerance[2][5];
660 u8 fan_time[3][5]; /* 0 = stop_time, 1 = step_up, 2 = step_down */
662 /* Automatic fan speed control registers */
667 u8 pwm_weight_temp_sel[5];
668 u8 weight_temp[3][5]; /* 0->temp_step, 1->temp_step_tol,
679 /* Remember extra register values over suspend/resume */
686 struct nct6775_sio_data {
691 static bool is_word_sized(struct nct6775_data *data, u16 reg)
693 switch (data->kind) {
695 return (((reg & 0xff00) == 0x100 ||
696 (reg & 0xff00) == 0x200) &&
697 ((reg & 0x00ff) == 0x50 ||
698 (reg & 0x00ff) == 0x53 ||
699 (reg & 0x00ff) == 0x55)) ||
700 (reg & 0xfff0) == 0x630 ||
701 reg == 0x640 || reg == 0x642 ||
703 ((reg & 0xfff0) == 0x650 && (reg & 0x000f) >= 0x06) ||
704 reg == 0x73 || reg == 0x75 || reg == 0x77;
706 return (((reg & 0xff00) == 0x100 ||
707 (reg & 0xff00) == 0x200) &&
708 ((reg & 0x00ff) == 0x50 ||
709 (reg & 0x00ff) == 0x53 ||
710 (reg & 0x00ff) == 0x55)) ||
711 (reg & 0xfff0) == 0x630 ||
713 reg == 0x640 || reg == 0x642 ||
714 ((reg & 0xfff0) == 0x650 && (reg & 0x000f) >= 0x06) ||
715 reg == 0x73 || reg == 0x75 || reg == 0x77;
717 return reg == 0x150 || reg == 0x153 || reg == 0x155 ||
718 ((reg & 0xfff0) == 0x4b0 && (reg & 0x000f) < 0x09) ||
720 reg == 0x63a || reg == 0x63c || reg == 0x63e ||
721 reg == 0x640 || reg == 0x642 ||
722 reg == 0x73 || reg == 0x75 || reg == 0x77 || reg == 0x79 ||
729 * On older chips, only registers 0x50-0x5f are banked.
730 * On more recent chips, all registers are banked.
731 * Assume that is the case and set the bank number for each access.
732 * Cache the bank number so it only needs to be set if it changes.
734 static inline void nct6775_set_bank(struct nct6775_data *data, u16 reg)
737 if (data->bank != bank) {
738 outb_p(NCT6775_REG_BANK, data->addr + ADDR_REG_OFFSET);
739 outb_p(bank, data->addr + DATA_REG_OFFSET);
744 static u16 nct6775_read_value(struct nct6775_data *data, u16 reg)
746 int res, word_sized = is_word_sized(data, reg);
748 nct6775_set_bank(data, reg);
749 outb_p(reg & 0xff, data->addr + ADDR_REG_OFFSET);
750 res = inb_p(data->addr + DATA_REG_OFFSET);
752 outb_p((reg & 0xff) + 1,
753 data->addr + ADDR_REG_OFFSET);
754 res = (res << 8) + inb_p(data->addr + DATA_REG_OFFSET);
759 static int nct6775_write_value(struct nct6775_data *data, u16 reg, u16 value)
761 int word_sized = is_word_sized(data, reg);
763 nct6775_set_bank(data, reg);
764 outb_p(reg & 0xff, data->addr + ADDR_REG_OFFSET);
766 outb_p(value >> 8, data->addr + DATA_REG_OFFSET);
767 outb_p((reg & 0xff) + 1,
768 data->addr + ADDR_REG_OFFSET);
770 outb_p(value & 0xff, data->addr + DATA_REG_OFFSET);
774 /* We left-align 8-bit temperature values to make the code simpler */
775 static u16 nct6775_read_temp(struct nct6775_data *data, u16 reg)
779 res = nct6775_read_value(data, reg);
780 if (!is_word_sized(data, reg))
786 static int nct6775_write_temp(struct nct6775_data *data, u16 reg, u16 value)
788 if (!is_word_sized(data, reg))
790 return nct6775_write_value(data, reg, value);
793 /* This function assumes that the caller holds data->update_lock */
794 static void nct6775_write_fan_div(struct nct6775_data *data, int nr)
800 reg = (nct6775_read_value(data, NCT6775_REG_FANDIV1) & 0x70)
801 | (data->fan_div[0] & 0x7);
802 nct6775_write_value(data, NCT6775_REG_FANDIV1, reg);
805 reg = (nct6775_read_value(data, NCT6775_REG_FANDIV1) & 0x7)
806 | ((data->fan_div[1] << 4) & 0x70);
807 nct6775_write_value(data, NCT6775_REG_FANDIV1, reg);
810 reg = (nct6775_read_value(data, NCT6775_REG_FANDIV2) & 0x70)
811 | (data->fan_div[2] & 0x7);
812 nct6775_write_value(data, NCT6775_REG_FANDIV2, reg);
815 reg = (nct6775_read_value(data, NCT6775_REG_FANDIV2) & 0x7)
816 | ((data->fan_div[3] << 4) & 0x70);
817 nct6775_write_value(data, NCT6775_REG_FANDIV2, reg);
822 static void nct6775_write_fan_div_common(struct nct6775_data *data, int nr)
824 if (data->kind == nct6775)
825 nct6775_write_fan_div(data, nr);
828 static void nct6775_update_fan_div(struct nct6775_data *data)
832 i = nct6775_read_value(data, NCT6775_REG_FANDIV1);
833 data->fan_div[0] = i & 0x7;
834 data->fan_div[1] = (i & 0x70) >> 4;
835 i = nct6775_read_value(data, NCT6775_REG_FANDIV2);
836 data->fan_div[2] = i & 0x7;
837 if (data->has_fan & (1 << 3))
838 data->fan_div[3] = (i & 0x70) >> 4;
841 static void nct6775_update_fan_div_common(struct nct6775_data *data)
843 if (data->kind == nct6775)
844 nct6775_update_fan_div(data);
847 static void nct6775_init_fan_div(struct nct6775_data *data)
851 nct6775_update_fan_div_common(data);
853 * For all fans, start with highest divider value if the divider
854 * register is not initialized. This ensures that we get a
855 * reading from the fan count register, even if it is not optimal.
856 * We'll compute a better divider later on.
858 for (i = 0; i < ARRAY_SIZE(data->fan_div); i++) {
859 if (!(data->has_fan & (1 << i)))
861 if (data->fan_div[i] == 0) {
862 data->fan_div[i] = 7;
863 nct6775_write_fan_div_common(data, i);
868 static void nct6775_init_fan_common(struct device *dev,
869 struct nct6775_data *data)
874 if (data->has_fan_div)
875 nct6775_init_fan_div(data);
878 * If fan_min is not set (0), set it to 0xff to disable it. This
879 * prevents the unnecessary warning when fanX_min is reported as 0.
881 for (i = 0; i < ARRAY_SIZE(data->fan_min); i++) {
882 if (data->has_fan_min & (1 << i)) {
883 reg = nct6775_read_value(data, data->REG_FAN_MIN[i]);
885 nct6775_write_value(data, data->REG_FAN_MIN[i],
886 data->has_fan_div ? 0xff
892 static void nct6775_select_fan_div(struct device *dev,
893 struct nct6775_data *data, int nr, u16 reg)
895 u8 fan_div = data->fan_div[nr];
898 if (!data->has_fan_div)
902 * If we failed to measure the fan speed, or the reported value is not
903 * in the optimal range, and the clock divider can be modified,
904 * let's try that for next time.
906 if (reg == 0x00 && fan_div < 0x07)
908 else if (reg != 0x00 && reg < 0x30 && fan_div > 0)
911 if (fan_div != data->fan_div[nr]) {
912 dev_dbg(dev, "Modifying fan%d clock divider from %u to %u\n",
913 nr + 1, div_from_reg(data->fan_div[nr]),
914 div_from_reg(fan_div));
916 /* Preserve min limit if possible */
917 if (data->has_fan_min & (1 << nr)) {
918 fan_min = data->fan_min[nr];
919 if (fan_div > data->fan_div[nr]) {
920 if (fan_min != 255 && fan_min > 1)
923 if (fan_min != 255) {
929 if (fan_min != data->fan_min[nr]) {
930 data->fan_min[nr] = fan_min;
931 nct6775_write_value(data, data->REG_FAN_MIN[nr],
935 data->fan_div[nr] = fan_div;
936 nct6775_write_fan_div_common(data, nr);
940 static void nct6775_update_pwm(struct device *dev)
942 struct nct6775_data *data = dev_get_drvdata(dev);
947 for (i = 0; i < data->pwm_num; i++) {
948 if (!(data->has_pwm & (1 << i)))
951 duty_is_dc = data->REG_PWM_MODE[i] &&
952 (nct6775_read_value(data, data->REG_PWM_MODE[i])
953 & data->PWM_MODE_MASK[i]);
954 data->pwm_mode[i] = duty_is_dc;
956 fanmodecfg = nct6775_read_value(data, data->REG_FAN_MODE[i]);
957 for (j = 0; j < ARRAY_SIZE(data->REG_PWM); j++) {
958 if (data->REG_PWM[j] && data->REG_PWM[j][i]) {
960 = nct6775_read_value(data,
961 data->REG_PWM[j][i]);
965 data->pwm_enable[i] = reg_to_pwm_enable(data->pwm[0][i],
966 (fanmodecfg >> 4) & 7);
968 if (!data->temp_tolerance[0][i] ||
969 data->pwm_enable[i] != speed_cruise)
970 data->temp_tolerance[0][i] = fanmodecfg & 0x0f;
971 if (!data->target_speed_tolerance[i] ||
972 data->pwm_enable[i] == speed_cruise) {
973 u8 t = fanmodecfg & 0x0f;
974 if (data->REG_TOLERANCE_H) {
975 t |= (nct6775_read_value(data,
976 data->REG_TOLERANCE_H[i]) & 0x70) >> 1;
978 data->target_speed_tolerance[i] = t;
981 data->temp_tolerance[1][i] =
982 nct6775_read_value(data,
983 data->REG_CRITICAL_TEMP_TOLERANCE[i]);
985 reg = nct6775_read_value(data, data->REG_TEMP_SEL[i]);
986 data->pwm_temp_sel[i] = reg & 0x1f;
987 /* If fan can stop, report floor as 0 */
991 reg = nct6775_read_value(data, data->REG_WEIGHT_TEMP_SEL[i]);
992 data->pwm_weight_temp_sel[i] = reg & 0x1f;
993 /* If weight is disabled, report weight source as 0 */
994 if (j == 1 && !(reg & 0x80))
995 data->pwm_weight_temp_sel[i] = 0;
997 /* Weight temp data */
998 for (j = 0; j < ARRAY_SIZE(data->weight_temp); j++) {
999 data->weight_temp[j][i]
1000 = nct6775_read_value(data,
1001 data->REG_WEIGHT_TEMP[j][i]);
1006 static void nct6775_update_pwm_limits(struct device *dev)
1008 struct nct6775_data *data = dev_get_drvdata(dev);
1013 for (i = 0; i < data->pwm_num; i++) {
1014 if (!(data->has_pwm & (1 << i)))
1017 for (j = 0; j < ARRAY_SIZE(data->fan_time); j++) {
1018 data->fan_time[j][i] =
1019 nct6775_read_value(data, data->REG_FAN_TIME[j][i]);
1022 reg_t = nct6775_read_value(data, data->REG_TARGET[i]);
1023 /* Update only in matching mode or if never updated */
1024 if (!data->target_temp[i] ||
1025 data->pwm_enable[i] == thermal_cruise)
1026 data->target_temp[i] = reg_t & data->target_temp_mask;
1027 if (!data->target_speed[i] ||
1028 data->pwm_enable[i] == speed_cruise) {
1029 if (data->REG_TOLERANCE_H) {
1030 reg_t |= (nct6775_read_value(data,
1031 data->REG_TOLERANCE_H[i]) & 0x0f) << 8;
1033 data->target_speed[i] = reg_t;
1036 for (j = 0; j < data->auto_pwm_num; j++) {
1037 data->auto_pwm[i][j] =
1038 nct6775_read_value(data,
1039 NCT6775_AUTO_PWM(data, i, j));
1040 data->auto_temp[i][j] =
1041 nct6775_read_value(data,
1042 NCT6775_AUTO_TEMP(data, i, j));
1045 /* critical auto_pwm temperature data */
1046 data->auto_temp[i][data->auto_pwm_num] =
1047 nct6775_read_value(data, data->REG_CRITICAL_TEMP[i]);
1049 switch (data->kind) {
1051 reg = nct6775_read_value(data,
1052 NCT6775_REG_CRITICAL_ENAB[i]);
1053 data->auto_pwm[i][data->auto_pwm_num] =
1054 (reg & 0x02) ? 0xff : 0x00;
1057 data->auto_pwm[i][data->auto_pwm_num] = 0xff;
1060 reg = nct6775_read_value(data,
1061 NCT6779_REG_CRITICAL_PWM_ENABLE[i]);
1063 data->auto_pwm[i][data->auto_pwm_num] =
1064 nct6775_read_value(data,
1065 NCT6779_REG_CRITICAL_PWM[i]);
1067 data->auto_pwm[i][data->auto_pwm_num] = 0xff;
1073 static struct nct6775_data *nct6775_update_device(struct device *dev)
1075 struct nct6775_data *data = dev_get_drvdata(dev);
1078 mutex_lock(&data->update_lock);
1080 if (time_after(jiffies, data->last_updated + HZ + HZ / 2)
1082 /* Fan clock dividers */
1083 nct6775_update_fan_div_common(data);
1085 /* Measured voltages and limits */
1086 for (i = 0; i < data->in_num; i++) {
1087 if (!(data->have_in & (1 << i)))
1090 data->in[i][0] = nct6775_read_value(data,
1092 data->in[i][1] = nct6775_read_value(data,
1093 data->REG_IN_MINMAX[0][i]);
1094 data->in[i][2] = nct6775_read_value(data,
1095 data->REG_IN_MINMAX[1][i]);
1098 /* Measured fan speeds and limits */
1099 for (i = 0; i < ARRAY_SIZE(data->rpm); i++) {
1102 if (!(data->has_fan & (1 << i)))
1105 reg = nct6775_read_value(data, data->REG_FAN[i]);
1106 data->rpm[i] = data->fan_from_reg(reg,
1109 if (data->has_fan_min & (1 << i))
1110 data->fan_min[i] = nct6775_read_value(data,
1111 data->REG_FAN_MIN[i]);
1112 data->fan_pulses[i] =
1113 nct6775_read_value(data, data->REG_FAN_PULSES[i]);
1115 nct6775_select_fan_div(dev, data, i, reg);
1118 nct6775_update_pwm(dev);
1119 nct6775_update_pwm_limits(dev);
1121 /* Measured temperatures and limits */
1122 for (i = 0; i < NUM_TEMP; i++) {
1123 if (!(data->have_temp & (1 << i)))
1125 for (j = 0; j < ARRAY_SIZE(data->reg_temp); j++) {
1126 if (data->reg_temp[j][i])
1128 = nct6775_read_temp(data,
1129 data->reg_temp[j][i]);
1131 if (!(data->have_temp_fixed & (1 << i)))
1133 data->temp_offset[i]
1134 = nct6775_read_value(data, data->REG_TEMP_OFFSET[i]);
1138 for (i = 0; i < NUM_REG_ALARM; i++) {
1140 if (!data->REG_ALARM[i])
1142 alarm = nct6775_read_value(data, data->REG_ALARM[i]);
1143 data->alarms |= ((u64)alarm) << (i << 3);
1146 data->last_updated = jiffies;
1150 mutex_unlock(&data->update_lock);
1155 * Sysfs callback functions
1158 show_in_reg(struct device *dev, struct device_attribute *attr, char *buf)
1160 struct nct6775_data *data = nct6775_update_device(dev);
1161 struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
1163 int index = sattr->index;
1164 return sprintf(buf, "%ld\n", in_from_reg(data->in[nr][index], nr));
1168 store_in_reg(struct device *dev, struct device_attribute *attr, const char *buf,
1171 struct nct6775_data *data = dev_get_drvdata(dev);
1172 struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
1174 int index = sattr->index;
1176 int err = kstrtoul(buf, 10, &val);
1179 mutex_lock(&data->update_lock);
1180 data->in[nr][index] = in_to_reg(val, nr);
1181 nct6775_write_value(data, data->REG_IN_MINMAX[index - 1][nr],
1182 data->in[nr][index]);
1183 mutex_unlock(&data->update_lock);
1188 show_alarm(struct device *dev, struct device_attribute *attr, char *buf)
1190 struct nct6775_data *data = nct6775_update_device(dev);
1191 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
1192 int nr = data->ALARM_BITS[sattr->index];
1193 return sprintf(buf, "%u\n",
1194 (unsigned int)((data->alarms >> nr) & 0x01));
1197 static int find_temp_source(struct nct6775_data *data, int index, int count)
1199 int source = data->temp_src[index];
1202 for (nr = 0; nr < count; nr++) {
1205 src = nct6775_read_value(data,
1206 data->REG_TEMP_SOURCE[nr]) & 0x1f;
1214 show_temp_alarm(struct device *dev, struct device_attribute *attr, char *buf)
1216 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
1217 struct nct6775_data *data = nct6775_update_device(dev);
1218 unsigned int alarm = 0;
1222 * For temperatures, there is no fixed mapping from registers to alarm
1223 * bits. Alarm bits are determined by the temperature source mapping.
1225 nr = find_temp_source(data, sattr->index, data->num_temp_alarms);
1227 int bit = data->ALARM_BITS[nr + TEMP_ALARM_BASE];
1228 alarm = (data->alarms >> bit) & 0x01;
1230 return sprintf(buf, "%u\n", alarm);
1233 static SENSOR_DEVICE_ATTR_2(in0_input, S_IRUGO, show_in_reg, NULL, 0, 0);
1234 static SENSOR_DEVICE_ATTR_2(in1_input, S_IRUGO, show_in_reg, NULL, 1, 0);
1235 static SENSOR_DEVICE_ATTR_2(in2_input, S_IRUGO, show_in_reg, NULL, 2, 0);
1236 static SENSOR_DEVICE_ATTR_2(in3_input, S_IRUGO, show_in_reg, NULL, 3, 0);
1237 static SENSOR_DEVICE_ATTR_2(in4_input, S_IRUGO, show_in_reg, NULL, 4, 0);
1238 static SENSOR_DEVICE_ATTR_2(in5_input, S_IRUGO, show_in_reg, NULL, 5, 0);
1239 static SENSOR_DEVICE_ATTR_2(in6_input, S_IRUGO, show_in_reg, NULL, 6, 0);
1240 static SENSOR_DEVICE_ATTR_2(in7_input, S_IRUGO, show_in_reg, NULL, 7, 0);
1241 static SENSOR_DEVICE_ATTR_2(in8_input, S_IRUGO, show_in_reg, NULL, 8, 0);
1242 static SENSOR_DEVICE_ATTR_2(in9_input, S_IRUGO, show_in_reg, NULL, 9, 0);
1243 static SENSOR_DEVICE_ATTR_2(in10_input, S_IRUGO, show_in_reg, NULL, 10, 0);
1244 static SENSOR_DEVICE_ATTR_2(in11_input, S_IRUGO, show_in_reg, NULL, 11, 0);
1245 static SENSOR_DEVICE_ATTR_2(in12_input, S_IRUGO, show_in_reg, NULL, 12, 0);
1246 static SENSOR_DEVICE_ATTR_2(in13_input, S_IRUGO, show_in_reg, NULL, 13, 0);
1247 static SENSOR_DEVICE_ATTR_2(in14_input, S_IRUGO, show_in_reg, NULL, 14, 0);
1249 static SENSOR_DEVICE_ATTR(in0_alarm, S_IRUGO, show_alarm, NULL, 0);
1250 static SENSOR_DEVICE_ATTR(in1_alarm, S_IRUGO, show_alarm, NULL, 1);
1251 static SENSOR_DEVICE_ATTR(in2_alarm, S_IRUGO, show_alarm, NULL, 2);
1252 static SENSOR_DEVICE_ATTR(in3_alarm, S_IRUGO, show_alarm, NULL, 3);
1253 static SENSOR_DEVICE_ATTR(in4_alarm, S_IRUGO, show_alarm, NULL, 4);
1254 static SENSOR_DEVICE_ATTR(in5_alarm, S_IRUGO, show_alarm, NULL, 5);
1255 static SENSOR_DEVICE_ATTR(in6_alarm, S_IRUGO, show_alarm, NULL, 6);
1256 static SENSOR_DEVICE_ATTR(in7_alarm, S_IRUGO, show_alarm, NULL, 7);
1257 static SENSOR_DEVICE_ATTR(in8_alarm, S_IRUGO, show_alarm, NULL, 8);
1258 static SENSOR_DEVICE_ATTR(in9_alarm, S_IRUGO, show_alarm, NULL, 9);
1259 static SENSOR_DEVICE_ATTR(in10_alarm, S_IRUGO, show_alarm, NULL, 10);
1260 static SENSOR_DEVICE_ATTR(in11_alarm, S_IRUGO, show_alarm, NULL, 11);
1261 static SENSOR_DEVICE_ATTR(in12_alarm, S_IRUGO, show_alarm, NULL, 12);
1262 static SENSOR_DEVICE_ATTR(in13_alarm, S_IRUGO, show_alarm, NULL, 13);
1263 static SENSOR_DEVICE_ATTR(in14_alarm, S_IRUGO, show_alarm, NULL, 14);
1265 static SENSOR_DEVICE_ATTR_2(in0_min, S_IWUSR | S_IRUGO, show_in_reg,
1266 store_in_reg, 0, 1);
1267 static SENSOR_DEVICE_ATTR_2(in1_min, S_IWUSR | S_IRUGO, show_in_reg,
1268 store_in_reg, 1, 1);
1269 static SENSOR_DEVICE_ATTR_2(in2_min, S_IWUSR | S_IRUGO, show_in_reg,
1270 store_in_reg, 2, 1);
1271 static SENSOR_DEVICE_ATTR_2(in3_min, S_IWUSR | S_IRUGO, show_in_reg,
1272 store_in_reg, 3, 1);
1273 static SENSOR_DEVICE_ATTR_2(in4_min, S_IWUSR | S_IRUGO, show_in_reg,
1274 store_in_reg, 4, 1);
1275 static SENSOR_DEVICE_ATTR_2(in5_min, S_IWUSR | S_IRUGO, show_in_reg,
1276 store_in_reg, 5, 1);
1277 static SENSOR_DEVICE_ATTR_2(in6_min, S_IWUSR | S_IRUGO, show_in_reg,
1278 store_in_reg, 6, 1);
1279 static SENSOR_DEVICE_ATTR_2(in7_min, S_IWUSR | S_IRUGO, show_in_reg,
1280 store_in_reg, 7, 1);
1281 static SENSOR_DEVICE_ATTR_2(in8_min, S_IWUSR | S_IRUGO, show_in_reg,
1282 store_in_reg, 8, 1);
1283 static SENSOR_DEVICE_ATTR_2(in9_min, S_IWUSR | S_IRUGO, show_in_reg,
1284 store_in_reg, 9, 1);
1285 static SENSOR_DEVICE_ATTR_2(in10_min, S_IWUSR | S_IRUGO, show_in_reg,
1286 store_in_reg, 10, 1);
1287 static SENSOR_DEVICE_ATTR_2(in11_min, S_IWUSR | S_IRUGO, show_in_reg,
1288 store_in_reg, 11, 1);
1289 static SENSOR_DEVICE_ATTR_2(in12_min, S_IWUSR | S_IRUGO, show_in_reg,
1290 store_in_reg, 12, 1);
1291 static SENSOR_DEVICE_ATTR_2(in13_min, S_IWUSR | S_IRUGO, show_in_reg,
1292 store_in_reg, 13, 1);
1293 static SENSOR_DEVICE_ATTR_2(in14_min, S_IWUSR | S_IRUGO, show_in_reg,
1294 store_in_reg, 14, 1);
1296 static SENSOR_DEVICE_ATTR_2(in0_max, S_IWUSR | S_IRUGO, show_in_reg,
1297 store_in_reg, 0, 2);
1298 static SENSOR_DEVICE_ATTR_2(in1_max, S_IWUSR | S_IRUGO, show_in_reg,
1299 store_in_reg, 1, 2);
1300 static SENSOR_DEVICE_ATTR_2(in2_max, S_IWUSR | S_IRUGO, show_in_reg,
1301 store_in_reg, 2, 2);
1302 static SENSOR_DEVICE_ATTR_2(in3_max, S_IWUSR | S_IRUGO, show_in_reg,
1303 store_in_reg, 3, 2);
1304 static SENSOR_DEVICE_ATTR_2(in4_max, S_IWUSR | S_IRUGO, show_in_reg,
1305 store_in_reg, 4, 2);
1306 static SENSOR_DEVICE_ATTR_2(in5_max, S_IWUSR | S_IRUGO, show_in_reg,
1307 store_in_reg, 5, 2);
1308 static SENSOR_DEVICE_ATTR_2(in6_max, S_IWUSR | S_IRUGO, show_in_reg,
1309 store_in_reg, 6, 2);
1310 static SENSOR_DEVICE_ATTR_2(in7_max, S_IWUSR | S_IRUGO, show_in_reg,
1311 store_in_reg, 7, 2);
1312 static SENSOR_DEVICE_ATTR_2(in8_max, S_IWUSR | S_IRUGO, show_in_reg,
1313 store_in_reg, 8, 2);
1314 static SENSOR_DEVICE_ATTR_2(in9_max, S_IWUSR | S_IRUGO, show_in_reg,
1315 store_in_reg, 9, 2);
1316 static SENSOR_DEVICE_ATTR_2(in10_max, S_IWUSR | S_IRUGO, show_in_reg,
1317 store_in_reg, 10, 2);
1318 static SENSOR_DEVICE_ATTR_2(in11_max, S_IWUSR | S_IRUGO, show_in_reg,
1319 store_in_reg, 11, 2);
1320 static SENSOR_DEVICE_ATTR_2(in12_max, S_IWUSR | S_IRUGO, show_in_reg,
1321 store_in_reg, 12, 2);
1322 static SENSOR_DEVICE_ATTR_2(in13_max, S_IWUSR | S_IRUGO, show_in_reg,
1323 store_in_reg, 13, 2);
1324 static SENSOR_DEVICE_ATTR_2(in14_max, S_IWUSR | S_IRUGO, show_in_reg,
1325 store_in_reg, 14, 2);
1327 static struct attribute *nct6775_attributes_in[15][5] = {
1329 &sensor_dev_attr_in0_input.dev_attr.attr,
1330 &sensor_dev_attr_in0_min.dev_attr.attr,
1331 &sensor_dev_attr_in0_max.dev_attr.attr,
1332 &sensor_dev_attr_in0_alarm.dev_attr.attr,
1336 &sensor_dev_attr_in1_input.dev_attr.attr,
1337 &sensor_dev_attr_in1_min.dev_attr.attr,
1338 &sensor_dev_attr_in1_max.dev_attr.attr,
1339 &sensor_dev_attr_in1_alarm.dev_attr.attr,
1343 &sensor_dev_attr_in2_input.dev_attr.attr,
1344 &sensor_dev_attr_in2_min.dev_attr.attr,
1345 &sensor_dev_attr_in2_max.dev_attr.attr,
1346 &sensor_dev_attr_in2_alarm.dev_attr.attr,
1350 &sensor_dev_attr_in3_input.dev_attr.attr,
1351 &sensor_dev_attr_in3_min.dev_attr.attr,
1352 &sensor_dev_attr_in3_max.dev_attr.attr,
1353 &sensor_dev_attr_in3_alarm.dev_attr.attr,
1357 &sensor_dev_attr_in4_input.dev_attr.attr,
1358 &sensor_dev_attr_in4_min.dev_attr.attr,
1359 &sensor_dev_attr_in4_max.dev_attr.attr,
1360 &sensor_dev_attr_in4_alarm.dev_attr.attr,
1364 &sensor_dev_attr_in5_input.dev_attr.attr,
1365 &sensor_dev_attr_in5_min.dev_attr.attr,
1366 &sensor_dev_attr_in5_max.dev_attr.attr,
1367 &sensor_dev_attr_in5_alarm.dev_attr.attr,
1371 &sensor_dev_attr_in6_input.dev_attr.attr,
1372 &sensor_dev_attr_in6_min.dev_attr.attr,
1373 &sensor_dev_attr_in6_max.dev_attr.attr,
1374 &sensor_dev_attr_in6_alarm.dev_attr.attr,
1378 &sensor_dev_attr_in7_input.dev_attr.attr,
1379 &sensor_dev_attr_in7_min.dev_attr.attr,
1380 &sensor_dev_attr_in7_max.dev_attr.attr,
1381 &sensor_dev_attr_in7_alarm.dev_attr.attr,
1385 &sensor_dev_attr_in8_input.dev_attr.attr,
1386 &sensor_dev_attr_in8_min.dev_attr.attr,
1387 &sensor_dev_attr_in8_max.dev_attr.attr,
1388 &sensor_dev_attr_in8_alarm.dev_attr.attr,
1392 &sensor_dev_attr_in9_input.dev_attr.attr,
1393 &sensor_dev_attr_in9_min.dev_attr.attr,
1394 &sensor_dev_attr_in9_max.dev_attr.attr,
1395 &sensor_dev_attr_in9_alarm.dev_attr.attr,
1399 &sensor_dev_attr_in10_input.dev_attr.attr,
1400 &sensor_dev_attr_in10_min.dev_attr.attr,
1401 &sensor_dev_attr_in10_max.dev_attr.attr,
1402 &sensor_dev_attr_in10_alarm.dev_attr.attr,
1406 &sensor_dev_attr_in11_input.dev_attr.attr,
1407 &sensor_dev_attr_in11_min.dev_attr.attr,
1408 &sensor_dev_attr_in11_max.dev_attr.attr,
1409 &sensor_dev_attr_in11_alarm.dev_attr.attr,
1413 &sensor_dev_attr_in12_input.dev_attr.attr,
1414 &sensor_dev_attr_in12_min.dev_attr.attr,
1415 &sensor_dev_attr_in12_max.dev_attr.attr,
1416 &sensor_dev_attr_in12_alarm.dev_attr.attr,
1420 &sensor_dev_attr_in13_input.dev_attr.attr,
1421 &sensor_dev_attr_in13_min.dev_attr.attr,
1422 &sensor_dev_attr_in13_max.dev_attr.attr,
1423 &sensor_dev_attr_in13_alarm.dev_attr.attr,
1427 &sensor_dev_attr_in14_input.dev_attr.attr,
1428 &sensor_dev_attr_in14_min.dev_attr.attr,
1429 &sensor_dev_attr_in14_max.dev_attr.attr,
1430 &sensor_dev_attr_in14_alarm.dev_attr.attr,
1435 static const struct attribute_group nct6775_group_in[15] = {
1436 { .attrs = nct6775_attributes_in[0] },
1437 { .attrs = nct6775_attributes_in[1] },
1438 { .attrs = nct6775_attributes_in[2] },
1439 { .attrs = nct6775_attributes_in[3] },
1440 { .attrs = nct6775_attributes_in[4] },
1441 { .attrs = nct6775_attributes_in[5] },
1442 { .attrs = nct6775_attributes_in[6] },
1443 { .attrs = nct6775_attributes_in[7] },
1444 { .attrs = nct6775_attributes_in[8] },
1445 { .attrs = nct6775_attributes_in[9] },
1446 { .attrs = nct6775_attributes_in[10] },
1447 { .attrs = nct6775_attributes_in[11] },
1448 { .attrs = nct6775_attributes_in[12] },
1449 { .attrs = nct6775_attributes_in[13] },
1450 { .attrs = nct6775_attributes_in[14] },
1454 show_fan(struct device *dev, struct device_attribute *attr, char *buf)
1456 struct nct6775_data *data = nct6775_update_device(dev);
1457 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
1458 int nr = sattr->index;
1459 return sprintf(buf, "%d\n", data->rpm[nr]);
1463 show_fan_min(struct device *dev, struct device_attribute *attr, char *buf)
1465 struct nct6775_data *data = nct6775_update_device(dev);
1466 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
1467 int nr = sattr->index;
1468 return sprintf(buf, "%d\n",
1469 data->fan_from_reg_min(data->fan_min[nr],
1470 data->fan_div[nr]));
1474 show_fan_div(struct device *dev, struct device_attribute *attr, char *buf)
1476 struct nct6775_data *data = nct6775_update_device(dev);
1477 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
1478 int nr = sattr->index;
1479 return sprintf(buf, "%u\n", div_from_reg(data->fan_div[nr]));
1483 store_fan_min(struct device *dev, struct device_attribute *attr,
1484 const char *buf, size_t count)
1486 struct nct6775_data *data = dev_get_drvdata(dev);
1487 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
1488 int nr = sattr->index;
1494 err = kstrtoul(buf, 10, &val);
1498 mutex_lock(&data->update_lock);
1499 if (!data->has_fan_div) {
1500 /* NCT6776F or NCT6779D; we know this is a 13 bit register */
1506 val = 1350000U / val;
1507 val = (val & 0x1f) | ((val << 3) & 0xff00);
1509 data->fan_min[nr] = val;
1510 goto write_min; /* Leave fan divider alone */
1513 /* No min limit, alarm disabled */
1514 data->fan_min[nr] = 255;
1515 new_div = data->fan_div[nr]; /* No change */
1516 dev_info(dev, "fan%u low limit and alarm disabled\n", nr + 1);
1519 reg = 1350000U / val;
1520 if (reg >= 128 * 255) {
1522 * Speed below this value cannot possibly be represented,
1523 * even with the highest divider (128)
1525 data->fan_min[nr] = 254;
1526 new_div = 7; /* 128 == (1 << 7) */
1528 "fan%u low limit %lu below minimum %u, set to minimum\n",
1529 nr + 1, val, data->fan_from_reg_min(254, 7));
1532 * Speed above this value cannot possibly be represented,
1533 * even with the lowest divider (1)
1535 data->fan_min[nr] = 1;
1536 new_div = 0; /* 1 == (1 << 0) */
1538 "fan%u low limit %lu above maximum %u, set to maximum\n",
1539 nr + 1, val, data->fan_from_reg_min(1, 0));
1542 * Automatically pick the best divider, i.e. the one such
1543 * that the min limit will correspond to a register value
1544 * in the 96..192 range
1547 while (reg > 192 && new_div < 7) {
1551 data->fan_min[nr] = reg;
1556 * Write both the fan clock divider (if it changed) and the new
1557 * fan min (unconditionally)
1559 if (new_div != data->fan_div[nr]) {
1560 dev_dbg(dev, "fan%u clock divider changed from %u to %u\n",
1561 nr + 1, div_from_reg(data->fan_div[nr]),
1562 div_from_reg(new_div));
1563 data->fan_div[nr] = new_div;
1564 nct6775_write_fan_div_common(data, nr);
1565 /* Give the chip time to sample a new speed value */
1566 data->last_updated = jiffies;
1570 nct6775_write_value(data, data->REG_FAN_MIN[nr], data->fan_min[nr]);
1571 mutex_unlock(&data->update_lock);
1577 show_fan_pulses(struct device *dev, struct device_attribute *attr, char *buf)
1579 struct nct6775_data *data = nct6775_update_device(dev);
1580 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
1581 int p = data->fan_pulses[sattr->index];
1583 return sprintf(buf, "%d\n", p ? : 4);
1587 store_fan_pulses(struct device *dev, struct device_attribute *attr,
1588 const char *buf, size_t count)
1590 struct nct6775_data *data = dev_get_drvdata(dev);
1591 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
1592 int nr = sattr->index;
1596 err = kstrtoul(buf, 10, &val);
1603 mutex_lock(&data->update_lock);
1604 data->fan_pulses[nr] = val & 3;
1605 nct6775_write_value(data, data->REG_FAN_PULSES[nr], val & 3);
1606 mutex_unlock(&data->update_lock);
1611 static struct sensor_device_attribute sda_fan_input[] = {
1612 SENSOR_ATTR(fan1_input, S_IRUGO, show_fan, NULL, 0),
1613 SENSOR_ATTR(fan2_input, S_IRUGO, show_fan, NULL, 1),
1614 SENSOR_ATTR(fan3_input, S_IRUGO, show_fan, NULL, 2),
1615 SENSOR_ATTR(fan4_input, S_IRUGO, show_fan, NULL, 3),
1616 SENSOR_ATTR(fan5_input, S_IRUGO, show_fan, NULL, 4),
1619 static struct sensor_device_attribute sda_fan_alarm[] = {
1620 SENSOR_ATTR(fan1_alarm, S_IRUGO, show_alarm, NULL, FAN_ALARM_BASE),
1621 SENSOR_ATTR(fan2_alarm, S_IRUGO, show_alarm, NULL, FAN_ALARM_BASE + 1),
1622 SENSOR_ATTR(fan3_alarm, S_IRUGO, show_alarm, NULL, FAN_ALARM_BASE + 2),
1623 SENSOR_ATTR(fan4_alarm, S_IRUGO, show_alarm, NULL, FAN_ALARM_BASE + 3),
1624 SENSOR_ATTR(fan5_alarm, S_IRUGO, show_alarm, NULL, FAN_ALARM_BASE + 4),
1627 static struct sensor_device_attribute sda_fan_min[] = {
1628 SENSOR_ATTR(fan1_min, S_IWUSR | S_IRUGO, show_fan_min,
1630 SENSOR_ATTR(fan2_min, S_IWUSR | S_IRUGO, show_fan_min,
1632 SENSOR_ATTR(fan3_min, S_IWUSR | S_IRUGO, show_fan_min,
1634 SENSOR_ATTR(fan4_min, S_IWUSR | S_IRUGO, show_fan_min,
1636 SENSOR_ATTR(fan5_min, S_IWUSR | S_IRUGO, show_fan_min,
1640 static struct sensor_device_attribute sda_fan_pulses[] = {
1641 SENSOR_ATTR(fan1_pulses, S_IWUSR | S_IRUGO, show_fan_pulses,
1642 store_fan_pulses, 0),
1643 SENSOR_ATTR(fan2_pulses, S_IWUSR | S_IRUGO, show_fan_pulses,
1644 store_fan_pulses, 1),
1645 SENSOR_ATTR(fan3_pulses, S_IWUSR | S_IRUGO, show_fan_pulses,
1646 store_fan_pulses, 2),
1647 SENSOR_ATTR(fan4_pulses, S_IWUSR | S_IRUGO, show_fan_pulses,
1648 store_fan_pulses, 3),
1649 SENSOR_ATTR(fan5_pulses, S_IWUSR | S_IRUGO, show_fan_pulses,
1650 store_fan_pulses, 4),
1653 static struct sensor_device_attribute sda_fan_div[] = {
1654 SENSOR_ATTR(fan1_div, S_IRUGO, show_fan_div, NULL, 0),
1655 SENSOR_ATTR(fan2_div, S_IRUGO, show_fan_div, NULL, 1),
1656 SENSOR_ATTR(fan3_div, S_IRUGO, show_fan_div, NULL, 2),
1657 SENSOR_ATTR(fan4_div, S_IRUGO, show_fan_div, NULL, 3),
1658 SENSOR_ATTR(fan5_div, S_IRUGO, show_fan_div, NULL, 4),
1662 show_temp_label(struct device *dev, struct device_attribute *attr, char *buf)
1664 struct nct6775_data *data = nct6775_update_device(dev);
1665 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
1666 int nr = sattr->index;
1667 return sprintf(buf, "%s\n", data->temp_label[data->temp_src[nr]]);
1671 show_temp(struct device *dev, struct device_attribute *attr, char *buf)
1673 struct nct6775_data *data = nct6775_update_device(dev);
1674 struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
1676 int index = sattr->index;
1678 return sprintf(buf, "%d\n", LM75_TEMP_FROM_REG(data->temp[index][nr]));
1682 store_temp(struct device *dev, struct device_attribute *attr, const char *buf,
1685 struct nct6775_data *data = dev_get_drvdata(dev);
1686 struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
1688 int index = sattr->index;
1692 err = kstrtol(buf, 10, &val);
1696 mutex_lock(&data->update_lock);
1697 data->temp[index][nr] = LM75_TEMP_TO_REG(val);
1698 nct6775_write_temp(data, data->reg_temp[index][nr],
1699 data->temp[index][nr]);
1700 mutex_unlock(&data->update_lock);
1705 show_temp_offset(struct device *dev, struct device_attribute *attr, char *buf)
1707 struct nct6775_data *data = nct6775_update_device(dev);
1708 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
1710 return sprintf(buf, "%d\n", data->temp_offset[sattr->index] * 1000);
1714 store_temp_offset(struct device *dev, struct device_attribute *attr,
1715 const char *buf, size_t count)
1717 struct nct6775_data *data = dev_get_drvdata(dev);
1718 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
1719 int nr = sattr->index;
1723 err = kstrtol(buf, 10, &val);
1727 val = clamp_val(DIV_ROUND_CLOSEST(val, 1000), -128, 127);
1729 mutex_lock(&data->update_lock);
1730 data->temp_offset[nr] = val;
1731 nct6775_write_value(data, data->REG_TEMP_OFFSET[nr], val);
1732 mutex_unlock(&data->update_lock);
1738 show_temp_type(struct device *dev, struct device_attribute *attr, char *buf)
1740 struct nct6775_data *data = nct6775_update_device(dev);
1741 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
1742 int nr = sattr->index;
1743 return sprintf(buf, "%d\n", (int)data->temp_type[nr]);
1747 store_temp_type(struct device *dev, struct device_attribute *attr,
1748 const char *buf, size_t count)
1750 struct nct6775_data *data = nct6775_update_device(dev);
1751 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
1752 int nr = sattr->index;
1755 u8 vbat, diode, bit;
1757 err = kstrtoul(buf, 10, &val);
1761 if (val != 1 && val != 3 && val != 4)
1764 mutex_lock(&data->update_lock);
1766 data->temp_type[nr] = val;
1767 vbat = nct6775_read_value(data, data->REG_VBAT) & ~(0x02 << nr);
1768 diode = nct6775_read_value(data, data->REG_DIODE) & ~(0x02 << nr);
1771 case 1: /* CPU diode (diode, current mode) */
1775 case 3: /* diode, voltage mode */
1778 case 4: /* thermistor */
1781 nct6775_write_value(data, data->REG_VBAT, vbat);
1782 nct6775_write_value(data, data->REG_DIODE, diode);
1784 mutex_unlock(&data->update_lock);
1788 static struct sensor_device_attribute_2 sda_temp_input[] = {
1789 SENSOR_ATTR_2(temp1_input, S_IRUGO, show_temp, NULL, 0, 0),
1790 SENSOR_ATTR_2(temp2_input, S_IRUGO, show_temp, NULL, 1, 0),
1791 SENSOR_ATTR_2(temp3_input, S_IRUGO, show_temp, NULL, 2, 0),
1792 SENSOR_ATTR_2(temp4_input, S_IRUGO, show_temp, NULL, 3, 0),
1793 SENSOR_ATTR_2(temp5_input, S_IRUGO, show_temp, NULL, 4, 0),
1794 SENSOR_ATTR_2(temp6_input, S_IRUGO, show_temp, NULL, 5, 0),
1795 SENSOR_ATTR_2(temp7_input, S_IRUGO, show_temp, NULL, 6, 0),
1796 SENSOR_ATTR_2(temp8_input, S_IRUGO, show_temp, NULL, 7, 0),
1797 SENSOR_ATTR_2(temp9_input, S_IRUGO, show_temp, NULL, 8, 0),
1798 SENSOR_ATTR_2(temp10_input, S_IRUGO, show_temp, NULL, 9, 0),
1801 static struct sensor_device_attribute sda_temp_label[] = {
1802 SENSOR_ATTR(temp1_label, S_IRUGO, show_temp_label, NULL, 0),
1803 SENSOR_ATTR(temp2_label, S_IRUGO, show_temp_label, NULL, 1),
1804 SENSOR_ATTR(temp3_label, S_IRUGO, show_temp_label, NULL, 2),
1805 SENSOR_ATTR(temp4_label, S_IRUGO, show_temp_label, NULL, 3),
1806 SENSOR_ATTR(temp5_label, S_IRUGO, show_temp_label, NULL, 4),
1807 SENSOR_ATTR(temp6_label, S_IRUGO, show_temp_label, NULL, 5),
1808 SENSOR_ATTR(temp7_label, S_IRUGO, show_temp_label, NULL, 6),
1809 SENSOR_ATTR(temp8_label, S_IRUGO, show_temp_label, NULL, 7),
1810 SENSOR_ATTR(temp9_label, S_IRUGO, show_temp_label, NULL, 8),
1811 SENSOR_ATTR(temp10_label, S_IRUGO, show_temp_label, NULL, 9),
1814 static struct sensor_device_attribute_2 sda_temp_max[] = {
1815 SENSOR_ATTR_2(temp1_max, S_IRUGO | S_IWUSR, show_temp, store_temp,
1817 SENSOR_ATTR_2(temp2_max, S_IRUGO | S_IWUSR, show_temp, store_temp,
1819 SENSOR_ATTR_2(temp3_max, S_IRUGO | S_IWUSR, show_temp, store_temp,
1821 SENSOR_ATTR_2(temp4_max, S_IRUGO | S_IWUSR, show_temp, store_temp,
1823 SENSOR_ATTR_2(temp5_max, S_IRUGO | S_IWUSR, show_temp, store_temp,
1825 SENSOR_ATTR_2(temp6_max, S_IRUGO | S_IWUSR, show_temp, store_temp,
1827 SENSOR_ATTR_2(temp7_max, S_IRUGO | S_IWUSR, show_temp, store_temp,
1829 SENSOR_ATTR_2(temp8_max, S_IRUGO | S_IWUSR, show_temp, store_temp,
1831 SENSOR_ATTR_2(temp9_max, S_IRUGO | S_IWUSR, show_temp, store_temp,
1833 SENSOR_ATTR_2(temp10_max, S_IRUGO | S_IWUSR, show_temp, store_temp,
1837 static struct sensor_device_attribute_2 sda_temp_max_hyst[] = {
1838 SENSOR_ATTR_2(temp1_max_hyst, S_IRUGO | S_IWUSR, show_temp, store_temp,
1840 SENSOR_ATTR_2(temp2_max_hyst, S_IRUGO | S_IWUSR, show_temp, store_temp,
1842 SENSOR_ATTR_2(temp3_max_hyst, S_IRUGO | S_IWUSR, show_temp, store_temp,
1844 SENSOR_ATTR_2(temp4_max_hyst, S_IRUGO | S_IWUSR, show_temp, store_temp,
1846 SENSOR_ATTR_2(temp5_max_hyst, S_IRUGO | S_IWUSR, show_temp, store_temp,
1848 SENSOR_ATTR_2(temp6_max_hyst, S_IRUGO | S_IWUSR, show_temp, store_temp,
1850 SENSOR_ATTR_2(temp7_max_hyst, S_IRUGO | S_IWUSR, show_temp, store_temp,
1852 SENSOR_ATTR_2(temp8_max_hyst, S_IRUGO | S_IWUSR, show_temp, store_temp,
1854 SENSOR_ATTR_2(temp9_max_hyst, S_IRUGO | S_IWUSR, show_temp, store_temp,
1856 SENSOR_ATTR_2(temp10_max_hyst, S_IRUGO | S_IWUSR, show_temp, store_temp,
1860 static struct sensor_device_attribute_2 sda_temp_crit[] = {
1861 SENSOR_ATTR_2(temp1_crit, S_IRUGO | S_IWUSR, show_temp, store_temp,
1863 SENSOR_ATTR_2(temp2_crit, S_IRUGO | S_IWUSR, show_temp, store_temp,
1865 SENSOR_ATTR_2(temp3_crit, S_IRUGO | S_IWUSR, show_temp, store_temp,
1867 SENSOR_ATTR_2(temp4_crit, S_IRUGO | S_IWUSR, show_temp, store_temp,
1869 SENSOR_ATTR_2(temp5_crit, S_IRUGO | S_IWUSR, show_temp, store_temp,
1871 SENSOR_ATTR_2(temp6_crit, S_IRUGO | S_IWUSR, show_temp, store_temp,
1873 SENSOR_ATTR_2(temp7_crit, S_IRUGO | S_IWUSR, show_temp, store_temp,
1875 SENSOR_ATTR_2(temp8_crit, S_IRUGO | S_IWUSR, show_temp, store_temp,
1877 SENSOR_ATTR_2(temp9_crit, S_IRUGO | S_IWUSR, show_temp, store_temp,
1879 SENSOR_ATTR_2(temp10_crit, S_IRUGO | S_IWUSR, show_temp, store_temp,
1883 static struct sensor_device_attribute sda_temp_offset[] = {
1884 SENSOR_ATTR(temp1_offset, S_IRUGO | S_IWUSR, show_temp_offset,
1885 store_temp_offset, 0),
1886 SENSOR_ATTR(temp2_offset, S_IRUGO | S_IWUSR, show_temp_offset,
1887 store_temp_offset, 1),
1888 SENSOR_ATTR(temp3_offset, S_IRUGO | S_IWUSR, show_temp_offset,
1889 store_temp_offset, 2),
1890 SENSOR_ATTR(temp4_offset, S_IRUGO | S_IWUSR, show_temp_offset,
1891 store_temp_offset, 3),
1892 SENSOR_ATTR(temp5_offset, S_IRUGO | S_IWUSR, show_temp_offset,
1893 store_temp_offset, 4),
1894 SENSOR_ATTR(temp6_offset, S_IRUGO | S_IWUSR, show_temp_offset,
1895 store_temp_offset, 5),
1898 static struct sensor_device_attribute sda_temp_type[] = {
1899 SENSOR_ATTR(temp1_type, S_IRUGO | S_IWUSR, show_temp_type,
1900 store_temp_type, 0),
1901 SENSOR_ATTR(temp2_type, S_IRUGO | S_IWUSR, show_temp_type,
1902 store_temp_type, 1),
1903 SENSOR_ATTR(temp3_type, S_IRUGO | S_IWUSR, show_temp_type,
1904 store_temp_type, 2),
1905 SENSOR_ATTR(temp4_type, S_IRUGO | S_IWUSR, show_temp_type,
1906 store_temp_type, 3),
1907 SENSOR_ATTR(temp5_type, S_IRUGO | S_IWUSR, show_temp_type,
1908 store_temp_type, 4),
1909 SENSOR_ATTR(temp6_type, S_IRUGO | S_IWUSR, show_temp_type,
1910 store_temp_type, 5),
1913 static struct sensor_device_attribute sda_temp_alarm[] = {
1914 SENSOR_ATTR(temp1_alarm, S_IRUGO, show_temp_alarm, NULL, 0),
1915 SENSOR_ATTR(temp2_alarm, S_IRUGO, show_temp_alarm, NULL, 1),
1916 SENSOR_ATTR(temp3_alarm, S_IRUGO, show_temp_alarm, NULL, 2),
1917 SENSOR_ATTR(temp4_alarm, S_IRUGO, show_temp_alarm, NULL, 3),
1918 SENSOR_ATTR(temp5_alarm, S_IRUGO, show_temp_alarm, NULL, 4),
1919 SENSOR_ATTR(temp6_alarm, S_IRUGO, show_temp_alarm, NULL, 5),
1920 SENSOR_ATTR(temp7_alarm, S_IRUGO, show_temp_alarm, NULL, 6),
1921 SENSOR_ATTR(temp8_alarm, S_IRUGO, show_temp_alarm, NULL, 7),
1922 SENSOR_ATTR(temp9_alarm, S_IRUGO, show_temp_alarm, NULL, 8),
1923 SENSOR_ATTR(temp10_alarm, S_IRUGO, show_temp_alarm, NULL, 9),
1927 show_pwm_mode(struct device *dev, struct device_attribute *attr, char *buf)
1929 struct nct6775_data *data = nct6775_update_device(dev);
1930 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
1932 return sprintf(buf, "%d\n", !data->pwm_mode[sattr->index]);
1936 store_pwm_mode(struct device *dev, struct device_attribute *attr,
1937 const char *buf, size_t count)
1939 struct nct6775_data *data = dev_get_drvdata(dev);
1940 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
1941 int nr = sattr->index;
1946 err = kstrtoul(buf, 10, &val);
1953 /* Setting DC mode is not supported for all chips/channels */
1954 if (data->REG_PWM_MODE[nr] == 0) {
1960 mutex_lock(&data->update_lock);
1961 data->pwm_mode[nr] = val;
1962 reg = nct6775_read_value(data, data->REG_PWM_MODE[nr]);
1963 reg &= ~data->PWM_MODE_MASK[nr];
1965 reg |= data->PWM_MODE_MASK[nr];
1966 nct6775_write_value(data, data->REG_PWM_MODE[nr], reg);
1967 mutex_unlock(&data->update_lock);
1972 show_pwm(struct device *dev, struct device_attribute *attr, char *buf)
1974 struct nct6775_data *data = nct6775_update_device(dev);
1975 struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
1977 int index = sattr->index;
1981 * For automatic fan control modes, show current pwm readings.
1982 * Otherwise, show the configured value.
1984 if (index == 0 && data->pwm_enable[nr] > manual)
1985 pwm = nct6775_read_value(data, data->REG_PWM_READ[nr]);
1987 pwm = data->pwm[index][nr];
1989 return sprintf(buf, "%d\n", pwm);
1993 store_pwm(struct device *dev, struct device_attribute *attr, const char *buf,
1996 struct nct6775_data *data = dev_get_drvdata(dev);
1997 struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
1999 int index = sattr->index;
2001 int minval[7] = { 0, 1, 1, data->pwm[2][nr], 0, 0, 0 };
2003 = { 255, 255, data->pwm[3][nr] ? : 255, 255, 255, 255, 255 };
2007 err = kstrtoul(buf, 10, &val);
2010 val = clamp_val(val, minval[index], maxval[index]);
2012 mutex_lock(&data->update_lock);
2013 data->pwm[index][nr] = val;
2014 nct6775_write_value(data, data->REG_PWM[index][nr], val);
2015 if (index == 2) { /* floor: disable if val == 0 */
2016 reg = nct6775_read_value(data, data->REG_TEMP_SEL[nr]);
2020 nct6775_write_value(data, data->REG_TEMP_SEL[nr], reg);
2022 mutex_unlock(&data->update_lock);
2026 /* Returns 0 if OK, -EINVAL otherwise */
2027 static int check_trip_points(struct nct6775_data *data, int nr)
2031 for (i = 0; i < data->auto_pwm_num - 1; i++) {
2032 if (data->auto_temp[nr][i] > data->auto_temp[nr][i + 1])
2035 for (i = 0; i < data->auto_pwm_num - 1; i++) {
2036 if (data->auto_pwm[nr][i] > data->auto_pwm[nr][i + 1])
2039 /* validate critical temperature and pwm if enabled (pwm > 0) */
2040 if (data->auto_pwm[nr][data->auto_pwm_num]) {
2041 if (data->auto_temp[nr][data->auto_pwm_num - 1] >
2042 data->auto_temp[nr][data->auto_pwm_num] ||
2043 data->auto_pwm[nr][data->auto_pwm_num - 1] >
2044 data->auto_pwm[nr][data->auto_pwm_num])
2050 static void pwm_update_registers(struct nct6775_data *data, int nr)
2054 switch (data->pwm_enable[nr]) {
2059 reg = nct6775_read_value(data, data->REG_FAN_MODE[nr]);
2060 reg = (reg & ~data->tolerance_mask) |
2061 (data->target_speed_tolerance[nr] & data->tolerance_mask);
2062 nct6775_write_value(data, data->REG_FAN_MODE[nr], reg);
2063 nct6775_write_value(data, data->REG_TARGET[nr],
2064 data->target_speed[nr] & 0xff);
2065 if (data->REG_TOLERANCE_H) {
2066 reg = (data->target_speed[nr] >> 8) & 0x0f;
2067 reg |= (data->target_speed_tolerance[nr] & 0x38) << 1;
2068 nct6775_write_value(data,
2069 data->REG_TOLERANCE_H[nr],
2073 case thermal_cruise:
2074 nct6775_write_value(data, data->REG_TARGET[nr],
2075 data->target_temp[nr]);
2078 reg = nct6775_read_value(data, data->REG_FAN_MODE[nr]);
2079 reg = (reg & ~data->tolerance_mask) |
2080 data->temp_tolerance[0][nr];
2081 nct6775_write_value(data, data->REG_FAN_MODE[nr], reg);
2087 show_pwm_enable(struct device *dev, struct device_attribute *attr, char *buf)
2089 struct nct6775_data *data = nct6775_update_device(dev);
2090 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2092 return sprintf(buf, "%d\n", data->pwm_enable[sattr->index]);
2096 store_pwm_enable(struct device *dev, struct device_attribute *attr,
2097 const char *buf, size_t count)
2099 struct nct6775_data *data = dev_get_drvdata(dev);
2100 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2101 int nr = sattr->index;
2106 err = kstrtoul(buf, 10, &val);
2113 if (val == sf3 && data->kind != nct6775)
2116 if (val == sf4 && check_trip_points(data, nr)) {
2117 dev_err(dev, "Inconsistent trip points, not switching to SmartFan IV mode\n");
2118 dev_err(dev, "Adjust trip points and try again\n");
2122 mutex_lock(&data->update_lock);
2123 data->pwm_enable[nr] = val;
2126 * turn off pwm control: select manual mode, set pwm to maximum
2128 data->pwm[0][nr] = 255;
2129 nct6775_write_value(data, data->REG_PWM[0][nr], 255);
2131 pwm_update_registers(data, nr);
2132 reg = nct6775_read_value(data, data->REG_FAN_MODE[nr]);
2134 reg |= pwm_enable_to_reg(val) << 4;
2135 nct6775_write_value(data, data->REG_FAN_MODE[nr], reg);
2136 mutex_unlock(&data->update_lock);
2141 show_pwm_temp_sel_common(struct nct6775_data *data, char *buf, int src)
2145 for (i = 0; i < NUM_TEMP; i++) {
2146 if (!(data->have_temp & (1 << i)))
2148 if (src == data->temp_src[i]) {
2154 return sprintf(buf, "%d\n", sel);
2158 show_pwm_temp_sel(struct device *dev, struct device_attribute *attr, char *buf)
2160 struct nct6775_data *data = nct6775_update_device(dev);
2161 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2162 int index = sattr->index;
2164 return show_pwm_temp_sel_common(data, buf, data->pwm_temp_sel[index]);
2168 store_pwm_temp_sel(struct device *dev, struct device_attribute *attr,
2169 const char *buf, size_t count)
2171 struct nct6775_data *data = nct6775_update_device(dev);
2172 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2173 int nr = sattr->index;
2177 err = kstrtoul(buf, 10, &val);
2180 if (val == 0 || val > NUM_TEMP)
2182 if (!(data->have_temp & (1 << (val - 1))) || !data->temp_src[val - 1])
2185 mutex_lock(&data->update_lock);
2186 src = data->temp_src[val - 1];
2187 data->pwm_temp_sel[nr] = src;
2188 reg = nct6775_read_value(data, data->REG_TEMP_SEL[nr]);
2191 nct6775_write_value(data, data->REG_TEMP_SEL[nr], reg);
2192 mutex_unlock(&data->update_lock);
2198 show_pwm_weight_temp_sel(struct device *dev, struct device_attribute *attr,
2201 struct nct6775_data *data = nct6775_update_device(dev);
2202 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2203 int index = sattr->index;
2205 return show_pwm_temp_sel_common(data, buf,
2206 data->pwm_weight_temp_sel[index]);
2210 store_pwm_weight_temp_sel(struct device *dev, struct device_attribute *attr,
2211 const char *buf, size_t count)
2213 struct nct6775_data *data = nct6775_update_device(dev);
2214 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2215 int nr = sattr->index;
2219 err = kstrtoul(buf, 10, &val);
2224 if (val && (!(data->have_temp & (1 << (val - 1))) ||
2225 !data->temp_src[val - 1]))
2228 mutex_lock(&data->update_lock);
2230 src = data->temp_src[val - 1];
2231 data->pwm_weight_temp_sel[nr] = src;
2232 reg = nct6775_read_value(data, data->REG_WEIGHT_TEMP_SEL[nr]);
2234 reg |= (src | 0x80);
2235 nct6775_write_value(data, data->REG_WEIGHT_TEMP_SEL[nr], reg);
2237 data->pwm_weight_temp_sel[nr] = 0;
2238 reg = nct6775_read_value(data, data->REG_WEIGHT_TEMP_SEL[nr]);
2240 nct6775_write_value(data, data->REG_WEIGHT_TEMP_SEL[nr], reg);
2242 mutex_unlock(&data->update_lock);
2248 show_target_temp(struct device *dev, struct device_attribute *attr, char *buf)
2250 struct nct6775_data *data = nct6775_update_device(dev);
2251 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2253 return sprintf(buf, "%d\n", data->target_temp[sattr->index] * 1000);
2257 store_target_temp(struct device *dev, struct device_attribute *attr,
2258 const char *buf, size_t count)
2260 struct nct6775_data *data = dev_get_drvdata(dev);
2261 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2262 int nr = sattr->index;
2266 err = kstrtoul(buf, 10, &val);
2270 val = clamp_val(DIV_ROUND_CLOSEST(val, 1000), 0,
2271 data->target_temp_mask);
2273 mutex_lock(&data->update_lock);
2274 data->target_temp[nr] = val;
2275 pwm_update_registers(data, nr);
2276 mutex_unlock(&data->update_lock);
2281 show_target_speed(struct device *dev, struct device_attribute *attr, char *buf)
2283 struct nct6775_data *data = nct6775_update_device(dev);
2284 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2285 int nr = sattr->index;
2287 return sprintf(buf, "%d\n",
2288 fan_from_reg16(data->target_speed[nr],
2289 data->fan_div[nr]));
2293 store_target_speed(struct device *dev, struct device_attribute *attr,
2294 const char *buf, size_t count)
2296 struct nct6775_data *data = dev_get_drvdata(dev);
2297 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2298 int nr = sattr->index;
2303 err = kstrtoul(buf, 10, &val);
2307 val = clamp_val(val, 0, 1350000U);
2308 speed = fan_to_reg(val, data->fan_div[nr]);
2310 mutex_lock(&data->update_lock);
2311 data->target_speed[nr] = speed;
2312 pwm_update_registers(data, nr);
2313 mutex_unlock(&data->update_lock);
2318 show_temp_tolerance(struct device *dev, struct device_attribute *attr,
2321 struct nct6775_data *data = nct6775_update_device(dev);
2322 struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
2324 int index = sattr->index;
2326 return sprintf(buf, "%d\n", data->temp_tolerance[index][nr] * 1000);
2330 store_temp_tolerance(struct device *dev, struct device_attribute *attr,
2331 const char *buf, size_t count)
2333 struct nct6775_data *data = dev_get_drvdata(dev);
2334 struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
2336 int index = sattr->index;
2340 err = kstrtoul(buf, 10, &val);
2344 /* Limit tolerance as needed */
2345 val = clamp_val(DIV_ROUND_CLOSEST(val, 1000), 0, data->tolerance_mask);
2347 mutex_lock(&data->update_lock);
2348 data->temp_tolerance[index][nr] = val;
2350 pwm_update_registers(data, nr);
2352 nct6775_write_value(data,
2353 data->REG_CRITICAL_TEMP_TOLERANCE[nr],
2355 mutex_unlock(&data->update_lock);
2360 * Fan speed tolerance is a tricky beast, since the associated register is
2361 * a tick counter, but the value is reported and configured as rpm.
2362 * Compute resulting low and high rpm values and report the difference.
2365 show_speed_tolerance(struct device *dev, struct device_attribute *attr,
2368 struct nct6775_data *data = nct6775_update_device(dev);
2369 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2370 int nr = sattr->index;
2371 int low = data->target_speed[nr] - data->target_speed_tolerance[nr];
2372 int high = data->target_speed[nr] + data->target_speed_tolerance[nr];
2382 tolerance = (fan_from_reg16(low, data->fan_div[nr])
2383 - fan_from_reg16(high, data->fan_div[nr])) / 2;
2385 return sprintf(buf, "%d\n", tolerance);
2389 store_speed_tolerance(struct device *dev, struct device_attribute *attr,
2390 const char *buf, size_t count)
2392 struct nct6775_data *data = dev_get_drvdata(dev);
2393 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2394 int nr = sattr->index;
2399 err = kstrtoul(buf, 10, &val);
2403 high = fan_from_reg16(data->target_speed[nr],
2404 data->fan_div[nr]) + val;
2405 low = fan_from_reg16(data->target_speed[nr],
2406 data->fan_div[nr]) - val;
2412 val = (fan_to_reg(low, data->fan_div[nr]) -
2413 fan_to_reg(high, data->fan_div[nr])) / 2;
2415 /* Limit tolerance as needed */
2416 val = clamp_val(val, 0, data->speed_tolerance_limit);
2418 mutex_lock(&data->update_lock);
2419 data->target_speed_tolerance[nr] = val;
2420 pwm_update_registers(data, nr);
2421 mutex_unlock(&data->update_lock);
2425 static SENSOR_DEVICE_ATTR_2(pwm1, S_IWUSR | S_IRUGO, show_pwm, store_pwm, 0, 0);
2426 static SENSOR_DEVICE_ATTR_2(pwm2, S_IWUSR | S_IRUGO, show_pwm, store_pwm, 1, 0);
2427 static SENSOR_DEVICE_ATTR_2(pwm3, S_IWUSR | S_IRUGO, show_pwm, store_pwm, 2, 0);
2428 static SENSOR_DEVICE_ATTR_2(pwm4, S_IWUSR | S_IRUGO, show_pwm, store_pwm, 3, 0);
2429 static SENSOR_DEVICE_ATTR_2(pwm5, S_IWUSR | S_IRUGO, show_pwm, store_pwm, 4, 0);
2431 static SENSOR_DEVICE_ATTR(pwm1_mode, S_IWUSR | S_IRUGO, show_pwm_mode,
2433 static SENSOR_DEVICE_ATTR(pwm2_mode, S_IWUSR | S_IRUGO, show_pwm_mode,
2435 static SENSOR_DEVICE_ATTR(pwm3_mode, S_IWUSR | S_IRUGO, show_pwm_mode,
2437 static SENSOR_DEVICE_ATTR(pwm4_mode, S_IWUSR | S_IRUGO, show_pwm_mode,
2439 static SENSOR_DEVICE_ATTR(pwm5_mode, S_IWUSR | S_IRUGO, show_pwm_mode,
2442 static SENSOR_DEVICE_ATTR(pwm1_enable, S_IWUSR | S_IRUGO, show_pwm_enable,
2443 store_pwm_enable, 0);
2444 static SENSOR_DEVICE_ATTR(pwm2_enable, S_IWUSR | S_IRUGO, show_pwm_enable,
2445 store_pwm_enable, 1);
2446 static SENSOR_DEVICE_ATTR(pwm3_enable, S_IWUSR | S_IRUGO, show_pwm_enable,
2447 store_pwm_enable, 2);
2448 static SENSOR_DEVICE_ATTR(pwm4_enable, S_IWUSR | S_IRUGO, show_pwm_enable,
2449 store_pwm_enable, 3);
2450 static SENSOR_DEVICE_ATTR(pwm5_enable, S_IWUSR | S_IRUGO, show_pwm_enable,
2451 store_pwm_enable, 4);
2453 static SENSOR_DEVICE_ATTR(pwm1_temp_sel, S_IWUSR | S_IRUGO,
2454 show_pwm_temp_sel, store_pwm_temp_sel, 0);
2455 static SENSOR_DEVICE_ATTR(pwm2_temp_sel, S_IWUSR | S_IRUGO,
2456 show_pwm_temp_sel, store_pwm_temp_sel, 1);
2457 static SENSOR_DEVICE_ATTR(pwm3_temp_sel, S_IWUSR | S_IRUGO,
2458 show_pwm_temp_sel, store_pwm_temp_sel, 2);
2459 static SENSOR_DEVICE_ATTR(pwm4_temp_sel, S_IWUSR | S_IRUGO,
2460 show_pwm_temp_sel, store_pwm_temp_sel, 3);
2461 static SENSOR_DEVICE_ATTR(pwm5_temp_sel, S_IWUSR | S_IRUGO,
2462 show_pwm_temp_sel, store_pwm_temp_sel, 4);
2464 static SENSOR_DEVICE_ATTR(pwm1_target_temp, S_IWUSR | S_IRUGO, show_target_temp,
2465 store_target_temp, 0);
2466 static SENSOR_DEVICE_ATTR(pwm2_target_temp, S_IWUSR | S_IRUGO, show_target_temp,
2467 store_target_temp, 1);
2468 static SENSOR_DEVICE_ATTR(pwm3_target_temp, S_IWUSR | S_IRUGO, show_target_temp,
2469 store_target_temp, 2);
2470 static SENSOR_DEVICE_ATTR(pwm4_target_temp, S_IWUSR | S_IRUGO, show_target_temp,
2471 store_target_temp, 3);
2472 static SENSOR_DEVICE_ATTR(pwm5_target_temp, S_IWUSR | S_IRUGO, show_target_temp,
2473 store_target_temp, 4);
2475 static SENSOR_DEVICE_ATTR(fan1_target, S_IWUSR | S_IRUGO, show_target_speed,
2476 store_target_speed, 0);
2477 static SENSOR_DEVICE_ATTR(fan2_target, S_IWUSR | S_IRUGO, show_target_speed,
2478 store_target_speed, 1);
2479 static SENSOR_DEVICE_ATTR(fan3_target, S_IWUSR | S_IRUGO, show_target_speed,
2480 store_target_speed, 2);
2481 static SENSOR_DEVICE_ATTR(fan4_target, S_IWUSR | S_IRUGO, show_target_speed,
2482 store_target_speed, 3);
2483 static SENSOR_DEVICE_ATTR(fan5_target, S_IWUSR | S_IRUGO, show_target_speed,
2484 store_target_speed, 4);
2486 static SENSOR_DEVICE_ATTR(fan1_tolerance, S_IWUSR | S_IRUGO,
2487 show_speed_tolerance, store_speed_tolerance, 0);
2488 static SENSOR_DEVICE_ATTR(fan2_tolerance, S_IWUSR | S_IRUGO,
2489 show_speed_tolerance, store_speed_tolerance, 1);
2490 static SENSOR_DEVICE_ATTR(fan3_tolerance, S_IWUSR | S_IRUGO,
2491 show_speed_tolerance, store_speed_tolerance, 2);
2492 static SENSOR_DEVICE_ATTR(fan4_tolerance, S_IWUSR | S_IRUGO,
2493 show_speed_tolerance, store_speed_tolerance, 3);
2494 static SENSOR_DEVICE_ATTR(fan5_tolerance, S_IWUSR | S_IRUGO,
2495 show_speed_tolerance, store_speed_tolerance, 4);
2497 /* Smart Fan registers */
2500 show_weight_temp(struct device *dev, struct device_attribute *attr, char *buf)
2502 struct nct6775_data *data = nct6775_update_device(dev);
2503 struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
2505 int index = sattr->index;
2507 return sprintf(buf, "%d\n", data->weight_temp[index][nr] * 1000);
2511 store_weight_temp(struct device *dev, struct device_attribute *attr,
2512 const char *buf, size_t count)
2514 struct nct6775_data *data = dev_get_drvdata(dev);
2515 struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
2517 int index = sattr->index;
2521 err = kstrtoul(buf, 10, &val);
2525 val = clamp_val(DIV_ROUND_CLOSEST(val, 1000), 0, 255);
2527 mutex_lock(&data->update_lock);
2528 data->weight_temp[index][nr] = val;
2529 nct6775_write_value(data, data->REG_WEIGHT_TEMP[index][nr], val);
2530 mutex_unlock(&data->update_lock);
2534 static SENSOR_DEVICE_ATTR(pwm1_weight_temp_sel, S_IWUSR | S_IRUGO,
2535 show_pwm_weight_temp_sel, store_pwm_weight_temp_sel,
2537 static SENSOR_DEVICE_ATTR(pwm2_weight_temp_sel, S_IWUSR | S_IRUGO,
2538 show_pwm_weight_temp_sel, store_pwm_weight_temp_sel,
2540 static SENSOR_DEVICE_ATTR(pwm3_weight_temp_sel, S_IWUSR | S_IRUGO,
2541 show_pwm_weight_temp_sel, store_pwm_weight_temp_sel,
2543 static SENSOR_DEVICE_ATTR(pwm4_weight_temp_sel, S_IWUSR | S_IRUGO,
2544 show_pwm_weight_temp_sel, store_pwm_weight_temp_sel,
2546 static SENSOR_DEVICE_ATTR(pwm5_weight_temp_sel, S_IWUSR | S_IRUGO,
2547 show_pwm_weight_temp_sel, store_pwm_weight_temp_sel,
2550 static SENSOR_DEVICE_ATTR_2(pwm1_weight_temp_step, S_IWUSR | S_IRUGO,
2551 show_weight_temp, store_weight_temp, 0, 0);
2552 static SENSOR_DEVICE_ATTR_2(pwm2_weight_temp_step, S_IWUSR | S_IRUGO,
2553 show_weight_temp, store_weight_temp, 1, 0);
2554 static SENSOR_DEVICE_ATTR_2(pwm3_weight_temp_step, S_IWUSR | S_IRUGO,
2555 show_weight_temp, store_weight_temp, 2, 0);
2556 static SENSOR_DEVICE_ATTR_2(pwm4_weight_temp_step, S_IWUSR | S_IRUGO,
2557 show_weight_temp, store_weight_temp, 3, 0);
2558 static SENSOR_DEVICE_ATTR_2(pwm5_weight_temp_step, S_IWUSR | S_IRUGO,
2559 show_weight_temp, store_weight_temp, 4, 0);
2561 static SENSOR_DEVICE_ATTR_2(pwm1_weight_temp_step_tol, S_IWUSR | S_IRUGO,
2562 show_weight_temp, store_weight_temp, 0, 1);
2563 static SENSOR_DEVICE_ATTR_2(pwm2_weight_temp_step_tol, S_IWUSR | S_IRUGO,
2564 show_weight_temp, store_weight_temp, 1, 1);
2565 static SENSOR_DEVICE_ATTR_2(pwm3_weight_temp_step_tol, S_IWUSR | S_IRUGO,
2566 show_weight_temp, store_weight_temp, 2, 1);
2567 static SENSOR_DEVICE_ATTR_2(pwm4_weight_temp_step_tol, S_IWUSR | S_IRUGO,
2568 show_weight_temp, store_weight_temp, 3, 1);
2569 static SENSOR_DEVICE_ATTR_2(pwm5_weight_temp_step_tol, S_IWUSR | S_IRUGO,
2570 show_weight_temp, store_weight_temp, 4, 1);
2572 static SENSOR_DEVICE_ATTR_2(pwm1_weight_temp_step_base, S_IWUSR | S_IRUGO,
2573 show_weight_temp, store_weight_temp, 0, 2);
2574 static SENSOR_DEVICE_ATTR_2(pwm2_weight_temp_step_base, S_IWUSR | S_IRUGO,
2575 show_weight_temp, store_weight_temp, 1, 2);
2576 static SENSOR_DEVICE_ATTR_2(pwm3_weight_temp_step_base, S_IWUSR | S_IRUGO,
2577 show_weight_temp, store_weight_temp, 2, 2);
2578 static SENSOR_DEVICE_ATTR_2(pwm4_weight_temp_step_base, S_IWUSR | S_IRUGO,
2579 show_weight_temp, store_weight_temp, 3, 2);
2580 static SENSOR_DEVICE_ATTR_2(pwm5_weight_temp_step_base, S_IWUSR | S_IRUGO,
2581 show_weight_temp, store_weight_temp, 4, 2);
2583 static SENSOR_DEVICE_ATTR_2(pwm1_weight_duty_step, S_IWUSR | S_IRUGO,
2584 show_pwm, store_pwm, 0, 5);
2585 static SENSOR_DEVICE_ATTR_2(pwm2_weight_duty_step, S_IWUSR | S_IRUGO,
2586 show_pwm, store_pwm, 1, 5);
2587 static SENSOR_DEVICE_ATTR_2(pwm3_weight_duty_step, S_IWUSR | S_IRUGO,
2588 show_pwm, store_pwm, 2, 5);
2589 static SENSOR_DEVICE_ATTR_2(pwm4_weight_duty_step, S_IWUSR | S_IRUGO,
2590 show_pwm, store_pwm, 3, 5);
2591 static SENSOR_DEVICE_ATTR_2(pwm5_weight_duty_step, S_IWUSR | S_IRUGO,
2592 show_pwm, store_pwm, 4, 5);
2594 /* duty_base is not supported on all chips */
2595 static struct sensor_device_attribute_2 sda_weight_duty_base[] = {
2596 SENSOR_ATTR_2(pwm1_weight_duty_base, S_IWUSR | S_IRUGO,
2597 show_pwm, store_pwm, 0, 6),
2598 SENSOR_ATTR_2(pwm2_weight_duty_base, S_IWUSR | S_IRUGO,
2599 show_pwm, store_pwm, 1, 6),
2600 SENSOR_ATTR_2(pwm3_weight_duty_base, S_IWUSR | S_IRUGO,
2601 show_pwm, store_pwm, 2, 6),
2602 SENSOR_ATTR_2(pwm4_weight_duty_base, S_IWUSR | S_IRUGO,
2603 show_pwm, store_pwm, 3, 6),
2604 SENSOR_ATTR_2(pwm5_weight_duty_base, S_IWUSR | S_IRUGO,
2605 show_pwm, store_pwm, 4, 6),
2609 show_fan_time(struct device *dev, struct device_attribute *attr, char *buf)
2611 struct nct6775_data *data = nct6775_update_device(dev);
2612 struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
2614 int index = sattr->index;
2616 return sprintf(buf, "%d\n",
2617 step_time_from_reg(data->fan_time[index][nr],
2618 data->pwm_mode[nr]));
2622 store_fan_time(struct device *dev, struct device_attribute *attr,
2623 const char *buf, size_t count)
2625 struct nct6775_data *data = dev_get_drvdata(dev);
2626 struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
2628 int index = sattr->index;
2632 err = kstrtoul(buf, 10, &val);
2636 val = step_time_to_reg(val, data->pwm_mode[nr]);
2637 mutex_lock(&data->update_lock);
2638 data->fan_time[index][nr] = val;
2639 nct6775_write_value(data, data->REG_FAN_TIME[index][nr], val);
2640 mutex_unlock(&data->update_lock);
2645 show_name(struct device *dev, struct device_attribute *attr, char *buf)
2647 struct nct6775_data *data = dev_get_drvdata(dev);
2649 return sprintf(buf, "%s\n", data->name);
2652 static DEVICE_ATTR(name, S_IRUGO, show_name, NULL);
2654 static SENSOR_DEVICE_ATTR_2(pwm1_stop_time, S_IWUSR | S_IRUGO, show_fan_time,
2655 store_fan_time, 0, 0);
2656 static SENSOR_DEVICE_ATTR_2(pwm2_stop_time, S_IWUSR | S_IRUGO, show_fan_time,
2657 store_fan_time, 1, 0);
2658 static SENSOR_DEVICE_ATTR_2(pwm3_stop_time, S_IWUSR | S_IRUGO, show_fan_time,
2659 store_fan_time, 2, 0);
2660 static SENSOR_DEVICE_ATTR_2(pwm4_stop_time, S_IWUSR | S_IRUGO, show_fan_time,
2661 store_fan_time, 3, 0);
2662 static SENSOR_DEVICE_ATTR_2(pwm5_stop_time, S_IWUSR | S_IRUGO, show_fan_time,
2663 store_fan_time, 4, 0);
2665 static SENSOR_DEVICE_ATTR_2(pwm1_step_up_time, S_IWUSR | S_IRUGO, show_fan_time,
2666 store_fan_time, 0, 1);
2667 static SENSOR_DEVICE_ATTR_2(pwm2_step_up_time, S_IWUSR | S_IRUGO, show_fan_time,
2668 store_fan_time, 1, 1);
2669 static SENSOR_DEVICE_ATTR_2(pwm3_step_up_time, S_IWUSR | S_IRUGO, show_fan_time,
2670 store_fan_time, 2, 1);
2671 static SENSOR_DEVICE_ATTR_2(pwm4_step_up_time, S_IWUSR | S_IRUGO, show_fan_time,
2672 store_fan_time, 3, 1);
2673 static SENSOR_DEVICE_ATTR_2(pwm5_step_up_time, S_IWUSR | S_IRUGO, show_fan_time,
2674 store_fan_time, 4, 1);
2676 static SENSOR_DEVICE_ATTR_2(pwm1_step_down_time, S_IWUSR | S_IRUGO,
2677 show_fan_time, store_fan_time, 0, 2);
2678 static SENSOR_DEVICE_ATTR_2(pwm2_step_down_time, S_IWUSR | S_IRUGO,
2679 show_fan_time, store_fan_time, 1, 2);
2680 static SENSOR_DEVICE_ATTR_2(pwm3_step_down_time, S_IWUSR | S_IRUGO,
2681 show_fan_time, store_fan_time, 2, 2);
2682 static SENSOR_DEVICE_ATTR_2(pwm4_step_down_time, S_IWUSR | S_IRUGO,
2683 show_fan_time, store_fan_time, 3, 2);
2684 static SENSOR_DEVICE_ATTR_2(pwm5_step_down_time, S_IWUSR | S_IRUGO,
2685 show_fan_time, store_fan_time, 4, 2);
2687 static SENSOR_DEVICE_ATTR_2(pwm1_start, S_IWUSR | S_IRUGO, show_pwm,
2689 static SENSOR_DEVICE_ATTR_2(pwm2_start, S_IWUSR | S_IRUGO, show_pwm,
2691 static SENSOR_DEVICE_ATTR_2(pwm3_start, S_IWUSR | S_IRUGO, show_pwm,
2693 static SENSOR_DEVICE_ATTR_2(pwm4_start, S_IWUSR | S_IRUGO, show_pwm,
2695 static SENSOR_DEVICE_ATTR_2(pwm5_start, S_IWUSR | S_IRUGO, show_pwm,
2698 static SENSOR_DEVICE_ATTR_2(pwm1_floor, S_IWUSR | S_IRUGO, show_pwm,
2700 static SENSOR_DEVICE_ATTR_2(pwm2_floor, S_IWUSR | S_IRUGO, show_pwm,
2702 static SENSOR_DEVICE_ATTR_2(pwm3_floor, S_IWUSR | S_IRUGO, show_pwm,
2704 static SENSOR_DEVICE_ATTR_2(pwm4_floor, S_IWUSR | S_IRUGO, show_pwm,
2706 static SENSOR_DEVICE_ATTR_2(pwm5_floor, S_IWUSR | S_IRUGO, show_pwm,
2709 static SENSOR_DEVICE_ATTR_2(pwm1_temp_tolerance, S_IWUSR | S_IRUGO,
2710 show_temp_tolerance, store_temp_tolerance, 0, 0);
2711 static SENSOR_DEVICE_ATTR_2(pwm2_temp_tolerance, S_IWUSR | S_IRUGO,
2712 show_temp_tolerance, store_temp_tolerance, 1, 0);
2713 static SENSOR_DEVICE_ATTR_2(pwm3_temp_tolerance, S_IWUSR | S_IRUGO,
2714 show_temp_tolerance, store_temp_tolerance, 2, 0);
2715 static SENSOR_DEVICE_ATTR_2(pwm4_temp_tolerance, S_IWUSR | S_IRUGO,
2716 show_temp_tolerance, store_temp_tolerance, 3, 0);
2717 static SENSOR_DEVICE_ATTR_2(pwm5_temp_tolerance, S_IWUSR | S_IRUGO,
2718 show_temp_tolerance, store_temp_tolerance, 4, 0);
2720 static SENSOR_DEVICE_ATTR_2(pwm1_crit_temp_tolerance, S_IWUSR | S_IRUGO,
2721 show_temp_tolerance, store_temp_tolerance, 0, 1);
2722 static SENSOR_DEVICE_ATTR_2(pwm2_crit_temp_tolerance, S_IWUSR | S_IRUGO,
2723 show_temp_tolerance, store_temp_tolerance, 1, 1);
2724 static SENSOR_DEVICE_ATTR_2(pwm3_crit_temp_tolerance, S_IWUSR | S_IRUGO,
2725 show_temp_tolerance, store_temp_tolerance, 2, 1);
2726 static SENSOR_DEVICE_ATTR_2(pwm4_crit_temp_tolerance, S_IWUSR | S_IRUGO,
2727 show_temp_tolerance, store_temp_tolerance, 3, 1);
2728 static SENSOR_DEVICE_ATTR_2(pwm5_crit_temp_tolerance, S_IWUSR | S_IRUGO,
2729 show_temp_tolerance, store_temp_tolerance, 4, 1);
2731 /* pwm_max is not supported on all chips */
2732 static struct sensor_device_attribute_2 sda_pwm_max[] = {
2733 SENSOR_ATTR_2(pwm1_max, S_IWUSR | S_IRUGO, show_pwm, store_pwm,
2735 SENSOR_ATTR_2(pwm2_max, S_IWUSR | S_IRUGO, show_pwm, store_pwm,
2737 SENSOR_ATTR_2(pwm3_max, S_IWUSR | S_IRUGO, show_pwm, store_pwm,
2739 SENSOR_ATTR_2(pwm4_max, S_IWUSR | S_IRUGO, show_pwm, store_pwm,
2741 SENSOR_ATTR_2(pwm5_max, S_IWUSR | S_IRUGO, show_pwm, store_pwm,
2745 /* pwm_step is not supported on all chips */
2746 static struct sensor_device_attribute_2 sda_pwm_step[] = {
2747 SENSOR_ATTR_2(pwm1_step, S_IWUSR | S_IRUGO, show_pwm, store_pwm, 0, 4),
2748 SENSOR_ATTR_2(pwm2_step, S_IWUSR | S_IRUGO, show_pwm, store_pwm, 1, 4),
2749 SENSOR_ATTR_2(pwm3_step, S_IWUSR | S_IRUGO, show_pwm, store_pwm, 2, 4),
2750 SENSOR_ATTR_2(pwm4_step, S_IWUSR | S_IRUGO, show_pwm, store_pwm, 3, 4),
2751 SENSOR_ATTR_2(pwm5_step, S_IWUSR | S_IRUGO, show_pwm, store_pwm, 4, 4),
2754 static struct attribute *nct6775_attributes_pwm[5][20] = {
2756 &sensor_dev_attr_pwm1.dev_attr.attr,
2757 &sensor_dev_attr_pwm1_mode.dev_attr.attr,
2758 &sensor_dev_attr_pwm1_enable.dev_attr.attr,
2759 &sensor_dev_attr_pwm1_temp_sel.dev_attr.attr,
2760 &sensor_dev_attr_pwm1_temp_tolerance.dev_attr.attr,
2761 &sensor_dev_attr_pwm1_crit_temp_tolerance.dev_attr.attr,
2762 &sensor_dev_attr_pwm1_target_temp.dev_attr.attr,
2763 &sensor_dev_attr_fan1_target.dev_attr.attr,
2764 &sensor_dev_attr_fan1_tolerance.dev_attr.attr,
2765 &sensor_dev_attr_pwm1_stop_time.dev_attr.attr,
2766 &sensor_dev_attr_pwm1_step_up_time.dev_attr.attr,
2767 &sensor_dev_attr_pwm1_step_down_time.dev_attr.attr,
2768 &sensor_dev_attr_pwm1_start.dev_attr.attr,
2769 &sensor_dev_attr_pwm1_floor.dev_attr.attr,
2770 &sensor_dev_attr_pwm1_weight_temp_sel.dev_attr.attr,
2771 &sensor_dev_attr_pwm1_weight_temp_step.dev_attr.attr,
2772 &sensor_dev_attr_pwm1_weight_temp_step_tol.dev_attr.attr,
2773 &sensor_dev_attr_pwm1_weight_temp_step_base.dev_attr.attr,
2774 &sensor_dev_attr_pwm1_weight_duty_step.dev_attr.attr,
2778 &sensor_dev_attr_pwm2.dev_attr.attr,
2779 &sensor_dev_attr_pwm2_mode.dev_attr.attr,
2780 &sensor_dev_attr_pwm2_enable.dev_attr.attr,
2781 &sensor_dev_attr_pwm2_temp_sel.dev_attr.attr,
2782 &sensor_dev_attr_pwm2_temp_tolerance.dev_attr.attr,
2783 &sensor_dev_attr_pwm2_crit_temp_tolerance.dev_attr.attr,
2784 &sensor_dev_attr_pwm2_target_temp.dev_attr.attr,
2785 &sensor_dev_attr_fan2_target.dev_attr.attr,
2786 &sensor_dev_attr_fan2_tolerance.dev_attr.attr,
2787 &sensor_dev_attr_pwm2_stop_time.dev_attr.attr,
2788 &sensor_dev_attr_pwm2_step_up_time.dev_attr.attr,
2789 &sensor_dev_attr_pwm2_step_down_time.dev_attr.attr,
2790 &sensor_dev_attr_pwm2_start.dev_attr.attr,
2791 &sensor_dev_attr_pwm2_floor.dev_attr.attr,
2792 &sensor_dev_attr_pwm2_weight_temp_sel.dev_attr.attr,
2793 &sensor_dev_attr_pwm2_weight_temp_step.dev_attr.attr,
2794 &sensor_dev_attr_pwm2_weight_temp_step_tol.dev_attr.attr,
2795 &sensor_dev_attr_pwm2_weight_temp_step_base.dev_attr.attr,
2796 &sensor_dev_attr_pwm2_weight_duty_step.dev_attr.attr,
2800 &sensor_dev_attr_pwm3.dev_attr.attr,
2801 &sensor_dev_attr_pwm3_mode.dev_attr.attr,
2802 &sensor_dev_attr_pwm3_enable.dev_attr.attr,
2803 &sensor_dev_attr_pwm3_temp_sel.dev_attr.attr,
2804 &sensor_dev_attr_pwm3_temp_tolerance.dev_attr.attr,
2805 &sensor_dev_attr_pwm3_crit_temp_tolerance.dev_attr.attr,
2806 &sensor_dev_attr_pwm3_target_temp.dev_attr.attr,
2807 &sensor_dev_attr_fan3_target.dev_attr.attr,
2808 &sensor_dev_attr_fan3_tolerance.dev_attr.attr,
2809 &sensor_dev_attr_pwm3_stop_time.dev_attr.attr,
2810 &sensor_dev_attr_pwm3_step_up_time.dev_attr.attr,
2811 &sensor_dev_attr_pwm3_step_down_time.dev_attr.attr,
2812 &sensor_dev_attr_pwm3_start.dev_attr.attr,
2813 &sensor_dev_attr_pwm3_floor.dev_attr.attr,
2814 &sensor_dev_attr_pwm3_weight_temp_sel.dev_attr.attr,
2815 &sensor_dev_attr_pwm3_weight_temp_step.dev_attr.attr,
2816 &sensor_dev_attr_pwm3_weight_temp_step_tol.dev_attr.attr,
2817 &sensor_dev_attr_pwm3_weight_temp_step_base.dev_attr.attr,
2818 &sensor_dev_attr_pwm3_weight_duty_step.dev_attr.attr,
2822 &sensor_dev_attr_pwm4.dev_attr.attr,
2823 &sensor_dev_attr_pwm4_mode.dev_attr.attr,
2824 &sensor_dev_attr_pwm4_enable.dev_attr.attr,
2825 &sensor_dev_attr_pwm4_temp_sel.dev_attr.attr,
2826 &sensor_dev_attr_pwm4_temp_tolerance.dev_attr.attr,
2827 &sensor_dev_attr_pwm4_crit_temp_tolerance.dev_attr.attr,
2828 &sensor_dev_attr_pwm4_target_temp.dev_attr.attr,
2829 &sensor_dev_attr_fan4_target.dev_attr.attr,
2830 &sensor_dev_attr_fan4_tolerance.dev_attr.attr,
2831 &sensor_dev_attr_pwm4_stop_time.dev_attr.attr,
2832 &sensor_dev_attr_pwm4_step_up_time.dev_attr.attr,
2833 &sensor_dev_attr_pwm4_step_down_time.dev_attr.attr,
2834 &sensor_dev_attr_pwm4_start.dev_attr.attr,
2835 &sensor_dev_attr_pwm4_floor.dev_attr.attr,
2836 &sensor_dev_attr_pwm4_weight_temp_sel.dev_attr.attr,
2837 &sensor_dev_attr_pwm4_weight_temp_step.dev_attr.attr,
2838 &sensor_dev_attr_pwm4_weight_temp_step_tol.dev_attr.attr,
2839 &sensor_dev_attr_pwm4_weight_temp_step_base.dev_attr.attr,
2840 &sensor_dev_attr_pwm4_weight_duty_step.dev_attr.attr,
2844 &sensor_dev_attr_pwm5.dev_attr.attr,
2845 &sensor_dev_attr_pwm5_mode.dev_attr.attr,
2846 &sensor_dev_attr_pwm5_enable.dev_attr.attr,
2847 &sensor_dev_attr_pwm5_temp_sel.dev_attr.attr,
2848 &sensor_dev_attr_pwm5_temp_tolerance.dev_attr.attr,
2849 &sensor_dev_attr_pwm5_crit_temp_tolerance.dev_attr.attr,
2850 &sensor_dev_attr_pwm5_target_temp.dev_attr.attr,
2851 &sensor_dev_attr_fan5_target.dev_attr.attr,
2852 &sensor_dev_attr_fan5_tolerance.dev_attr.attr,
2853 &sensor_dev_attr_pwm5_stop_time.dev_attr.attr,
2854 &sensor_dev_attr_pwm5_step_up_time.dev_attr.attr,
2855 &sensor_dev_attr_pwm5_step_down_time.dev_attr.attr,
2856 &sensor_dev_attr_pwm5_start.dev_attr.attr,
2857 &sensor_dev_attr_pwm5_floor.dev_attr.attr,
2858 &sensor_dev_attr_pwm5_weight_temp_sel.dev_attr.attr,
2859 &sensor_dev_attr_pwm5_weight_temp_step.dev_attr.attr,
2860 &sensor_dev_attr_pwm5_weight_temp_step_tol.dev_attr.attr,
2861 &sensor_dev_attr_pwm5_weight_temp_step_base.dev_attr.attr,
2862 &sensor_dev_attr_pwm5_weight_duty_step.dev_attr.attr,
2867 static const struct attribute_group nct6775_group_pwm[5] = {
2868 { .attrs = nct6775_attributes_pwm[0] },
2869 { .attrs = nct6775_attributes_pwm[1] },
2870 { .attrs = nct6775_attributes_pwm[2] },
2871 { .attrs = nct6775_attributes_pwm[3] },
2872 { .attrs = nct6775_attributes_pwm[4] },
2876 show_auto_pwm(struct device *dev, struct device_attribute *attr, char *buf)
2878 struct nct6775_data *data = nct6775_update_device(dev);
2879 struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
2881 return sprintf(buf, "%d\n", data->auto_pwm[sattr->nr][sattr->index]);
2885 store_auto_pwm(struct device *dev, struct device_attribute *attr,
2886 const char *buf, size_t count)
2888 struct nct6775_data *data = dev_get_drvdata(dev);
2889 struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
2891 int point = sattr->index;
2896 err = kstrtoul(buf, 10, &val);
2902 if (point == data->auto_pwm_num) {
2903 if (data->kind != nct6775 && !val)
2905 if (data->kind != nct6779 && val)
2909 mutex_lock(&data->update_lock);
2910 data->auto_pwm[nr][point] = val;
2911 if (point < data->auto_pwm_num) {
2912 nct6775_write_value(data,
2913 NCT6775_AUTO_PWM(data, nr, point),
2914 data->auto_pwm[nr][point]);
2916 switch (data->kind) {
2918 /* disable if needed (pwm == 0) */
2919 reg = nct6775_read_value(data,
2920 NCT6775_REG_CRITICAL_ENAB[nr]);
2925 nct6775_write_value(data, NCT6775_REG_CRITICAL_ENAB[nr],
2929 break; /* always enabled, nothing to do */
2931 nct6775_write_value(data, NCT6779_REG_CRITICAL_PWM[nr],
2933 reg = nct6775_read_value(data,
2934 NCT6779_REG_CRITICAL_PWM_ENABLE[nr]);
2939 nct6775_write_value(data,
2940 NCT6779_REG_CRITICAL_PWM_ENABLE[nr],
2945 mutex_unlock(&data->update_lock);
2950 show_auto_temp(struct device *dev, struct device_attribute *attr, char *buf)
2952 struct nct6775_data *data = nct6775_update_device(dev);
2953 struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
2955 int point = sattr->index;
2958 * We don't know for sure if the temperature is signed or unsigned.
2959 * Assume it is unsigned.
2961 return sprintf(buf, "%d\n", data->auto_temp[nr][point] * 1000);
2965 store_auto_temp(struct device *dev, struct device_attribute *attr,
2966 const char *buf, size_t count)
2968 struct nct6775_data *data = dev_get_drvdata(dev);
2969 struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
2971 int point = sattr->index;
2975 err = kstrtoul(buf, 10, &val);
2981 mutex_lock(&data->update_lock);
2982 data->auto_temp[nr][point] = DIV_ROUND_CLOSEST(val, 1000);
2983 if (point < data->auto_pwm_num) {
2984 nct6775_write_value(data,
2985 NCT6775_AUTO_TEMP(data, nr, point),
2986 data->auto_temp[nr][point]);
2988 nct6775_write_value(data, data->REG_CRITICAL_TEMP[nr],
2989 data->auto_temp[nr][point]);
2991 mutex_unlock(&data->update_lock);
2996 * The number of auto-point trip points is chip dependent.
2997 * Need to check support while generating/removing attribute files.
2999 static struct sensor_device_attribute_2 sda_auto_pwm_arrays[] = {
3000 SENSOR_ATTR_2(pwm1_auto_point1_pwm, S_IWUSR | S_IRUGO,
3001 show_auto_pwm, store_auto_pwm, 0, 0),
3002 SENSOR_ATTR_2(pwm1_auto_point1_temp, S_IWUSR | S_IRUGO,
3003 show_auto_temp, store_auto_temp, 0, 0),
3004 SENSOR_ATTR_2(pwm1_auto_point2_pwm, S_IWUSR | S_IRUGO,
3005 show_auto_pwm, store_auto_pwm, 0, 1),
3006 SENSOR_ATTR_2(pwm1_auto_point2_temp, S_IWUSR | S_IRUGO,
3007 show_auto_temp, store_auto_temp, 0, 1),
3008 SENSOR_ATTR_2(pwm1_auto_point3_pwm, S_IWUSR | S_IRUGO,
3009 show_auto_pwm, store_auto_pwm, 0, 2),
3010 SENSOR_ATTR_2(pwm1_auto_point3_temp, S_IWUSR | S_IRUGO,
3011 show_auto_temp, store_auto_temp, 0, 2),
3012 SENSOR_ATTR_2(pwm1_auto_point4_pwm, S_IWUSR | S_IRUGO,
3013 show_auto_pwm, store_auto_pwm, 0, 3),
3014 SENSOR_ATTR_2(pwm1_auto_point4_temp, S_IWUSR | S_IRUGO,
3015 show_auto_temp, store_auto_temp, 0, 3),
3016 SENSOR_ATTR_2(pwm1_auto_point5_pwm, S_IWUSR | S_IRUGO,
3017 show_auto_pwm, store_auto_pwm, 0, 4),
3018 SENSOR_ATTR_2(pwm1_auto_point5_temp, S_IWUSR | S_IRUGO,
3019 show_auto_temp, store_auto_temp, 0, 4),
3020 SENSOR_ATTR_2(pwm1_auto_point6_pwm, S_IWUSR | S_IRUGO,
3021 show_auto_pwm, store_auto_pwm, 0, 5),
3022 SENSOR_ATTR_2(pwm1_auto_point6_temp, S_IWUSR | S_IRUGO,
3023 show_auto_temp, store_auto_temp, 0, 5),
3024 SENSOR_ATTR_2(pwm1_auto_point7_pwm, S_IWUSR | S_IRUGO,
3025 show_auto_pwm, store_auto_pwm, 0, 6),
3026 SENSOR_ATTR_2(pwm1_auto_point7_temp, S_IWUSR | S_IRUGO,
3027 show_auto_temp, store_auto_temp, 0, 6),
3029 SENSOR_ATTR_2(pwm2_auto_point1_pwm, S_IWUSR | S_IRUGO,
3030 show_auto_pwm, store_auto_pwm, 1, 0),
3031 SENSOR_ATTR_2(pwm2_auto_point1_temp, S_IWUSR | S_IRUGO,
3032 show_auto_temp, store_auto_temp, 1, 0),
3033 SENSOR_ATTR_2(pwm2_auto_point2_pwm, S_IWUSR | S_IRUGO,
3034 show_auto_pwm, store_auto_pwm, 1, 1),
3035 SENSOR_ATTR_2(pwm2_auto_point2_temp, S_IWUSR | S_IRUGO,
3036 show_auto_temp, store_auto_temp, 1, 1),
3037 SENSOR_ATTR_2(pwm2_auto_point3_pwm, S_IWUSR | S_IRUGO,
3038 show_auto_pwm, store_auto_pwm, 1, 2),
3039 SENSOR_ATTR_2(pwm2_auto_point3_temp, S_IWUSR | S_IRUGO,
3040 show_auto_temp, store_auto_temp, 1, 2),
3041 SENSOR_ATTR_2(pwm2_auto_point4_pwm, S_IWUSR | S_IRUGO,
3042 show_auto_pwm, store_auto_pwm, 1, 3),
3043 SENSOR_ATTR_2(pwm2_auto_point4_temp, S_IWUSR | S_IRUGO,
3044 show_auto_temp, store_auto_temp, 1, 3),
3045 SENSOR_ATTR_2(pwm2_auto_point5_pwm, S_IWUSR | S_IRUGO,
3046 show_auto_pwm, store_auto_pwm, 1, 4),
3047 SENSOR_ATTR_2(pwm2_auto_point5_temp, S_IWUSR | S_IRUGO,
3048 show_auto_temp, store_auto_temp, 1, 4),
3049 SENSOR_ATTR_2(pwm2_auto_point6_pwm, S_IWUSR | S_IRUGO,
3050 show_auto_pwm, store_auto_pwm, 1, 5),
3051 SENSOR_ATTR_2(pwm2_auto_point6_temp, S_IWUSR | S_IRUGO,
3052 show_auto_temp, store_auto_temp, 1, 5),
3053 SENSOR_ATTR_2(pwm2_auto_point7_pwm, S_IWUSR | S_IRUGO,
3054 show_auto_pwm, store_auto_pwm, 1, 6),
3055 SENSOR_ATTR_2(pwm2_auto_point7_temp, S_IWUSR | S_IRUGO,
3056 show_auto_temp, store_auto_temp, 1, 6),
3058 SENSOR_ATTR_2(pwm3_auto_point1_pwm, S_IWUSR | S_IRUGO,
3059 show_auto_pwm, store_auto_pwm, 2, 0),
3060 SENSOR_ATTR_2(pwm3_auto_point1_temp, S_IWUSR | S_IRUGO,
3061 show_auto_temp, store_auto_temp, 2, 0),
3062 SENSOR_ATTR_2(pwm3_auto_point2_pwm, S_IWUSR | S_IRUGO,
3063 show_auto_pwm, store_auto_pwm, 2, 1),
3064 SENSOR_ATTR_2(pwm3_auto_point2_temp, S_IWUSR | S_IRUGO,
3065 show_auto_temp, store_auto_temp, 2, 1),
3066 SENSOR_ATTR_2(pwm3_auto_point3_pwm, S_IWUSR | S_IRUGO,
3067 show_auto_pwm, store_auto_pwm, 2, 2),
3068 SENSOR_ATTR_2(pwm3_auto_point3_temp, S_IWUSR | S_IRUGO,
3069 show_auto_temp, store_auto_temp, 2, 2),
3070 SENSOR_ATTR_2(pwm3_auto_point4_pwm, S_IWUSR | S_IRUGO,
3071 show_auto_pwm, store_auto_pwm, 2, 3),
3072 SENSOR_ATTR_2(pwm3_auto_point4_temp, S_IWUSR | S_IRUGO,
3073 show_auto_temp, store_auto_temp, 2, 3),
3074 SENSOR_ATTR_2(pwm3_auto_point5_pwm, S_IWUSR | S_IRUGO,
3075 show_auto_pwm, store_auto_pwm, 2, 4),
3076 SENSOR_ATTR_2(pwm3_auto_point5_temp, S_IWUSR | S_IRUGO,
3077 show_auto_temp, store_auto_temp, 2, 4),
3078 SENSOR_ATTR_2(pwm3_auto_point6_pwm, S_IWUSR | S_IRUGO,
3079 show_auto_pwm, store_auto_pwm, 2, 5),
3080 SENSOR_ATTR_2(pwm3_auto_point6_temp, S_IWUSR | S_IRUGO,
3081 show_auto_temp, store_auto_temp, 2, 5),
3082 SENSOR_ATTR_2(pwm3_auto_point7_pwm, S_IWUSR | S_IRUGO,
3083 show_auto_pwm, store_auto_pwm, 2, 6),
3084 SENSOR_ATTR_2(pwm3_auto_point7_temp, S_IWUSR | S_IRUGO,
3085 show_auto_temp, store_auto_temp, 2, 6),
3087 SENSOR_ATTR_2(pwm4_auto_point1_pwm, S_IWUSR | S_IRUGO,
3088 show_auto_pwm, store_auto_pwm, 3, 0),
3089 SENSOR_ATTR_2(pwm4_auto_point1_temp, S_IWUSR | S_IRUGO,
3090 show_auto_temp, store_auto_temp, 3, 0),
3091 SENSOR_ATTR_2(pwm4_auto_point2_pwm, S_IWUSR | S_IRUGO,
3092 show_auto_pwm, store_auto_pwm, 3, 1),
3093 SENSOR_ATTR_2(pwm4_auto_point2_temp, S_IWUSR | S_IRUGO,
3094 show_auto_temp, store_auto_temp, 3, 1),
3095 SENSOR_ATTR_2(pwm4_auto_point3_pwm, S_IWUSR | S_IRUGO,
3096 show_auto_pwm, store_auto_pwm, 3, 2),
3097 SENSOR_ATTR_2(pwm4_auto_point3_temp, S_IWUSR | S_IRUGO,
3098 show_auto_temp, store_auto_temp, 3, 2),
3099 SENSOR_ATTR_2(pwm4_auto_point4_pwm, S_IWUSR | S_IRUGO,
3100 show_auto_pwm, store_auto_pwm, 3, 3),
3101 SENSOR_ATTR_2(pwm4_auto_point4_temp, S_IWUSR | S_IRUGO,
3102 show_auto_temp, store_auto_temp, 3, 3),
3103 SENSOR_ATTR_2(pwm4_auto_point5_pwm, S_IWUSR | S_IRUGO,
3104 show_auto_pwm, store_auto_pwm, 3, 4),
3105 SENSOR_ATTR_2(pwm4_auto_point5_temp, S_IWUSR | S_IRUGO,
3106 show_auto_temp, store_auto_temp, 3, 4),
3107 SENSOR_ATTR_2(pwm4_auto_point6_pwm, S_IWUSR | S_IRUGO,
3108 show_auto_pwm, store_auto_pwm, 3, 5),
3109 SENSOR_ATTR_2(pwm4_auto_point6_temp, S_IWUSR | S_IRUGO,
3110 show_auto_temp, store_auto_temp, 3, 5),
3111 SENSOR_ATTR_2(pwm4_auto_point7_pwm, S_IWUSR | S_IRUGO,
3112 show_auto_pwm, store_auto_pwm, 3, 6),
3113 SENSOR_ATTR_2(pwm4_auto_point7_temp, S_IWUSR | S_IRUGO,
3114 show_auto_temp, store_auto_temp, 3, 6),
3116 SENSOR_ATTR_2(pwm5_auto_point1_pwm, S_IWUSR | S_IRUGO,
3117 show_auto_pwm, store_auto_pwm, 4, 0),
3118 SENSOR_ATTR_2(pwm5_auto_point1_temp, S_IWUSR | S_IRUGO,
3119 show_auto_temp, store_auto_temp, 4, 0),
3120 SENSOR_ATTR_2(pwm5_auto_point2_pwm, S_IWUSR | S_IRUGO,
3121 show_auto_pwm, store_auto_pwm, 4, 1),
3122 SENSOR_ATTR_2(pwm5_auto_point2_temp, S_IWUSR | S_IRUGO,
3123 show_auto_temp, store_auto_temp, 4, 1),
3124 SENSOR_ATTR_2(pwm5_auto_point3_pwm, S_IWUSR | S_IRUGO,
3125 show_auto_pwm, store_auto_pwm, 4, 2),
3126 SENSOR_ATTR_2(pwm5_auto_point3_temp, S_IWUSR | S_IRUGO,
3127 show_auto_temp, store_auto_temp, 4, 2),
3128 SENSOR_ATTR_2(pwm5_auto_point4_pwm, S_IWUSR | S_IRUGO,
3129 show_auto_pwm, store_auto_pwm, 4, 3),
3130 SENSOR_ATTR_2(pwm5_auto_point4_temp, S_IWUSR | S_IRUGO,
3131 show_auto_temp, store_auto_temp, 4, 3),
3132 SENSOR_ATTR_2(pwm5_auto_point5_pwm, S_IWUSR | S_IRUGO,
3133 show_auto_pwm, store_auto_pwm, 4, 4),
3134 SENSOR_ATTR_2(pwm5_auto_point5_temp, S_IWUSR | S_IRUGO,
3135 show_auto_temp, store_auto_temp, 4, 4),
3136 SENSOR_ATTR_2(pwm5_auto_point6_pwm, S_IWUSR | S_IRUGO,
3137 show_auto_pwm, store_auto_pwm, 4, 5),
3138 SENSOR_ATTR_2(pwm5_auto_point6_temp, S_IWUSR | S_IRUGO,
3139 show_auto_temp, store_auto_temp, 4, 5),
3140 SENSOR_ATTR_2(pwm5_auto_point7_pwm, S_IWUSR | S_IRUGO,
3141 show_auto_pwm, store_auto_pwm, 4, 6),
3142 SENSOR_ATTR_2(pwm5_auto_point7_temp, S_IWUSR | S_IRUGO,
3143 show_auto_temp, store_auto_temp, 4, 6),
3147 show_vid(struct device *dev, struct device_attribute *attr, char *buf)
3149 struct nct6775_data *data = dev_get_drvdata(dev);
3150 return sprintf(buf, "%d\n", vid_from_reg(data->vid, data->vrm));
3153 static DEVICE_ATTR(cpu0_vid, S_IRUGO, show_vid, NULL);
3155 /* Case open detection */
3158 clear_caseopen(struct device *dev, struct device_attribute *attr,
3159 const char *buf, size_t count)
3161 struct nct6775_data *data = dev_get_drvdata(dev);
3162 struct nct6775_sio_data *sio_data = dev->platform_data;
3163 int nr = to_sensor_dev_attr(attr)->index - INTRUSION_ALARM_BASE;
3168 if (kstrtoul(buf, 10, &val) || val != 0)
3171 mutex_lock(&data->update_lock);
3174 * Use CR registers to clear caseopen status.
3175 * The CR registers are the same for all chips, and not all chips
3176 * support clearing the caseopen status through "regular" registers.
3178 ret = superio_enter(sio_data->sioreg);
3184 superio_select(sio_data->sioreg, NCT6775_LD_ACPI);
3185 reg = superio_inb(sio_data->sioreg, NCT6775_REG_CR_CASEOPEN_CLR[nr]);
3186 reg |= NCT6775_CR_CASEOPEN_CLR_MASK[nr];
3187 superio_outb(sio_data->sioreg, NCT6775_REG_CR_CASEOPEN_CLR[nr], reg);
3188 reg &= ~NCT6775_CR_CASEOPEN_CLR_MASK[nr];
3189 superio_outb(sio_data->sioreg, NCT6775_REG_CR_CASEOPEN_CLR[nr], reg);
3190 superio_exit(sio_data->sioreg);
3192 data->valid = false; /* Force cache refresh */
3194 mutex_unlock(&data->update_lock);
3198 static struct sensor_device_attribute sda_caseopen[] = {
3199 SENSOR_ATTR(intrusion0_alarm, S_IWUSR | S_IRUGO, show_alarm,
3200 clear_caseopen, INTRUSION_ALARM_BASE),
3201 SENSOR_ATTR(intrusion1_alarm, S_IWUSR | S_IRUGO, show_alarm,
3202 clear_caseopen, INTRUSION_ALARM_BASE + 1),
3206 * Driver and device management
3209 static void nct6775_device_remove_files(struct device *dev)
3212 * some entries in the following arrays may not have been used in
3213 * device_create_file(), but device_remove_file() will ignore them
3216 struct nct6775_data *data = dev_get_drvdata(dev);
3218 for (i = 0; i < data->pwm_num; i++)
3219 sysfs_remove_group(&dev->kobj, &nct6775_group_pwm[i]);
3221 for (i = 0; i < ARRAY_SIZE(sda_pwm_max); i++)
3222 device_remove_file(dev, &sda_pwm_max[i].dev_attr);
3224 for (i = 0; i < ARRAY_SIZE(sda_pwm_step); i++)
3225 device_remove_file(dev, &sda_pwm_step[i].dev_attr);
3227 for (i = 0; i < ARRAY_SIZE(sda_weight_duty_base); i++)
3228 device_remove_file(dev, &sda_weight_duty_base[i].dev_attr);
3230 for (i = 0; i < ARRAY_SIZE(sda_auto_pwm_arrays); i++)
3231 device_remove_file(dev, &sda_auto_pwm_arrays[i].dev_attr);
3233 for (i = 0; i < data->in_num; i++)
3234 sysfs_remove_group(&dev->kobj, &nct6775_group_in[i]);
3236 for (i = 0; i < 5; i++) {
3237 device_remove_file(dev, &sda_fan_input[i].dev_attr);
3238 device_remove_file(dev, &sda_fan_alarm[i].dev_attr);
3239 device_remove_file(dev, &sda_fan_div[i].dev_attr);
3240 device_remove_file(dev, &sda_fan_min[i].dev_attr);
3241 device_remove_file(dev, &sda_fan_pulses[i].dev_attr);
3243 for (i = 0; i < NUM_TEMP; i++) {
3244 if (!(data->have_temp & (1 << i)))
3246 device_remove_file(dev, &sda_temp_input[i].dev_attr);
3247 device_remove_file(dev, &sda_temp_label[i].dev_attr);
3248 device_remove_file(dev, &sda_temp_max[i].dev_attr);
3249 device_remove_file(dev, &sda_temp_max_hyst[i].dev_attr);
3250 device_remove_file(dev, &sda_temp_crit[i].dev_attr);
3251 device_remove_file(dev, &sda_temp_alarm[i].dev_attr);
3252 if (!(data->have_temp_fixed & (1 << i)))
3254 device_remove_file(dev, &sda_temp_type[i].dev_attr);
3255 device_remove_file(dev, &sda_temp_offset[i].dev_attr);
3258 device_remove_file(dev, &sda_caseopen[0].dev_attr);
3259 device_remove_file(dev, &sda_caseopen[1].dev_attr);
3261 device_remove_file(dev, &dev_attr_name);
3262 device_remove_file(dev, &dev_attr_cpu0_vid);
3265 /* Get the monitoring functions started */
3266 static inline void nct6775_init_device(struct nct6775_data *data)
3271 /* Start monitoring if needed */
3272 if (data->REG_CONFIG) {
3273 tmp = nct6775_read_value(data, data->REG_CONFIG);
3275 nct6775_write_value(data, data->REG_CONFIG, tmp | 0x01);
3278 /* Enable temperature sensors if needed */
3279 for (i = 0; i < NUM_TEMP; i++) {
3280 if (!(data->have_temp & (1 << i)))
3282 if (!data->reg_temp_config[i])
3284 tmp = nct6775_read_value(data, data->reg_temp_config[i]);
3286 nct6775_write_value(data, data->reg_temp_config[i],
3290 /* Enable VBAT monitoring if needed */
3291 tmp = nct6775_read_value(data, data->REG_VBAT);
3293 nct6775_write_value(data, data->REG_VBAT, tmp | 0x01);
3295 diode = nct6775_read_value(data, data->REG_DIODE);
3297 for (i = 0; i < data->temp_fixed_num; i++) {
3298 if (!(data->have_temp_fixed & (1 << i)))
3300 if ((tmp & (0x02 << i))) /* diode */
3301 data->temp_type[i] = 3 - ((diode >> i) & 0x02);
3302 else /* thermistor */
3303 data->temp_type[i] = 4;
3308 nct6775_check_fan_inputs(const struct nct6775_sio_data *sio_data,
3309 struct nct6775_data *data)
3312 bool fan3pin, fan3min, fan4pin, fan4min, fan5pin;
3313 bool pwm3pin, pwm4pin, pwm5pin;
3316 ret = superio_enter(sio_data->sioreg);
3320 /* fan4 and fan5 share some pins with the GPIO and serial flash */
3321 if (data->kind == nct6775) {
3322 regval = superio_inb(sio_data->sioreg, 0x2c);
3324 fan3pin = regval & (1 << 6);
3326 pwm3pin = regval & (1 << 7);
3328 /* On NCT6775, fan4 shares pins with the fdc interface */
3329 fan4pin = !(superio_inb(sio_data->sioreg, 0x2A) & 0x80);
3334 } else if (data->kind == nct6776) {
3335 bool gpok = superio_inb(sio_data->sioreg, 0x27) & 0x80;
3337 superio_select(sio_data->sioreg, NCT6775_LD_HWM);
3338 regval = superio_inb(sio_data->sioreg, SIO_REG_ENABLE);
3343 fan3pin = !(superio_inb(sio_data->sioreg, 0x24) & 0x40);
3348 fan4pin = superio_inb(sio_data->sioreg, 0x1C) & 0x01;
3353 fan5pin = superio_inb(sio_data->sioreg, 0x1C) & 0x02;
3360 } else { /* NCT6779D */
3361 regval = superio_inb(sio_data->sioreg, 0x1c);
3363 fan3pin = !(regval & (1 << 5));
3364 fan4pin = !(regval & (1 << 6));
3365 fan5pin = !(regval & (1 << 7));
3367 pwm3pin = !(regval & (1 << 0));
3368 pwm4pin = !(regval & (1 << 1));
3369 pwm5pin = !(regval & (1 << 2));
3375 superio_exit(sio_data->sioreg);
3377 data->has_fan = data->has_fan_min = 0x03; /* fan1 and fan2 */
3378 data->has_fan |= fan3pin << 2;
3379 data->has_fan_min |= fan3min << 2;
3381 data->has_fan |= (fan4pin << 3) | (fan5pin << 4);
3382 data->has_fan_min |= (fan4min << 3) | (fan5pin << 4);
3384 data->has_pwm = 0x03 | (pwm3pin << 2) | (pwm4pin << 3) | (pwm5pin << 4);
3389 static void add_temp_sensors(struct nct6775_data *data, const u16 *regp,
3390 int *available, int *mask)
3395 for (i = 0; i < data->pwm_num && *available; i++) {
3400 src = nct6775_read_value(data, regp[i]);
3402 if (!src || (*mask & (1 << src)))
3404 if (src >= data->temp_label_num ||
3405 !strlen(data->temp_label[src]))
3408 index = __ffs(*available);
3409 nct6775_write_value(data, data->REG_TEMP_SOURCE[index], src);
3410 *available &= ~(1 << index);
3415 static int nct6775_probe(struct platform_device *pdev)
3417 struct device *dev = &pdev->dev;
3418 struct nct6775_sio_data *sio_data = dev->platform_data;
3419 struct nct6775_data *data;
3420 struct resource *res;
3422 int src, mask, available;
3423 const u16 *reg_temp, *reg_temp_over, *reg_temp_hyst, *reg_temp_config;
3424 const u16 *reg_temp_alternate, *reg_temp_crit;
3426 bool have_vid = false;
3429 res = platform_get_resource(pdev, IORESOURCE_IO, 0);
3430 if (!devm_request_region(&pdev->dev, res->start, IOREGION_LENGTH,
3434 data = devm_kzalloc(&pdev->dev, sizeof(struct nct6775_data),
3439 data->kind = sio_data->kind;
3440 data->addr = res->start;
3441 mutex_init(&data->update_lock);
3442 data->name = nct6775_device_names[data->kind];
3443 data->bank = 0xff; /* Force initial bank selection */
3444 platform_set_drvdata(pdev, data);
3446 switch (data->kind) {
3450 data->auto_pwm_num = 6;
3451 data->has_fan_div = true;
3452 data->temp_fixed_num = 3;
3453 data->num_temp_alarms = 3;
3455 data->ALARM_BITS = NCT6775_ALARM_BITS;
3457 data->fan_from_reg = fan_from_reg16;
3458 data->fan_from_reg_min = fan_from_reg8;
3459 data->target_temp_mask = 0x7f;
3460 data->tolerance_mask = 0x0f;
3461 data->speed_tolerance_limit = 15;
3463 data->temp_label = nct6775_temp_label;
3464 data->temp_label_num = ARRAY_SIZE(nct6775_temp_label);
3466 data->REG_CONFIG = NCT6775_REG_CONFIG;
3467 data->REG_VBAT = NCT6775_REG_VBAT;
3468 data->REG_DIODE = NCT6775_REG_DIODE;
3469 data->REG_VIN = NCT6775_REG_IN;
3470 data->REG_IN_MINMAX[0] = NCT6775_REG_IN_MIN;
3471 data->REG_IN_MINMAX[1] = NCT6775_REG_IN_MAX;
3472 data->REG_TARGET = NCT6775_REG_TARGET;
3473 data->REG_FAN = NCT6775_REG_FAN;
3474 data->REG_FAN_MODE = NCT6775_REG_FAN_MODE;
3475 data->REG_FAN_MIN = NCT6775_REG_FAN_MIN;
3476 data->REG_FAN_PULSES = NCT6775_REG_FAN_PULSES;
3477 data->REG_FAN_TIME[0] = NCT6775_REG_FAN_STOP_TIME;
3478 data->REG_FAN_TIME[1] = NCT6775_REG_FAN_STEP_UP_TIME;
3479 data->REG_FAN_TIME[2] = NCT6775_REG_FAN_STEP_DOWN_TIME;
3480 data->REG_PWM[0] = NCT6775_REG_PWM;
3481 data->REG_PWM[1] = NCT6775_REG_FAN_START_OUTPUT;
3482 data->REG_PWM[2] = NCT6775_REG_FAN_STOP_OUTPUT;
3483 data->REG_PWM[3] = NCT6775_REG_FAN_MAX_OUTPUT;
3484 data->REG_PWM[4] = NCT6775_REG_FAN_STEP_OUTPUT;
3485 data->REG_PWM[5] = NCT6775_REG_WEIGHT_DUTY_STEP;
3486 data->REG_PWM_READ = NCT6775_REG_PWM_READ;
3487 data->REG_PWM_MODE = NCT6775_REG_PWM_MODE;
3488 data->PWM_MODE_MASK = NCT6775_PWM_MODE_MASK;
3489 data->REG_AUTO_TEMP = NCT6775_REG_AUTO_TEMP;
3490 data->REG_AUTO_PWM = NCT6775_REG_AUTO_PWM;
3491 data->REG_CRITICAL_TEMP = NCT6775_REG_CRITICAL_TEMP;
3492 data->REG_CRITICAL_TEMP_TOLERANCE
3493 = NCT6775_REG_CRITICAL_TEMP_TOLERANCE;
3494 data->REG_TEMP_OFFSET = NCT6775_REG_TEMP_OFFSET;
3495 data->REG_TEMP_SOURCE = NCT6775_REG_TEMP_SOURCE;
3496 data->REG_TEMP_SEL = NCT6775_REG_TEMP_SEL;
3497 data->REG_WEIGHT_TEMP_SEL = NCT6775_REG_WEIGHT_TEMP_SEL;
3498 data->REG_WEIGHT_TEMP[0] = NCT6775_REG_WEIGHT_TEMP_STEP;
3499 data->REG_WEIGHT_TEMP[1] = NCT6775_REG_WEIGHT_TEMP_STEP_TOL;
3500 data->REG_WEIGHT_TEMP[2] = NCT6775_REG_WEIGHT_TEMP_BASE;
3501 data->REG_ALARM = NCT6775_REG_ALARM;
3503 reg_temp = NCT6775_REG_TEMP;
3504 num_reg_temp = ARRAY_SIZE(NCT6775_REG_TEMP);
3505 reg_temp_over = NCT6775_REG_TEMP_OVER;
3506 reg_temp_hyst = NCT6775_REG_TEMP_HYST;
3507 reg_temp_config = NCT6775_REG_TEMP_CONFIG;
3508 reg_temp_alternate = NCT6775_REG_TEMP_ALTERNATE;
3509 reg_temp_crit = NCT6775_REG_TEMP_CRIT;
3515 data->auto_pwm_num = 4;
3516 data->has_fan_div = false;
3517 data->temp_fixed_num = 3;
3518 data->num_temp_alarms = 3;
3520 data->ALARM_BITS = NCT6776_ALARM_BITS;
3522 data->fan_from_reg = fan_from_reg13;
3523 data->fan_from_reg_min = fan_from_reg13;
3524 data->target_temp_mask = 0xff;
3525 data->tolerance_mask = 0x07;
3526 data->speed_tolerance_limit = 63;
3528 data->temp_label = nct6776_temp_label;
3529 data->temp_label_num = ARRAY_SIZE(nct6776_temp_label);
3531 data->REG_CONFIG = NCT6775_REG_CONFIG;
3532 data->REG_VBAT = NCT6775_REG_VBAT;
3533 data->REG_DIODE = NCT6775_REG_DIODE;
3534 data->REG_VIN = NCT6775_REG_IN;
3535 data->REG_IN_MINMAX[0] = NCT6775_REG_IN_MIN;
3536 data->REG_IN_MINMAX[1] = NCT6775_REG_IN_MAX;
3537 data->REG_TARGET = NCT6775_REG_TARGET;
3538 data->REG_FAN = NCT6775_REG_FAN;
3539 data->REG_FAN_MODE = NCT6775_REG_FAN_MODE;
3540 data->REG_FAN_MIN = NCT6776_REG_FAN_MIN;
3541 data->REG_FAN_PULSES = NCT6776_REG_FAN_PULSES;
3542 data->REG_FAN_TIME[0] = NCT6775_REG_FAN_STOP_TIME;
3543 data->REG_FAN_TIME[1] = NCT6775_REG_FAN_STEP_UP_TIME;
3544 data->REG_FAN_TIME[2] = NCT6775_REG_FAN_STEP_DOWN_TIME;
3545 data->REG_TOLERANCE_H = NCT6776_REG_TOLERANCE_H;
3546 data->REG_PWM[0] = NCT6775_REG_PWM;
3547 data->REG_PWM[1] = NCT6775_REG_FAN_START_OUTPUT;
3548 data->REG_PWM[2] = NCT6775_REG_FAN_STOP_OUTPUT;
3549 data->REG_PWM[5] = NCT6775_REG_WEIGHT_DUTY_STEP;
3550 data->REG_PWM[6] = NCT6776_REG_WEIGHT_DUTY_BASE;
3551 data->REG_PWM_READ = NCT6775_REG_PWM_READ;
3552 data->REG_PWM_MODE = NCT6776_REG_PWM_MODE;
3553 data->PWM_MODE_MASK = NCT6776_PWM_MODE_MASK;
3554 data->REG_AUTO_TEMP = NCT6775_REG_AUTO_TEMP;
3555 data->REG_AUTO_PWM = NCT6775_REG_AUTO_PWM;
3556 data->REG_CRITICAL_TEMP = NCT6775_REG_CRITICAL_TEMP;
3557 data->REG_CRITICAL_TEMP_TOLERANCE
3558 = NCT6775_REG_CRITICAL_TEMP_TOLERANCE;
3559 data->REG_TEMP_OFFSET = NCT6775_REG_TEMP_OFFSET;
3560 data->REG_TEMP_SOURCE = NCT6775_REG_TEMP_SOURCE;
3561 data->REG_TEMP_SEL = NCT6775_REG_TEMP_SEL;
3562 data->REG_WEIGHT_TEMP_SEL = NCT6775_REG_WEIGHT_TEMP_SEL;
3563 data->REG_WEIGHT_TEMP[0] = NCT6775_REG_WEIGHT_TEMP_STEP;
3564 data->REG_WEIGHT_TEMP[1] = NCT6775_REG_WEIGHT_TEMP_STEP_TOL;
3565 data->REG_WEIGHT_TEMP[2] = NCT6775_REG_WEIGHT_TEMP_BASE;
3566 data->REG_ALARM = NCT6775_REG_ALARM;
3568 reg_temp = NCT6775_REG_TEMP;
3569 num_reg_temp = ARRAY_SIZE(NCT6775_REG_TEMP);
3570 reg_temp_over = NCT6775_REG_TEMP_OVER;
3571 reg_temp_hyst = NCT6775_REG_TEMP_HYST;
3572 reg_temp_config = NCT6776_REG_TEMP_CONFIG;
3573 reg_temp_alternate = NCT6776_REG_TEMP_ALTERNATE;
3574 reg_temp_crit = NCT6776_REG_TEMP_CRIT;
3580 data->auto_pwm_num = 4;
3581 data->has_fan_div = false;
3582 data->temp_fixed_num = 6;
3583 data->num_temp_alarms = 2;
3585 data->ALARM_BITS = NCT6779_ALARM_BITS;
3587 data->fan_from_reg = fan_from_reg13;
3588 data->fan_from_reg_min = fan_from_reg13;
3589 data->target_temp_mask = 0xff;
3590 data->tolerance_mask = 0x07;
3591 data->speed_tolerance_limit = 63;
3593 data->temp_label = nct6779_temp_label;
3594 data->temp_label_num = ARRAY_SIZE(nct6779_temp_label);
3596 data->REG_CONFIG = NCT6775_REG_CONFIG;
3597 data->REG_VBAT = NCT6775_REG_VBAT;
3598 data->REG_DIODE = NCT6775_REG_DIODE;
3599 data->REG_VIN = NCT6779_REG_IN;
3600 data->REG_IN_MINMAX[0] = NCT6775_REG_IN_MIN;
3601 data->REG_IN_MINMAX[1] = NCT6775_REG_IN_MAX;
3602 data->REG_TARGET = NCT6775_REG_TARGET;
3603 data->REG_FAN = NCT6779_REG_FAN;
3604 data->REG_FAN_MODE = NCT6775_REG_FAN_MODE;
3605 data->REG_FAN_MIN = NCT6776_REG_FAN_MIN;
3606 data->REG_FAN_PULSES = NCT6779_REG_FAN_PULSES;
3607 data->REG_FAN_TIME[0] = NCT6775_REG_FAN_STOP_TIME;
3608 data->REG_FAN_TIME[1] = NCT6775_REG_FAN_STEP_UP_TIME;
3609 data->REG_FAN_TIME[2] = NCT6775_REG_FAN_STEP_DOWN_TIME;
3610 data->REG_TOLERANCE_H = NCT6776_REG_TOLERANCE_H;
3611 data->REG_PWM[0] = NCT6775_REG_PWM;
3612 data->REG_PWM[1] = NCT6775_REG_FAN_START_OUTPUT;
3613 data->REG_PWM[2] = NCT6775_REG_FAN_STOP_OUTPUT;
3614 data->REG_PWM[5] = NCT6775_REG_WEIGHT_DUTY_STEP;
3615 data->REG_PWM[6] = NCT6776_REG_WEIGHT_DUTY_BASE;
3616 data->REG_PWM_READ = NCT6775_REG_PWM_READ;
3617 data->REG_PWM_MODE = NCT6776_REG_PWM_MODE;
3618 data->PWM_MODE_MASK = NCT6776_PWM_MODE_MASK;
3619 data->REG_AUTO_TEMP = NCT6775_REG_AUTO_TEMP;
3620 data->REG_AUTO_PWM = NCT6775_REG_AUTO_PWM;
3621 data->REG_CRITICAL_TEMP = NCT6775_REG_CRITICAL_TEMP;
3622 data->REG_CRITICAL_TEMP_TOLERANCE
3623 = NCT6775_REG_CRITICAL_TEMP_TOLERANCE;
3624 data->REG_TEMP_OFFSET = NCT6779_REG_TEMP_OFFSET;
3625 data->REG_TEMP_SOURCE = NCT6775_REG_TEMP_SOURCE;
3626 data->REG_TEMP_SEL = NCT6775_REG_TEMP_SEL;
3627 data->REG_WEIGHT_TEMP_SEL = NCT6775_REG_WEIGHT_TEMP_SEL;
3628 data->REG_WEIGHT_TEMP[0] = NCT6775_REG_WEIGHT_TEMP_STEP;
3629 data->REG_WEIGHT_TEMP[1] = NCT6775_REG_WEIGHT_TEMP_STEP_TOL;
3630 data->REG_WEIGHT_TEMP[2] = NCT6775_REG_WEIGHT_TEMP_BASE;
3631 data->REG_ALARM = NCT6779_REG_ALARM;
3633 reg_temp = NCT6779_REG_TEMP;
3634 num_reg_temp = ARRAY_SIZE(NCT6779_REG_TEMP);
3635 reg_temp_over = NCT6779_REG_TEMP_OVER;
3636 reg_temp_hyst = NCT6779_REG_TEMP_HYST;
3637 reg_temp_config = NCT6779_REG_TEMP_CONFIG;
3638 reg_temp_alternate = NCT6779_REG_TEMP_ALTERNATE;
3639 reg_temp_crit = NCT6779_REG_TEMP_CRIT;
3645 data->have_in = (1 << data->in_num) - 1;
3646 data->have_temp = 0;
3649 * On some boards, not all available temperature sources are monitored,
3650 * even though some of the monitoring registers are unused.
3651 * Get list of unused monitoring registers, then detect if any fan
3652 * controls are configured to use unmonitored temperature sources.
3653 * If so, assign the unmonitored temperature sources to available
3654 * monitoring registers.
3658 for (i = 0; i < num_reg_temp; i++) {
3659 if (reg_temp[i] == 0)
3662 src = nct6775_read_value(data, data->REG_TEMP_SOURCE[i]) & 0x1f;
3663 if (!src || (mask & (1 << src)))
3664 available |= 1 << i;
3670 * Now find unmonitored temperature registers and enable monitoring
3671 * if additional monitoring registers are available.
3673 add_temp_sensors(data, data->REG_TEMP_SEL, &available, &mask);
3674 add_temp_sensors(data, data->REG_WEIGHT_TEMP_SEL, &available, &mask);
3677 s = NUM_TEMP_FIXED; /* First dynamic temperature attribute */
3678 for (i = 0; i < num_reg_temp; i++) {
3679 if (reg_temp[i] == 0)
3682 src = nct6775_read_value(data, data->REG_TEMP_SOURCE[i]) & 0x1f;
3683 if (!src || (mask & (1 << src)))
3686 if (src >= data->temp_label_num ||
3687 !strlen(data->temp_label[src])) {
3689 "Invalid temperature source %d at index %d, source register 0x%x, temp register 0x%x\n",
3690 src, i, data->REG_TEMP_SOURCE[i], reg_temp[i]);
3696 /* Use fixed index for SYSTIN(1), CPUTIN(2), AUXTIN(3) */
3697 if (src <= data->temp_fixed_num) {
3698 data->have_temp |= 1 << (src - 1);
3699 data->have_temp_fixed |= 1 << (src - 1);
3700 data->reg_temp[0][src - 1] = reg_temp[i];
3701 data->reg_temp[1][src - 1] = reg_temp_over[i];
3702 data->reg_temp[2][src - 1] = reg_temp_hyst[i];
3703 data->reg_temp_config[src - 1] = reg_temp_config[i];
3704 data->temp_src[src - 1] = src;
3711 /* Use dynamic index for other sources */
3712 data->have_temp |= 1 << s;
3713 data->reg_temp[0][s] = reg_temp[i];
3714 data->reg_temp[1][s] = reg_temp_over[i];
3715 data->reg_temp[2][s] = reg_temp_hyst[i];
3716 data->reg_temp_config[s] = reg_temp_config[i];
3717 if (reg_temp_crit[src - 1])
3718 data->reg_temp[3][s] = reg_temp_crit[src - 1];
3720 data->temp_src[s] = src;
3724 #ifdef USE_ALTERNATE
3726 * Go through the list of alternate temp registers and enable
3728 * The temperature is already monitored if the respective bit in <mask>
3731 for (i = 0; i < data->temp_label_num - 1; i++) {
3732 if (!reg_temp_alternate[i])
3734 if (mask & (1 << (i + 1)))
3736 if (i < data->temp_fixed_num) {
3737 if (data->have_temp & (1 << i))
3739 data->have_temp |= 1 << i;
3740 data->have_temp_fixed |= 1 << i;
3741 data->reg_temp[0][i] = reg_temp_alternate[i];
3742 if (i < num_reg_temp) {
3743 data->reg_temp[1][i] = reg_temp_over[i];
3744 data->reg_temp[2][i] = reg_temp_hyst[i];
3746 data->temp_src[i] = i + 1;
3750 if (s >= NUM_TEMP) /* Abort if no more space */
3753 data->have_temp |= 1 << s;
3754 data->reg_temp[0][s] = reg_temp_alternate[i];
3755 data->temp_src[s] = i + 1;
3758 #endif /* USE_ALTERNATE */
3760 /* Initialize the chip */
3761 nct6775_init_device(data);
3763 err = superio_enter(sio_data->sioreg);
3767 cr2a = superio_inb(sio_data->sioreg, 0x2a);
3768 switch (data->kind) {
3770 have_vid = (cr2a & 0x40);
3773 have_vid = (cr2a & 0x60) == 0x40;
3781 * We can get the VID input values directly at logical device D 0xe3.
3784 superio_select(sio_data->sioreg, NCT6775_LD_VID);
3785 data->vid = superio_inb(sio_data->sioreg, 0xe3);
3786 data->vrm = vid_which_vrm();
3792 superio_select(sio_data->sioreg, NCT6775_LD_HWM);
3793 tmp = superio_inb(sio_data->sioreg,
3794 NCT6775_REG_CR_FAN_DEBOUNCE);
3795 switch (data->kind) {
3804 superio_outb(sio_data->sioreg, NCT6775_REG_CR_FAN_DEBOUNCE,
3806 dev_info(&pdev->dev, "Enabled fan debounce for chip %s\n",
3810 superio_exit(sio_data->sioreg);
3813 err = device_create_file(dev, &dev_attr_cpu0_vid);
3818 err = nct6775_check_fan_inputs(sio_data, data);
3822 /* Read fan clock dividers immediately */
3823 nct6775_init_fan_common(dev, data);
3825 /* Register sysfs hooks */
3826 for (i = 0; i < data->pwm_num; i++) {
3827 if (!(data->has_pwm & (1 << i)))
3830 err = sysfs_create_group(&dev->kobj, &nct6775_group_pwm[i]);
3834 if (data->REG_PWM[3]) {
3835 err = device_create_file(dev,
3836 &sda_pwm_max[i].dev_attr);
3840 if (data->REG_PWM[4]) {
3841 err = device_create_file(dev,
3842 &sda_pwm_step[i].dev_attr);
3846 if (data->REG_PWM[6]) {
3847 err = device_create_file(dev,
3848 &sda_weight_duty_base[i].dev_attr);
3853 for (i = 0; i < ARRAY_SIZE(sda_auto_pwm_arrays); i++) {
3854 struct sensor_device_attribute_2 *attr =
3855 &sda_auto_pwm_arrays[i];
3857 if (!(data->has_pwm & (1 << attr->nr)))
3859 if (attr->index > data->auto_pwm_num)
3861 err = device_create_file(dev, &attr->dev_attr);
3866 for (i = 0; i < data->in_num; i++) {
3867 if (!(data->have_in & (1 << i)))
3869 err = sysfs_create_group(&dev->kobj, &nct6775_group_in[i]);
3874 for (i = 0; i < 5; i++) {
3875 if (data->has_fan & (1 << i)) {
3876 err = device_create_file(dev,
3877 &sda_fan_input[i].dev_attr);
3880 if (data->ALARM_BITS[FAN_ALARM_BASE + i] >= 0) {
3881 err = device_create_file(dev,
3882 &sda_fan_alarm[i].dev_attr);
3886 if (data->kind != nct6776 &&
3887 data->kind != nct6779) {
3888 err = device_create_file(dev,
3889 &sda_fan_div[i].dev_attr);
3893 if (data->has_fan_min & (1 << i)) {
3894 err = device_create_file(dev,
3895 &sda_fan_min[i].dev_attr);
3899 err = device_create_file(dev,
3900 &sda_fan_pulses[i].dev_attr);
3906 for (i = 0; i < NUM_TEMP; i++) {
3907 if (!(data->have_temp & (1 << i)))
3909 err = device_create_file(dev, &sda_temp_input[i].dev_attr);
3912 if (data->temp_label) {
3913 err = device_create_file(dev,
3914 &sda_temp_label[i].dev_attr);
3918 if (data->reg_temp[1][i]) {
3919 err = device_create_file(dev,
3920 &sda_temp_max[i].dev_attr);
3924 if (data->reg_temp[2][i]) {
3925 err = device_create_file(dev,
3926 &sda_temp_max_hyst[i].dev_attr);
3930 if (data->reg_temp[3][i]) {
3931 err = device_create_file(dev,
3932 &sda_temp_crit[i].dev_attr);
3936 if (find_temp_source(data, i, data->num_temp_alarms) >= 0) {
3937 err = device_create_file(dev,
3938 &sda_temp_alarm[i].dev_attr);
3942 if (!(data->have_temp_fixed & (1 << i)))
3944 err = device_create_file(dev, &sda_temp_type[i].dev_attr);
3947 err = device_create_file(dev, &sda_temp_offset[i].dev_attr);
3952 for (i = 0; i < ARRAY_SIZE(sda_caseopen); i++) {
3953 if (data->ALARM_BITS[INTRUSION_ALARM_BASE + i] < 0)
3955 err = device_create_file(dev, &sda_caseopen[i].dev_attr);
3960 err = device_create_file(dev, &dev_attr_name);
3964 data->hwmon_dev = hwmon_device_register(dev);
3965 if (IS_ERR(data->hwmon_dev)) {
3966 err = PTR_ERR(data->hwmon_dev);
3973 nct6775_device_remove_files(dev);
3977 static int nct6775_remove(struct platform_device *pdev)
3979 struct nct6775_data *data = platform_get_drvdata(pdev);
3981 hwmon_device_unregister(data->hwmon_dev);
3982 nct6775_device_remove_files(&pdev->dev);
3988 static int nct6775_suspend(struct device *dev)
3990 struct nct6775_data *data = nct6775_update_device(dev);
3991 struct nct6775_sio_data *sio_data = dev->platform_data;
3993 mutex_lock(&data->update_lock);
3994 data->vbat = nct6775_read_value(data, data->REG_VBAT);
3995 if (sio_data->kind == nct6775) {
3996 data->fandiv1 = nct6775_read_value(data, NCT6775_REG_FANDIV1);
3997 data->fandiv2 = nct6775_read_value(data, NCT6775_REG_FANDIV2);
3999 mutex_unlock(&data->update_lock);
4004 static int nct6775_resume(struct device *dev)
4006 struct nct6775_data *data = dev_get_drvdata(dev);
4007 struct nct6775_sio_data *sio_data = dev->platform_data;
4010 mutex_lock(&data->update_lock);
4011 data->bank = 0xff; /* Force initial bank selection */
4013 /* Restore limits */
4014 for (i = 0; i < data->in_num; i++) {
4015 if (!(data->have_in & (1 << i)))
4018 nct6775_write_value(data, data->REG_IN_MINMAX[0][i],
4020 nct6775_write_value(data, data->REG_IN_MINMAX[1][i],
4024 for (i = 0; i < ARRAY_SIZE(data->fan_min); i++) {
4025 if (!(data->has_fan_min & (1 << i)))
4028 nct6775_write_value(data, data->REG_FAN_MIN[i],
4032 for (i = 0; i < NUM_TEMP; i++) {
4033 if (!(data->have_temp & (1 << i)))
4036 for (j = 1; j < ARRAY_SIZE(data->reg_temp); j++)
4037 if (data->reg_temp[j][i])
4038 nct6775_write_temp(data, data->reg_temp[j][i],
4042 /* Restore other settings */
4043 nct6775_write_value(data, data->REG_VBAT, data->vbat);
4044 if (sio_data->kind == nct6775) {
4045 nct6775_write_value(data, NCT6775_REG_FANDIV1, data->fandiv1);
4046 nct6775_write_value(data, NCT6775_REG_FANDIV2, data->fandiv2);
4049 /* Force re-reading all values */
4050 data->valid = false;
4051 mutex_unlock(&data->update_lock);
4056 static const struct dev_pm_ops nct6775_dev_pm_ops = {
4057 .suspend = nct6775_suspend,
4058 .resume = nct6775_resume,
4061 #define NCT6775_DEV_PM_OPS (&nct6775_dev_pm_ops)
4063 #define NCT6775_DEV_PM_OPS NULL
4064 #endif /* CONFIG_PM */
4066 static struct platform_driver nct6775_driver = {
4068 .owner = THIS_MODULE,
4070 .pm = NCT6775_DEV_PM_OPS,
4072 .probe = nct6775_probe,
4073 .remove = nct6775_remove,
4076 static const char * const nct6775_sio_names[] __initconst = {
4082 /* nct6775_find() looks for a '627 in the Super-I/O config space */
4083 static int __init nct6775_find(int sioaddr, unsigned short *addr,
4084 struct nct6775_sio_data *sio_data)
4089 err = superio_enter(sioaddr);
4096 val = (superio_inb(sioaddr, SIO_REG_DEVID) << 8)
4097 | superio_inb(sioaddr, SIO_REG_DEVID + 1);
4098 switch (val & SIO_ID_MASK) {
4099 case SIO_NCT6775_ID:
4100 sio_data->kind = nct6775;
4102 case SIO_NCT6776_ID:
4103 sio_data->kind = nct6776;
4105 case SIO_NCT6779_ID:
4106 sio_data->kind = nct6779;
4110 pr_debug("unsupported chip ID: 0x%04x\n", val);
4111 superio_exit(sioaddr);
4115 /* We have a known chip, find the HWM I/O address */
4116 superio_select(sioaddr, NCT6775_LD_HWM);
4117 val = (superio_inb(sioaddr, SIO_REG_ADDR) << 8)
4118 | superio_inb(sioaddr, SIO_REG_ADDR + 1);
4119 *addr = val & IOREGION_ALIGNMENT;
4121 pr_err("Refusing to enable a Super-I/O device with a base I/O port 0\n");
4122 superio_exit(sioaddr);
4126 /* Activate logical device if needed */
4127 val = superio_inb(sioaddr, SIO_REG_ENABLE);
4128 if (!(val & 0x01)) {
4129 pr_warn("Forcibly enabling Super-I/O. Sensor is probably unusable.\n");
4130 superio_outb(sioaddr, SIO_REG_ENABLE, val | 0x01);
4133 superio_exit(sioaddr);
4134 pr_info("Found %s or compatible chip at %#x\n",
4135 nct6775_sio_names[sio_data->kind], *addr);
4136 sio_data->sioreg = sioaddr;
4142 * when Super-I/O functions move to a separate file, the Super-I/O
4143 * bus will manage the lifetime of the device and this module will only keep
4144 * track of the nct6775 driver. But since we platform_device_alloc(), we
4145 * must keep track of the device
4147 static struct platform_device *pdev;
4149 static int __init sensors_nct6775_init(void)
4152 unsigned short address;
4153 struct resource res;
4154 struct nct6775_sio_data sio_data;
4157 * initialize sio_data->kind and sio_data->sioreg.
4159 * when Super-I/O functions move to a separate file, the Super-I/O
4160 * driver will probe 0x2e and 0x4e and auto-detect the presence of a
4161 * nct6775 hardware monitor, and call probe()
4163 if (nct6775_find(0x2e, &address, &sio_data) &&
4164 nct6775_find(0x4e, &address, &sio_data))
4167 err = platform_driver_register(&nct6775_driver);
4171 pdev = platform_device_alloc(DRVNAME, address);
4174 pr_err("Device allocation failed\n");
4175 goto exit_unregister;
4178 err = platform_device_add_data(pdev, &sio_data,
4179 sizeof(struct nct6775_sio_data));
4181 pr_err("Platform data allocation failed\n");
4182 goto exit_device_put;
4185 memset(&res, 0, sizeof(res));
4187 res.start = address + IOREGION_OFFSET;
4188 res.end = address + IOREGION_OFFSET + IOREGION_LENGTH - 1;
4189 res.flags = IORESOURCE_IO;
4191 err = acpi_check_resource_conflict(&res);
4193 goto exit_device_put;
4195 err = platform_device_add_resources(pdev, &res, 1);
4197 pr_err("Device resource addition failed (%d)\n", err);
4198 goto exit_device_put;
4201 /* platform_device_add calls probe() */
4202 err = platform_device_add(pdev);
4204 pr_err("Device addition failed (%d)\n", err);
4205 goto exit_device_put;
4211 platform_device_put(pdev);
4213 platform_driver_unregister(&nct6775_driver);
4218 static void __exit sensors_nct6775_exit(void)
4220 platform_device_unregister(pdev);
4221 platform_driver_unregister(&nct6775_driver);
4224 MODULE_AUTHOR("Guenter Roeck <linux@roeck-us.net>");
4225 MODULE_DESCRIPTION("NCT6775F/NCT6776F/NCT6779D driver");
4226 MODULE_LICENSE("GPL");
4228 module_init(sensors_nct6775_init);
4229 module_exit(sensors_nct6775_exit);