drivers/hwmon/w83627hf.c

   1 /*
   2     w83627hf.c - Part of lm_sensors, Linux kernel modules for hardware
   3                 monitoring
   4     Copyright (c) 1998 - 2003  Frodo Looijaard <frodol@dds.nl>,
   5     Philip Edelbrock <phil@netroedge.com>,
   6     and Mark Studebaker <mdsxyz123@yahoo.com>
   7     Ported to 2.6 by Bernhard C. Schrenk <clemy@clemy.org>
   8
   9     This program is free software; you can redistribute it and/or modify
  10     it under the terms of the GNU General Public License as published by
  11     the Free Software Foundation; either version 2 of the License, or
  12     (at your option) any later version.
  13
  14     This program is distributed in the hope that it will be useful,
  15     but WITHOUT ANY WARRANTY; without even the implied warranty of
  16     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  17     GNU General Public License for more details.
  18
  19     You should have received a copy of the GNU General Public License
  20     along with this program; if not, write to the Free Software
  21     Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  22 */
  23
  24 /*
  25     Supports following chips:
  26
  27     Chip        #vin    #fanin  #pwm    #temp   wchipid vendid  i2c     ISA
  28     w83627hf    9       3       2       3       0x20    0x5ca3  no      yes(LPC)
  29     w83627thf   7       3       3       3       0x90    0x5ca3  no      yes(LPC)
  30     w83637hf    7       3       3       3       0x80    0x5ca3  no      yes(LPC)
  31     w83697hf    8       2       2       2       0x60    0x5ca3  no      yes(LPC)
  32
  33     For other winbond chips, and for i2c support in the above chips,
  34     use w83781d.c.
  35
  36     Note: automatic ("cruise") fan control for 697, 637 & 627thf not
  37     supported yet.
  38 */
  39
  40 #include <linux/module.h>
  41 #include <linux/init.h>
  42 #include <linux/slab.h>
  43 #include <linux/jiffies.h>
  44 #include <linux/i2c.h>
  45 #include <linux/i2c-isa.h>
  46 #include <linux/i2c-sensor.h>
  47 #include <linux/i2c-vid.h>
  48 #include <linux/hwmon.h>
  49 #include <linux/err.h>
  50 #include <asm/io.h>
  51 #include "lm75.h"
  52
  53 static u16 force_addr;
  54 module_param(force_addr, ushort, 0);
  55 MODULE_PARM_DESC(force_addr,
  56                  "Initialize the base address of the sensors");
  57 static u8 force_i2c = 0x1f;
  58 module_param(force_i2c, byte, 0);
  59 MODULE_PARM_DESC(force_i2c,
  60                  "Initialize the i2c address of the sensors");
  61
  62 /* The actual ISA address is read from Super-I/O configuration space */
  63 static unsigned short address;
  64
  65 /* Insmod parameters */
  66 enum chips { any_chip, w83627hf, w83627thf, w83697hf, w83637hf };
  67
  68 static int init = 1;
  69 module_param(init, bool, 0);
  70 MODULE_PARM_DESC(init, "Set to zero to bypass chip initialization");
  71
  72 /* modified from kernel/include/traps.c */
  73 static int REG;         /* The register to read/write */
  74 #define DEV     0x07    /* Register: Logical device select */
  75 static int VAL;         /* The value to read/write */
  76
  77 /* logical device numbers for superio_select (below) */
  78 #define W83627HF_LD_FDC         0x00
  79 #define W83627HF_LD_PRT         0x01
  80 #define W83627HF_LD_UART1       0x02
  81 #define W83627HF_LD_UART2       0x03
  82 #define W83627HF_LD_KBC         0x05
  83 #define W83627HF_LD_CIR         0x06 /* w83627hf only */
  84 #define W83627HF_LD_GAME        0x07
  85 #define W83627HF_LD_MIDI        0x07
  86 #define W83627HF_LD_GPIO1       0x07
  87 #define W83627HF_LD_GPIO5       0x07 /* w83627thf only */
  88 #define W83627HF_LD_GPIO2       0x08
  89 #define W83627HF_LD_GPIO3       0x09
  90 #define W83627HF_LD_GPIO4       0x09 /* w83627thf only */
  91 #define W83627HF_LD_ACPI        0x0a
  92 #define W83627HF_LD_HWM         0x0b
  93
  94 #define DEVID   0x20    /* Register: Device ID */
  95
  96 #define W83627THF_GPIO5_EN      0x30 /* w83627thf only */
  97 #define W83627THF_GPIO5_IOSR    0xf3 /* w83627thf only */
  98 #define W83627THF_GPIO5_DR      0xf4 /* w83627thf only */
  99
 100 static inline void
 101 superio_outb(int reg, int val)
 102 {
 103         outb(reg, REG);
 104         outb(val, VAL);
 105 }
 106
 107 static inline int
 108 superio_inb(int reg)
 109 {
 110         outb(reg, REG);
 111         return inb(VAL);
 112 }
 113
 114 static inline void
 115 superio_select(int ld)
 116 {
 117         outb(DEV, REG);
 118         outb(ld, VAL);
 119 }
 120
 121 static inline void
 122 superio_enter(void)
 123 {
 124         outb(0x87, REG);
 125         outb(0x87, REG);
 126 }
 127
 128 static inline void
 129 superio_exit(void)
 130 {
 131         outb(0xAA, REG);
 132 }
 133
 134 #define W627_DEVID 0x52
 135 #define W627THF_DEVID 0x82
 136 #define W697_DEVID 0x60
 137 #define W637_DEVID 0x70
 138 #define WINB_ACT_REG 0x30
 139 #define WINB_BASE_REG 0x60
 140 /* Constants specified below */
 141
 142 /* Length of ISA address segment */
 143 #define WINB_EXTENT 8
 144
 145 /* Where are the ISA address/data registers relative to the base address */
 146 #define W83781D_ADDR_REG_OFFSET 5
 147 #define W83781D_DATA_REG_OFFSET 6
 148
 149 /* The W83781D registers */
 150 /* The W83782D registers for nr=7,8 are in bank 5 */
 151 #define W83781D_REG_IN_MAX(nr) ((nr < 7) ? (0x2b + (nr) * 2) : \
 152                                            (0x554 + (((nr) - 7) * 2)))
 153 #define W83781D_REG_IN_MIN(nr) ((nr < 7) ? (0x2c + (nr) * 2) : \
 154                                            (0x555 + (((nr) - 7) * 2)))
 155 #define W83781D_REG_IN(nr)     ((nr < 7) ? (0x20 + (nr)) : \
 156                                            (0x550 + (nr) - 7))
 157
 158 #define W83781D_REG_FAN_MIN(nr) (0x3a + (nr))
 159 #define W83781D_REG_FAN(nr) (0x27 + (nr))
 160
 161 #define W83781D_REG_TEMP2_CONFIG 0x152
 162 #define W83781D_REG_TEMP3_CONFIG 0x252
 163 #define W83781D_REG_TEMP(nr)            ((nr == 3) ? (0x0250) : \
 164                                         ((nr == 2) ? (0x0150) : \
 165                                                      (0x27)))
 166 #define W83781D_REG_TEMP_HYST(nr)       ((nr == 3) ? (0x253) : \
 167                                         ((nr == 2) ? (0x153) : \
 168                                                      (0x3A)))
 169 #define W83781D_REG_TEMP_OVER(nr)       ((nr == 3) ? (0x255) : \
 170                                         ((nr == 2) ? (0x155) : \
 171                                                      (0x39)))
 172
 173 #define W83781D_REG_BANK 0x4E
 174
 175 #define W83781D_REG_CONFIG 0x40
 176 #define W83781D_REG_ALARM1 0x41
 177 #define W83781D_REG_ALARM2 0x42
 178 #define W83781D_REG_ALARM3 0x450
 179
 180 #define W83781D_REG_IRQ 0x4C
 181 #define W83781D_REG_BEEP_CONFIG 0x4D
 182 #define W83781D_REG_BEEP_INTS1 0x56
 183 #define W83781D_REG_BEEP_INTS2 0x57
 184 #define W83781D_REG_BEEP_INTS3 0x453
 185
 186 #define W83781D_REG_VID_FANDIV 0x47
 187
 188 #define W83781D_REG_CHIPID 0x49
 189 #define W83781D_REG_WCHIPID 0x58
 190 #define W83781D_REG_CHIPMAN 0x4F
 191 #define W83781D_REG_PIN 0x4B
 192
 193 #define W83781D_REG_VBAT 0x5D
 194
 195 #define W83627HF_REG_PWM1 0x5A
 196 #define W83627HF_REG_PWM2 0x5B
 197 #define W83627HF_REG_PWMCLK12 0x5C
 198
 199 #define W83627THF_REG_PWM1              0x01    /* 697HF and 637HF too */
 200 #define W83627THF_REG_PWM2              0x03    /* 697HF and 637HF too */
 201 #define W83627THF_REG_PWM3              0x11    /* 637HF too */
 202
 203 #define W83627THF_REG_VRM_OVT_CFG       0x18    /* 637HF too */
 204
 205 static const u8 regpwm_627hf[] = { W83627HF_REG_PWM1, W83627HF_REG_PWM2 };
 206 static const u8 regpwm[] = { W83627THF_REG_PWM1, W83627THF_REG_PWM2,
 207                              W83627THF_REG_PWM3 };
 208 #define W836X7HF_REG_PWM(type, nr) (((type) == w83627hf) ? \
 209                                      regpwm_627hf[(nr) - 1] : regpwm[(nr) - 1])
 210
 211 #define W83781D_REG_I2C_ADDR 0x48
 212 #define W83781D_REG_I2C_SUBADDR 0x4A
 213
 214 /* Sensor selection */
 215 #define W83781D_REG_SCFG1 0x5D
 216 static const u8 BIT_SCFG1[] = { 0x02, 0x04, 0x08 };
 217 #define W83781D_REG_SCFG2 0x59
 218 static const u8 BIT_SCFG2[] = { 0x10, 0x20, 0x40 };
 219 #define W83781D_DEFAULT_BETA 3435
 220
 221 /* Conversions. Limit checking is only done on the TO_REG
 222    variants. Note that you should be a bit careful with which arguments
 223    these macros are called: arguments may be evaluated more than once.
 224    Fixing this is just not worth it. */
 225 #define IN_TO_REG(val)  (SENSORS_LIMIT((((val) + 8)/16),0,255))
 226 #define IN_FROM_REG(val) ((val) * 16)
 227
 228 static inline u8 FAN_TO_REG(long rpm, int div)
 229 {
 230         if (rpm == 0)
 231                 return 255;
 232         rpm = SENSORS_LIMIT(rpm, 1, 1000000);
 233         return SENSORS_LIMIT((1350000 + rpm * div / 2) / (rpm * div), 1,
 234                              254);
 235 }
 236
 237 #define TEMP_MIN (-128000)
 238 #define TEMP_MAX ( 127000)
 239
 240 /* TEMP: 0.001C/bit (-128C to +127C)
 241    REG: 1C/bit, two's complement */
 242 static u8 TEMP_TO_REG(int temp)
 243 {
 244         int ntemp = SENSORS_LIMIT(temp, TEMP_MIN, TEMP_MAX);
 245         ntemp += (ntemp<0 ? -500 : 500);
 246         return (u8)(ntemp / 1000);
 247 }
 248
 249 static int TEMP_FROM_REG(u8 reg)
 250 {
 251         return (s8)reg * 1000;
 252 }
 253
 254 #define FAN_FROM_REG(val,div) ((val)==0?-1:(val)==255?0:1350000/((val)*(div)))
 255
 256 #define PWM_TO_REG(val) (SENSORS_LIMIT((val),0,255))
 257
 258 #define BEEP_MASK_FROM_REG(val)          (val)
 259 #define BEEP_MASK_TO_REG(val)           ((val) & 0xffffff)
 260 #define BEEP_ENABLE_TO_REG(val)         ((val)?1:0)
 261 #define BEEP_ENABLE_FROM_REG(val)       ((val)?1:0)
 262
 263 #define DIV_FROM_REG(val) (1 << (val))
 264
 265 static inline u8 DIV_TO_REG(long val)
 266 {
 267         int i;
 268         val = SENSORS_LIMIT(val, 1, 128) >> 1;
 269         for (i = 0; i < 7; i++) {
 270                 if (val == 0)
 271                         break;
 272                 val >>= 1;
 273         }
 274         return ((u8) i);
 275 }
 276
 277 /* For each registered chip, we need to keep some data in memory. That
 278    data is pointed to by w83627hf_list[NR]->data. The structure itself is
 279    dynamically allocated, at the same time when a new client is allocated. */
 280 struct w83627hf_data {
 281         struct i2c_client client;
 282         struct class_device *class_dev;
 283         struct semaphore lock;
 284         enum chips type;
 285
 286         struct semaphore update_lock;
 287         char valid;             /* !=0 if following fields are valid */
 288         unsigned long last_updated;     /* In jiffies */
 289
 290         struct i2c_client *lm75;        /* for secondary I2C addresses */
 291         /* pointer to array of 2 subclients */
 292
 293         u8 in[9];               /* Register value */
 294         u8 in_max[9];           /* Register value */
 295         u8 in_min[9];           /* Register value */
 296         u8 fan[3];              /* Register value */
 297         u8 fan_min[3];          /* Register value */
 298         u8 temp;
 299         u8 temp_max;            /* Register value */
 300         u8 temp_max_hyst;       /* Register value */
 301         u16 temp_add[2];        /* Register value */
 302         u16 temp_max_add[2];    /* Register value */
 303         u16 temp_max_hyst_add[2]; /* Register value */
 304         u8 fan_div[3];          /* Register encoding, shifted right */
 305         u8 vid;                 /* Register encoding, combined */
 306         u32 alarms;             /* Register encoding, combined */
 307         u32 beep_mask;          /* Register encoding, combined */
 308         u8 beep_enable;         /* Boolean */
 309         u8 pwm[3];              /* Register value */
 310         u16 sens[3];            /* 782D/783S only.
 311                                    1 = pentium diode; 2 = 3904 diode;
 312                                    3000-5000 = thermistor beta.
 313                                    Default = 3435.
 314                                    Other Betas unimplemented */
 315         u8 vrm;
 316         u8 vrm_ovt;             /* Register value, 627thf & 637hf only */
 317 };
 318
 319
 320 static int w83627hf_detect(struct i2c_adapter *adapter);
 321 static int w83627hf_detach_client(struct i2c_client *client);
 322
 323 static int w83627hf_read_value(struct i2c_client *client, u16 register);
 324 static int w83627hf_write_value(struct i2c_client *client, u16 register,
 325                                u16 value);
 326 static struct w83627hf_data *w83627hf_update_device(struct device *dev);
 327 static void w83627hf_init_client(struct i2c_client *client);
 328
 329 static struct i2c_driver w83627hf_driver = {
 330         .owner          = THIS_MODULE,
 331         .name           = "w83627hf",
 332         .attach_adapter = w83627hf_detect,
 333         .detach_client  = w83627hf_detach_client,
 334 };
 335
 336 /* following are the sysfs callback functions */
 337 #define show_in_reg(reg) \
 338 static ssize_t show_##reg (struct device *dev, char *buf, int nr) \
 339 { \
 340         struct w83627hf_data *data = w83627hf_update_device(dev); \
 341         return sprintf(buf,"%ld\n", (long)IN_FROM_REG(data->reg[nr])); \
 342 }
 343 show_in_reg(in)
 344 show_in_reg(in_min)
 345 show_in_reg(in_max)
 346
 347 #define store_in_reg(REG, reg) \
 348 static ssize_t \
 349 store_in_##reg (struct device *dev, const char *buf, size_t count, int nr) \
 350 { \
 351         struct i2c_client *client = to_i2c_client(dev); \
 352         struct w83627hf_data *data = i2c_get_clientdata(client); \
 353         u32 val; \
 354          \
 355         val = simple_strtoul(buf, NULL, 10); \
 356          \
 357         down(&data->update_lock); \
 358         data->in_##reg[nr] = IN_TO_REG(val); \
 359         w83627hf_write_value(client, W83781D_REG_IN_##REG(nr), \
 360                             data->in_##reg[nr]); \
 361          \
 362         up(&data->update_lock); \
 363         return count; \
 364 }
 365 store_in_reg(MIN, min)
 366 store_in_reg(MAX, max)
 367
 368 #define sysfs_in_offset(offset) \
 369 static ssize_t \
 370 show_regs_in_##offset (struct device *dev, struct device_attribute *attr, char *buf) \
 371 { \
 372         return show_in(dev, buf, offset); \
 373 } \
 374 static DEVICE_ATTR(in##offset##_input, S_IRUGO, show_regs_in_##offset, NULL);
 375
 376 #define sysfs_in_reg_offset(reg, offset) \
 377 static ssize_t show_regs_in_##reg##offset (struct device *dev, struct device_attribute *attr, char *buf) \
 378 { \
 379         return show_in_##reg (dev, buf, offset); \
 380 } \
 381 static ssize_t \
 382 store_regs_in_##reg##offset (struct device *dev, struct device_attribute *attr, \
 383                             const char *buf, size_t count) \
 384 { \
 385         return store_in_##reg (dev, buf, count, offset); \
 386 } \
 387 static DEVICE_ATTR(in##offset##_##reg, S_IRUGO| S_IWUSR, \
 388                   show_regs_in_##reg##offset, store_regs_in_##reg##offset);
 389
 390 #define sysfs_in_offsets(offset) \
 391 sysfs_in_offset(offset) \
 392 sysfs_in_reg_offset(min, offset) \
 393 sysfs_in_reg_offset(max, offset)
 394
 395 sysfs_in_offsets(1);
 396 sysfs_in_offsets(2);
 397 sysfs_in_offsets(3);
 398 sysfs_in_offsets(4);
 399 sysfs_in_offsets(5);
 400 sysfs_in_offsets(6);
 401 sysfs_in_offsets(7);
 402 sysfs_in_offsets(8);
 403
 404 /* use a different set of functions for in0 */
 405 static ssize_t show_in_0(struct w83627hf_data *data, char *buf, u8 reg)
 406 {
 407         long in0;
 408
 409         if ((data->vrm_ovt & 0x01) &&
 410                 (w83627thf == data->type || w83637hf == data->type))
 411
 412                 /* use VRM9 calculation */
 413                 in0 = (long)((reg * 488 + 70000 + 50) / 100);
 414         else
 415                 /* use VRM8 (standard) calculation */
 416                 in0 = (long)IN_FROM_REG(reg);
 417
 418         return sprintf(buf,"%ld\n", in0);
 419 }
 420
 421 static ssize_t show_regs_in_0(struct device *dev, struct device_attribute *attr, char *buf)
 422 {
 423         struct w83627hf_data *data = w83627hf_update_device(dev);
 424         return show_in_0(data, buf, data->in[0]);
 425 }
 426
 427 static ssize_t show_regs_in_min0(struct device *dev, struct device_attribute *attr, char *buf)
 428 {
 429         struct w83627hf_data *data = w83627hf_update_device(dev);
 430         return show_in_0(data, buf, data->in_min[0]);
 431 }
 432
 433 static ssize_t show_regs_in_max0(struct device *dev, struct device_attribute *attr, char *buf)
 434 {
 435         struct w83627hf_data *data = w83627hf_update_device(dev);
 436         return show_in_0(data, buf, data->in_max[0]);
 437 }
 438
 439 static ssize_t store_regs_in_min0(struct device *dev, struct device_attribute *attr,
 440         const char *buf, size_t count)
 441 {
 442         struct i2c_client *client = to_i2c_client(dev);
 443         struct w83627hf_data *data = i2c_get_clientdata(client);
 444         u32 val;
 445
 446         val = simple_strtoul(buf, NULL, 10);
 447
 448         down(&data->update_lock);
 449
 450         if ((data->vrm_ovt & 0x01) &&
 451                 (w83627thf == data->type || w83637hf == data->type))
 452
 453                 /* use VRM9 calculation */
 454                 data->in_min[0] = (u8)(((val * 100) - 70000 + 244) / 488);
 455         else
 456                 /* use VRM8 (standard) calculation */
 457                 data->in_min[0] = IN_TO_REG(val);
 458
 459         w83627hf_write_value(client, W83781D_REG_IN_MIN(0), data->in_min[0]);
 460         up(&data->update_lock);
 461         return count;
 462 }
 463
 464 static ssize_t store_regs_in_max0(struct device *dev, struct device_attribute *attr,
 465         const char *buf, size_t count)
 466 {
 467         struct i2c_client *client = to_i2c_client(dev);
 468         struct w83627hf_data *data = i2c_get_clientdata(client);
 469         u32 val;
 470
 471         val = simple_strtoul(buf, NULL, 10);
 472
 473         down(&data->update_lock);
 474
 475         if ((data->vrm_ovt & 0x01) &&
 476                 (w83627thf == data->type || w83637hf == data->type))
 477
 478                 /* use VRM9 calculation */
 479                 data->in_max[0] = (u8)(((val * 100) - 70000 + 244) / 488);
 480         else
 481                 /* use VRM8 (standard) calculation */
 482                 data->in_max[0] = IN_TO_REG(val);
 483
 484         w83627hf_write_value(client, W83781D_REG_IN_MAX(0), data->in_max[0]);
 485         up(&data->update_lock);
 486         return count;
 487 }
 488
 489 static DEVICE_ATTR(in0_input, S_IRUGO, show_regs_in_0, NULL);
 490 static DEVICE_ATTR(in0_min, S_IRUGO | S_IWUSR,
 491         show_regs_in_min0, store_regs_in_min0);
 492 static DEVICE_ATTR(in0_max, S_IRUGO | S_IWUSR,
 493         show_regs_in_max0, store_regs_in_max0);
 494
 495 #define device_create_file_in(client, offset) \
 496 do { \
 497 device_create_file(&client->dev, &dev_attr_in##offset##_input); \
 498 device_create_file(&client->dev, &dev_attr_in##offset##_min); \
 499 device_create_file(&client->dev, &dev_attr_in##offset##_max); \
 500 } while (0)
 501
 502 #define show_fan_reg(reg) \
 503 static ssize_t show_##reg (struct device *dev, char *buf, int nr) \
 504 { \
 505         struct w83627hf_data *data = w83627hf_update_device(dev); \
 506         return sprintf(buf,"%ld\n", \
 507                 FAN_FROM_REG(data->reg[nr-1], \
 508                             (long)DIV_FROM_REG(data->fan_div[nr-1]))); \
 509 }
 510 show_fan_reg(fan);
 511 show_fan_reg(fan_min);
 512
 513 static ssize_t
 514 store_fan_min(struct device *dev, const char *buf, size_t count, int nr)
 515 {
 516         struct i2c_client *client = to_i2c_client(dev);
 517         struct w83627hf_data *data = i2c_get_clientdata(client);
 518         u32 val;
 519
 520         val = simple_strtoul(buf, NULL, 10);
 521
 522         down(&data->update_lock);
 523         data->fan_min[nr - 1] =
 524             FAN_TO_REG(val, DIV_FROM_REG(data->fan_div[nr - 1]));
 525         w83627hf_write_value(client, W83781D_REG_FAN_MIN(nr),
 526                             data->fan_min[nr - 1]);
 527
 528         up(&data->update_lock);
 529         return count;
 530 }
 531
 532 #define sysfs_fan_offset(offset) \
 533 static ssize_t show_regs_fan_##offset (struct device *dev, struct device_attribute *attr, char *buf) \
 534 { \
 535         return show_fan(dev, buf, offset); \
 536 } \
 537 static DEVICE_ATTR(fan##offset##_input, S_IRUGO, show_regs_fan_##offset, NULL);
 538
 539 #define sysfs_fan_min_offset(offset) \
 540 static ssize_t show_regs_fan_min##offset (struct device *dev, struct device_attribute *attr, char *buf) \
 541 { \
 542         return show_fan_min(dev, buf, offset); \
 543 } \
 544 static ssize_t \
 545 store_regs_fan_min##offset (struct device *dev, struct device_attribute *attr, const char *buf, size_t count) \
 546 { \
 547         return store_fan_min(dev, buf, count, offset); \
 548 } \
 549 static DEVICE_ATTR(fan##offset##_min, S_IRUGO | S_IWUSR, \
 550                   show_regs_fan_min##offset, store_regs_fan_min##offset);
 551
 552 sysfs_fan_offset(1);
 553 sysfs_fan_min_offset(1);
 554 sysfs_fan_offset(2);
 555 sysfs_fan_min_offset(2);
 556 sysfs_fan_offset(3);
 557 sysfs_fan_min_offset(3);
 558
 559 #define device_create_file_fan(client, offset) \
 560 do { \
 561 device_create_file(&client->dev, &dev_attr_fan##offset##_input); \
 562 device_create_file(&client->dev, &dev_attr_fan##offset##_min); \
 563 } while (0)
 564
 565 #define show_temp_reg(reg) \
 566 static ssize_t show_##reg (struct device *dev, char *buf, int nr) \
 567 { \
 568         struct w83627hf_data *data = w83627hf_update_device(dev); \
 569         if (nr >= 2) {  /* TEMP2 and TEMP3 */ \
 570                 return sprintf(buf,"%ld\n", \
 571                         (long)LM75_TEMP_FROM_REG(data->reg##_add[nr-2])); \
 572         } else {        /* TEMP1 */ \
 573                 return sprintf(buf,"%ld\n", (long)TEMP_FROM_REG(data->reg)); \
 574         } \
 575 }
 576 show_temp_reg(temp);
 577 show_temp_reg(temp_max);
 578 show_temp_reg(temp_max_hyst);
 579
 580 #define store_temp_reg(REG, reg) \
 581 static ssize_t \
 582 store_temp_##reg (struct device *dev, const char *buf, size_t count, int nr) \
 583 { \
 584         struct i2c_client *client = to_i2c_client(dev); \
 585         struct w83627hf_data *data = i2c_get_clientdata(client); \
 586         u32 val; \
 587          \
 588         val = simple_strtoul(buf, NULL, 10); \
 589          \
 590         down(&data->update_lock); \
 591          \
 592         if (nr >= 2) {  /* TEMP2 and TEMP3 */ \
 593                 data->temp_##reg##_add[nr-2] = LM75_TEMP_TO_REG(val); \
 594                 w83627hf_write_value(client, W83781D_REG_TEMP_##REG(nr), \
 595                                 data->temp_##reg##_add[nr-2]); \
 596         } else {        /* TEMP1 */ \
 597                 data->temp_##reg = TEMP_TO_REG(val); \
 598                 w83627hf_write_value(client, W83781D_REG_TEMP_##REG(nr), \
 599                         data->temp_##reg); \
 600         } \
 601          \
 602         up(&data->update_lock); \
 603         return count; \
 604 }
 605 store_temp_reg(OVER, max);
 606 store_temp_reg(HYST, max_hyst);
 607
 608 #define sysfs_temp_offset(offset) \
 609 static ssize_t \
 610 show_regs_temp_##offset (struct device *dev, struct device_attribute *attr, char *buf) \
 611 { \
 612         return show_temp(dev, buf, offset); \
 613 } \
 614 static DEVICE_ATTR(temp##offset##_input, S_IRUGO, show_regs_temp_##offset, NULL);
 615
 616 #define sysfs_temp_reg_offset(reg, offset) \
 617 static ssize_t show_regs_temp_##reg##offset (struct device *dev, struct device_attribute *attr, char *buf) \
 618 { \
 619         return show_temp_##reg (dev, buf, offset); \
 620 } \
 621 static ssize_t \
 622 store_regs_temp_##reg##offset (struct device *dev, struct device_attribute *attr, \
 623                               const char *buf, size_t count) \
 624 { \
 625         return store_temp_##reg (dev, buf, count, offset); \
 626 } \
 627 static DEVICE_ATTR(temp##offset##_##reg, S_IRUGO| S_IWUSR, \
 628                   show_regs_temp_##reg##offset, store_regs_temp_##reg##offset);
 629
 630 #define sysfs_temp_offsets(offset) \
 631 sysfs_temp_offset(offset) \
 632 sysfs_temp_reg_offset(max, offset) \
 633 sysfs_temp_reg_offset(max_hyst, offset)
 634
 635 sysfs_temp_offsets(1);
 636 sysfs_temp_offsets(2);
 637 sysfs_temp_offsets(3);
 638
 639 #define device_create_file_temp(client, offset) \
 640 do { \
 641 device_create_file(&client->dev, &dev_attr_temp##offset##_input); \
 642 device_create_file(&client->dev, &dev_attr_temp##offset##_max); \
 643 device_create_file(&client->dev, &dev_attr_temp##offset##_max_hyst); \
 644 } while (0)
 645
 646 static ssize_t
 647 show_vid_reg(struct device *dev, struct device_attribute *attr, char *buf)
 648 {
 649         struct w83627hf_data *data = w83627hf_update_device(dev);
 650         return sprintf(buf, "%ld\n", (long) vid_from_reg(data->vid, data->vrm));
 651 }
 652 static DEVICE_ATTR(cpu0_vid, S_IRUGO, show_vid_reg, NULL);
 653 #define device_create_file_vid(client) \
 654 device_create_file(&client->dev, &dev_attr_cpu0_vid)
 655
 656 static ssize_t
 657 show_vrm_reg(struct device *dev, struct device_attribute *attr, char *buf)
 658 {
 659         struct w83627hf_data *data = w83627hf_update_device(dev);
 660         return sprintf(buf, "%ld\n", (long) data->vrm);
 661 }
 662 static ssize_t
 663 store_vrm_reg(struct device *dev, struct device_attribute *attr, const char *buf, size_t count)
 664 {
 665         struct i2c_client *client = to_i2c_client(dev);
 666         struct w83627hf_data *data = i2c_get_clientdata(client);
 667         u32 val;
 668
 669         val = simple_strtoul(buf, NULL, 10);
 670         data->vrm = val;
 671
 672         return count;
 673 }
 674 static DEVICE_ATTR(vrm, S_IRUGO | S_IWUSR, show_vrm_reg, store_vrm_reg);
 675 #define device_create_file_vrm(client) \
 676 device_create_file(&client->dev, &dev_attr_vrm)
 677
 678 static ssize_t
 679 show_alarms_reg(struct device *dev, struct device_attribute *attr, char *buf)
 680 {
 681         struct w83627hf_data *data = w83627hf_update_device(dev);
 682         return sprintf(buf, "%ld\n", (long) data->alarms);
 683 }
 684 static DEVICE_ATTR(alarms, S_IRUGO, show_alarms_reg, NULL);
 685 #define device_create_file_alarms(client) \
 686 device_create_file(&client->dev, &dev_attr_alarms)
 687
 688 #define show_beep_reg(REG, reg) \
 689 static ssize_t show_beep_##reg (struct device *dev, struct device_attribute *attr, char *buf) \
 690 { \
 691         struct w83627hf_data *data = w83627hf_update_device(dev); \
 692         return sprintf(buf,"%ld\n", \
 693                       (long)BEEP_##REG##_FROM_REG(data->beep_##reg)); \
 694 }
 695 show_beep_reg(ENABLE, enable)
 696 show_beep_reg(MASK, mask)
 697
 698 #define BEEP_ENABLE                     0       /* Store beep_enable */
 699 #define BEEP_MASK                       1       /* Store beep_mask */
 700
 701 static ssize_t
 702 store_beep_reg(struct device *dev, const char *buf, size_t count,
 703                int update_mask)
 704 {
 705         struct i2c_client *client = to_i2c_client(dev);
 706         struct w83627hf_data *data = i2c_get_clientdata(client);
 707         u32 val, val2;
 708
 709         val = simple_strtoul(buf, NULL, 10);
 710
 711         down(&data->update_lock);
 712
 713         if (update_mask == BEEP_MASK) { /* We are storing beep_mask */
 714                 data->beep_mask = BEEP_MASK_TO_REG(val);
 715                 w83627hf_write_value(client, W83781D_REG_BEEP_INTS1,
 716                                     data->beep_mask & 0xff);
 717                 w83627hf_write_value(client, W83781D_REG_BEEP_INTS3,
 718                                     ((data->beep_mask) >> 16) & 0xff);
 719                 val2 = (data->beep_mask >> 8) & 0x7f;
 720         } else {                /* We are storing beep_enable */
 721                 val2 =
 722                     w83627hf_read_value(client, W83781D_REG_BEEP_INTS2) & 0x7f;
 723                 data->beep_enable = BEEP_ENABLE_TO_REG(val);
 724         }
 725
 726         w83627hf_write_value(client, W83781D_REG_BEEP_INTS2,
 727                             val2 | data->beep_enable << 7);
 728
 729         up(&data->update_lock);
 730         return count;
 731 }
 732
 733 #define sysfs_beep(REG, reg) \
 734 static ssize_t show_regs_beep_##reg (struct device *dev, struct device_attribute *attr, char *buf) \
 735 { \
 736         return show_beep_##reg(dev, attr, buf); \
 737 } \
 738 static ssize_t \
 739 store_regs_beep_##reg (struct device *dev, struct device_attribute *attr, const char *buf, size_t count) \
 740 { \
 741         return store_beep_reg(dev, buf, count, BEEP_##REG); \
 742 } \
 743 static DEVICE_ATTR(beep_##reg, S_IRUGO | S_IWUSR, \
 744                   show_regs_beep_##reg, store_regs_beep_##reg);
 745
 746 sysfs_beep(ENABLE, enable);
 747 sysfs_beep(MASK, mask);
 748
 749 #define device_create_file_beep(client) \
 750 do { \
 751 device_create_file(&client->dev, &dev_attr_beep_enable); \
 752 device_create_file(&client->dev, &dev_attr_beep_mask); \
 753 } while (0)
 754
 755 static ssize_t
 756 show_fan_div_reg(struct device *dev, char *buf, int nr)
 757 {
 758         struct w83627hf_data *data = w83627hf_update_device(dev);
 759         return sprintf(buf, "%ld\n",
 760                        (long) DIV_FROM_REG(data->fan_div[nr - 1]));
 761 }
 762
 763 /* Note: we save and restore the fan minimum here, because its value is
 764    determined in part by the fan divisor.  This follows the principle of
 765    least suprise; the user doesn't expect the fan minimum to change just
 766    because the divisor changed. */
 767 static ssize_t
 768 store_fan_div_reg(struct device *dev, const char *buf, size_t count, int nr)
 769 {
 770         struct i2c_client *client = to_i2c_client(dev);
 771         struct w83627hf_data *data = i2c_get_clientdata(client);
 772         unsigned long min;
 773         u8 reg;
 774         unsigned long val = simple_strtoul(buf, NULL, 10);
 775
 776         down(&data->update_lock);
 777
 778         /* Save fan_min */
 779         min = FAN_FROM_REG(data->fan_min[nr],
 780                            DIV_FROM_REG(data->fan_div[nr]));
 781
 782         data->fan_div[nr] = DIV_TO_REG(val);
 783
 784         reg = (w83627hf_read_value(client, nr==2 ? W83781D_REG_PIN : W83781D_REG_VID_FANDIV)
 785                & (nr==0 ? 0xcf : 0x3f))
 786             | ((data->fan_div[nr] & 0x03) << (nr==0 ? 4 : 6));
 787         w83627hf_write_value(client, nr==2 ? W83781D_REG_PIN : W83781D_REG_VID_FANDIV, reg);
 788
 789         reg = (w83627hf_read_value(client, W83781D_REG_VBAT)
 790                & ~(1 << (5 + nr)))
 791             | ((data->fan_div[nr] & 0x04) << (3 + nr));
 792         w83627hf_write_value(client, W83781D_REG_VBAT, reg);
 793
 794         /* Restore fan_min */
 795         data->fan_min[nr] = FAN_TO_REG(min, DIV_FROM_REG(data->fan_div[nr]));
 796         w83627hf_write_value(client, W83781D_REG_FAN_MIN(nr+1), data->fan_min[nr]);
 797
 798         up(&data->update_lock);
 799         return count;
 800 }
 801
 802 #define sysfs_fan_div(offset) \
 803 static ssize_t show_regs_fan_div_##offset (struct device *dev, struct device_attribute *attr, char *buf) \
 804 { \
 805         return show_fan_div_reg(dev, buf, offset); \
 806 } \
 807 static ssize_t \
 808 store_regs_fan_div_##offset (struct device *dev, struct device_attribute *attr, \
 809                             const char *buf, size_t count) \
 810 { \
 811         return store_fan_div_reg(dev, buf, count, offset - 1); \
 812 } \
 813 static DEVICE_ATTR(fan##offset##_div, S_IRUGO | S_IWUSR, \
 814                   show_regs_fan_div_##offset, store_regs_fan_div_##offset);
 815
 816 sysfs_fan_div(1);
 817 sysfs_fan_div(2);
 818 sysfs_fan_div(3);
 819
 820 #define device_create_file_fan_div(client, offset) \
 821 do { \
 822 device_create_file(&client->dev, &dev_attr_fan##offset##_div); \
 823 } while (0)
 824
 825 static ssize_t
 826 show_pwm_reg(struct device *dev, char *buf, int nr)
 827 {
 828         struct w83627hf_data *data = w83627hf_update_device(dev);
 829         return sprintf(buf, "%ld\n", (long) data->pwm[nr - 1]);
 830 }
 831
 832 static ssize_t
 833 store_pwm_reg(struct device *dev, const char *buf, size_t count, int nr)
 834 {
 835         struct i2c_client *client = to_i2c_client(dev);
 836         struct w83627hf_data *data = i2c_get_clientdata(client);
 837         u32 val;
 838
 839         val = simple_strtoul(buf, NULL, 10);
 840
 841         down(&data->update_lock);
 842
 843         if (data->type == w83627thf) {
 844                 /* bits 0-3 are reserved  in 627THF */
 845                 data->pwm[nr - 1] = PWM_TO_REG(val) & 0xf0;
 846                 w83627hf_write_value(client,
 847                                      W836X7HF_REG_PWM(data->type, nr),
 848                                      data->pwm[nr - 1] |
 849                                      (w83627hf_read_value(client,
 850                                      W836X7HF_REG_PWM(data->type, nr)) & 0x0f));
 851         } else {
 852                 data->pwm[nr - 1] = PWM_TO_REG(val);
 853                 w83627hf_write_value(client,
 854                                      W836X7HF_REG_PWM(data->type, nr),
 855                                      data->pwm[nr - 1]);
 856         }
 857
 858         up(&data->update_lock);
 859         return count;
 860 }
 861
 862 #define sysfs_pwm(offset) \
 863 static ssize_t show_regs_pwm_##offset (struct device *dev, struct device_attribute *attr, char *buf) \
 864 { \
 865         return show_pwm_reg(dev, buf, offset); \
 866 } \
 867 static ssize_t \
 868 store_regs_pwm_##offset (struct device *dev, struct device_attribute *attr, const char *buf, size_t count) \
 869 { \
 870         return store_pwm_reg(dev, buf, count, offset); \
 871 } \
 872 static DEVICE_ATTR(pwm##offset, S_IRUGO | S_IWUSR, \
 873                   show_regs_pwm_##offset, store_regs_pwm_##offset);
 874
 875 sysfs_pwm(1);
 876 sysfs_pwm(2);
 877 sysfs_pwm(3);
 878
 879 #define device_create_file_pwm(client, offset) \
 880 do { \
 881 device_create_file(&client->dev, &dev_attr_pwm##offset); \
 882 } while (0)
 883
 884 static ssize_t
 885 show_sensor_reg(struct device *dev, char *buf, int nr)
 886 {
 887         struct w83627hf_data *data = w83627hf_update_device(dev);
 888         return sprintf(buf, "%ld\n", (long) data->sens[nr - 1]);
 889 }
 890
 891 static ssize_t
 892 store_sensor_reg(struct device *dev, const char *buf, size_t count, int nr)
 893 {
 894         struct i2c_client *client = to_i2c_client(dev);
 895         struct w83627hf_data *data = i2c_get_clientdata(client);
 896         u32 val, tmp;
 897
 898         val = simple_strtoul(buf, NULL, 10);
 899
 900         down(&data->update_lock);
 901
 902         switch (val) {
 903         case 1:         /* PII/Celeron diode */
 904                 tmp = w83627hf_read_value(client, W83781D_REG_SCFG1);
 905                 w83627hf_write_value(client, W83781D_REG_SCFG1,
 906                                     tmp | BIT_SCFG1[nr - 1]);
 907                 tmp = w83627hf_read_value(client, W83781D_REG_SCFG2);
 908                 w83627hf_write_value(client, W83781D_REG_SCFG2,
 909                                     tmp | BIT_SCFG2[nr - 1]);
 910                 data->sens[nr - 1] = val;
 911                 break;
 912         case 2:         /* 3904 */
 913                 tmp = w83627hf_read_value(client, W83781D_REG_SCFG1);
 914                 w83627hf_write_value(client, W83781D_REG_SCFG1,
 915                                     tmp | BIT_SCFG1[nr - 1]);
 916                 tmp = w83627hf_read_value(client, W83781D_REG_SCFG2);
 917                 w83627hf_write_value(client, W83781D_REG_SCFG2,
 918                                     tmp & ~BIT_SCFG2[nr - 1]);
 919                 data->sens[nr - 1] = val;
 920                 break;
 921         case W83781D_DEFAULT_BETA:      /* thermistor */
 922                 tmp = w83627hf_read_value(client, W83781D_REG_SCFG1);
 923                 w83627hf_write_value(client, W83781D_REG_SCFG1,
 924                                     tmp & ~BIT_SCFG1[nr - 1]);
 925                 data->sens[nr - 1] = val;
 926                 break;
 927         default:
 928                 dev_err(&client->dev,
 929                        "Invalid sensor type %ld; must be 1, 2, or %d\n",
 930                        (long) val, W83781D_DEFAULT_BETA);
 931                 break;
 932         }
 933
 934         up(&data->update_lock);
 935         return count;
 936 }
 937
 938 #define sysfs_sensor(offset) \
 939 static ssize_t show_regs_sensor_##offset (struct device *dev, struct device_attribute *attr, char *buf) \
 940 { \
 941     return show_sensor_reg(dev, buf, offset); \
 942 } \
 943 static ssize_t \
 944 store_regs_sensor_##offset (struct device *dev, struct device_attribute *attr, const char *buf, size_t count) \
 945 { \
 946     return store_sensor_reg(dev, buf, count, offset); \
 947 } \
 948 static DEVICE_ATTR(temp##offset##_type, S_IRUGO | S_IWUSR, \
 949                   show_regs_sensor_##offset, store_regs_sensor_##offset);
 950
 951 sysfs_sensor(1);
 952 sysfs_sensor(2);
 953 sysfs_sensor(3);
 954
 955 #define device_create_file_sensor(client, offset) \
 956 do { \
 957 device_create_file(&client->dev, &dev_attr_temp##offset##_type); \
 958 } while (0)
 959
 960
 961 static int w83627hf_find(int sioaddr, unsigned short *addr)
 962 {
 963         u16 val;
 964
 965         REG = sioaddr;
 966         VAL = sioaddr + 1;
 967
 968         superio_enter();
 969         val= superio_inb(DEVID);
 970         if(val != W627_DEVID &&
 971            val != W627THF_DEVID &&
 972            val != W697_DEVID &&
 973            val != W637_DEVID) {
 974                 superio_exit();
 975                 return -ENODEV;
 976         }
 977
 978         superio_select(W83627HF_LD_HWM);
 979         val = (superio_inb(WINB_BASE_REG) << 8) |
 980                superio_inb(WINB_BASE_REG + 1);
 981         *addr = val & ~(WINB_EXTENT - 1);
 982         if (*addr == 0 && force_addr == 0) {
 983                 superio_exit();
 984                 return -ENODEV;
 985         }
 986
 987         superio_exit();
 988         return 0;
 989 }
 990
 991 static int w83627hf_detect(struct i2c_adapter *adapter)
 992 {
 993         int val, kind;
 994         struct i2c_client *new_client;
 995         struct w83627hf_data *data;
 996         int err = 0;
 997         const char *client_name = "";
 998
 999         if(force_addr)
1000                 address = force_addr & ~(WINB_EXTENT - 1);
1001
1002         if (!request_region(address, WINB_EXTENT, w83627hf_driver.name)) {
1003                 err = -EBUSY;
1004                 goto ERROR0;
1005         }
1006
1007         if(force_addr) {
1008                 printk("w83627hf.o: forcing ISA address 0x%04X\n", address);
1009                 superio_enter();
1010                 superio_select(W83627HF_LD_HWM);
1011                 superio_outb(WINB_BASE_REG, address >> 8);
1012                 superio_outb(WINB_BASE_REG+1, address & 0xff);
1013                 superio_exit();
1014         }
1015
1016         superio_enter();
1017         val= superio_inb(DEVID);
1018         if(val == W627_DEVID)
1019                 kind = w83627hf;
1020         else if(val == W697_DEVID)
1021                 kind = w83697hf;
1022         else if(val == W627THF_DEVID)
1023                 kind = w83627thf;
1024         else if(val == W637_DEVID)
1025                 kind = w83637hf;
1026         else {
1027                 dev_info(&adapter->dev,
1028                          "Unsupported chip (dev_id=0x%02X).\n", val);
1029                 goto ERROR1;
1030         }
1031
1032         superio_select(W83627HF_LD_HWM);
1033         if((val = 0x01 & superio_inb(WINB_ACT_REG)) == 0)
1034                 superio_outb(WINB_ACT_REG, 1);
1035         superio_exit();
1036
1037         /* OK. For now, we presume we have a valid client. We now create the
1038            client structure, even though we cannot fill it completely yet.
1039            But it allows us to access w83627hf_{read,write}_value. */
1040
1041         if (!(data = kmalloc(sizeof(struct w83627hf_data), GFP_KERNEL))) {
1042                 err = -ENOMEM;
1043                 goto ERROR1;
1044         }
1045         memset(data, 0, sizeof(struct w83627hf_data));
1046
1047         new_client = &data->client;
1048         i2c_set_clientdata(new_client, data);
1049         new_client->addr = address;
1050         init_MUTEX(&data->lock);
1051         new_client->adapter = adapter;
1052         new_client->driver = &w83627hf_driver;
1053         new_client->flags = 0;
1054
1055
1056         if (kind == w83627hf) {
1057                 client_name = "w83627hf";
1058         } else if (kind == w83627thf) {
1059                 client_name = "w83627thf";
1060         } else if (kind == w83697hf) {
1061                 client_name = "w83697hf";
1062         } else if (kind == w83637hf) {
1063                 client_name = "w83637hf";
1064         }
1065
1066         /* Fill in the remaining client fields and put into the global list */
1067         strlcpy(new_client->name, client_name, I2C_NAME_SIZE);
1068         data->type = kind;
1069         data->valid = 0;
1070         init_MUTEX(&data->update_lock);
1071
1072         /* Tell the I2C layer a new client has arrived */
1073         if ((err = i2c_attach_client(new_client)))
1074                 goto ERROR2;
1075
1076         data->lm75 = NULL;
1077
1078         /* Initialize the chip */
1079         w83627hf_init_client(new_client);
1080
1081         /* A few vars need to be filled upon startup */
1082         data->fan_min[0] = w83627hf_read_value(new_client, W83781D_REG_FAN_MIN(1));
1083         data->fan_min[1] = w83627hf_read_value(new_client, W83781D_REG_FAN_MIN(2));
1084         data->fan_min[2] = w83627hf_read_value(new_client, W83781D_REG_FAN_MIN(3));
1085
1086         /* Register sysfs hooks */
1087         data->class_dev = hwmon_device_register(&new_client->dev);
1088         if (IS_ERR(data->class_dev)) {
1089                 err = PTR_ERR(data->class_dev);
1090                 goto ERROR3;
1091         }
1092
1093         device_create_file_in(new_client, 0);
1094         if (kind != w83697hf)
1095                 device_create_file_in(new_client, 1);
1096         device_create_file_in(new_client, 2);
1097         device_create_file_in(new_client, 3);
1098         device_create_file_in(new_client, 4);
1099         if (kind != w83627thf && kind != w83637hf) {
1100                 device_create_file_in(new_client, 5);
1101                 device_create_file_in(new_client, 6);
1102         }
1103         device_create_file_in(new_client, 7);
1104         device_create_file_in(new_client, 8);
1105
1106         device_create_file_fan(new_client, 1);
1107         device_create_file_fan(new_client, 2);
1108         if (kind != w83697hf)
1109                 device_create_file_fan(new_client, 3);
1110
1111         device_create_file_temp(new_client, 1);
1112         device_create_file_temp(new_client, 2);
1113         if (kind != w83697hf)
1114                 device_create_file_temp(new_client, 3);
1115
1116         if (kind != w83697hf)
1117                 device_create_file_vid(new_client);
1118
1119         if (kind != w83697hf)
1120                 device_create_file_vrm(new_client);
1121
1122         device_create_file_fan_div(new_client, 1);
1123         device_create_file_fan_div(new_client, 2);
1124         if (kind != w83697hf)
1125                 device_create_file_fan_div(new_client, 3);
1126
1127         device_create_file_alarms(new_client);
1128
1129         device_create_file_beep(new_client);
1130
1131         device_create_file_pwm(new_client, 1);
1132         device_create_file_pwm(new_client, 2);
1133         if (kind == w83627thf || kind == w83637hf)
1134                 device_create_file_pwm(new_client, 3);
1135
1136         device_create_file_sensor(new_client, 1);
1137         device_create_file_sensor(new_client, 2);
1138         if (kind != w83697hf)
1139                 device_create_file_sensor(new_client, 3);
1140
1141         return 0;
1142
1143       ERROR3:
1144         i2c_detach_client(new_client);
1145       ERROR2:
1146         kfree(data);
1147       ERROR1:
1148         release_region(address, WINB_EXTENT);
1149       ERROR0:
1150         return err;
1151 }
1152
1153 static int w83627hf_detach_client(struct i2c_client *client)
1154 {
1155         struct w83627hf_data *data = i2c_get_clientdata(client);
1156         int err;
1157
1158         hwmon_device_unregister(data->class_dev);
1159
1160         if ((err = i2c_detach_client(client))) {
1161                 dev_err(&client->dev,
1162                        "Client deregistration failed, client not detached.\n");
1163                 return err;
1164         }
1165
1166         release_region(client->addr, WINB_EXTENT);
1167         kfree(data);
1168
1169         return 0;
1170 }
1171
1172
1173 /*
1174    ISA access must always be locked explicitly!
1175    We ignore the W83781D BUSY flag at this moment - it could lead to deadlocks,
1176    would slow down the W83781D access and should not be necessary.
1177    There are some ugly typecasts here, but the good news is - they should
1178    nowhere else be necessary! */
1179 static int w83627hf_read_value(struct i2c_client *client, u16 reg)
1180 {
1181         struct w83627hf_data *data = i2c_get_clientdata(client);
1182         int res, word_sized;
1183
1184         down(&data->lock);
1185         word_sized = (((reg & 0xff00) == 0x100)
1186                    || ((reg & 0xff00) == 0x200))
1187                   && (((reg & 0x00ff) == 0x50)
1188                    || ((reg & 0x00ff) == 0x53)
1189                    || ((reg & 0x00ff) == 0x55));
1190         if (reg & 0xff00) {
1191                 outb_p(W83781D_REG_BANK,
1192                        client->addr + W83781D_ADDR_REG_OFFSET);
1193                 outb_p(reg >> 8,
1194                        client->addr + W83781D_DATA_REG_OFFSET);
1195         }
1196         outb_p(reg & 0xff, client->addr + W83781D_ADDR_REG_OFFSET);
1197         res = inb_p(client->addr + W83781D_DATA_REG_OFFSET);
1198         if (word_sized) {
1199                 outb_p((reg & 0xff) + 1,
1200                        client->addr + W83781D_ADDR_REG_OFFSET);
1201                 res =
1202                     (res << 8) + inb_p(client->addr +
1203                                        W83781D_DATA_REG_OFFSET);
1204         }
1205         if (reg & 0xff00) {
1206                 outb_p(W83781D_REG_BANK,
1207                        client->addr + W83781D_ADDR_REG_OFFSET);
1208                 outb_p(0, client->addr + W83781D_DATA_REG_OFFSET);
1209         }
1210         up(&data->lock);
1211         return res;
1212 }
1213
1214 static int w83627thf_read_gpio5(struct i2c_client *client)
1215 {
1216         int res = 0xff, sel;
1217
1218         superio_enter();
1219         superio_select(W83627HF_LD_GPIO5);
1220
1221         /* Make sure these GPIO pins are enabled */
1222         if (!(superio_inb(W83627THF_GPIO5_EN) & (1<<3))) {
1223                 dev_dbg(&client->dev, "GPIO5 disabled, no VID function\n");
1224                 goto exit;
1225         }
1226
1227         /* Make sure the pins are configured for input
1228            There must be at least five (VRM 9), and possibly 6 (VRM 10) */
1229         sel = superio_inb(W83627THF_GPIO5_IOSR);
1230         if ((sel & 0x1f) != 0x1f) {
1231                 dev_dbg(&client->dev, "GPIO5 not configured for VID "
1232                         "function\n");
1233                 goto exit;
1234         }
1235
1236         dev_info(&client->dev, "Reading VID from GPIO5\n");
1237         res = superio_inb(W83627THF_GPIO5_DR) & sel;
1238
1239 exit:
1240         superio_exit();
1241         return res;
1242 }
1243
1244 static int w83627hf_write_value(struct i2c_client *client, u16 reg, u16 value)
1245 {
1246         struct w83627hf_data *data = i2c_get_clientdata(client);
1247         int word_sized;
1248
1249         down(&data->lock);
1250         word_sized = (((reg & 0xff00) == 0x100)
1251                    || ((reg & 0xff00) == 0x200))
1252                   && (((reg & 0x00ff) == 0x53)
1253                    || ((reg & 0x00ff) == 0x55));
1254         if (reg & 0xff00) {
1255                 outb_p(W83781D_REG_BANK,
1256                        client->addr + W83781D_ADDR_REG_OFFSET);
1257                 outb_p(reg >> 8,
1258                        client->addr + W83781D_DATA_REG_OFFSET);
1259         }
1260         outb_p(reg & 0xff, client->addr + W83781D_ADDR_REG_OFFSET);
1261         if (word_sized) {
1262                 outb_p(value >> 8,
1263                        client->addr + W83781D_DATA_REG_OFFSET);
1264                 outb_p((reg & 0xff) + 1,
1265                        client->addr + W83781D_ADDR_REG_OFFSET);
1266         }
1267         outb_p(value & 0xff,
1268                client->addr + W83781D_DATA_REG_OFFSET);
1269         if (reg & 0xff00) {
1270                 outb_p(W83781D_REG_BANK,
1271                        client->addr + W83781D_ADDR_REG_OFFSET);
1272                 outb_p(0, client->addr + W83781D_DATA_REG_OFFSET);
1273         }
1274         up(&data->lock);
1275         return 0;
1276 }
1277
1278 /* Called when we have found a new W83781D. It should set limits, etc. */
1279 static void w83627hf_init_client(struct i2c_client *client)
1280 {
1281         struct w83627hf_data *data = i2c_get_clientdata(client);
1282         int i;
1283         int type = data->type;
1284         u8 tmp;
1285
1286         if(init) {
1287                 /* save this register */
1288                 i = w83627hf_read_value(client, W83781D_REG_BEEP_CONFIG);
1289                 /* Reset all except Watchdog values and last conversion values
1290                    This sets fan-divs to 2, among others */
1291                 w83627hf_write_value(client, W83781D_REG_CONFIG, 0x80);
1292                 /* Restore the register and disable power-on abnormal beep.
1293                    This saves FAN 1/2/3 input/output values set by BIOS. */
1294                 w83627hf_write_value(client, W83781D_REG_BEEP_CONFIG, i | 0x80);
1295                 /* Disable master beep-enable (reset turns it on).
1296                    Individual beeps should be reset to off but for some reason
1297                    disabling this bit helps some people not get beeped */
1298                 w83627hf_write_value(client, W83781D_REG_BEEP_INTS2, 0);
1299         }
1300
1301         /* Minimize conflicts with other winbond i2c-only clients...  */
1302         /* disable i2c subclients... how to disable main i2c client?? */
1303         /* force i2c address to relatively uncommon address */
1304         w83627hf_write_value(client, W83781D_REG_I2C_SUBADDR, 0x89);
1305         w83627hf_write_value(client, W83781D_REG_I2C_ADDR, force_i2c);
1306
1307         /* Read VID only once */
1308         if (w83627hf == data->type || w83637hf == data->type) {
1309                 int lo = w83627hf_read_value(client, W83781D_REG_VID_FANDIV);
1310                 int hi = w83627hf_read_value(client, W83781D_REG_CHIPID);
1311                 data->vid = (lo & 0x0f) | ((hi & 0x01) << 4);
1312         } else if (w83627thf == data->type) {
1313                 data->vid = w83627thf_read_gpio5(client) & 0x3f;
1314         }
1315
1316         /* Read VRM & OVT Config only once */
1317         if (w83627thf == data->type || w83637hf == data->type) {
1318                 data->vrm_ovt =
1319                         w83627hf_read_value(client, W83627THF_REG_VRM_OVT_CFG);
1320                 data->vrm = (data->vrm_ovt & 0x01) ? 90 : 82;
1321         } else {
1322                 /* Convert VID to voltage based on default VRM */
1323                 data->vrm = i2c_which_vrm();
1324         }
1325
1326         tmp = w83627hf_read_value(client, W83781D_REG_SCFG1);
1327         for (i = 1; i <= 3; i++) {
1328                 if (!(tmp & BIT_SCFG1[i - 1])) {
1329                         data->sens[i - 1] = W83781D_DEFAULT_BETA;
1330                 } else {
1331                         if (w83627hf_read_value
1332                             (client,
1333                              W83781D_REG_SCFG2) & BIT_SCFG2[i - 1])
1334                                 data->sens[i - 1] = 1;
1335                         else
1336                                 data->sens[i - 1] = 2;
1337                 }
1338                 if ((type == w83697hf) && (i == 2))
1339                         break;
1340         }
1341
1342         if(init) {
1343                 /* Enable temp2 */
1344                 tmp = w83627hf_read_value(client, W83781D_REG_TEMP2_CONFIG);
1345                 if (tmp & 0x01) {
1346                         dev_warn(&client->dev, "Enabling temp2, readings "
1347                                  "might not make sense\n");
1348                         w83627hf_write_value(client, W83781D_REG_TEMP2_CONFIG,
1349                                 tmp & 0xfe);
1350                 }
1351
1352                 /* Enable temp3 */
1353                 if (type != w83697hf) {
1354                         tmp = w83627hf_read_value(client,
1355                                 W83781D_REG_TEMP3_CONFIG);
1356                         if (tmp & 0x01) {
1357                                 dev_warn(&client->dev, "Enabling temp3, "
1358                                          "readings might not make sense\n");
1359                                 w83627hf_write_value(client,
1360                                         W83781D_REG_TEMP3_CONFIG, tmp & 0xfe);
1361                         }
1362                 }
1363
1364                 if (type == w83627hf) {
1365                         /* enable PWM2 control (can't hurt since PWM reg
1366                            should have been reset to 0xff) */
1367                         w83627hf_write_value(client, W83627HF_REG_PWMCLK12,
1368                                             0x19);
1369                 }
1370                 /* enable comparator mode for temp2 and temp3 so
1371                    alarm indication will work correctly */
1372                 i = w83627hf_read_value(client, W83781D_REG_IRQ);
1373                 if (!(i & 0x40))
1374                         w83627hf_write_value(client, W83781D_REG_IRQ,
1375                                             i | 0x40);
1376         }
1377
1378         /* Start monitoring */
1379         w83627hf_write_value(client, W83781D_REG_CONFIG,
1380                             (w83627hf_read_value(client,
1381                                                 W83781D_REG_CONFIG) & 0xf7)
1382                             | 0x01);
1383 }
1384
1385 static struct w83627hf_data *w83627hf_update_device(struct device *dev)
1386 {
1387         struct i2c_client *client = to_i2c_client(dev);
1388         struct w83627hf_data *data = i2c_get_clientdata(client);
1389         int i;
1390
1391         down(&data->update_lock);
1392
1393         if (time_after(jiffies, data->last_updated + HZ + HZ / 2)
1394             || !data->valid) {
1395                 for (i = 0; i <= 8; i++) {
1396                         /* skip missing sensors */
1397                         if (((data->type == w83697hf) && (i == 1)) ||
1398                             ((data->type == w83627thf || data->type == w83637hf)
1399                             && (i == 4 || i == 5)))
1400                                 continue;
1401                         data->in[i] =
1402                             w83627hf_read_value(client, W83781D_REG_IN(i));
1403                         data->in_min[i] =
1404                             w83627hf_read_value(client,
1405                                                W83781D_REG_IN_MIN(i));
1406                         data->in_max[i] =
1407                             w83627hf_read_value(client,
1408                                                W83781D_REG_IN_MAX(i));
1409                 }
1410                 for (i = 1; i <= 3; i++) {
1411                         data->fan[i - 1] =
1412                             w83627hf_read_value(client, W83781D_REG_FAN(i));
1413                         data->fan_min[i - 1] =
1414                             w83627hf_read_value(client,
1415                                                W83781D_REG_FAN_MIN(i));
1416                 }
1417                 for (i = 1; i <= 3; i++) {
1418                         u8 tmp = w83627hf_read_value(client,
1419                                 W836X7HF_REG_PWM(data->type, i));
1420                         /* bits 0-3 are reserved  in 627THF */
1421                         if (data->type == w83627thf)
1422                                 tmp &= 0xf0;
1423                         data->pwm[i - 1] = tmp;
1424                         if(i == 2 &&
1425                            (data->type == w83627hf || data->type == w83697hf))
1426                                 break;
1427                 }
1428
1429                 data->temp = w83627hf_read_value(client, W83781D_REG_TEMP(1));
1430                 data->temp_max =
1431                     w83627hf_read_value(client, W83781D_REG_TEMP_OVER(1));
1432                 data->temp_max_hyst =
1433                     w83627hf_read_value(client, W83781D_REG_TEMP_HYST(1));
1434                 data->temp_add[0] =
1435                     w83627hf_read_value(client, W83781D_REG_TEMP(2));
1436                 data->temp_max_add[0] =
1437                     w83627hf_read_value(client, W83781D_REG_TEMP_OVER(2));
1438                 data->temp_max_hyst_add[0] =
1439                     w83627hf_read_value(client, W83781D_REG_TEMP_HYST(2));
1440                 if (data->type != w83697hf) {
1441                         data->temp_add[1] =
1442                           w83627hf_read_value(client, W83781D_REG_TEMP(3));
1443                         data->temp_max_add[1] =
1444                           w83627hf_read_value(client, W83781D_REG_TEMP_OVER(3));
1445                         data->temp_max_hyst_add[1] =
1446                           w83627hf_read_value(client, W83781D_REG_TEMP_HYST(3));
1447                 }
1448
1449                 i = w83627hf_read_value(client, W83781D_REG_VID_FANDIV);
1450                 data->fan_div[0] = (i >> 4) & 0x03;
1451                 data->fan_div[1] = (i >> 6) & 0x03;
1452                 if (data->type != w83697hf) {
1453                         data->fan_div[2] = (w83627hf_read_value(client,
1454                                                W83781D_REG_PIN) >> 6) & 0x03;
1455                 }
1456                 i = w83627hf_read_value(client, W83781D_REG_VBAT);
1457                 data->fan_div[0] |= (i >> 3) & 0x04;
1458                 data->fan_div[1] |= (i >> 4) & 0x04;
1459                 if (data->type != w83697hf)
1460                         data->fan_div[2] |= (i >> 5) & 0x04;
1461                 data->alarms =
1462                     w83627hf_read_value(client, W83781D_REG_ALARM1) |
1463                     (w83627hf_read_value(client, W83781D_REG_ALARM2) << 8) |
1464                     (w83627hf_read_value(client, W83781D_REG_ALARM3) << 16);
1465                 i = w83627hf_read_value(client, W83781D_REG_BEEP_INTS2);
1466                 data->beep_enable = i >> 7;
1467                 data->beep_mask = ((i & 0x7f) << 8) |
1468                     w83627hf_read_value(client, W83781D_REG_BEEP_INTS1) |
1469                     w83627hf_read_value(client, W83781D_REG_BEEP_INTS3) << 16;
1470                 data->last_updated = jiffies;
1471                 data->valid = 1;
1472         }
1473
1474         up(&data->update_lock);
1475
1476         return data;
1477 }
1478
1479 static int __init sensors_w83627hf_init(void)
1480 {
1481         if (w83627hf_find(0x2e, &address)
1482          && w83627hf_find(0x4e, &address)) {
1483                 return -ENODEV;
1484         }
1485
1486         return i2c_isa_add_driver(&w83627hf_driver);
1487 }
1488
1489 static void __exit sensors_w83627hf_exit(void)
1490 {
1491         i2c_isa_del_driver(&w83627hf_driver);
1492 }
1493
1494 MODULE_AUTHOR("Frodo Looijaard <frodol@dds.nl>, "
1495               "Philip Edelbrock <phil@netroedge.com>, "
1496               "and Mark Studebaker <mdsxyz123@yahoo.com>");
1497 MODULE_DESCRIPTION("W83627HF driver");
1498 MODULE_LICENSE("GPL");
1499
1500 module_init(sensors_w83627hf_init);
1501 module_exit(sensors_w83627hf_exit);