2 * Copyright(C) 2016 Linaro Limited. All rights reserved.
3 * Author: Mathieu Poirier <mathieu.poirier@linaro.org>
5 * This program is free software; you can redistribute it and/or modify it
6 * under the terms of the GNU General Public License version 2 as published by
7 * the Free Software Foundation.
9 * This program is distributed in the hope that it will be useful, but WITHOUT
10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
14 * You should have received a copy of the GNU General Public License along with
15 * this program. If not, see <http://www.gnu.org/licenses/>.
18 #include <linux/coresight.h>
19 #include <linux/slab.h>
20 #include "coresight-priv.h"
21 #include "coresight-tmc.h"
23 void tmc_etb_enable_hw(struct tmc_drvdata *drvdata)
25 CS_UNLOCK(drvdata->base);
27 /* Wait for TMCSReady bit to be set */
28 tmc_wait_for_tmcready(drvdata);
30 writel_relaxed(TMC_MODE_CIRCULAR_BUFFER, drvdata->base + TMC_MODE);
31 writel_relaxed(TMC_FFCR_EN_FMT | TMC_FFCR_EN_TI |
32 TMC_FFCR_FON_FLIN | TMC_FFCR_FON_TRIG_EVT |
33 TMC_FFCR_TRIGON_TRIGIN,
34 drvdata->base + TMC_FFCR);
36 writel_relaxed(drvdata->trigger_cntr, drvdata->base + TMC_TRG);
37 tmc_enable_hw(drvdata);
39 CS_LOCK(drvdata->base);
42 static void tmc_etb_dump_hw(struct tmc_drvdata *drvdata)
50 for (i = 0; i < drvdata->memwidth; i++) {
51 read_data = readl_relaxed(drvdata->base + TMC_RRD);
52 if (read_data == 0xFFFFFFFF)
54 memcpy(bufp, &read_data, 4);
60 static void tmc_etb_disable_hw(struct tmc_drvdata *drvdata)
62 CS_UNLOCK(drvdata->base);
64 tmc_flush_and_stop(drvdata);
66 * When operating in sysFS mode the content of the buffer needs to be
67 * read before the TMC is disabled.
69 if (local_read(&drvdata->mode) == CS_MODE_SYSFS)
70 tmc_etb_dump_hw(drvdata);
71 tmc_disable_hw(drvdata);
73 CS_LOCK(drvdata->base);
76 static void tmc_etf_enable_hw(struct tmc_drvdata *drvdata)
78 CS_UNLOCK(drvdata->base);
80 /* Wait for TMCSReady bit to be set */
81 tmc_wait_for_tmcready(drvdata);
83 writel_relaxed(TMC_MODE_HARDWARE_FIFO, drvdata->base + TMC_MODE);
84 writel_relaxed(TMC_FFCR_EN_FMT | TMC_FFCR_EN_TI,
85 drvdata->base + TMC_FFCR);
86 writel_relaxed(0x0, drvdata->base + TMC_BUFWM);
87 tmc_enable_hw(drvdata);
89 CS_LOCK(drvdata->base);
92 static void tmc_etf_disable_hw(struct tmc_drvdata *drvdata)
94 CS_UNLOCK(drvdata->base);
96 tmc_flush_and_stop(drvdata);
97 tmc_disable_hw(drvdata);
99 CS_LOCK(drvdata->base);
102 static int tmc_enable_etf_sink_sysfs(struct coresight_device *csdev, u32 mode)
109 struct tmc_drvdata *drvdata = dev_get_drvdata(csdev->dev.parent);
111 /* This shouldn't be happening */
112 if (WARN_ON(mode != CS_MODE_SYSFS))
116 * If we don't have a buffer release the lock and allocate memory.
117 * Otherwise keep the lock and move along.
119 spin_lock_irqsave(&drvdata->spinlock, flags);
121 spin_unlock_irqrestore(&drvdata->spinlock, flags);
123 /* Allocating the memory here while outside of the spinlock */
124 buf = kzalloc(drvdata->size, GFP_KERNEL);
128 /* Let's try again */
129 spin_lock_irqsave(&drvdata->spinlock, flags);
132 if (drvdata->reading) {
137 val = local_xchg(&drvdata->mode, mode);
139 * In sysFS mode we can have multiple writers per sink. Since this
140 * sink is already enabled no memory is needed and the HW need not be
143 if (val == CS_MODE_SYSFS)
147 * If drvdata::buf isn't NULL, memory was allocated for a previous
148 * trace run but wasn't read. If so simply zero-out the memory.
149 * Otherwise use the memory allocated above.
151 * The memory is freed when users read the buffer using the
152 * /dev/xyz.{etf|etb} interface. See tmc_read_unprepare_etf() for
156 memset(drvdata->buf, 0, drvdata->size);
162 tmc_etb_enable_hw(drvdata);
164 spin_unlock_irqrestore(&drvdata->spinlock, flags);
166 /* Free memory outside the spinlock if need be */
171 dev_info(drvdata->dev, "TMC-ETB/ETF enabled\n");
176 static int tmc_enable_etf_sink_perf(struct coresight_device *csdev, u32 mode)
181 struct tmc_drvdata *drvdata = dev_get_drvdata(csdev->dev.parent);
183 /* This shouldn't be happening */
184 if (WARN_ON(mode != CS_MODE_PERF))
187 spin_lock_irqsave(&drvdata->spinlock, flags);
188 if (drvdata->reading) {
193 val = local_xchg(&drvdata->mode, mode);
195 * In Perf mode there can be only one writer per sink. There
196 * is also no need to continue if the ETB/ETR is already operated
199 if (val != CS_MODE_DISABLED) {
204 tmc_etb_enable_hw(drvdata);
206 spin_unlock_irqrestore(&drvdata->spinlock, flags);
211 static int tmc_enable_etf_sink(struct coresight_device *csdev, u32 mode)
215 return tmc_enable_etf_sink_sysfs(csdev, mode);
217 return tmc_enable_etf_sink_perf(csdev, mode);
220 /* We shouldn't be here */
224 static void tmc_disable_etf_sink(struct coresight_device *csdev)
228 struct tmc_drvdata *drvdata = dev_get_drvdata(csdev->dev.parent);
230 spin_lock_irqsave(&drvdata->spinlock, flags);
231 if (drvdata->reading) {
232 spin_unlock_irqrestore(&drvdata->spinlock, flags);
236 val = local_xchg(&drvdata->mode, CS_MODE_DISABLED);
237 /* Disable the TMC only if it needs to */
238 if (val != CS_MODE_DISABLED)
239 tmc_etb_disable_hw(drvdata);
241 spin_unlock_irqrestore(&drvdata->spinlock, flags);
243 dev_info(drvdata->dev, "TMC-ETB/ETF disabled\n");
246 static int tmc_enable_etf_link(struct coresight_device *csdev,
247 int inport, int outport)
250 struct tmc_drvdata *drvdata = dev_get_drvdata(csdev->dev.parent);
252 spin_lock_irqsave(&drvdata->spinlock, flags);
253 if (drvdata->reading) {
254 spin_unlock_irqrestore(&drvdata->spinlock, flags);
258 tmc_etf_enable_hw(drvdata);
259 local_set(&drvdata->mode, CS_MODE_SYSFS);
260 spin_unlock_irqrestore(&drvdata->spinlock, flags);
262 dev_info(drvdata->dev, "TMC-ETF enabled\n");
266 static void tmc_disable_etf_link(struct coresight_device *csdev,
267 int inport, int outport)
270 struct tmc_drvdata *drvdata = dev_get_drvdata(csdev->dev.parent);
272 spin_lock_irqsave(&drvdata->spinlock, flags);
273 if (drvdata->reading) {
274 spin_unlock_irqrestore(&drvdata->spinlock, flags);
278 tmc_etf_disable_hw(drvdata);
279 local_set(&drvdata->mode, CS_MODE_DISABLED);
280 spin_unlock_irqrestore(&drvdata->spinlock, flags);
282 dev_info(drvdata->dev, "TMC disabled\n");
285 static const struct coresight_ops_sink tmc_etf_sink_ops = {
286 .enable = tmc_enable_etf_sink,
287 .disable = tmc_disable_etf_sink,
290 static const struct coresight_ops_link tmc_etf_link_ops = {
291 .enable = tmc_enable_etf_link,
292 .disable = tmc_disable_etf_link,
295 const struct coresight_ops tmc_etb_cs_ops = {
296 .sink_ops = &tmc_etf_sink_ops,
299 const struct coresight_ops tmc_etf_cs_ops = {
300 .sink_ops = &tmc_etf_sink_ops,
301 .link_ops = &tmc_etf_link_ops,
304 int tmc_read_prepare_etb(struct tmc_drvdata *drvdata)
311 /* config types are set a boot time and never change */
312 if (WARN_ON_ONCE(drvdata->config_type != TMC_CONFIG_TYPE_ETB &&
313 drvdata->config_type != TMC_CONFIG_TYPE_ETF))
316 spin_lock_irqsave(&drvdata->spinlock, flags);
318 if (drvdata->reading) {
323 /* There is no point in reading a TMC in HW FIFO mode */
324 mode = readl_relaxed(drvdata->base + TMC_MODE);
325 if (mode != TMC_MODE_CIRCULAR_BUFFER) {
330 val = local_read(&drvdata->mode);
331 /* Don't interfere if operated from Perf */
332 if (val == CS_MODE_PERF) {
337 /* If drvdata::buf is NULL the trace data has been read already */
338 if (drvdata->buf == NULL) {
343 /* Disable the TMC if need be */
344 if (val == CS_MODE_SYSFS)
345 tmc_etb_disable_hw(drvdata);
347 drvdata->reading = true;
349 spin_unlock_irqrestore(&drvdata->spinlock, flags);
354 int tmc_read_unprepare_etb(struct tmc_drvdata *drvdata)
360 /* config types are set a boot time and never change */
361 if (WARN_ON_ONCE(drvdata->config_type != TMC_CONFIG_TYPE_ETB &&
362 drvdata->config_type != TMC_CONFIG_TYPE_ETF))
365 spin_lock_irqsave(&drvdata->spinlock, flags);
367 /* There is no point in reading a TMC in HW FIFO mode */
368 mode = readl_relaxed(drvdata->base + TMC_MODE);
369 if (mode != TMC_MODE_CIRCULAR_BUFFER) {
370 spin_unlock_irqrestore(&drvdata->spinlock, flags);
374 /* Re-enable the TMC if need be */
375 if (local_read(&drvdata->mode) == CS_MODE_SYSFS) {
377 * The trace run will continue with the same allocated trace
378 * buffer. As such zero-out the buffer so that we don't end
379 * up with stale data.
381 * Since the tracer is still enabled drvdata::buf
384 memset(drvdata->buf, 0, drvdata->size);
385 tmc_etb_enable_hw(drvdata);
388 * The ETB/ETF is not tracing and the buffer was just read.
389 * As such prepare to free the trace buffer.
395 drvdata->reading = false;
396 spin_unlock_irqrestore(&drvdata->spinlock, flags);
399 * Free allocated memory outside of the spinlock. There is no need
400 * to assert the validity of 'buf' since calling kfree(NULL) is safe.