drivers/hwtracing/coresight/coresight-tmc.c

   1 /* Copyright (c) 2012, The Linux Foundation. All rights reserved.
   2  *
   3  * Description: CoreSight Trace Memory Controller driver
   4  *
   5  * This program is free software; you can redistribute it and/or modify
   6  * it under the terms of the GNU General Public License version 2 and
   7  * only version 2 as published by the Free Software Foundation.
   8  *
   9  * This program is distributed in the hope that it will be useful,
  10  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  11  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  12  * GNU General Public License for more details.
  13  */
  14
  15 #include <linux/kernel.h>
  16 #include <linux/init.h>
  17 #include <linux/types.h>
  18 #include <linux/device.h>
  19 #include <linux/io.h>
  20 #include <linux/err.h>
  21 #include <linux/fs.h>
  22 #include <linux/miscdevice.h>
  23 #include <linux/uaccess.h>
  24 #include <linux/slab.h>
  25 #include <linux/dma-mapping.h>
  26 #include <linux/spinlock.h>
  27 #include <linux/pm_runtime.h>
  28 #include <linux/of.h>
  29 #include <linux/coresight.h>
  30 #include <linux/amba/bus.h>
  31
  32 #include "coresight-priv.h"
  33 #include "coresight-tmc.h"
  34
  35 static void tmc_wait_for_tmcready(struct tmc_drvdata *drvdata)
  36 {
  37         /* Ensure formatter, unformatter and hardware fifo are empty */
  38         if (coresight_timeout(drvdata->base,
  39                               TMC_STS, TMC_STS_TMCREADY_BIT, 1)) {
  40                 dev_err(drvdata->dev,
  41                         "timeout observed when probing at offset %#x\n",
  42                         TMC_STS);
  43         }
  44 }
  45
  46 static void tmc_flush_and_stop(struct tmc_drvdata *drvdata)
  47 {
  48         u32 ffcr;
  49
  50         ffcr = readl_relaxed(drvdata->base + TMC_FFCR);
  51         ffcr |= TMC_FFCR_STOP_ON_FLUSH;
  52         writel_relaxed(ffcr, drvdata->base + TMC_FFCR);
  53         ffcr |= BIT(TMC_FFCR_FLUSHMAN_BIT);
  54         writel_relaxed(ffcr, drvdata->base + TMC_FFCR);
  55         /* Ensure flush completes */
  56         if (coresight_timeout(drvdata->base,
  57                               TMC_FFCR, TMC_FFCR_FLUSHMAN_BIT, 0)) {
  58                 dev_err(drvdata->dev,
  59                         "timeout observed when probing at offset %#x\n",
  60                         TMC_FFCR);
  61         }
  62
  63         tmc_wait_for_tmcready(drvdata);
  64 }
  65
  66 static void tmc_enable_hw(struct tmc_drvdata *drvdata)
  67 {
  68         writel_relaxed(TMC_CTL_CAPT_EN, drvdata->base + TMC_CTL);
  69 }
  70
  71 static void tmc_disable_hw(struct tmc_drvdata *drvdata)
  72 {
  73         writel_relaxed(0x0, drvdata->base + TMC_CTL);
  74 }
  75
  76 static void tmc_etb_enable_hw(struct tmc_drvdata *drvdata)
  77 {
  78         /* Zero out the memory to help with debug */
  79         memset(drvdata->buf, 0, drvdata->size);
  80
  81         CS_UNLOCK(drvdata->base);
  82
  83         /* Wait for TMCSReady bit to be set */
  84         tmc_wait_for_tmcready(drvdata);
  85
  86         writel_relaxed(TMC_MODE_CIRCULAR_BUFFER, drvdata->base + TMC_MODE);
  87         writel_relaxed(TMC_FFCR_EN_FMT | TMC_FFCR_EN_TI |
  88                        TMC_FFCR_FON_FLIN | TMC_FFCR_FON_TRIG_EVT |
  89                        TMC_FFCR_TRIGON_TRIGIN,
  90                        drvdata->base + TMC_FFCR);
  91
  92         writel_relaxed(drvdata->trigger_cntr, drvdata->base + TMC_TRG);
  93         tmc_enable_hw(drvdata);
  94
  95         CS_LOCK(drvdata->base);
  96 }
  97
  98 static void tmc_etr_enable_hw(struct tmc_drvdata *drvdata)
  99 {
 100         u32 axictl;
 101
 102         /* Zero out the memory to help with debug */
 103         memset(drvdata->vaddr, 0, drvdata->size);
 104
 105         CS_UNLOCK(drvdata->base);
 106
 107         /* Wait for TMCSReady bit to be set */
 108         tmc_wait_for_tmcready(drvdata);
 109
 110         writel_relaxed(drvdata->size / 4, drvdata->base + TMC_RSZ);
 111         writel_relaxed(TMC_MODE_CIRCULAR_BUFFER, drvdata->base + TMC_MODE);
 112
 113         axictl = readl_relaxed(drvdata->base + TMC_AXICTL);
 114         axictl |= TMC_AXICTL_WR_BURST_16;
 115         writel_relaxed(axictl, drvdata->base + TMC_AXICTL);
 116         axictl &= ~TMC_AXICTL_SCT_GAT_MODE;
 117         writel_relaxed(axictl, drvdata->base + TMC_AXICTL);
 118         axictl = (axictl &
 119                   ~(TMC_AXICTL_PROT_CTL_B0 | TMC_AXICTL_PROT_CTL_B1)) |
 120                   TMC_AXICTL_PROT_CTL_B1;
 121         writel_relaxed(axictl, drvdata->base + TMC_AXICTL);
 122
 123         writel_relaxed(drvdata->paddr, drvdata->base + TMC_DBALO);
 124         writel_relaxed(0x0, drvdata->base + TMC_DBAHI);
 125         writel_relaxed(TMC_FFCR_EN_FMT | TMC_FFCR_EN_TI |
 126                        TMC_FFCR_FON_FLIN | TMC_FFCR_FON_TRIG_EVT |
 127                        TMC_FFCR_TRIGON_TRIGIN,
 128                        drvdata->base + TMC_FFCR);
 129         writel_relaxed(drvdata->trigger_cntr, drvdata->base + TMC_TRG);
 130         tmc_enable_hw(drvdata);
 131
 132         CS_LOCK(drvdata->base);
 133 }
 134
 135 static void tmc_etf_enable_hw(struct tmc_drvdata *drvdata)
 136 {
 137         CS_UNLOCK(drvdata->base);
 138
 139         /* Wait for TMCSReady bit to be set */
 140         tmc_wait_for_tmcready(drvdata);
 141
 142         writel_relaxed(TMC_MODE_HARDWARE_FIFO, drvdata->base + TMC_MODE);
 143         writel_relaxed(TMC_FFCR_EN_FMT | TMC_FFCR_EN_TI,
 144                        drvdata->base + TMC_FFCR);
 145         writel_relaxed(0x0, drvdata->base + TMC_BUFWM);
 146         tmc_enable_hw(drvdata);
 147
 148         CS_LOCK(drvdata->base);
 149 }
 150
 151 static int tmc_enable(struct tmc_drvdata *drvdata, enum tmc_mode mode)
 152 {
 153         unsigned long flags;
 154
 155         spin_lock_irqsave(&drvdata->spinlock, flags);
 156         if (drvdata->reading) {
 157                 spin_unlock_irqrestore(&drvdata->spinlock, flags);
 158                 return -EBUSY;
 159         }
 160
 161         if (drvdata->config_type == TMC_CONFIG_TYPE_ETB) {
 162                 tmc_etb_enable_hw(drvdata);
 163         } else if (drvdata->config_type == TMC_CONFIG_TYPE_ETR) {
 164                 tmc_etr_enable_hw(drvdata);
 165         } else {
 166                 if (mode == TMC_MODE_CIRCULAR_BUFFER)
 167                         tmc_etb_enable_hw(drvdata);
 168                 else
 169                         tmc_etf_enable_hw(drvdata);
 170         }
 171         drvdata->enable = true;
 172         spin_unlock_irqrestore(&drvdata->spinlock, flags);
 173
 174         dev_info(drvdata->dev, "TMC enabled\n");
 175         return 0;
 176 }
 177
 178 static int tmc_enable_sink(struct coresight_device *csdev, u32 mode)
 179 {
 180         struct tmc_drvdata *drvdata = dev_get_drvdata(csdev->dev.parent);
 181
 182         return tmc_enable(drvdata, TMC_MODE_CIRCULAR_BUFFER);
 183 }
 184
 185 static int tmc_enable_link(struct coresight_device *csdev, int inport,
 186                            int outport)
 187 {
 188         struct tmc_drvdata *drvdata = dev_get_drvdata(csdev->dev.parent);
 189
 190         return tmc_enable(drvdata, TMC_MODE_HARDWARE_FIFO);
 191 }
 192
 193 static void tmc_etb_dump_hw(struct tmc_drvdata *drvdata)
 194 {
 195         enum tmc_mem_intf_width memwidth;
 196         u8 memwords;
 197         char *bufp;
 198         u32 read_data;
 199         int i;
 200
 201         memwidth = BMVAL(readl_relaxed(drvdata->base + CORESIGHT_DEVID), 8, 10);
 202         if (memwidth == TMC_MEM_INTF_WIDTH_32BITS)
 203                 memwords = 1;
 204         else if (memwidth == TMC_MEM_INTF_WIDTH_64BITS)
 205                 memwords = 2;
 206         else if (memwidth == TMC_MEM_INTF_WIDTH_128BITS)
 207                 memwords = 4;
 208         else
 209                 memwords = 8;
 210
 211         bufp = drvdata->buf;
 212         while (1) {
 213                 for (i = 0; i < memwords; i++) {
 214                         read_data = readl_relaxed(drvdata->base + TMC_RRD);
 215                         if (read_data == 0xFFFFFFFF)
 216                                 return;
 217                         memcpy(bufp, &read_data, 4);
 218                         bufp += 4;
 219                 }
 220         }
 221 }
 222
 223 static void tmc_etb_disable_hw(struct tmc_drvdata *drvdata)
 224 {
 225         CS_UNLOCK(drvdata->base);
 226
 227         tmc_flush_and_stop(drvdata);
 228         tmc_etb_dump_hw(drvdata);
 229         tmc_disable_hw(drvdata);
 230
 231         CS_LOCK(drvdata->base);
 232 }
 233
 234 static void tmc_etr_dump_hw(struct tmc_drvdata *drvdata)
 235 {
 236         u32 rwp, val;
 237
 238         rwp = readl_relaxed(drvdata->base + TMC_RWP);
 239         val = readl_relaxed(drvdata->base + TMC_STS);
 240
 241         /* How much memory do we still have */
 242         if (val & BIT(0))
 243                 drvdata->buf = drvdata->vaddr + rwp - drvdata->paddr;
 244         else
 245                 drvdata->buf = drvdata->vaddr;
 246 }
 247
 248 static void tmc_etr_disable_hw(struct tmc_drvdata *drvdata)
 249 {
 250         CS_UNLOCK(drvdata->base);
 251
 252         tmc_flush_and_stop(drvdata);
 253         tmc_etr_dump_hw(drvdata);
 254         tmc_disable_hw(drvdata);
 255
 256         CS_LOCK(drvdata->base);
 257 }
 258
 259 static void tmc_etf_disable_hw(struct tmc_drvdata *drvdata)
 260 {
 261         CS_UNLOCK(drvdata->base);
 262
 263         tmc_flush_and_stop(drvdata);
 264         tmc_disable_hw(drvdata);
 265
 266         CS_LOCK(drvdata->base);
 267 }
 268
 269 static void tmc_disable(struct tmc_drvdata *drvdata, enum tmc_mode mode)
 270 {
 271         unsigned long flags;
 272
 273         spin_lock_irqsave(&drvdata->spinlock, flags);
 274         if (drvdata->reading)
 275                 goto out;
 276
 277         if (drvdata->config_type == TMC_CONFIG_TYPE_ETB) {
 278                 tmc_etb_disable_hw(drvdata);
 279         } else if (drvdata->config_type == TMC_CONFIG_TYPE_ETR) {
 280                 tmc_etr_disable_hw(drvdata);
 281         } else {
 282                 if (mode == TMC_MODE_CIRCULAR_BUFFER)
 283                         tmc_etb_disable_hw(drvdata);
 284                 else
 285                         tmc_etf_disable_hw(drvdata);
 286         }
 287 out:
 288         drvdata->enable = false;
 289         spin_unlock_irqrestore(&drvdata->spinlock, flags);
 290
 291         dev_info(drvdata->dev, "TMC disabled\n");
 292 }
 293
 294 static void tmc_disable_sink(struct coresight_device *csdev)
 295 {
 296         struct tmc_drvdata *drvdata = dev_get_drvdata(csdev->dev.parent);
 297
 298         tmc_disable(drvdata, TMC_MODE_CIRCULAR_BUFFER);
 299 }
 300
 301 static void tmc_disable_link(struct coresight_device *csdev, int inport,
 302                              int outport)
 303 {
 304         struct tmc_drvdata *drvdata = dev_get_drvdata(csdev->dev.parent);
 305
 306         tmc_disable(drvdata, TMC_MODE_HARDWARE_FIFO);
 307 }
 308
 309 static const struct coresight_ops_sink tmc_sink_ops = {
 310         .enable         = tmc_enable_sink,
 311         .disable        = tmc_disable_sink,
 312 };
 313
 314 static const struct coresight_ops_link tmc_link_ops = {
 315         .enable         = tmc_enable_link,
 316         .disable        = tmc_disable_link,
 317 };
 318
 319 static const struct coresight_ops tmc_etb_cs_ops = {
 320         .sink_ops       = &tmc_sink_ops,
 321 };
 322
 323 static const struct coresight_ops tmc_etr_cs_ops = {
 324         .sink_ops       = &tmc_sink_ops,
 325 };
 326
 327 static const struct coresight_ops tmc_etf_cs_ops = {
 328         .sink_ops       = &tmc_sink_ops,
 329         .link_ops       = &tmc_link_ops,
 330 };
 331
 332 static int tmc_read_prepare(struct tmc_drvdata *drvdata)
 333 {
 334         int ret = 0;
 335         unsigned long flags;
 336         enum tmc_mode mode;
 337
 338         spin_lock_irqsave(&drvdata->spinlock, flags);
 339         if (!drvdata->enable)
 340                 goto out;
 341
 342         switch (drvdata->config_type) {
 343         case TMC_CONFIG_TYPE_ETB:
 344                 tmc_etb_disable_hw(drvdata);
 345                 break;
 346         case TMC_CONFIG_TYPE_ETF:
 347                 /* There is no point in reading a TMC in HW FIFO mode */
 348                 mode = readl_relaxed(drvdata->base + TMC_MODE);
 349                 if (mode != TMC_MODE_CIRCULAR_BUFFER) {
 350                         ret = -EINVAL;
 351                         goto err;
 352                 }
 353
 354                 tmc_etb_disable_hw(drvdata);
 355                 break;
 356         case TMC_CONFIG_TYPE_ETR:
 357                 tmc_etr_disable_hw(drvdata);
 358                 break;
 359         default:
 360                 ret = -EINVAL;
 361                 goto err;
 362         }
 363
 364 out:
 365         drvdata->reading = true;
 366         dev_info(drvdata->dev, "TMC read start\n");
 367 err:
 368         spin_unlock_irqrestore(&drvdata->spinlock, flags);
 369         return ret;
 370 }
 371
 372 static void tmc_read_unprepare(struct tmc_drvdata *drvdata)
 373 {
 374         unsigned long flags;
 375         enum tmc_mode mode;
 376
 377         spin_lock_irqsave(&drvdata->spinlock, flags);
 378         if (!drvdata->enable)
 379                 goto out;
 380
 381         switch (drvdata->config_type) {
 382         case TMC_CONFIG_TYPE_ETB:
 383                 tmc_etb_enable_hw(drvdata);
 384                 break;
 385         case TMC_CONFIG_TYPE_ETF:
 386                 /* Make sure we don't re-enable a TMC in HW FIFO mode */
 387                 mode = readl_relaxed(drvdata->base + TMC_MODE);
 388                 if (mode != TMC_MODE_CIRCULAR_BUFFER)
 389                         goto err;
 390
 391                 tmc_etb_enable_hw(drvdata);
 392                 break;
 393         case TMC_CONFIG_TYPE_ETR:
 394                 tmc_etr_disable_hw(drvdata);
 395                 break;
 396         default:
 397                 goto err;
 398         }
 399
 400 out:
 401         drvdata->reading = false;
 402         dev_info(drvdata->dev, "TMC read end\n");
 403 err:
 404         spin_unlock_irqrestore(&drvdata->spinlock, flags);
 405 }
 406
 407 static int tmc_open(struct inode *inode, struct file *file)
 408 {
 409         struct tmc_drvdata *drvdata = container_of(file->private_data,
 410                                                    struct tmc_drvdata, miscdev);
 411         int ret = 0;
 412
 413         if (drvdata->read_count++)
 414                 goto out;
 415
 416         ret = tmc_read_prepare(drvdata);
 417         if (ret)
 418                 return ret;
 419 out:
 420         nonseekable_open(inode, file);
 421
 422         dev_dbg(drvdata->dev, "%s: successfully opened\n", __func__);
 423         return 0;
 424 }
 425
 426 static ssize_t tmc_read(struct file *file, char __user *data, size_t len,
 427                         loff_t *ppos)
 428 {
 429         struct tmc_drvdata *drvdata = container_of(file->private_data,
 430                                                    struct tmc_drvdata, miscdev);
 431         char *bufp = drvdata->buf + *ppos;
 432
 433         if (*ppos + len > drvdata->size)
 434                 len = drvdata->size - *ppos;
 435
 436         if (drvdata->config_type == TMC_CONFIG_TYPE_ETR) {
 437                 if (bufp == (char *)(drvdata->vaddr + drvdata->size))
 438                         bufp = drvdata->vaddr;
 439                 else if (bufp > (char *)(drvdata->vaddr + drvdata->size))
 440                         bufp -= drvdata->size;
 441                 if ((bufp + len) > (char *)(drvdata->vaddr + drvdata->size))
 442                         len = (char *)(drvdata->vaddr + drvdata->size) - bufp;
 443         }
 444
 445         if (copy_to_user(data, bufp, len)) {
 446                 dev_dbg(drvdata->dev, "%s: copy_to_user failed\n", __func__);
 447                 return -EFAULT;
 448         }
 449
 450         *ppos += len;
 451
 452         dev_dbg(drvdata->dev, "%s: %zu bytes copied, %d bytes left\n",
 453                 __func__, len, (int)(drvdata->size - *ppos));
 454         return len;
 455 }
 456
 457 static int tmc_release(struct inode *inode, struct file *file)
 458 {
 459         struct tmc_drvdata *drvdata = container_of(file->private_data,
 460                                                    struct tmc_drvdata, miscdev);
 461
 462         if (--drvdata->read_count) {
 463                 if (drvdata->read_count < 0) {
 464                         dev_err(drvdata->dev, "mismatched close\n");
 465                         drvdata->read_count = 0;
 466                 }
 467                 goto out;
 468         }
 469
 470         tmc_read_unprepare(drvdata);
 471 out:
 472         dev_dbg(drvdata->dev, "%s: released\n", __func__);
 473         return 0;
 474 }
 475
 476 static const struct file_operations tmc_fops = {
 477         .owner          = THIS_MODULE,
 478         .open           = tmc_open,
 479         .read           = tmc_read,
 480         .release        = tmc_release,
 481         .llseek         = no_llseek,
 482 };
 483
 484 #define coresight_tmc_simple_func(name, offset)                 \
 485         coresight_simple_func(struct tmc_drvdata, name, offset)
 486
 487 coresight_tmc_simple_func(rsz, TMC_RSZ);
 488 coresight_tmc_simple_func(sts, TMC_STS);
 489 coresight_tmc_simple_func(rrp, TMC_RRP);
 490 coresight_tmc_simple_func(rwp, TMC_RWP);
 491 coresight_tmc_simple_func(trg, TMC_TRG);
 492 coresight_tmc_simple_func(ctl, TMC_CTL);
 493 coresight_tmc_simple_func(ffsr, TMC_FFSR);
 494 coresight_tmc_simple_func(ffcr, TMC_FFCR);
 495 coresight_tmc_simple_func(mode, TMC_MODE);
 496 coresight_tmc_simple_func(pscr, TMC_PSCR);
 497 coresight_tmc_simple_func(devid, CORESIGHT_DEVID);
 498
 499 static struct attribute *coresight_tmc_mgmt_attrs[] = {
 500         &dev_attr_rsz.attr,
 501         &dev_attr_sts.attr,
 502         &dev_attr_rrp.attr,
 503         &dev_attr_rwp.attr,
 504         &dev_attr_trg.attr,
 505         &dev_attr_ctl.attr,
 506         &dev_attr_ffsr.attr,
 507         &dev_attr_ffcr.attr,
 508         &dev_attr_mode.attr,
 509         &dev_attr_pscr.attr,
 510         &dev_attr_devid.attr,
 511         NULL,
 512 };
 513
 514 ssize_t trigger_cntr_show(struct device *dev,
 515                           struct device_attribute *attr, char *buf)
 516 {
 517         struct tmc_drvdata *drvdata = dev_get_drvdata(dev->parent);
 518         unsigned long val = drvdata->trigger_cntr;
 519
 520         return sprintf(buf, "%#lx\n", val);
 521 }
 522
 523 static ssize_t trigger_cntr_store(struct device *dev,
 524                              struct device_attribute *attr,
 525                              const char *buf, size_t size)
 526 {
 527         int ret;
 528         unsigned long val;
 529         struct tmc_drvdata *drvdata = dev_get_drvdata(dev->parent);
 530
 531         ret = kstrtoul(buf, 16, &val);
 532         if (ret)
 533                 return ret;
 534
 535         drvdata->trigger_cntr = val;
 536         return size;
 537 }
 538 static DEVICE_ATTR_RW(trigger_cntr);
 539
 540 static struct attribute *coresight_tmc_attrs[] = {
 541         &dev_attr_trigger_cntr.attr,
 542         NULL,
 543 };
 544
 545 static const struct attribute_group coresight_tmc_group = {
 546         .attrs = coresight_tmc_attrs,
 547 };
 548
 549 static const struct attribute_group coresight_tmc_mgmt_group = {
 550         .attrs = coresight_tmc_mgmt_attrs,
 551         .name = "mgmt",
 552 };
 553
 554 const struct attribute_group *coresight_tmc_groups[] = {
 555         &coresight_tmc_group,
 556         &coresight_tmc_mgmt_group,
 557         NULL,
 558 };
 559
 560 static int tmc_probe(struct amba_device *adev, const struct amba_id *id)
 561 {
 562         int ret = 0;
 563         u32 devid;
 564         void __iomem *base;
 565         struct device *dev = &adev->dev;
 566         struct coresight_platform_data *pdata = NULL;
 567         struct tmc_drvdata *drvdata;
 568         struct resource *res = &adev->res;
 569         struct coresight_desc *desc;
 570         struct device_node *np = adev->dev.of_node;
 571
 572         if (np) {
 573                 pdata = of_get_coresight_platform_data(dev, np);
 574                 if (IS_ERR(pdata))
 575                         return PTR_ERR(pdata);
 576                 adev->dev.platform_data = pdata;
 577         }
 578
 579         drvdata = devm_kzalloc(dev, sizeof(*drvdata), GFP_KERNEL);
 580         if (!drvdata)
 581                 return -ENOMEM;
 582
 583         drvdata->dev = &adev->dev;
 584         dev_set_drvdata(dev, drvdata);
 585
 586         /* Validity for the resource is already checked by the AMBA core */
 587         base = devm_ioremap_resource(dev, res);
 588         if (IS_ERR(base))
 589                 return PTR_ERR(base);
 590
 591         drvdata->base = base;
 592
 593         spin_lock_init(&drvdata->spinlock);
 594
 595         devid = readl_relaxed(drvdata->base + CORESIGHT_DEVID);
 596         drvdata->config_type = BMVAL(devid, 6, 7);
 597
 598         if (drvdata->config_type == TMC_CONFIG_TYPE_ETR) {
 599                 if (np)
 600                         ret = of_property_read_u32(np,
 601                                                    "arm,buffer-size",
 602                                                    &drvdata->size);
 603                 if (ret)
 604                         drvdata->size = SZ_1M;
 605         } else {
 606                 drvdata->size = readl_relaxed(drvdata->base + TMC_RSZ) * 4;
 607         }
 608
 609         pm_runtime_put(&adev->dev);
 610
 611         if (drvdata->config_type == TMC_CONFIG_TYPE_ETR) {
 612                 drvdata->vaddr = dma_alloc_coherent(dev, drvdata->size,
 613                                                 &drvdata->paddr, GFP_KERNEL);
 614                 if (!drvdata->vaddr)
 615                         return -ENOMEM;
 616
 617                 memset(drvdata->vaddr, 0, drvdata->size);
 618                 drvdata->buf = drvdata->vaddr;
 619         } else {
 620                 drvdata->buf = devm_kzalloc(dev, drvdata->size, GFP_KERNEL);
 621                 if (!drvdata->buf)
 622                         return -ENOMEM;
 623         }
 624
 625         desc = devm_kzalloc(dev, sizeof(*desc), GFP_KERNEL);
 626         if (!desc) {
 627                 ret = -ENOMEM;
 628                 goto err_devm_kzalloc;
 629         }
 630
 631         desc->pdata = pdata;
 632         desc->dev = dev;
 633         desc->subtype.sink_subtype = CORESIGHT_DEV_SUBTYPE_SINK_BUFFER;
 634         desc->groups = coresight_tmc_groups;
 635
 636         if (drvdata->config_type == TMC_CONFIG_TYPE_ETB) {
 637                 desc->type = CORESIGHT_DEV_TYPE_SINK;
 638                 desc->ops = &tmc_etb_cs_ops;
 639         } else if (drvdata->config_type == TMC_CONFIG_TYPE_ETR) {
 640                 desc->type = CORESIGHT_DEV_TYPE_SINK;
 641                 desc->ops = &tmc_etr_cs_ops;
 642         } else {
 643                 desc->type = CORESIGHT_DEV_TYPE_LINKSINK;
 644                 desc->subtype.link_subtype = CORESIGHT_DEV_SUBTYPE_LINK_FIFO;
 645                 desc->ops = &tmc_etf_cs_ops;
 646         }
 647
 648         drvdata->csdev = coresight_register(desc);
 649         if (IS_ERR(drvdata->csdev)) {
 650                 ret = PTR_ERR(drvdata->csdev);
 651                 goto err_devm_kzalloc;
 652         }
 653
 654         drvdata->miscdev.name = pdata->name;
 655         drvdata->miscdev.minor = MISC_DYNAMIC_MINOR;
 656         drvdata->miscdev.fops = &tmc_fops;
 657         ret = misc_register(&drvdata->miscdev);
 658         if (ret)
 659                 goto err_misc_register;
 660
 661         return 0;
 662
 663 err_misc_register:
 664         coresight_unregister(drvdata->csdev);
 665 err_devm_kzalloc:
 666         if (drvdata->config_type == TMC_CONFIG_TYPE_ETR)
 667                 dma_free_coherent(dev, drvdata->size,
 668                                 drvdata->vaddr, drvdata->paddr);
 669         return ret;
 670 }
 671
 672 static struct amba_id tmc_ids[] = {
 673         {
 674                 .id     = 0x0003b961,
 675                 .mask   = 0x0003ffff,
 676         },
 677         { 0, 0},
 678 };
 679
 680 static struct amba_driver tmc_driver = {
 681         .drv = {
 682                 .name   = "coresight-tmc",
 683                 .owner  = THIS_MODULE,
 684                 .suppress_bind_attrs = true,
 685         },
 686         .probe          = tmc_probe,
 687         .id_table       = tmc_ids,
 688 };
 689 builtin_amba_driver(tmc_driver);