coresight: etb10: adding operation mode for sink->enable()
[firefly-linux-kernel-4.4.55.git] / drivers / hwtracing / coresight / coresight-tpiu.c
1 /* Copyright (c) 2011-2012, The Linux Foundation. All rights reserved.
2  *
3  * This program is free software; you can redistribute it and/or modify
4  * it under the terms of the GNU General Public License version 2 and
5  * only version 2 as published by the Free Software Foundation.
6  *
7  * This program is distributed in the hope that it will be useful,
8  * but WITHOUT ANY WARRANTY; without even the implied warranty of
9  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
10  * GNU General Public License for more details.
11  */
12
13 #include <linux/kernel.h>
14 #include <linux/module.h>
15 #include <linux/init.h>
16 #include <linux/device.h>
17 #include <linux/io.h>
18 #include <linux/err.h>
19 #include <linux/slab.h>
20 #include <linux/pm_runtime.h>
21 #include <linux/coresight.h>
22 #include <linux/amba/bus.h>
23 #include <linux/clk.h>
24
25 #include "coresight-priv.h"
26
27 #define TPIU_SUPP_PORTSZ        0x000
28 #define TPIU_CURR_PORTSZ        0x004
29 #define TPIU_SUPP_TRIGMODES     0x100
30 #define TPIU_TRIG_CNTRVAL       0x104
31 #define TPIU_TRIG_MULT          0x108
32 #define TPIU_SUPP_TESTPATM      0x200
33 #define TPIU_CURR_TESTPATM      0x204
34 #define TPIU_TEST_PATREPCNTR    0x208
35 #define TPIU_FFSR               0x300
36 #define TPIU_FFCR               0x304
37 #define TPIU_FSYNC_CNTR         0x308
38 #define TPIU_EXTCTL_INPORT      0x400
39 #define TPIU_EXTCTL_OUTPORT     0x404
40 #define TPIU_ITTRFLINACK        0xee4
41 #define TPIU_ITTRFLIN           0xee8
42 #define TPIU_ITATBDATA0         0xeec
43 #define TPIU_ITATBCTR2          0xef0
44 #define TPIU_ITATBCTR1          0xef4
45 #define TPIU_ITATBCTR0          0xef8
46
47 /** register definition **/
48 /* FFCR - 0x304 */
49 #define FFCR_FON_MAN            BIT(6)
50
51 /**
52  * @base:       memory mapped base address for this component.
53  * @dev:        the device entity associated to this component.
54  * @atclk:      optional clock for the core parts of the TPIU.
55  * @csdev:      component vitals needed by the framework.
56  */
57 struct tpiu_drvdata {
58         void __iomem            *base;
59         struct device           *dev;
60         struct clk              *atclk;
61         struct coresight_device *csdev;
62 };
63
64 static void tpiu_enable_hw(struct tpiu_drvdata *drvdata)
65 {
66         CS_UNLOCK(drvdata->base);
67
68         /* TODO: fill this up */
69
70         CS_LOCK(drvdata->base);
71 }
72
73 static int tpiu_enable(struct coresight_device *csdev, u32 mode)
74 {
75         struct tpiu_drvdata *drvdata = dev_get_drvdata(csdev->dev.parent);
76
77         tpiu_enable_hw(drvdata);
78
79         dev_info(drvdata->dev, "TPIU enabled\n");
80         return 0;
81 }
82
83 static void tpiu_disable_hw(struct tpiu_drvdata *drvdata)
84 {
85         CS_UNLOCK(drvdata->base);
86
87         /* Clear formatter controle reg. */
88         writel_relaxed(0x0, drvdata->base + TPIU_FFCR);
89         /* Generate manual flush */
90         writel_relaxed(FFCR_FON_MAN, drvdata->base + TPIU_FFCR);
91
92         CS_LOCK(drvdata->base);
93 }
94
95 static void tpiu_disable(struct coresight_device *csdev)
96 {
97         struct tpiu_drvdata *drvdata = dev_get_drvdata(csdev->dev.parent);
98
99         tpiu_disable_hw(drvdata);
100
101         dev_info(drvdata->dev, "TPIU disabled\n");
102 }
103
104 static const struct coresight_ops_sink tpiu_sink_ops = {
105         .enable         = tpiu_enable,
106         .disable        = tpiu_disable,
107 };
108
109 static const struct coresight_ops tpiu_cs_ops = {
110         .sink_ops       = &tpiu_sink_ops,
111 };
112
113 static int tpiu_probe(struct amba_device *adev, const struct amba_id *id)
114 {
115         int ret;
116         void __iomem *base;
117         struct device *dev = &adev->dev;
118         struct coresight_platform_data *pdata = NULL;
119         struct tpiu_drvdata *drvdata;
120         struct resource *res = &adev->res;
121         struct coresight_desc *desc;
122         struct device_node *np = adev->dev.of_node;
123
124         if (np) {
125                 pdata = of_get_coresight_platform_data(dev, np);
126                 if (IS_ERR(pdata))
127                         return PTR_ERR(pdata);
128                 adev->dev.platform_data = pdata;
129         }
130
131         drvdata = devm_kzalloc(dev, sizeof(*drvdata), GFP_KERNEL);
132         if (!drvdata)
133                 return -ENOMEM;
134
135         drvdata->dev = &adev->dev;
136         drvdata->atclk = devm_clk_get(&adev->dev, "atclk"); /* optional */
137         if (!IS_ERR(drvdata->atclk)) {
138                 ret = clk_prepare_enable(drvdata->atclk);
139                 if (ret)
140                         return ret;
141         }
142         dev_set_drvdata(dev, drvdata);
143
144         /* Validity for the resource is already checked by the AMBA core */
145         base = devm_ioremap_resource(dev, res);
146         if (IS_ERR(base))
147                 return PTR_ERR(base);
148
149         drvdata->base = base;
150
151         /* Disable tpiu to support older devices */
152         tpiu_disable_hw(drvdata);
153
154         pm_runtime_put(&adev->dev);
155
156         desc = devm_kzalloc(dev, sizeof(*desc), GFP_KERNEL);
157         if (!desc)
158                 return -ENOMEM;
159
160         desc->type = CORESIGHT_DEV_TYPE_SINK;
161         desc->subtype.sink_subtype = CORESIGHT_DEV_SUBTYPE_SINK_PORT;
162         desc->ops = &tpiu_cs_ops;
163         desc->pdata = pdata;
164         desc->dev = dev;
165         drvdata->csdev = coresight_register(desc);
166         if (IS_ERR(drvdata->csdev))
167                 return PTR_ERR(drvdata->csdev);
168
169         dev_info(dev, "TPIU initialized\n");
170         return 0;
171 }
172
173 #ifdef CONFIG_PM
174 static int tpiu_runtime_suspend(struct device *dev)
175 {
176         struct tpiu_drvdata *drvdata = dev_get_drvdata(dev);
177
178         if (drvdata && !IS_ERR(drvdata->atclk))
179                 clk_disable_unprepare(drvdata->atclk);
180
181         return 0;
182 }
183
184 static int tpiu_runtime_resume(struct device *dev)
185 {
186         struct tpiu_drvdata *drvdata = dev_get_drvdata(dev);
187
188         if (drvdata && !IS_ERR(drvdata->atclk))
189                 clk_prepare_enable(drvdata->atclk);
190
191         return 0;
192 }
193 #endif
194
195 static const struct dev_pm_ops tpiu_dev_pm_ops = {
196         SET_RUNTIME_PM_OPS(tpiu_runtime_suspend, tpiu_runtime_resume, NULL)
197 };
198
199 static struct amba_id tpiu_ids[] = {
200         {
201                 .id     = 0x0003b912,
202                 .mask   = 0x0003ffff,
203         },
204         {
205                 .id     = 0x0004b912,
206                 .mask   = 0x0007ffff,
207         },
208         { 0, 0},
209 };
210
211 static struct amba_driver tpiu_driver = {
212         .drv = {
213                 .name   = "coresight-tpiu",
214                 .owner  = THIS_MODULE,
215                 .pm     = &tpiu_dev_pm_ops,
216                 .suppress_bind_attrs = true,
217         },
218         .probe          = tpiu_probe,
219         .id_table       = tpiu_ids,
220 };
221
222 module_amba_driver(tpiu_driver);
223
224 MODULE_LICENSE("GPL v2");
225 MODULE_DESCRIPTION("CoreSight Trace Port Interface Unit driver");