drivers/i2c/busses/i2c-at91.c

   1 /*
   2  *  i2c Support for Atmel's AT91 Two-Wire Interface (TWI)
   3  *
   4  *  Copyright (C) 2011 Weinmann Medical GmbH
   5  *  Author: Nikolaus Voss <n.voss@weinmann.de>
   6  *
   7  *  Evolved from original work by:
   8  *  Copyright (C) 2004 Rick Bronson
   9  *  Converted to 2.6 by Andrew Victor <andrew@sanpeople.com>
  10  *
  11  *  Borrowed heavily from original work by:
  12  *  Copyright (C) 2000 Philip Edelbrock <phil@stimpy.netroedge.com>
  13  *
  14  *  This program is free software; you can redistribute it and/or modify
  15  *  it under the terms of the GNU General Public License as published by
  16  *  the Free Software Foundation; either version 2 of the License, or
  17  *  (at your option) any later version.
  18  */
  19
  20 #include <linux/clk.h>
  21 #include <linux/completion.h>
  22 #include <linux/err.h>
  23 #include <linux/i2c.h>
  24 #include <linux/interrupt.h>
  25 #include <linux/io.h>
  26 #include <linux/module.h>
  27 #include <linux/of.h>
  28 #include <linux/of_device.h>
  29 #include <linux/of_i2c.h>
  30 #include <linux/platform_device.h>
  31 #include <linux/slab.h>
  32
  33 #define TWI_CLK_HZ              100000                  /* max 400 Kbits/s */
  34 #define AT91_I2C_TIMEOUT        msecs_to_jiffies(100)   /* transfer timeout */
  35
  36 /* AT91 TWI register definitions */
  37 #define AT91_TWI_CR             0x0000  /* Control Register */
  38 #define AT91_TWI_START          0x0001  /* Send a Start Condition */
  39 #define AT91_TWI_STOP           0x0002  /* Send a Stop Condition */
  40 #define AT91_TWI_MSEN           0x0004  /* Master Transfer Enable */
  41 #define AT91_TWI_SVDIS          0x0020  /* Slave Transfer Disable */
  42 #define AT91_TWI_SWRST          0x0080  /* Software Reset */
  43
  44 #define AT91_TWI_MMR            0x0004  /* Master Mode Register */
  45 #define AT91_TWI_IADRSZ_1       0x0100  /* Internal Device Address Size */
  46 #define AT91_TWI_MREAD          0x1000  /* Master Read Direction */
  47
  48 #define AT91_TWI_IADR           0x000c  /* Internal Address Register */
  49
  50 #define AT91_TWI_CWGR           0x0010  /* Clock Waveform Generator Reg */
  51
  52 #define AT91_TWI_SR             0x0020  /* Status Register */
  53 #define AT91_TWI_TXCOMP         0x0001  /* Transmission Complete */
  54 #define AT91_TWI_RXRDY          0x0002  /* Receive Holding Register Ready */
  55 #define AT91_TWI_TXRDY          0x0004  /* Transmit Holding Register Ready */
  56
  57 #define AT91_TWI_OVRE           0x0040  /* Overrun Error */
  58 #define AT91_TWI_UNRE           0x0080  /* Underrun Error */
  59 #define AT91_TWI_NACK           0x0100  /* Not Acknowledged */
  60
  61 #define AT91_TWI_IER            0x0024  /* Interrupt Enable Register */
  62 #define AT91_TWI_IDR            0x0028  /* Interrupt Disable Register */
  63 #define AT91_TWI_IMR            0x002c  /* Interrupt Mask Register */
  64 #define AT91_TWI_RHR            0x0030  /* Receive Holding Register */
  65 #define AT91_TWI_THR            0x0034  /* Transmit Holding Register */
  66
  67 struct at91_twi_pdata {
  68         unsigned        clk_max_div;
  69         unsigned        clk_offset;
  70         bool            has_unre_flag;
  71 };
  72
  73 struct at91_twi_dev {
  74         struct device           *dev;
  75         void __iomem            *base;
  76         struct completion       cmd_complete;
  77         struct clk              *clk;
  78         u8                      *buf;
  79         size_t                  buf_len;
  80         struct i2c_msg          *msg;
  81         int                     irq;
  82         unsigned                transfer_status;
  83         struct i2c_adapter      adapter;
  84         unsigned                twi_cwgr_reg;
  85         struct at91_twi_pdata   *pdata;
  86 };
  87
  88 static unsigned at91_twi_read(struct at91_twi_dev *dev, unsigned reg)
  89 {
  90         return readl_relaxed(dev->base + reg);
  91 }
  92
  93 static void at91_twi_write(struct at91_twi_dev *dev, unsigned reg, unsigned val)
  94 {
  95         writel_relaxed(val, dev->base + reg);
  96 }
  97
  98 static void at91_disable_twi_interrupts(struct at91_twi_dev *dev)
  99 {
 100         at91_twi_write(dev, AT91_TWI_IDR,
 101                        AT91_TWI_TXCOMP | AT91_TWI_RXRDY | AT91_TWI_TXRDY);
 102 }
 103
 104 static void at91_init_twi_bus(struct at91_twi_dev *dev)
 105 {
 106         at91_disable_twi_interrupts(dev);
 107         at91_twi_write(dev, AT91_TWI_CR, AT91_TWI_SWRST);
 108         at91_twi_write(dev, AT91_TWI_CR, AT91_TWI_MSEN);
 109         at91_twi_write(dev, AT91_TWI_CR, AT91_TWI_SVDIS);
 110         at91_twi_write(dev, AT91_TWI_CWGR, dev->twi_cwgr_reg);
 111 }
 112
 113 /*
 114  * Calculate symmetric clock as stated in datasheet:
 115  * twi_clk = F_MAIN / (2 * (cdiv * (1 << ckdiv) + offset))
 116  */
 117 static void __devinit at91_calc_twi_clock(struct at91_twi_dev *dev, int twi_clk)
 118 {
 119         int ckdiv, cdiv, div;
 120         struct at91_twi_pdata *pdata = dev->pdata;
 121         int offset = pdata->clk_offset;
 122         int max_ckdiv = pdata->clk_max_div;
 123
 124         div = max(0, (int)DIV_ROUND_UP(clk_get_rate(dev->clk),
 125                                        2 * twi_clk) - offset);
 126         ckdiv = fls(div >> 8);
 127         cdiv = div >> ckdiv;
 128
 129         if (ckdiv > max_ckdiv) {
 130                 dev_warn(dev->dev, "%d exceeds ckdiv max value which is %d.\n",
 131                          ckdiv, max_ckdiv);
 132                 ckdiv = max_ckdiv;
 133                 cdiv = 255;
 134         }
 135
 136         dev->twi_cwgr_reg = (ckdiv << 16) | (cdiv << 8) | cdiv;
 137         dev_dbg(dev->dev, "cdiv %d ckdiv %d\n", cdiv, ckdiv);
 138 }
 139
 140 static void at91_twi_write_next_byte(struct at91_twi_dev *dev)
 141 {
 142         if (dev->buf_len <= 0)
 143                 return;
 144
 145         at91_twi_write(dev, AT91_TWI_THR, *dev->buf);
 146
 147         /* send stop when last byte has been written */
 148         if (--dev->buf_len == 0)
 149                 at91_twi_write(dev, AT91_TWI_CR, AT91_TWI_STOP);
 150
 151         dev_dbg(dev->dev, "wrote 0x%x, to go %d\n", *dev->buf, dev->buf_len);
 152
 153         ++dev->buf;
 154 }
 155
 156 static void at91_twi_read_next_byte(struct at91_twi_dev *dev)
 157 {
 158         if (dev->buf_len <= 0)
 159                 return;
 160
 161         *dev->buf = at91_twi_read(dev, AT91_TWI_RHR) & 0xff;
 162         --dev->buf_len;
 163
 164         /* handle I2C_SMBUS_BLOCK_DATA */
 165         if (unlikely(dev->msg->flags & I2C_M_RECV_LEN)) {
 166                 dev->msg->flags &= ~I2C_M_RECV_LEN;
 167                 dev->buf_len += *dev->buf;
 168                 dev->msg->len = dev->buf_len + 1;
 169                 dev_dbg(dev->dev, "received block length %d\n", dev->buf_len);
 170         }
 171
 172         /* send stop if second but last byte has been read */
 173         if (dev->buf_len == 1)
 174                 at91_twi_write(dev, AT91_TWI_CR, AT91_TWI_STOP);
 175
 176         dev_dbg(dev->dev, "read 0x%x, to go %d\n", *dev->buf, dev->buf_len);
 177
 178         ++dev->buf;
 179 }
 180
 181 static irqreturn_t atmel_twi_interrupt(int irq, void *dev_id)
 182 {
 183         struct at91_twi_dev *dev = dev_id;
 184         const unsigned status = at91_twi_read(dev, AT91_TWI_SR);
 185         const unsigned irqstatus = status & at91_twi_read(dev, AT91_TWI_IMR);
 186
 187         if (!irqstatus)
 188                 return IRQ_NONE;
 189         else if (irqstatus & AT91_TWI_RXRDY)
 190                 at91_twi_read_next_byte(dev);
 191         else if (irqstatus & AT91_TWI_TXRDY)
 192                 at91_twi_write_next_byte(dev);
 193
 194         /* catch error flags */
 195         dev->transfer_status |= status;
 196
 197         if (irqstatus & AT91_TWI_TXCOMP) {
 198                 at91_disable_twi_interrupts(dev);
 199                 complete(&dev->cmd_complete);
 200         }
 201
 202         return IRQ_HANDLED;
 203 }
 204
 205 static int at91_do_twi_transfer(struct at91_twi_dev *dev)
 206 {
 207         int ret;
 208         bool has_unre_flag = dev->pdata->has_unre_flag;
 209
 210         dev_dbg(dev->dev, "transfer: %s %d bytes.\n",
 211                 (dev->msg->flags & I2C_M_RD) ? "read" : "write", dev->buf_len);
 212
 213         INIT_COMPLETION(dev->cmd_complete);
 214         dev->transfer_status = 0;
 215         if (dev->msg->flags & I2C_M_RD) {
 216                 unsigned start_flags = AT91_TWI_START;
 217
 218                 if (at91_twi_read(dev, AT91_TWI_SR) & AT91_TWI_RXRDY) {
 219                         dev_err(dev->dev, "RXRDY still set!");
 220                         at91_twi_read(dev, AT91_TWI_RHR);
 221                 }
 222
 223                 /* if only one byte is to be read, immediately stop transfer */
 224                 if (dev->buf_len <= 1 && !(dev->msg->flags & I2C_M_RECV_LEN))
 225                         start_flags |= AT91_TWI_STOP;
 226                 at91_twi_write(dev, AT91_TWI_CR, start_flags);
 227                 at91_twi_write(dev, AT91_TWI_IER,
 228                                AT91_TWI_TXCOMP | AT91_TWI_RXRDY);
 229         } else {
 230                 at91_twi_write_next_byte(dev);
 231                 at91_twi_write(dev, AT91_TWI_IER,
 232                                AT91_TWI_TXCOMP | AT91_TWI_TXRDY);
 233         }
 234
 235         ret = wait_for_completion_interruptible_timeout(&dev->cmd_complete,
 236                                                         dev->adapter.timeout);
 237         if (ret == 0) {
 238                 dev_err(dev->dev, "controller timed out\n");
 239                 at91_init_twi_bus(dev);
 240                 return -ETIMEDOUT;
 241         }
 242         if (dev->transfer_status & AT91_TWI_NACK) {
 243                 dev_dbg(dev->dev, "received nack\n");
 244                 return -EREMOTEIO;
 245         }
 246         if (dev->transfer_status & AT91_TWI_OVRE) {
 247                 dev_err(dev->dev, "overrun while reading\n");
 248                 return -EIO;
 249         }
 250         if (has_unre_flag && dev->transfer_status & AT91_TWI_UNRE) {
 251                 dev_err(dev->dev, "underrun while writing\n");
 252                 return -EIO;
 253         }
 254         dev_dbg(dev->dev, "transfer complete\n");
 255
 256         return 0;
 257 }
 258
 259 static int at91_twi_xfer(struct i2c_adapter *adap, struct i2c_msg *msg, int num)
 260 {
 261         struct at91_twi_dev *dev = i2c_get_adapdata(adap);
 262         int ret;
 263         unsigned int_addr_flag = 0;
 264         struct i2c_msg *m_start = msg;
 265
 266         dev_dbg(&adap->dev, "at91_xfer: processing %d messages:\n", num);
 267
 268         /*
 269          * The hardware can handle at most two messages concatenated by a
 270          * repeated start via it's internal address feature.
 271          */
 272         if (num > 2) {
 273                 dev_err(dev->dev,
 274                         "cannot handle more than two concatenated messages.\n");
 275                 return 0;
 276         } else if (num == 2) {
 277                 int internal_address = 0;
 278                 int i;
 279
 280                 if (msg->flags & I2C_M_RD) {
 281                         dev_err(dev->dev, "first transfer must be write.\n");
 282                         return -EINVAL;
 283                 }
 284                 if (msg->len > 3) {
 285                         dev_err(dev->dev, "first message size must be <= 3.\n");
 286                         return -EINVAL;
 287                 }
 288
 289                 /* 1st msg is put into the internal address, start with 2nd */
 290                 m_start = &msg[1];
 291                 for (i = 0; i < msg->len; ++i) {
 292                         const unsigned addr = msg->buf[msg->len - 1 - i];
 293
 294                         internal_address |= addr << (8 * i);
 295                         int_addr_flag += AT91_TWI_IADRSZ_1;
 296                 }
 297                 at91_twi_write(dev, AT91_TWI_IADR, internal_address);
 298         }
 299
 300         at91_twi_write(dev, AT91_TWI_MMR, (m_start->addr << 16) | int_addr_flag
 301                        | ((m_start->flags & I2C_M_RD) ? AT91_TWI_MREAD : 0));
 302
 303         dev->buf_len = m_start->len;
 304         dev->buf = m_start->buf;
 305         dev->msg = m_start;
 306
 307         ret = at91_do_twi_transfer(dev);
 308
 309         return (ret < 0) ? ret : num;
 310 }
 311
 312 static u32 at91_twi_func(struct i2c_adapter *adapter)
 313 {
 314         return I2C_FUNC_I2C | I2C_FUNC_SMBUS_EMUL
 315                 | I2C_FUNC_SMBUS_READ_BLOCK_DATA;
 316 }
 317
 318 static struct i2c_algorithm at91_twi_algorithm = {
 319         .master_xfer    = at91_twi_xfer,
 320         .functionality  = at91_twi_func,
 321 };
 322
 323 static struct at91_twi_pdata at91rm9200_config = {
 324         .clk_max_div = 5,
 325         .clk_offset = 3,
 326         .has_unre_flag = true,
 327 };
 328
 329 static struct at91_twi_pdata at91sam9261_config = {
 330         .clk_max_div = 5,
 331         .clk_offset = 4,
 332         .has_unre_flag = false,
 333 };
 334
 335 static struct at91_twi_pdata at91sam9260_config = {
 336         .clk_max_div = 7,
 337         .clk_offset = 4,
 338         .has_unre_flag = false,
 339 };
 340
 341 static struct at91_twi_pdata at91sam9g20_config = {
 342         .clk_max_div = 7,
 343         .clk_offset = 4,
 344         .has_unre_flag = false,
 345 };
 346
 347 static struct at91_twi_pdata at91sam9g10_config = {
 348         .clk_max_div = 7,
 349         .clk_offset = 4,
 350         .has_unre_flag = false,
 351 };
 352
 353 static struct at91_twi_pdata at91sam9x5_config = {
 354         .clk_max_div = 7,
 355         .clk_offset = 4,
 356         .has_unre_flag = false,
 357 };
 358
 359 static const struct platform_device_id at91_twi_devtypes[] = {
 360         {
 361                 .name = "i2c-at91rm9200",
 362                 .driver_data = (unsigned long) &at91rm9200_config,
 363         }, {
 364                 .name = "i2c-at91sam9261",
 365                 .driver_data = (unsigned long) &at91sam9261_config,
 366         }, {
 367                 .name = "i2c-at91sam9260",
 368                 .driver_data = (unsigned long) &at91sam9260_config,
 369         }, {
 370                 .name = "i2c-at91sam9g20",
 371                 .driver_data = (unsigned long) &at91sam9g20_config,
 372         }, {
 373                 .name = "i2c-at91sam9g10",
 374                 .driver_data = (unsigned long) &at91sam9g10_config,
 375         }, {
 376                 /* sentinel */
 377         }
 378 };
 379
 380 #if defined(CONFIG_OF)
 381 static const struct of_device_id atmel_twi_dt_ids[] = {
 382         {
 383                 .compatible = "atmel,at91sam9260-i2c",
 384                 .data = &at91sam9260_config,
 385         } , {
 386                 .compatible = "atmel,at91sam9g20-i2c",
 387                 .data = &at91sam9g20_config,
 388         } , {
 389                 .compatible = "atmel,at91sam9g10-i2c",
 390                 .data = &at91sam9g10_config,
 391         }, {
 392                 .compatible = "atmel,at91sam9x5-i2c",
 393                 .data = &at91sam9x5_config,
 394         }, {
 395                 /* sentinel */
 396         }
 397 };
 398 MODULE_DEVICE_TABLE(of, atmel_twi_dt_ids);
 399 #else
 400 #define atmel_twi_dt_ids NULL
 401 #endif
 402
 403 static struct at91_twi_pdata * __devinit at91_twi_get_driver_data(
 404                                         struct platform_device *pdev)
 405 {
 406         if (pdev->dev.of_node) {
 407                 const struct of_device_id *match;
 408                 match = of_match_node(atmel_twi_dt_ids, pdev->dev.of_node);
 409                 if (!match)
 410                         return NULL;
 411                 return match->data;
 412         }
 413         return (struct at91_twi_pdata *) platform_get_device_id(pdev)->driver_data;
 414 }
 415
 416 static int __devinit at91_twi_probe(struct platform_device *pdev)
 417 {
 418         struct at91_twi_dev *dev;
 419         struct resource *mem;
 420         int rc;
 421
 422         dev = devm_kzalloc(&pdev->dev, sizeof(*dev), GFP_KERNEL);
 423         if (!dev)
 424                 return -ENOMEM;
 425         init_completion(&dev->cmd_complete);
 426         dev->dev = &pdev->dev;
 427
 428         mem = platform_get_resource(pdev, IORESOURCE_MEM, 0);
 429         if (!mem)
 430                 return -ENODEV;
 431
 432         dev->pdata = at91_twi_get_driver_data(pdev);
 433         if (!dev->pdata)
 434                 return -ENODEV;
 435
 436         dev->base = devm_request_and_ioremap(&pdev->dev, mem);
 437         if (!dev->base)
 438                 return -EBUSY;
 439
 440         dev->irq = platform_get_irq(pdev, 0);
 441         if (dev->irq < 0)
 442                 return dev->irq;
 443
 444         rc = devm_request_irq(&pdev->dev, dev->irq, atmel_twi_interrupt, 0,
 445                          dev_name(dev->dev), dev);
 446         if (rc) {
 447                 dev_err(dev->dev, "Cannot get irq %d: %d\n", dev->irq, rc);
 448                 return rc;
 449         }
 450
 451         platform_set_drvdata(pdev, dev);
 452
 453         dev->clk = devm_clk_get(dev->dev, NULL);
 454         if (IS_ERR(dev->clk)) {
 455                 dev_err(dev->dev, "no clock defined\n");
 456                 return -ENODEV;
 457         }
 458         clk_prepare_enable(dev->clk);
 459
 460         at91_calc_twi_clock(dev, TWI_CLK_HZ);
 461         at91_init_twi_bus(dev);
 462
 463         snprintf(dev->adapter.name, sizeof(dev->adapter.name), "AT91");
 464         i2c_set_adapdata(&dev->adapter, dev);
 465         dev->adapter.owner = THIS_MODULE;
 466         dev->adapter.class = I2C_CLASS_HWMON;
 467         dev->adapter.algo = &at91_twi_algorithm;
 468         dev->adapter.dev.parent = dev->dev;
 469         dev->adapter.nr = pdev->id;
 470         dev->adapter.timeout = AT91_I2C_TIMEOUT;
 471         dev->adapter.dev.of_node = pdev->dev.of_node;
 472
 473         rc = i2c_add_numbered_adapter(&dev->adapter);
 474         if (rc) {
 475                 dev_err(dev->dev, "Adapter %s registration failed\n",
 476                         dev->adapter.name);
 477                 clk_disable_unprepare(dev->clk);
 478                 return rc;
 479         }
 480
 481         of_i2c_register_devices(&dev->adapter);
 482
 483         dev_info(dev->dev, "AT91 i2c bus driver.\n");
 484         return 0;
 485 }
 486
 487 static int __devexit at91_twi_remove(struct platform_device *pdev)
 488 {
 489         struct at91_twi_dev *dev = platform_get_drvdata(pdev);
 490         int rc;
 491
 492         rc = i2c_del_adapter(&dev->adapter);
 493         clk_disable_unprepare(dev->clk);
 494
 495         return rc;
 496 }
 497
 498 #ifdef CONFIG_PM
 499
 500 static int at91_twi_runtime_suspend(struct device *dev)
 501 {
 502         struct at91_twi_dev *twi_dev = dev_get_drvdata(dev);
 503
 504         clk_disable(twi_dev->clk);
 505
 506         return 0;
 507 }
 508
 509 static int at91_twi_runtime_resume(struct device *dev)
 510 {
 511         struct at91_twi_dev *twi_dev = dev_get_drvdata(dev);
 512
 513         return clk_enable(twi_dev->clk);
 514 }
 515
 516 static const struct dev_pm_ops at91_twi_pm = {
 517         .runtime_suspend        = at91_twi_runtime_suspend,
 518         .runtime_resume         = at91_twi_runtime_resume,
 519 };
 520
 521 #define at91_twi_pm_ops (&at91_twi_pm)
 522 #else
 523 #define at91_twi_pm_ops NULL
 524 #endif
 525
 526 static struct platform_driver at91_twi_driver = {
 527         .probe          = at91_twi_probe,
 528         .remove         = __devexit_p(at91_twi_remove),
 529         .id_table       = at91_twi_devtypes,
 530         .driver         = {
 531                 .name   = "at91_i2c",
 532                 .owner  = THIS_MODULE,
 533                 .of_match_table = atmel_twi_dt_ids,
 534                 .pm     = at91_twi_pm_ops,
 535         },
 536 };
 537
 538 static int __init at91_twi_init(void)
 539 {
 540         return platform_driver_register(&at91_twi_driver);
 541 }
 542
 543 static void __exit at91_twi_exit(void)
 544 {
 545         platform_driver_unregister(&at91_twi_driver);
 546 }
 547
 548 subsys_initcall(at91_twi_init);
 549 module_exit(at91_twi_exit);
 550
 551 MODULE_AUTHOR("Nikolaus Voss <n.voss@weinmann.de>");
 552 MODULE_DESCRIPTION("I2C (TWI) driver for Atmel AT91");
 553 MODULE_LICENSE("GPL");
 554 MODULE_ALIAS("platform:at91_i2c");