2 * i2c Support for Atmel's AT91 Two-Wire Interface (TWI)
4 * Copyright (C) 2011 Weinmann Medical GmbH
5 * Author: Nikolaus Voss <n.voss@weinmann.de>
7 * Evolved from original work by:
8 * Copyright (C) 2004 Rick Bronson
9 * Converted to 2.6 by Andrew Victor <andrew@sanpeople.com>
11 * Borrowed heavily from original work by:
12 * Copyright (C) 2000 Philip Edelbrock <phil@stimpy.netroedge.com>
14 * This program is free software; you can redistribute it and/or modify
15 * it under the terms of the GNU General Public License as published by
16 * the Free Software Foundation; either version 2 of the License, or
17 * (at your option) any later version.
20 #include <linux/clk.h>
21 #include <linux/completion.h>
22 #include <linux/err.h>
23 #include <linux/i2c.h>
24 #include <linux/interrupt.h>
26 #include <linux/module.h>
28 #include <linux/of_device.h>
29 #include <linux/of_i2c.h>
30 #include <linux/platform_device.h>
31 #include <linux/slab.h>
33 #define TWI_CLK_HZ 100000 /* max 400 Kbits/s */
34 #define AT91_I2C_TIMEOUT msecs_to_jiffies(100) /* transfer timeout */
36 /* AT91 TWI register definitions */
37 #define AT91_TWI_CR 0x0000 /* Control Register */
38 #define AT91_TWI_START 0x0001 /* Send a Start Condition */
39 #define AT91_TWI_STOP 0x0002 /* Send a Stop Condition */
40 #define AT91_TWI_MSEN 0x0004 /* Master Transfer Enable */
41 #define AT91_TWI_SVDIS 0x0020 /* Slave Transfer Disable */
42 #define AT91_TWI_SWRST 0x0080 /* Software Reset */
44 #define AT91_TWI_MMR 0x0004 /* Master Mode Register */
45 #define AT91_TWI_IADRSZ_1 0x0100 /* Internal Device Address Size */
46 #define AT91_TWI_MREAD 0x1000 /* Master Read Direction */
48 #define AT91_TWI_IADR 0x000c /* Internal Address Register */
50 #define AT91_TWI_CWGR 0x0010 /* Clock Waveform Generator Reg */
52 #define AT91_TWI_SR 0x0020 /* Status Register */
53 #define AT91_TWI_TXCOMP 0x0001 /* Transmission Complete */
54 #define AT91_TWI_RXRDY 0x0002 /* Receive Holding Register Ready */
55 #define AT91_TWI_TXRDY 0x0004 /* Transmit Holding Register Ready */
57 #define AT91_TWI_OVRE 0x0040 /* Overrun Error */
58 #define AT91_TWI_UNRE 0x0080 /* Underrun Error */
59 #define AT91_TWI_NACK 0x0100 /* Not Acknowledged */
61 #define AT91_TWI_IER 0x0024 /* Interrupt Enable Register */
62 #define AT91_TWI_IDR 0x0028 /* Interrupt Disable Register */
63 #define AT91_TWI_IMR 0x002c /* Interrupt Mask Register */
64 #define AT91_TWI_RHR 0x0030 /* Receive Holding Register */
65 #define AT91_TWI_THR 0x0034 /* Transmit Holding Register */
67 struct at91_twi_pdata {
76 struct completion cmd_complete;
82 unsigned transfer_status;
83 struct i2c_adapter adapter;
84 unsigned twi_cwgr_reg;
85 struct at91_twi_pdata *pdata;
88 static unsigned at91_twi_read(struct at91_twi_dev *dev, unsigned reg)
90 return readl_relaxed(dev->base + reg);
93 static void at91_twi_write(struct at91_twi_dev *dev, unsigned reg, unsigned val)
95 writel_relaxed(val, dev->base + reg);
98 static void at91_disable_twi_interrupts(struct at91_twi_dev *dev)
100 at91_twi_write(dev, AT91_TWI_IDR,
101 AT91_TWI_TXCOMP | AT91_TWI_RXRDY | AT91_TWI_TXRDY);
104 static void at91_init_twi_bus(struct at91_twi_dev *dev)
106 at91_disable_twi_interrupts(dev);
107 at91_twi_write(dev, AT91_TWI_CR, AT91_TWI_SWRST);
108 at91_twi_write(dev, AT91_TWI_CR, AT91_TWI_MSEN);
109 at91_twi_write(dev, AT91_TWI_CR, AT91_TWI_SVDIS);
110 at91_twi_write(dev, AT91_TWI_CWGR, dev->twi_cwgr_reg);
114 * Calculate symmetric clock as stated in datasheet:
115 * twi_clk = F_MAIN / (2 * (cdiv * (1 << ckdiv) + offset))
117 static void __devinit at91_calc_twi_clock(struct at91_twi_dev *dev, int twi_clk)
119 int ckdiv, cdiv, div;
120 struct at91_twi_pdata *pdata = dev->pdata;
121 int offset = pdata->clk_offset;
122 int max_ckdiv = pdata->clk_max_div;
124 div = max(0, (int)DIV_ROUND_UP(clk_get_rate(dev->clk),
125 2 * twi_clk) - offset);
126 ckdiv = fls(div >> 8);
129 if (ckdiv > max_ckdiv) {
130 dev_warn(dev->dev, "%d exceeds ckdiv max value which is %d.\n",
136 dev->twi_cwgr_reg = (ckdiv << 16) | (cdiv << 8) | cdiv;
137 dev_dbg(dev->dev, "cdiv %d ckdiv %d\n", cdiv, ckdiv);
140 static void at91_twi_write_next_byte(struct at91_twi_dev *dev)
142 if (dev->buf_len <= 0)
145 at91_twi_write(dev, AT91_TWI_THR, *dev->buf);
147 /* send stop when last byte has been written */
148 if (--dev->buf_len == 0)
149 at91_twi_write(dev, AT91_TWI_CR, AT91_TWI_STOP);
151 dev_dbg(dev->dev, "wrote 0x%x, to go %d\n", *dev->buf, dev->buf_len);
156 static void at91_twi_read_next_byte(struct at91_twi_dev *dev)
158 if (dev->buf_len <= 0)
161 *dev->buf = at91_twi_read(dev, AT91_TWI_RHR) & 0xff;
164 /* handle I2C_SMBUS_BLOCK_DATA */
165 if (unlikely(dev->msg->flags & I2C_M_RECV_LEN)) {
166 dev->msg->flags &= ~I2C_M_RECV_LEN;
167 dev->buf_len += *dev->buf;
168 dev->msg->len = dev->buf_len + 1;
169 dev_dbg(dev->dev, "received block length %d\n", dev->buf_len);
172 /* send stop if second but last byte has been read */
173 if (dev->buf_len == 1)
174 at91_twi_write(dev, AT91_TWI_CR, AT91_TWI_STOP);
176 dev_dbg(dev->dev, "read 0x%x, to go %d\n", *dev->buf, dev->buf_len);
181 static irqreturn_t atmel_twi_interrupt(int irq, void *dev_id)
183 struct at91_twi_dev *dev = dev_id;
184 const unsigned status = at91_twi_read(dev, AT91_TWI_SR);
185 const unsigned irqstatus = status & at91_twi_read(dev, AT91_TWI_IMR);
189 else if (irqstatus & AT91_TWI_RXRDY)
190 at91_twi_read_next_byte(dev);
191 else if (irqstatus & AT91_TWI_TXRDY)
192 at91_twi_write_next_byte(dev);
194 /* catch error flags */
195 dev->transfer_status |= status;
197 if (irqstatus & AT91_TWI_TXCOMP) {
198 at91_disable_twi_interrupts(dev);
199 complete(&dev->cmd_complete);
205 static int at91_do_twi_transfer(struct at91_twi_dev *dev)
208 bool has_unre_flag = dev->pdata->has_unre_flag;
210 dev_dbg(dev->dev, "transfer: %s %d bytes.\n",
211 (dev->msg->flags & I2C_M_RD) ? "read" : "write", dev->buf_len);
213 INIT_COMPLETION(dev->cmd_complete);
214 dev->transfer_status = 0;
215 if (dev->msg->flags & I2C_M_RD) {
216 unsigned start_flags = AT91_TWI_START;
218 if (at91_twi_read(dev, AT91_TWI_SR) & AT91_TWI_RXRDY) {
219 dev_err(dev->dev, "RXRDY still set!");
220 at91_twi_read(dev, AT91_TWI_RHR);
223 /* if only one byte is to be read, immediately stop transfer */
224 if (dev->buf_len <= 1 && !(dev->msg->flags & I2C_M_RECV_LEN))
225 start_flags |= AT91_TWI_STOP;
226 at91_twi_write(dev, AT91_TWI_CR, start_flags);
227 at91_twi_write(dev, AT91_TWI_IER,
228 AT91_TWI_TXCOMP | AT91_TWI_RXRDY);
230 at91_twi_write_next_byte(dev);
231 at91_twi_write(dev, AT91_TWI_IER,
232 AT91_TWI_TXCOMP | AT91_TWI_TXRDY);
235 ret = wait_for_completion_interruptible_timeout(&dev->cmd_complete,
236 dev->adapter.timeout);
238 dev_err(dev->dev, "controller timed out\n");
239 at91_init_twi_bus(dev);
242 if (dev->transfer_status & AT91_TWI_NACK) {
243 dev_dbg(dev->dev, "received nack\n");
246 if (dev->transfer_status & AT91_TWI_OVRE) {
247 dev_err(dev->dev, "overrun while reading\n");
250 if (has_unre_flag && dev->transfer_status & AT91_TWI_UNRE) {
251 dev_err(dev->dev, "underrun while writing\n");
254 dev_dbg(dev->dev, "transfer complete\n");
259 static int at91_twi_xfer(struct i2c_adapter *adap, struct i2c_msg *msg, int num)
261 struct at91_twi_dev *dev = i2c_get_adapdata(adap);
263 unsigned int_addr_flag = 0;
264 struct i2c_msg *m_start = msg;
266 dev_dbg(&adap->dev, "at91_xfer: processing %d messages:\n", num);
269 * The hardware can handle at most two messages concatenated by a
270 * repeated start via it's internal address feature.
274 "cannot handle more than two concatenated messages.\n");
276 } else if (num == 2) {
277 int internal_address = 0;
280 if (msg->flags & I2C_M_RD) {
281 dev_err(dev->dev, "first transfer must be write.\n");
285 dev_err(dev->dev, "first message size must be <= 3.\n");
289 /* 1st msg is put into the internal address, start with 2nd */
291 for (i = 0; i < msg->len; ++i) {
292 const unsigned addr = msg->buf[msg->len - 1 - i];
294 internal_address |= addr << (8 * i);
295 int_addr_flag += AT91_TWI_IADRSZ_1;
297 at91_twi_write(dev, AT91_TWI_IADR, internal_address);
300 at91_twi_write(dev, AT91_TWI_MMR, (m_start->addr << 16) | int_addr_flag
301 | ((m_start->flags & I2C_M_RD) ? AT91_TWI_MREAD : 0));
303 dev->buf_len = m_start->len;
304 dev->buf = m_start->buf;
307 ret = at91_do_twi_transfer(dev);
309 return (ret < 0) ? ret : num;
312 static u32 at91_twi_func(struct i2c_adapter *adapter)
314 return I2C_FUNC_I2C | I2C_FUNC_SMBUS_EMUL
315 | I2C_FUNC_SMBUS_READ_BLOCK_DATA;
318 static struct i2c_algorithm at91_twi_algorithm = {
319 .master_xfer = at91_twi_xfer,
320 .functionality = at91_twi_func,
323 static struct at91_twi_pdata at91rm9200_config = {
326 .has_unre_flag = true,
329 static struct at91_twi_pdata at91sam9261_config = {
332 .has_unre_flag = false,
335 static struct at91_twi_pdata at91sam9260_config = {
338 .has_unre_flag = false,
341 static struct at91_twi_pdata at91sam9g20_config = {
344 .has_unre_flag = false,
347 static struct at91_twi_pdata at91sam9g10_config = {
350 .has_unre_flag = false,
353 static struct at91_twi_pdata at91sam9x5_config = {
356 .has_unre_flag = false,
359 static const struct platform_device_id at91_twi_devtypes[] = {
361 .name = "i2c-at91rm9200",
362 .driver_data = (unsigned long) &at91rm9200_config,
364 .name = "i2c-at91sam9261",
365 .driver_data = (unsigned long) &at91sam9261_config,
367 .name = "i2c-at91sam9260",
368 .driver_data = (unsigned long) &at91sam9260_config,
370 .name = "i2c-at91sam9g20",
371 .driver_data = (unsigned long) &at91sam9g20_config,
373 .name = "i2c-at91sam9g10",
374 .driver_data = (unsigned long) &at91sam9g10_config,
380 #if defined(CONFIG_OF)
381 static const struct of_device_id atmel_twi_dt_ids[] = {
383 .compatible = "atmel,at91sam9260-i2c",
384 .data = &at91sam9260_config,
386 .compatible = "atmel,at91sam9g20-i2c",
387 .data = &at91sam9g20_config,
389 .compatible = "atmel,at91sam9g10-i2c",
390 .data = &at91sam9g10_config,
392 .compatible = "atmel,at91sam9x5-i2c",
393 .data = &at91sam9x5_config,
398 MODULE_DEVICE_TABLE(of, atmel_twi_dt_ids);
400 #define atmel_twi_dt_ids NULL
403 static struct at91_twi_pdata * __devinit at91_twi_get_driver_data(
404 struct platform_device *pdev)
406 if (pdev->dev.of_node) {
407 const struct of_device_id *match;
408 match = of_match_node(atmel_twi_dt_ids, pdev->dev.of_node);
413 return (struct at91_twi_pdata *) platform_get_device_id(pdev)->driver_data;
416 static int __devinit at91_twi_probe(struct platform_device *pdev)
418 struct at91_twi_dev *dev;
419 struct resource *mem;
422 dev = devm_kzalloc(&pdev->dev, sizeof(*dev), GFP_KERNEL);
425 init_completion(&dev->cmd_complete);
426 dev->dev = &pdev->dev;
428 mem = platform_get_resource(pdev, IORESOURCE_MEM, 0);
432 dev->pdata = at91_twi_get_driver_data(pdev);
436 dev->base = devm_request_and_ioremap(&pdev->dev, mem);
440 dev->irq = platform_get_irq(pdev, 0);
444 rc = devm_request_irq(&pdev->dev, dev->irq, atmel_twi_interrupt, 0,
445 dev_name(dev->dev), dev);
447 dev_err(dev->dev, "Cannot get irq %d: %d\n", dev->irq, rc);
451 platform_set_drvdata(pdev, dev);
453 dev->clk = devm_clk_get(dev->dev, NULL);
454 if (IS_ERR(dev->clk)) {
455 dev_err(dev->dev, "no clock defined\n");
458 clk_prepare_enable(dev->clk);
460 at91_calc_twi_clock(dev, TWI_CLK_HZ);
461 at91_init_twi_bus(dev);
463 snprintf(dev->adapter.name, sizeof(dev->adapter.name), "AT91");
464 i2c_set_adapdata(&dev->adapter, dev);
465 dev->adapter.owner = THIS_MODULE;
466 dev->adapter.class = I2C_CLASS_HWMON;
467 dev->adapter.algo = &at91_twi_algorithm;
468 dev->adapter.dev.parent = dev->dev;
469 dev->adapter.nr = pdev->id;
470 dev->adapter.timeout = AT91_I2C_TIMEOUT;
471 dev->adapter.dev.of_node = pdev->dev.of_node;
473 rc = i2c_add_numbered_adapter(&dev->adapter);
475 dev_err(dev->dev, "Adapter %s registration failed\n",
477 clk_disable_unprepare(dev->clk);
481 of_i2c_register_devices(&dev->adapter);
483 dev_info(dev->dev, "AT91 i2c bus driver.\n");
487 static int __devexit at91_twi_remove(struct platform_device *pdev)
489 struct at91_twi_dev *dev = platform_get_drvdata(pdev);
492 rc = i2c_del_adapter(&dev->adapter);
493 clk_disable_unprepare(dev->clk);
500 static int at91_twi_runtime_suspend(struct device *dev)
502 struct at91_twi_dev *twi_dev = dev_get_drvdata(dev);
504 clk_disable(twi_dev->clk);
509 static int at91_twi_runtime_resume(struct device *dev)
511 struct at91_twi_dev *twi_dev = dev_get_drvdata(dev);
513 return clk_enable(twi_dev->clk);
516 static const struct dev_pm_ops at91_twi_pm = {
517 .runtime_suspend = at91_twi_runtime_suspend,
518 .runtime_resume = at91_twi_runtime_resume,
521 #define at91_twi_pm_ops (&at91_twi_pm)
523 #define at91_twi_pm_ops NULL
526 static struct platform_driver at91_twi_driver = {
527 .probe = at91_twi_probe,
528 .remove = __devexit_p(at91_twi_remove),
529 .id_table = at91_twi_devtypes,
532 .owner = THIS_MODULE,
533 .of_match_table = atmel_twi_dt_ids,
534 .pm = at91_twi_pm_ops,
538 static int __init at91_twi_init(void)
540 return platform_driver_register(&at91_twi_driver);
543 static void __exit at91_twi_exit(void)
545 platform_driver_unregister(&at91_twi_driver);
548 subsys_initcall(at91_twi_init);
549 module_exit(at91_twi_exit);
551 MODULE_AUTHOR("Nikolaus Voss <n.voss@weinmann.de>");
552 MODULE_DESCRIPTION("I2C (TWI) driver for Atmel AT91");
553 MODULE_LICENSE("GPL");
554 MODULE_ALIAS("platform:at91_i2c");