2 * SuperH Mobile I2C Controller
4 * Copyright (C) 2008 Magnus Damm
6 * Portions of the code based on out-of-tree driver i2c-sh7343.c
7 * Copyright (c) 2006 Carlos Munoz <carlos@kenati.com>
9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License as published by
11 * the Free Software Foundation; either version 2 of the License
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software
20 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
23 #include <linux/kernel.h>
24 #include <linux/module.h>
25 #include <linux/init.h>
26 #include <linux/delay.h>
27 #include <linux/platform_device.h>
28 #include <linux/interrupt.h>
29 #include <linux/i2c.h>
30 #include <linux/of_i2c.h>
31 #include <linux/err.h>
32 #include <linux/pm_runtime.h>
33 #include <linux/clk.h>
35 #include <linux/slab.h>
36 #include <linux/i2c/i2c-sh_mobile.h>
38 /* Transmit operation: */
48 /* BUS: S A8 ACK D8(1) ACK P */
49 /* IRQ: DTE WAIT WAIT */
55 /* BUS: S A8 ACK D8(1) ACK D8(2) ACK P */
56 /* IRQ: DTE WAIT WAIT WAIT */
59 /* ICDR: A8 D8(1) D8(2) */
61 /* 3 bytes or more, +---------+ gets repeated */
64 /* Receive operation: */
66 /* 0 byte receive - not supported since slave may hold SDA low */
68 /* 1 byte receive [TX] | [RX] */
69 /* BUS: S A8 ACK | D8(1) ACK P */
70 /* IRQ: DTE WAIT | WAIT DTE */
71 /* ICIC: -DTE | +DTE */
72 /* ICCR: 0x94 0x81 | 0xc0 */
73 /* ICDR: A8 | D8(1) */
75 /* 2 byte receive [TX]| [RX] */
76 /* BUS: S A8 ACK | D8(1) ACK D8(2) ACK P */
77 /* IRQ: DTE WAIT | WAIT WAIT DTE */
78 /* ICIC: -DTE | +DTE */
79 /* ICCR: 0x94 0x81 | 0xc0 */
80 /* ICDR: A8 | D8(1) D8(2) */
82 /* 3 byte receive [TX] | [RX] */
83 /* BUS: S A8 ACK | D8(1) ACK D8(2) ACK D8(3) ACK P */
84 /* IRQ: DTE WAIT | WAIT WAIT WAIT DTE */
85 /* ICIC: -DTE | +DTE */
86 /* ICCR: 0x94 0x81 | 0xc0 */
87 /* ICDR: A8 | D8(1) D8(2) D8(3) */
89 /* 4 bytes or more, this part is repeated +---------+ */
92 /* Interrupt order and BUSY flag */
94 /* SDA ___\___XXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXAAAAAAAAA___/ */
95 /* SCL \_/1\_/2\_/3\_/4\_/5\_/6\_/7\_/8\___/9\_____/ */
97 /* S D7 D6 D5 D4 D3 D2 D1 D0 P */
99 /* WAIT IRQ ________________________________/ \___________ */
100 /* TACK IRQ ____________________________________/ \_______ */
101 /* DTE IRQ __________________________________________/ \_ */
102 /* AL IRQ XXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXX */
103 /* _______________________________________________ */
107 enum sh_mobile_i2c_op {
118 struct sh_mobile_i2c_data {
121 struct i2c_adapter adap;
122 unsigned long bus_speed;
130 wait_queue_head_t wait;
136 #define IIC_FLAG_HAS_ICIC67 (1 << 0)
138 #define NORMAL_SPEED 100000 /* FAST_SPEED 400000 */
140 /* Register offsets */
149 #define ICCR_ICE 0x80
150 #define ICCR_RACK 0x40
151 #define ICCR_TRS 0x10
152 #define ICCR_BBSY 0x04
153 #define ICCR_SCP 0x01
155 #define ICSR_SCLM 0x80
156 #define ICSR_SDAM 0x40
158 #define ICSR_BUSY 0x10
160 #define ICSR_TACK 0x04
161 #define ICSR_WAIT 0x02
162 #define ICSR_DTE 0x01
164 #define ICIC_ICCLB8 0x80
165 #define ICIC_ICCHB8 0x40
166 #define ICIC_ALE 0x08
167 #define ICIC_TACKE 0x04
168 #define ICIC_WAITE 0x02
169 #define ICIC_DTEE 0x01
171 static void iic_wr(struct sh_mobile_i2c_data *pd, int offs, unsigned char data)
176 iowrite8(data, pd->reg + offs);
179 static unsigned char iic_rd(struct sh_mobile_i2c_data *pd, int offs)
181 return ioread8(pd->reg + offs);
184 static void iic_set_clr(struct sh_mobile_i2c_data *pd, int offs,
185 unsigned char set, unsigned char clr)
187 iic_wr(pd, offs, (iic_rd(pd, offs) | set) & ~clr);
190 static void activate_ch(struct sh_mobile_i2c_data *pd)
192 unsigned long i2c_clk;
197 /* Wake up device and enable clock */
198 pm_runtime_get_sync(pd->dev);
201 /* Get clock rate after clock is enabled */
202 i2c_clk = clk_get_rate(pd->clk);
204 /* Calculate the value for iccl. From the data sheet:
205 * iccl = (p clock / transfer rate) * (L / (L + H))
206 * where L and H are the SCL low/high ratio (5/4 in this case).
207 * We also round off the result.
210 denom = pd->bus_speed * 9;
211 tmp = num * 10 / denom;
213 pd->iccl = (u_int8_t)((num/denom) + 1);
215 pd->iccl = (u_int8_t)(num/denom);
217 /* one more bit of ICCL in ICIC */
218 if (pd->flags & IIC_FLAG_HAS_ICIC67) {
219 if ((num/denom) > 0xff)
220 pd->icic |= ICIC_ICCLB8;
222 pd->icic &= ~ICIC_ICCLB8;
225 /* Calculate the value for icch. From the data sheet:
226 icch = (p clock / transfer rate) * (H / (L + H)) */
228 tmp = num * 10 / denom;
230 pd->icch = (u_int8_t)((num/denom) + 1);
232 pd->icch = (u_int8_t)(num/denom);
234 /* one more bit of ICCH in ICIC */
235 if (pd->flags & IIC_FLAG_HAS_ICIC67) {
236 if ((num/denom) > 0xff)
237 pd->icic |= ICIC_ICCHB8;
239 pd->icic &= ~ICIC_ICCHB8;
242 /* Enable channel and configure rx ack */
243 iic_set_clr(pd, ICCR, ICCR_ICE, 0);
245 /* Mask all interrupts */
249 iic_wr(pd, ICCL, pd->iccl);
250 iic_wr(pd, ICCH, pd->icch);
253 static void deactivate_ch(struct sh_mobile_i2c_data *pd)
255 /* Clear/disable interrupts */
259 /* Disable channel */
260 iic_set_clr(pd, ICCR, 0, ICCR_ICE);
262 /* Disable clock and mark device as idle */
263 clk_disable(pd->clk);
264 pm_runtime_put_sync(pd->dev);
267 static unsigned char i2c_op(struct sh_mobile_i2c_data *pd,
268 enum sh_mobile_i2c_op op, unsigned char data)
270 unsigned char ret = 0;
273 dev_dbg(pd->dev, "op %d, data in 0x%02x\n", op, data);
275 spin_lock_irqsave(&pd->lock, flags);
278 case OP_START: /* issue start and trigger DTE interrupt */
279 iic_wr(pd, ICCR, 0x94);
281 case OP_TX_FIRST: /* disable DTE interrupt and write data */
282 iic_wr(pd, ICIC, ICIC_WAITE | ICIC_ALE | ICIC_TACKE);
283 iic_wr(pd, ICDR, data);
285 case OP_TX: /* write data */
286 iic_wr(pd, ICDR, data);
288 case OP_TX_STOP: /* write data and issue a stop afterwards */
289 iic_wr(pd, ICDR, data);
290 iic_wr(pd, ICCR, 0x90);
292 case OP_TX_TO_RX: /* select read mode */
293 iic_wr(pd, ICCR, 0x81);
295 case OP_RX: /* just read data */
296 ret = iic_rd(pd, ICDR);
298 case OP_RX_STOP: /* enable DTE interrupt, issue stop */
300 ICIC_DTEE | ICIC_WAITE | ICIC_ALE | ICIC_TACKE);
301 iic_wr(pd, ICCR, 0xc0);
303 case OP_RX_STOP_DATA: /* enable DTE interrupt, read data, issue stop */
305 ICIC_DTEE | ICIC_WAITE | ICIC_ALE | ICIC_TACKE);
306 ret = iic_rd(pd, ICDR);
307 iic_wr(pd, ICCR, 0xc0);
311 spin_unlock_irqrestore(&pd->lock, flags);
313 dev_dbg(pd->dev, "op %d, data out 0x%02x\n", op, ret);
317 static int sh_mobile_i2c_is_first_byte(struct sh_mobile_i2c_data *pd)
325 static int sh_mobile_i2c_is_last_byte(struct sh_mobile_i2c_data *pd)
327 if (pd->pos == (pd->msg->len - 1))
333 static void sh_mobile_i2c_get_data(struct sh_mobile_i2c_data *pd,
338 *buf = (pd->msg->addr & 0x7f) << 1;
339 *buf |= (pd->msg->flags & I2C_M_RD) ? 1 : 0;
342 *buf = pd->msg->buf[pd->pos];
346 static int sh_mobile_i2c_isr_tx(struct sh_mobile_i2c_data *pd)
350 if (pd->pos == pd->msg->len)
353 sh_mobile_i2c_get_data(pd, &data);
355 if (sh_mobile_i2c_is_last_byte(pd))
356 i2c_op(pd, OP_TX_STOP, data);
357 else if (sh_mobile_i2c_is_first_byte(pd))
358 i2c_op(pd, OP_TX_FIRST, data);
360 i2c_op(pd, OP_TX, data);
366 static int sh_mobile_i2c_isr_rx(struct sh_mobile_i2c_data *pd)
373 sh_mobile_i2c_get_data(pd, &data);
375 if (sh_mobile_i2c_is_first_byte(pd))
376 i2c_op(pd, OP_TX_FIRST, data);
378 i2c_op(pd, OP_TX, data);
383 i2c_op(pd, OP_TX_TO_RX, 0);
387 real_pos = pd->pos - 2;
389 if (pd->pos == pd->msg->len) {
391 i2c_op(pd, OP_RX_STOP, 0);
394 data = i2c_op(pd, OP_RX_STOP_DATA, 0);
396 data = i2c_op(pd, OP_RX, 0);
399 pd->msg->buf[real_pos] = data;
403 return pd->pos == (pd->msg->len + 2);
406 static irqreturn_t sh_mobile_i2c_isr(int irq, void *dev_id)
408 struct platform_device *dev = dev_id;
409 struct sh_mobile_i2c_data *pd = platform_get_drvdata(dev);
413 sr = iic_rd(pd, ICSR);
414 pd->sr |= sr; /* remember state */
416 dev_dbg(pd->dev, "i2c_isr 0x%02x 0x%02x %s %d %d!\n", sr, pd->sr,
417 (pd->msg->flags & I2C_M_RD) ? "read" : "write",
418 pd->pos, pd->msg->len);
420 if (sr & (ICSR_AL | ICSR_TACK)) {
421 /* don't interrupt transaction - continue to issue stop */
422 iic_wr(pd, ICSR, sr & ~(ICSR_AL | ICSR_TACK));
424 } else if (pd->msg->flags & I2C_M_RD)
425 wakeup = sh_mobile_i2c_isr_rx(pd);
427 wakeup = sh_mobile_i2c_isr_tx(pd);
429 if (sr & ICSR_WAIT) /* TODO: add delay here to support slow acks */
430 iic_wr(pd, ICSR, sr & ~ICSR_WAIT);
440 static int start_ch(struct sh_mobile_i2c_data *pd, struct i2c_msg *usr_msg)
442 if (usr_msg->len == 0 && (usr_msg->flags & I2C_M_RD)) {
443 dev_err(pd->dev, "Unsupported zero length i2c read\n");
447 /* Initialize channel registers */
448 iic_set_clr(pd, ICCR, 0, ICCR_ICE);
450 /* Enable channel and configure rx ack */
451 iic_set_clr(pd, ICCR, ICCR_ICE, 0);
454 iic_wr(pd, ICCL, pd->iccl);
455 iic_wr(pd, ICCH, pd->icch);
461 /* Enable all interrupts to begin with */
462 iic_wr(pd, ICIC, ICIC_DTEE | ICIC_WAITE | ICIC_ALE | ICIC_TACKE);
466 static int sh_mobile_i2c_xfer(struct i2c_adapter *adapter,
467 struct i2c_msg *msgs,
470 struct sh_mobile_i2c_data *pd = i2c_get_adapdata(adapter);
474 int i, k, retry_count;
478 /* Process all messages */
479 for (i = 0; i < num; i++) {
482 err = start_ch(pd, msg);
486 i2c_op(pd, OP_START, 0);
488 /* The interrupt handler takes care of the rest... */
489 k = wait_event_timeout(pd->wait,
490 pd->sr & (ICSR_TACK | SW_DONE),
493 dev_err(pd->dev, "Transfer request timed out\n");
497 val = iic_rd(pd, ICSR);
499 dev_dbg(pd->dev, "val 0x%02x pd->sr 0x%02x\n", val, pd->sr);
501 /* the interrupt handler may wake us up before the
502 * transfer is finished, so poll the hardware
505 if (val & ICSR_BUSY) {
511 dev_err(pd->dev, "Polling timed out\n");
515 /* handle missing acknowledge and arbitration lost */
516 if ((val | pd->sr) & (ICSR_TACK | ICSR_AL)) {
529 static u32 sh_mobile_i2c_func(struct i2c_adapter *adapter)
531 return I2C_FUNC_I2C | I2C_FUNC_SMBUS_EMUL;
534 static struct i2c_algorithm sh_mobile_i2c_algorithm = {
535 .functionality = sh_mobile_i2c_func,
536 .master_xfer = sh_mobile_i2c_xfer,
539 static int sh_mobile_i2c_hook_irqs(struct platform_device *dev, int hook)
541 struct resource *res;
545 while ((res = platform_get_resource(dev, IORESOURCE_IRQ, k))) {
546 for (n = res->start; hook && n <= res->end; n++) {
547 if (request_irq(n, sh_mobile_i2c_isr, 0,
548 dev_name(&dev->dev), dev)) {
549 for (n--; n >= res->start; n--)
559 return k > 0 ? 0 : -ENOENT;
567 res = platform_get_resource(dev, IORESOURCE_IRQ, k);
568 for (n = res->start; n <= res->end; n++)
577 static int sh_mobile_i2c_probe(struct platform_device *dev)
579 struct i2c_sh_mobile_platform_data *pdata = dev->dev.platform_data;
580 struct sh_mobile_i2c_data *pd;
581 struct i2c_adapter *adap;
582 struct resource *res;
586 pd = kzalloc(sizeof(struct sh_mobile_i2c_data), GFP_KERNEL);
588 dev_err(&dev->dev, "cannot allocate private data\n");
592 pd->clk = clk_get(&dev->dev, NULL);
593 if (IS_ERR(pd->clk)) {
594 dev_err(&dev->dev, "cannot get clock\n");
595 ret = PTR_ERR(pd->clk);
599 ret = sh_mobile_i2c_hook_irqs(dev, 1);
601 dev_err(&dev->dev, "cannot request IRQ\n");
606 platform_set_drvdata(dev, pd);
608 res = platform_get_resource(dev, IORESOURCE_MEM, 0);
610 dev_err(&dev->dev, "cannot find IO resource\n");
615 size = resource_size(res);
617 pd->reg = ioremap(res->start, size);
618 if (pd->reg == NULL) {
619 dev_err(&dev->dev, "cannot map IO\n");
624 /* Use platformd data bus speed or NORMAL_SPEED */
625 pd->bus_speed = NORMAL_SPEED;
626 if (pdata && pdata->bus_speed)
627 pd->bus_speed = pdata->bus_speed;
629 /* The IIC blocks on SH-Mobile ARM processors
630 * come with two new bits in ICIC.
633 pd->flags |= IIC_FLAG_HAS_ICIC67;
635 /* Enable Runtime PM for this device.
637 * Also tell the Runtime PM core to ignore children
638 * for this device since it is valid for us to suspend
639 * this I2C master driver even though the slave devices
640 * on the I2C bus may not be suspended.
642 * The state of the I2C hardware bus is unaffected by
643 * the Runtime PM state.
645 pm_suspend_ignore_children(&dev->dev, true);
646 pm_runtime_enable(&dev->dev);
648 /* setup the private data */
650 i2c_set_adapdata(adap, pd);
652 adap->owner = THIS_MODULE;
653 adap->algo = &sh_mobile_i2c_algorithm;
654 adap->dev.parent = &dev->dev;
657 adap->dev.of_node = dev->dev.of_node;
659 strlcpy(adap->name, dev->name, sizeof(adap->name));
661 spin_lock_init(&pd->lock);
662 init_waitqueue_head(&pd->wait);
664 ret = i2c_add_numbered_adapter(adap);
666 dev_err(&dev->dev, "cannot add numbered adapter\n");
670 dev_info(&dev->dev, "I2C adapter %d with bus speed %lu Hz\n",
671 adap->nr, pd->bus_speed);
673 of_i2c_register_devices(adap);
679 sh_mobile_i2c_hook_irqs(dev, 0);
687 static int sh_mobile_i2c_remove(struct platform_device *dev)
689 struct sh_mobile_i2c_data *pd = platform_get_drvdata(dev);
691 i2c_del_adapter(&pd->adap);
693 sh_mobile_i2c_hook_irqs(dev, 0);
695 pm_runtime_disable(&dev->dev);
700 static int sh_mobile_i2c_runtime_nop(struct device *dev)
702 /* Runtime PM callback shared between ->runtime_suspend()
703 * and ->runtime_resume(). Simply returns success.
705 * This driver re-initializes all registers after
706 * pm_runtime_get_sync() anyway so there is no need
707 * to save and restore registers here.
712 static const struct dev_pm_ops sh_mobile_i2c_dev_pm_ops = {
713 .runtime_suspend = sh_mobile_i2c_runtime_nop,
714 .runtime_resume = sh_mobile_i2c_runtime_nop,
717 static const struct of_device_id sh_mobile_i2c_dt_ids[] __devinitconst = {
718 { .compatible = "renesas,rmobile-iic", },
721 MODULE_DEVICE_TABLE(of, sh_mobile_i2c_dt_ids);
723 static struct platform_driver sh_mobile_i2c_driver = {
725 .name = "i2c-sh_mobile",
726 .owner = THIS_MODULE,
727 .pm = &sh_mobile_i2c_dev_pm_ops,
728 .of_match_table = sh_mobile_i2c_dt_ids,
730 .probe = sh_mobile_i2c_probe,
731 .remove = sh_mobile_i2c_remove,
734 static int __init sh_mobile_i2c_adap_init(void)
736 return platform_driver_register(&sh_mobile_i2c_driver);
739 static void __exit sh_mobile_i2c_adap_exit(void)
741 platform_driver_unregister(&sh_mobile_i2c_driver);
744 subsys_initcall(sh_mobile_i2c_adap_init);
745 module_exit(sh_mobile_i2c_adap_exit);
747 MODULE_DESCRIPTION("SuperH Mobile I2C Bus Controller driver");
748 MODULE_AUTHOR("Magnus Damm");
749 MODULE_LICENSE("GPL v2");
750 MODULE_ALIAS("platform:i2c-sh_mobile");