drivers/ide/ide-iops.c

   1 /*
   2  *  Copyright (C) 2000-2002     Andre Hedrick <andre@linux-ide.org>
   3  *  Copyright (C) 2003          Red Hat <alan@redhat.com>
   4  *
   5  */
   6
   7 #include <linux/module.h>
   8 #include <linux/types.h>
   9 #include <linux/string.h>
  10 #include <linux/kernel.h>
  11 #include <linux/timer.h>
  12 #include <linux/mm.h>
  13 #include <linux/interrupt.h>
  14 #include <linux/major.h>
  15 #include <linux/errno.h>
  16 #include <linux/genhd.h>
  17 #include <linux/blkpg.h>
  18 #include <linux/slab.h>
  19 #include <linux/pci.h>
  20 #include <linux/delay.h>
  21 #include <linux/hdreg.h>
  22 #include <linux/ide.h>
  23 #include <linux/bitops.h>
  24 #include <linux/nmi.h>
  25
  26 #include <asm/byteorder.h>
  27 #include <asm/irq.h>
  28 #include <asm/uaccess.h>
  29 #include <asm/io.h>
  30
  31 /*
  32  *      Conventional PIO operations for ATA devices
  33  */
  34
  35 static u8 ide_inb (unsigned long port)
  36 {
  37         return (u8) inb(port);
  38 }
  39
  40 static void ide_outb (u8 val, unsigned long port)
  41 {
  42         outb(val, port);
  43 }
  44
  45 static void ide_outbsync(ide_hwif_t *hwif, u8 addr, unsigned long port)
  46 {
  47         outb(addr, port);
  48 }
  49
  50 void default_hwif_iops (ide_hwif_t *hwif)
  51 {
  52         hwif->OUTB      = ide_outb;
  53         hwif->OUTBSYNC  = ide_outbsync;
  54         hwif->INB       = ide_inb;
  55 }
  56
  57 /*
  58  *      MMIO operations, typically used for SATA controllers
  59  */
  60
  61 static u8 ide_mm_inb (unsigned long port)
  62 {
  63         return (u8) readb((void __iomem *) port);
  64 }
  65
  66 static void ide_mm_outb (u8 value, unsigned long port)
  67 {
  68         writeb(value, (void __iomem *) port);
  69 }
  70
  71 static void ide_mm_outbsync(ide_hwif_t *hwif, u8 value, unsigned long port)
  72 {
  73         writeb(value, (void __iomem *) port);
  74 }
  75
  76 void default_hwif_mmiops (ide_hwif_t *hwif)
  77 {
  78         hwif->OUTB      = ide_mm_outb;
  79         /* Most systems will need to override OUTBSYNC, alas however
  80            this one is controller specific! */
  81         hwif->OUTBSYNC  = ide_mm_outbsync;
  82         hwif->INB       = ide_mm_inb;
  83 }
  84
  85 EXPORT_SYMBOL(default_hwif_mmiops);
  86
  87 void SELECT_DRIVE (ide_drive_t *drive)
  88 {
  89         ide_hwif_t *hwif = drive->hwif;
  90         const struct ide_port_ops *port_ops = hwif->port_ops;
  91
  92         if (port_ops && port_ops->selectproc)
  93                 port_ops->selectproc(drive);
  94
  95         hwif->OUTB(drive->select.all, hwif->io_ports.device_addr);
  96 }
  97
  98 void SELECT_MASK(ide_drive_t *drive, int mask)
  99 {
 100         const struct ide_port_ops *port_ops = drive->hwif->port_ops;
 101
 102         if (port_ops && port_ops->maskproc)
 103                 port_ops->maskproc(drive, mask);
 104 }
 105
 106 static void ide_exec_command(ide_hwif_t *hwif, u8 cmd)
 107 {
 108         if (hwif->host_flags & IDE_HFLAG_MMIO)
 109                 writeb(cmd, (void __iomem *)hwif->io_ports.command_addr);
 110         else
 111                 outb(cmd, hwif->io_ports.command_addr);
 112 }
 113
 114 static u8 ide_read_status(ide_hwif_t *hwif)
 115 {
 116         if (hwif->host_flags & IDE_HFLAG_MMIO)
 117                 return readb((void __iomem *)hwif->io_ports.status_addr);
 118         else
 119                 return inb(hwif->io_ports.status_addr);
 120 }
 121
 122 static u8 ide_read_sff_dma_status(ide_hwif_t *hwif)
 123 {
 124         if (hwif->host_flags & IDE_HFLAG_MMIO)
 125                 return readb((void __iomem *)(hwif->dma_base + ATA_DMA_STATUS));
 126         else
 127                 return inb(hwif->dma_base + ATA_DMA_STATUS);
 128 }
 129
 130 static void ide_tf_load(ide_drive_t *drive, ide_task_t *task)
 131 {
 132         ide_hwif_t *hwif = drive->hwif;
 133         struct ide_io_ports *io_ports = &hwif->io_ports;
 134         struct ide_taskfile *tf = &task->tf;
 135         void (*tf_outb)(u8 addr, unsigned long port);
 136         u8 mmio = (hwif->host_flags & IDE_HFLAG_MMIO) ? 1 : 0;
 137         u8 HIHI = (task->tf_flags & IDE_TFLAG_LBA48) ? 0xE0 : 0xEF;
 138
 139         if (mmio)
 140                 tf_outb = ide_mm_outb;
 141         else
 142                 tf_outb = ide_outb;
 143
 144         if (task->tf_flags & IDE_TFLAG_FLAGGED)
 145                 HIHI = 0xFF;
 146
 147         if (task->tf_flags & IDE_TFLAG_OUT_DATA) {
 148                 u16 data = (tf->hob_data << 8) | tf->data;
 149
 150                 if (mmio)
 151                         writew(data, (void __iomem *)io_ports->data_addr);
 152                 else
 153                         outw(data, io_ports->data_addr);
 154         }
 155
 156         if (task->tf_flags & IDE_TFLAG_OUT_HOB_FEATURE)
 157                 tf_outb(tf->hob_feature, io_ports->feature_addr);
 158         if (task->tf_flags & IDE_TFLAG_OUT_HOB_NSECT)
 159                 tf_outb(tf->hob_nsect, io_ports->nsect_addr);
 160         if (task->tf_flags & IDE_TFLAG_OUT_HOB_LBAL)
 161                 tf_outb(tf->hob_lbal, io_ports->lbal_addr);
 162         if (task->tf_flags & IDE_TFLAG_OUT_HOB_LBAM)
 163                 tf_outb(tf->hob_lbam, io_ports->lbam_addr);
 164         if (task->tf_flags & IDE_TFLAG_OUT_HOB_LBAH)
 165                 tf_outb(tf->hob_lbah, io_ports->lbah_addr);
 166
 167         if (task->tf_flags & IDE_TFLAG_OUT_FEATURE)
 168                 tf_outb(tf->feature, io_ports->feature_addr);
 169         if (task->tf_flags & IDE_TFLAG_OUT_NSECT)
 170                 tf_outb(tf->nsect, io_ports->nsect_addr);
 171         if (task->tf_flags & IDE_TFLAG_OUT_LBAL)
 172                 tf_outb(tf->lbal, io_ports->lbal_addr);
 173         if (task->tf_flags & IDE_TFLAG_OUT_LBAM)
 174                 tf_outb(tf->lbam, io_ports->lbam_addr);
 175         if (task->tf_flags & IDE_TFLAG_OUT_LBAH)
 176                 tf_outb(tf->lbah, io_ports->lbah_addr);
 177
 178         if (task->tf_flags & IDE_TFLAG_OUT_DEVICE)
 179                 tf_outb((tf->device & HIHI) | drive->select.all,
 180                          io_ports->device_addr);
 181 }
 182
 183 static void ide_tf_read(ide_drive_t *drive, ide_task_t *task)
 184 {
 185         ide_hwif_t *hwif = drive->hwif;
 186         struct ide_io_ports *io_ports = &hwif->io_ports;
 187         struct ide_taskfile *tf = &task->tf;
 188         void (*tf_outb)(u8 addr, unsigned long port);
 189         u8 (*tf_inb)(unsigned long port);
 190         u8 mmio = (hwif->host_flags & IDE_HFLAG_MMIO) ? 1 : 0;
 191
 192         if (mmio) {
 193                 tf_outb = ide_mm_outb;
 194                 tf_inb  = ide_mm_inb;
 195         } else {
 196                 tf_outb = ide_outb;
 197                 tf_inb  = ide_inb;
 198         }
 199
 200         if (task->tf_flags & IDE_TFLAG_IN_DATA) {
 201                 u16 data;
 202
 203                 if (mmio)
 204                         data = readw((void __iomem *)io_ports->data_addr);
 205                 else
 206                         data = inw(io_ports->data_addr);
 207
 208                 tf->data = data & 0xff;
 209                 tf->hob_data = (data >> 8) & 0xff;
 210         }
 211
 212         /* be sure we're looking at the low order bits */
 213         tf_outb(ATA_DEVCTL_OBS & ~0x80, io_ports->ctl_addr);
 214
 215         if (task->tf_flags & IDE_TFLAG_IN_NSECT)
 216                 tf->nsect  = tf_inb(io_ports->nsect_addr);
 217         if (task->tf_flags & IDE_TFLAG_IN_LBAL)
 218                 tf->lbal   = tf_inb(io_ports->lbal_addr);
 219         if (task->tf_flags & IDE_TFLAG_IN_LBAM)
 220                 tf->lbam   = tf_inb(io_ports->lbam_addr);
 221         if (task->tf_flags & IDE_TFLAG_IN_LBAH)
 222                 tf->lbah   = tf_inb(io_ports->lbah_addr);
 223         if (task->tf_flags & IDE_TFLAG_IN_DEVICE)
 224                 tf->device = tf_inb(io_ports->device_addr);
 225
 226         if (task->tf_flags & IDE_TFLAG_LBA48) {
 227                 tf_outb(ATA_DEVCTL_OBS | 0x80, io_ports->ctl_addr);
 228
 229                 if (task->tf_flags & IDE_TFLAG_IN_HOB_FEATURE)
 230                         tf->hob_feature = tf_inb(io_ports->feature_addr);
 231                 if (task->tf_flags & IDE_TFLAG_IN_HOB_NSECT)
 232                         tf->hob_nsect   = tf_inb(io_ports->nsect_addr);
 233                 if (task->tf_flags & IDE_TFLAG_IN_HOB_LBAL)
 234                         tf->hob_lbal    = tf_inb(io_ports->lbal_addr);
 235                 if (task->tf_flags & IDE_TFLAG_IN_HOB_LBAM)
 236                         tf->hob_lbam    = tf_inb(io_ports->lbam_addr);
 237                 if (task->tf_flags & IDE_TFLAG_IN_HOB_LBAH)
 238                         tf->hob_lbah    = tf_inb(io_ports->lbah_addr);
 239         }
 240 }
 241
 242 /*
 243  * Some localbus EIDE interfaces require a special access sequence
 244  * when using 32-bit I/O instructions to transfer data.  We call this
 245  * the "vlb_sync" sequence, which consists of three successive reads
 246  * of the sector count register location, with interrupts disabled
 247  * to ensure that the reads all happen together.
 248  */
 249 static void ata_vlb_sync(unsigned long port)
 250 {
 251         (void)inb(port);
 252         (void)inb(port);
 253         (void)inb(port);
 254 }
 255
 256 /*
 257  * This is used for most PIO data transfers *from* the IDE interface
 258  *
 259  * These routines will round up any request for an odd number of bytes,
 260  * so if an odd len is specified, be sure that there's at least one
 261  * extra byte allocated for the buffer.
 262  */
 263 static void ata_input_data(ide_drive_t *drive, struct request *rq,
 264                            void *buf, unsigned int len)
 265 {
 266         ide_hwif_t *hwif = drive->hwif;
 267         struct ide_io_ports *io_ports = &hwif->io_ports;
 268         unsigned long data_addr = io_ports->data_addr;
 269         u8 io_32bit = drive->io_32bit;
 270         u8 mmio = (hwif->host_flags & IDE_HFLAG_MMIO) ? 1 : 0;
 271
 272         len++;
 273
 274         if (io_32bit) {
 275                 unsigned long uninitialized_var(flags);
 276
 277                 if ((io_32bit & 2) && !mmio) {
 278                         local_irq_save(flags);
 279                         ata_vlb_sync(io_ports->nsect_addr);
 280                 }
 281
 282                 if (mmio)
 283                         __ide_mm_insl((void __iomem *)data_addr, buf, len / 4);
 284                 else
 285                         insl(data_addr, buf, len / 4);
 286
 287                 if ((io_32bit & 2) && !mmio)
 288                         local_irq_restore(flags);
 289
 290                 if ((len & 3) >= 2) {
 291                         if (mmio)
 292                                 __ide_mm_insw((void __iomem *)data_addr,
 293                                                 (u8 *)buf + (len & ~3), 1);
 294                         else
 295                                 insw(data_addr, (u8 *)buf + (len & ~3), 1);
 296                 }
 297         } else {
 298                 if (mmio)
 299                         __ide_mm_insw((void __iomem *)data_addr, buf, len / 2);
 300                 else
 301                         insw(data_addr, buf, len / 2);
 302         }
 303 }
 304
 305 /*
 306  * This is used for most PIO data transfers *to* the IDE interface
 307  */
 308 static void ata_output_data(ide_drive_t *drive, struct request *rq,
 309                             void *buf, unsigned int len)
 310 {
 311         ide_hwif_t *hwif = drive->hwif;
 312         struct ide_io_ports *io_ports = &hwif->io_ports;
 313         unsigned long data_addr = io_ports->data_addr;
 314         u8 io_32bit = drive->io_32bit;
 315         u8 mmio = (hwif->host_flags & IDE_HFLAG_MMIO) ? 1 : 0;
 316
 317         if (io_32bit) {
 318                 unsigned long uninitialized_var(flags);
 319
 320                 if ((io_32bit & 2) && !mmio) {
 321                         local_irq_save(flags);
 322                         ata_vlb_sync(io_ports->nsect_addr);
 323                 }
 324
 325                 if (mmio)
 326                         __ide_mm_outsl((void __iomem *)data_addr, buf, len / 4);
 327                 else
 328                         outsl(data_addr, buf, len / 4);
 329
 330                 if ((io_32bit & 2) && !mmio)
 331                         local_irq_restore(flags);
 332
 333                 if ((len & 3) >= 2) {
 334                         if (mmio)
 335                                 __ide_mm_outsw((void __iomem *)data_addr,
 336                                                  (u8 *)buf + (len & ~3), 1);
 337                         else
 338                                 outsw(data_addr, (u8 *)buf + (len & ~3), 1);
 339                 }
 340         } else {
 341                 if (mmio)
 342                         __ide_mm_outsw((void __iomem *)data_addr, buf, len / 2);
 343                 else
 344                         outsw(data_addr, buf, len / 2);
 345         }
 346 }
 347
 348 void default_hwif_transport(ide_hwif_t *hwif)
 349 {
 350         hwif->exec_command        = ide_exec_command;
 351         hwif->read_status         = ide_read_status;
 352         hwif->read_sff_dma_status = ide_read_sff_dma_status;
 353
 354         hwif->tf_load     = ide_tf_load;
 355         hwif->tf_read     = ide_tf_read;
 356
 357         hwif->input_data  = ata_input_data;
 358         hwif->output_data = ata_output_data;
 359 }
 360
 361 void ide_fix_driveid (struct hd_driveid *id)
 362 {
 363 #ifndef __LITTLE_ENDIAN
 364 # ifdef __BIG_ENDIAN
 365         int i;
 366         u16 *stringcast;
 367
 368         id->config         = __le16_to_cpu(id->config);
 369         id->cyls           = __le16_to_cpu(id->cyls);
 370         id->reserved2      = __le16_to_cpu(id->reserved2);
 371         id->heads          = __le16_to_cpu(id->heads);
 372         id->track_bytes    = __le16_to_cpu(id->track_bytes);
 373         id->sector_bytes   = __le16_to_cpu(id->sector_bytes);
 374         id->sectors        = __le16_to_cpu(id->sectors);
 375         id->vendor0        = __le16_to_cpu(id->vendor0);
 376         id->vendor1        = __le16_to_cpu(id->vendor1);
 377         id->vendor2        = __le16_to_cpu(id->vendor2);
 378         stringcast = (u16 *)&id->serial_no[0];
 379         for (i = 0; i < (20/2); i++)
 380                 stringcast[i] = __le16_to_cpu(stringcast[i]);
 381         id->buf_type       = __le16_to_cpu(id->buf_type);
 382         id->buf_size       = __le16_to_cpu(id->buf_size);
 383         id->ecc_bytes      = __le16_to_cpu(id->ecc_bytes);
 384         stringcast = (u16 *)&id->fw_rev[0];
 385         for (i = 0; i < (8/2); i++)
 386                 stringcast[i] = __le16_to_cpu(stringcast[i]);
 387         stringcast = (u16 *)&id->model[0];
 388         for (i = 0; i < (40/2); i++)
 389                 stringcast[i] = __le16_to_cpu(stringcast[i]);
 390         id->dword_io       = __le16_to_cpu(id->dword_io);
 391         id->reserved50     = __le16_to_cpu(id->reserved50);
 392         id->field_valid    = __le16_to_cpu(id->field_valid);
 393         id->cur_cyls       = __le16_to_cpu(id->cur_cyls);
 394         id->cur_heads      = __le16_to_cpu(id->cur_heads);
 395         id->cur_sectors    = __le16_to_cpu(id->cur_sectors);
 396         id->cur_capacity0  = __le16_to_cpu(id->cur_capacity0);
 397         id->cur_capacity1  = __le16_to_cpu(id->cur_capacity1);
 398         id->lba_capacity   = __le32_to_cpu(id->lba_capacity);
 399         id->dma_1word      = __le16_to_cpu(id->dma_1word);
 400         id->dma_mword      = __le16_to_cpu(id->dma_mword);
 401         id->eide_pio_modes = __le16_to_cpu(id->eide_pio_modes);
 402         id->eide_dma_min   = __le16_to_cpu(id->eide_dma_min);
 403         id->eide_dma_time  = __le16_to_cpu(id->eide_dma_time);
 404         id->eide_pio       = __le16_to_cpu(id->eide_pio);
 405         id->eide_pio_iordy = __le16_to_cpu(id->eide_pio_iordy);
 406         for (i = 0; i < 2; ++i)
 407                 id->words69_70[i] = __le16_to_cpu(id->words69_70[i]);
 408         for (i = 0; i < 4; ++i)
 409                 id->words71_74[i] = __le16_to_cpu(id->words71_74[i]);
 410         id->queue_depth    = __le16_to_cpu(id->queue_depth);
 411         for (i = 0; i < 4; ++i)
 412                 id->words76_79[i] = __le16_to_cpu(id->words76_79[i]);
 413         id->major_rev_num  = __le16_to_cpu(id->major_rev_num);
 414         id->minor_rev_num  = __le16_to_cpu(id->minor_rev_num);
 415         id->command_set_1  = __le16_to_cpu(id->command_set_1);
 416         id->command_set_2  = __le16_to_cpu(id->command_set_2);
 417         id->cfsse          = __le16_to_cpu(id->cfsse);
 418         id->cfs_enable_1   = __le16_to_cpu(id->cfs_enable_1);
 419         id->cfs_enable_2   = __le16_to_cpu(id->cfs_enable_2);
 420         id->csf_default    = __le16_to_cpu(id->csf_default);
 421         id->dma_ultra      = __le16_to_cpu(id->dma_ultra);
 422         id->trseuc         = __le16_to_cpu(id->trseuc);
 423         id->trsEuc         = __le16_to_cpu(id->trsEuc);
 424         id->CurAPMvalues   = __le16_to_cpu(id->CurAPMvalues);
 425         id->mprc           = __le16_to_cpu(id->mprc);
 426         id->hw_config      = __le16_to_cpu(id->hw_config);
 427         id->acoustic       = __le16_to_cpu(id->acoustic);
 428         id->msrqs          = __le16_to_cpu(id->msrqs);
 429         id->sxfert         = __le16_to_cpu(id->sxfert);
 430         id->sal            = __le16_to_cpu(id->sal);
 431         id->spg            = __le32_to_cpu(id->spg);
 432         id->lba_capacity_2 = __le64_to_cpu(id->lba_capacity_2);
 433         for (i = 0; i < 22; i++)
 434                 id->words104_125[i]   = __le16_to_cpu(id->words104_125[i]);
 435         id->last_lun       = __le16_to_cpu(id->last_lun);
 436         id->word127        = __le16_to_cpu(id->word127);
 437         id->dlf            = __le16_to_cpu(id->dlf);
 438         id->csfo           = __le16_to_cpu(id->csfo);
 439         for (i = 0; i < 26; i++)
 440                 id->words130_155[i] = __le16_to_cpu(id->words130_155[i]);
 441         id->word156        = __le16_to_cpu(id->word156);
 442         for (i = 0; i < 3; i++)
 443                 id->words157_159[i] = __le16_to_cpu(id->words157_159[i]);
 444         id->cfa_power      = __le16_to_cpu(id->cfa_power);
 445         for (i = 0; i < 14; i++)
 446                 id->words161_175[i] = __le16_to_cpu(id->words161_175[i]);
 447         for (i = 0; i < 31; i++)
 448                 id->words176_205[i] = __le16_to_cpu(id->words176_205[i]);
 449         for (i = 0; i < 48; i++)
 450                 id->words206_254[i] = __le16_to_cpu(id->words206_254[i]);
 451         id->integrity_word  = __le16_to_cpu(id->integrity_word);
 452 # else
 453 #  error "Please fix <asm/byteorder.h>"
 454 # endif
 455 #endif
 456 }
 457
 458 /*
 459  * ide_fixstring() cleans up and (optionally) byte-swaps a text string,
 460  * removing leading/trailing blanks and compressing internal blanks.
 461  * It is primarily used to tidy up the model name/number fields as
 462  * returned by the WIN_[P]IDENTIFY commands.
 463  */
 464
 465 void ide_fixstring (u8 *s, const int bytecount, const int byteswap)
 466 {
 467         u8 *p = s, *end = &s[bytecount & ~1]; /* bytecount must be even */
 468
 469         if (byteswap) {
 470                 /* convert from big-endian to host byte order */
 471                 for (p = end ; p != s;) {
 472                         unsigned short *pp = (unsigned short *) (p -= 2);
 473                         *pp = ntohs(*pp);
 474                 }
 475         }
 476         /* strip leading blanks */
 477         while (s != end && *s == ' ')
 478                 ++s;
 479         /* compress internal blanks and strip trailing blanks */
 480         while (s != end && *s) {
 481                 if (*s++ != ' ' || (s != end && *s && *s != ' '))
 482                         *p++ = *(s-1);
 483         }
 484         /* wipe out trailing garbage */
 485         while (p != end)
 486                 *p++ = '\0';
 487 }
 488
 489 EXPORT_SYMBOL(ide_fixstring);
 490
 491 /*
 492  * Needed for PCI irq sharing
 493  */
 494 int drive_is_ready (ide_drive_t *drive)
 495 {
 496         ide_hwif_t *hwif        = HWIF(drive);
 497         u8 stat                 = 0;
 498
 499         if (drive->waiting_for_dma)
 500                 return hwif->dma_ops->dma_test_irq(drive);
 501
 502 #if 0
 503         /* need to guarantee 400ns since last command was issued */
 504         udelay(1);
 505 #endif
 506
 507         /*
 508          * We do a passive status test under shared PCI interrupts on
 509          * cards that truly share the ATA side interrupt, but may also share
 510          * an interrupt with another pci card/device.  We make no assumptions
 511          * about possible isa-pnp and pci-pnp issues yet.
 512          */
 513         if (hwif->io_ports.ctl_addr)
 514                 stat = ide_read_altstatus(drive);
 515         else
 516                 /* Note: this may clear a pending IRQ!! */
 517                 stat = hwif->read_status(hwif);
 518
 519         if (stat & BUSY_STAT)
 520                 /* drive busy:  definitely not interrupting */
 521                 return 0;
 522
 523         /* drive ready: *might* be interrupting */
 524         return 1;
 525 }
 526
 527 EXPORT_SYMBOL(drive_is_ready);
 528
 529 /*
 530  * This routine busy-waits for the drive status to be not "busy".
 531  * It then checks the status for all of the "good" bits and none
 532  * of the "bad" bits, and if all is okay it returns 0.  All other
 533  * cases return error -- caller may then invoke ide_error().
 534  *
 535  * This routine should get fixed to not hog the cpu during extra long waits..
 536  * That could be done by busy-waiting for the first jiffy or two, and then
 537  * setting a timer to wake up at half second intervals thereafter,
 538  * until timeout is achieved, before timing out.
 539  */
 540 static int __ide_wait_stat(ide_drive_t *drive, u8 good, u8 bad, unsigned long timeout, u8 *rstat)
 541 {
 542         ide_hwif_t *hwif = drive->hwif;
 543         unsigned long flags;
 544         int i;
 545         u8 stat;
 546
 547         udelay(1);      /* spec allows drive 400ns to assert "BUSY" */
 548         stat = hwif->read_status(hwif);
 549
 550         if (stat & BUSY_STAT) {
 551                 local_irq_set(flags);
 552                 timeout += jiffies;
 553                 while ((stat = hwif->read_status(hwif)) & BUSY_STAT) {
 554                         if (time_after(jiffies, timeout)) {
 555                                 /*
 556                                  * One last read after the timeout in case
 557                                  * heavy interrupt load made us not make any
 558                                  * progress during the timeout..
 559                                  */
 560                                 stat = hwif->read_status(hwif);
 561                                 if (!(stat & BUSY_STAT))
 562                                         break;
 563
 564                                 local_irq_restore(flags);
 565                                 *rstat = stat;
 566                                 return -EBUSY;
 567                         }
 568                 }
 569                 local_irq_restore(flags);
 570         }
 571         /*
 572          * Allow status to settle, then read it again.
 573          * A few rare drives vastly violate the 400ns spec here,
 574          * so we'll wait up to 10usec for a "good" status
 575          * rather than expensively fail things immediately.
 576          * This fix courtesy of Matthew Faupel & Niccolo Rigacci.
 577          */
 578         for (i = 0; i < 10; i++) {
 579                 udelay(1);
 580                 stat = hwif->read_status(hwif);
 581
 582                 if (OK_STAT(stat, good, bad)) {
 583                         *rstat = stat;
 584                         return 0;
 585                 }
 586         }
 587         *rstat = stat;
 588         return -EFAULT;
 589 }
 590
 591 /*
 592  * In case of error returns error value after doing "*startstop = ide_error()".
 593  * The caller should return the updated value of "startstop" in this case,
 594  * "startstop" is unchanged when the function returns 0.
 595  */
 596 int ide_wait_stat(ide_startstop_t *startstop, ide_drive_t *drive, u8 good, u8 bad, unsigned long timeout)
 597 {
 598         int err;
 599         u8 stat;
 600
 601         /* bail early if we've exceeded max_failures */
 602         if (drive->max_failures && (drive->failures > drive->max_failures)) {
 603                 *startstop = ide_stopped;
 604                 return 1;
 605         }
 606
 607         err = __ide_wait_stat(drive, good, bad, timeout, &stat);
 608
 609         if (err) {
 610                 char *s = (err == -EBUSY) ? "status timeout" : "status error";
 611                 *startstop = ide_error(drive, s, stat);
 612         }
 613
 614         return err;
 615 }
 616
 617 EXPORT_SYMBOL(ide_wait_stat);
 618
 619 /**
 620  *      ide_in_drive_list       -       look for drive in black/white list
 621  *      @id: drive identifier
 622  *      @drive_table: list to inspect
 623  *
 624  *      Look for a drive in the blacklist and the whitelist tables
 625  *      Returns 1 if the drive is found in the table.
 626  */
 627
 628 int ide_in_drive_list(struct hd_driveid *id, const struct drive_list_entry *drive_table)
 629 {
 630         for ( ; drive_table->id_model; drive_table++)
 631                 if ((!strcmp(drive_table->id_model, id->model)) &&
 632                     (!drive_table->id_firmware ||
 633                      strstr(id->fw_rev, drive_table->id_firmware)))
 634                         return 1;
 635         return 0;
 636 }
 637
 638 EXPORT_SYMBOL_GPL(ide_in_drive_list);
 639
 640 /*
 641  * Early UDMA66 devices don't set bit14 to 1, only bit13 is valid.
 642  * We list them here and depend on the device side cable detection for them.
 643  *
 644  * Some optical devices with the buggy firmwares have the same problem.
 645  */
 646 static const struct drive_list_entry ivb_list[] = {
 647         { "QUANTUM FIREBALLlct10 05"    , "A03.0900"    },
 648         { "TSSTcorp CDDVDW SH-S202J"    , "SB00"        },
 649         { "TSSTcorp CDDVDW SH-S202J"    , "SB01"        },
 650         { "TSSTcorp CDDVDW SH-S202N"    , "SB00"        },
 651         { "TSSTcorp CDDVDW SH-S202N"    , "SB01"        },
 652         { "TSSTcorp CDDVDW SH-S202H"    , "SB00"        },
 653         { "TSSTcorp CDDVDW SH-S202H"    , "SB01"        },
 654         { NULL                          , NULL          }
 655 };
 656
 657 /*
 658  *  All hosts that use the 80c ribbon must use!
 659  *  The name is derived from upper byte of word 93 and the 80c ribbon.
 660  */
 661 u8 eighty_ninty_three (ide_drive_t *drive)
 662 {
 663         ide_hwif_t *hwif = drive->hwif;
 664         struct hd_driveid *id = drive->id;
 665         int ivb = ide_in_drive_list(id, ivb_list);
 666
 667         if (hwif->cbl == ATA_CBL_PATA40_SHORT)
 668                 return 1;
 669
 670         if (ivb)
 671                 printk(KERN_DEBUG "%s: skipping word 93 validity check\n",
 672                                   drive->name);
 673
 674         if (ide_dev_is_sata(id) && !ivb)
 675                 return 1;
 676
 677         if (hwif->cbl != ATA_CBL_PATA80 && !ivb)
 678                 goto no_80w;
 679
 680         /*
 681          * FIXME:
 682          * - change master/slave IDENTIFY order
 683          * - force bit13 (80c cable present) check also for !ivb devices
 684          *   (unless the slave device is pre-ATA3)
 685          */
 686         if ((id->hw_config & 0x4000) || (ivb && (id->hw_config & 0x2000)))
 687                 return 1;
 688
 689 no_80w:
 690         if (drive->udma33_warned == 1)
 691                 return 0;
 692
 693         printk(KERN_WARNING "%s: %s side 80-wire cable detection failed, "
 694                             "limiting max speed to UDMA33\n",
 695                             drive->name,
 696                             hwif->cbl == ATA_CBL_PATA80 ? "drive" : "host");
 697
 698         drive->udma33_warned = 1;
 699
 700         return 0;
 701 }
 702
 703 int ide_driveid_update(ide_drive_t *drive)
 704 {
 705         ide_hwif_t *hwif = drive->hwif;
 706         struct hd_driveid *id;
 707         unsigned long timeout, flags;
 708         u8 stat;
 709
 710         /*
 711          * Re-read drive->id for possible DMA mode
 712          * change (copied from ide-probe.c)
 713          */
 714
 715         SELECT_MASK(drive, 1);
 716         ide_set_irq(drive, 0);
 717         msleep(50);
 718         hwif->exec_command(hwif, WIN_IDENTIFY);
 719         timeout = jiffies + WAIT_WORSTCASE;
 720         do {
 721                 if (time_after(jiffies, timeout)) {
 722                         SELECT_MASK(drive, 0);
 723                         return 0;       /* drive timed-out */
 724                 }
 725
 726                 msleep(50);     /* give drive a breather */
 727                 stat = ide_read_altstatus(drive);
 728         } while (stat & BUSY_STAT);
 729
 730         msleep(50);     /* wait for IRQ and DRQ_STAT */
 731         stat = hwif->read_status(hwif);
 732
 733         if (!OK_STAT(stat, DRQ_STAT, BAD_R_STAT)) {
 734                 SELECT_MASK(drive, 0);
 735                 printk("%s: CHECK for good STATUS\n", drive->name);
 736                 return 0;
 737         }
 738         local_irq_save(flags);
 739         SELECT_MASK(drive, 0);
 740         id = kmalloc(SECTOR_WORDS*4, GFP_ATOMIC);
 741         if (!id) {
 742                 local_irq_restore(flags);
 743                 return 0;
 744         }
 745         hwif->input_data(drive, NULL, id, SECTOR_SIZE);
 746         (void)hwif->read_status(hwif);  /* clear drive IRQ */
 747         local_irq_enable();
 748         local_irq_restore(flags);
 749         ide_fix_driveid(id);
 750         if (id) {
 751                 drive->id->dma_ultra = id->dma_ultra;
 752                 drive->id->dma_mword = id->dma_mword;
 753                 drive->id->dma_1word = id->dma_1word;
 754                 /* anything more ? */
 755                 kfree(id);
 756
 757                 if (drive->using_dma && ide_id_dma_bug(drive))
 758                         ide_dma_off(drive);
 759         }
 760
 761         return 1;
 762 }
 763
 764 int ide_config_drive_speed(ide_drive_t *drive, u8 speed)
 765 {
 766         ide_hwif_t *hwif = drive->hwif;
 767         struct ide_io_ports *io_ports = &hwif->io_ports;
 768         int error = 0;
 769         u8 stat;
 770
 771 #ifdef CONFIG_BLK_DEV_IDEDMA
 772         if (hwif->dma_ops)      /* check if host supports DMA */
 773                 hwif->dma_ops->dma_host_set(drive, 0);
 774 #endif
 775
 776         /* Skip setting PIO flow-control modes on pre-EIDE drives */
 777         if ((speed & 0xf8) == XFER_PIO_0 && !(drive->id->capability & 0x08))
 778                 goto skip;
 779
 780         /*
 781          * Don't use ide_wait_cmd here - it will
 782          * attempt to set_geometry and recalibrate,
 783          * but for some reason these don't work at
 784          * this point (lost interrupt).
 785          */
 786         /*
 787          * Select the drive, and issue the SETFEATURES command
 788          */
 789         disable_irq_nosync(hwif->irq);
 790
 791         /*
 792          *      FIXME: we race against the running IRQ here if
 793          *      this is called from non IRQ context. If we use
 794          *      disable_irq() we hang on the error path. Work
 795          *      is needed.
 796          */
 797
 798         udelay(1);
 799         SELECT_DRIVE(drive);
 800         SELECT_MASK(drive, 0);
 801         udelay(1);
 802         ide_set_irq(drive, 0);
 803         hwif->OUTB(speed, io_ports->nsect_addr);
 804         hwif->OUTB(SETFEATURES_XFER, io_ports->feature_addr);
 805         hwif->exec_command(hwif, WIN_SETFEATURES);
 806         if (drive->quirk_list == 2)
 807                 ide_set_irq(drive, 1);
 808
 809         error = __ide_wait_stat(drive, drive->ready_stat,
 810                                 BUSY_STAT|DRQ_STAT|ERR_STAT,
 811                                 WAIT_CMD, &stat);
 812
 813         SELECT_MASK(drive, 0);
 814
 815         enable_irq(hwif->irq);
 816
 817         if (error) {
 818                 (void) ide_dump_status(drive, "set_drive_speed_status", stat);
 819                 return error;
 820         }
 821
 822         drive->id->dma_ultra &= ~0xFF00;
 823         drive->id->dma_mword &= ~0x0F00;
 824         drive->id->dma_1word &= ~0x0F00;
 825
 826  skip:
 827 #ifdef CONFIG_BLK_DEV_IDEDMA
 828         if ((speed >= XFER_SW_DMA_0 || (hwif->host_flags & IDE_HFLAG_VDMA)) &&
 829             drive->using_dma)
 830                 hwif->dma_ops->dma_host_set(drive, 1);
 831         else if (hwif->dma_ops) /* check if host supports DMA */
 832                 ide_dma_off_quietly(drive);
 833 #endif
 834
 835         switch(speed) {
 836                 case XFER_UDMA_7:   drive->id->dma_ultra |= 0x8080; break;
 837                 case XFER_UDMA_6:   drive->id->dma_ultra |= 0x4040; break;
 838                 case XFER_UDMA_5:   drive->id->dma_ultra |= 0x2020; break;
 839                 case XFER_UDMA_4:   drive->id->dma_ultra |= 0x1010; break;
 840                 case XFER_UDMA_3:   drive->id->dma_ultra |= 0x0808; break;
 841                 case XFER_UDMA_2:   drive->id->dma_ultra |= 0x0404; break;
 842                 case XFER_UDMA_1:   drive->id->dma_ultra |= 0x0202; break;
 843                 case XFER_UDMA_0:   drive->id->dma_ultra |= 0x0101; break;
 844                 case XFER_MW_DMA_2: drive->id->dma_mword |= 0x0404; break;
 845                 case XFER_MW_DMA_1: drive->id->dma_mword |= 0x0202; break;
 846                 case XFER_MW_DMA_0: drive->id->dma_mword |= 0x0101; break;
 847                 case XFER_SW_DMA_2: drive->id->dma_1word |= 0x0404; break;
 848                 case XFER_SW_DMA_1: drive->id->dma_1word |= 0x0202; break;
 849                 case XFER_SW_DMA_0: drive->id->dma_1word |= 0x0101; break;
 850                 default: break;
 851         }
 852         if (!drive->init_speed)
 853                 drive->init_speed = speed;
 854         drive->current_speed = speed;
 855         return error;
 856 }
 857
 858 /*
 859  * This should get invoked any time we exit the driver to
 860  * wait for an interrupt response from a drive.  handler() points
 861  * at the appropriate code to handle the next interrupt, and a
 862  * timer is started to prevent us from waiting forever in case
 863  * something goes wrong (see the ide_timer_expiry() handler later on).
 864  *
 865  * See also ide_execute_command
 866  */
 867 static void __ide_set_handler (ide_drive_t *drive, ide_handler_t *handler,
 868                       unsigned int timeout, ide_expiry_t *expiry)
 869 {
 870         ide_hwgroup_t *hwgroup = HWGROUP(drive);
 871
 872         BUG_ON(hwgroup->handler);
 873         hwgroup->handler        = handler;
 874         hwgroup->expiry         = expiry;
 875         hwgroup->timer.expires  = jiffies + timeout;
 876         hwgroup->req_gen_timer  = hwgroup->req_gen;
 877         add_timer(&hwgroup->timer);
 878 }
 879
 880 void ide_set_handler (ide_drive_t *drive, ide_handler_t *handler,
 881                       unsigned int timeout, ide_expiry_t *expiry)
 882 {
 883         unsigned long flags;
 884         spin_lock_irqsave(&ide_lock, flags);
 885         __ide_set_handler(drive, handler, timeout, expiry);
 886         spin_unlock_irqrestore(&ide_lock, flags);
 887 }
 888
 889 EXPORT_SYMBOL(ide_set_handler);
 890
 891 /**
 892  *      ide_execute_command     -       execute an IDE command
 893  *      @drive: IDE drive to issue the command against
 894  *      @command: command byte to write
 895  *      @handler: handler for next phase
 896  *      @timeout: timeout for command
 897  *      @expiry:  handler to run on timeout
 898  *
 899  *      Helper function to issue an IDE command. This handles the
 900  *      atomicity requirements, command timing and ensures that the
 901  *      handler and IRQ setup do not race. All IDE command kick off
 902  *      should go via this function or do equivalent locking.
 903  */
 904
 905 void ide_execute_command(ide_drive_t *drive, u8 cmd, ide_handler_t *handler,
 906                          unsigned timeout, ide_expiry_t *expiry)
 907 {
 908         unsigned long flags;
 909         ide_hwif_t *hwif = HWIF(drive);
 910
 911         spin_lock_irqsave(&ide_lock, flags);
 912         __ide_set_handler(drive, handler, timeout, expiry);
 913         hwif->exec_command(hwif, cmd);
 914         /*
 915          * Drive takes 400nS to respond, we must avoid the IRQ being
 916          * serviced before that.
 917          *
 918          * FIXME: we could skip this delay with care on non shared devices
 919          */
 920         ndelay(400);
 921         spin_unlock_irqrestore(&ide_lock, flags);
 922 }
 923 EXPORT_SYMBOL(ide_execute_command);
 924
 925 void ide_execute_pkt_cmd(ide_drive_t *drive)
 926 {
 927         ide_hwif_t *hwif = drive->hwif;
 928         unsigned long flags;
 929
 930         spin_lock_irqsave(&ide_lock, flags);
 931         hwif->exec_command(hwif, WIN_PACKETCMD);
 932         ndelay(400);
 933         spin_unlock_irqrestore(&ide_lock, flags);
 934 }
 935 EXPORT_SYMBOL_GPL(ide_execute_pkt_cmd);
 936
 937 static inline void ide_complete_drive_reset(ide_drive_t *drive, int err)
 938 {
 939         struct request *rq = drive->hwif->hwgroup->rq;
 940
 941         if (rq && blk_special_request(rq) && rq->cmd[0] == REQ_DRIVE_RESET)
 942                 ide_end_request(drive, err ? err : 1, 0);
 943 }
 944
 945 /* needed below */
 946 static ide_startstop_t do_reset1 (ide_drive_t *, int);
 947
 948 /*
 949  * atapi_reset_pollfunc() gets invoked to poll the interface for completion every 50ms
 950  * during an atapi drive reset operation. If the drive has not yet responded,
 951  * and we have not yet hit our maximum waiting time, then the timer is restarted
 952  * for another 50ms.
 953  */
 954 static ide_startstop_t atapi_reset_pollfunc (ide_drive_t *drive)
 955 {
 956         ide_hwif_t *hwif = drive->hwif;
 957         ide_hwgroup_t *hwgroup = hwif->hwgroup;
 958         u8 stat;
 959
 960         SELECT_DRIVE(drive);
 961         udelay (10);
 962         stat = hwif->read_status(hwif);
 963
 964         if (OK_STAT(stat, 0, BUSY_STAT))
 965                 printk("%s: ATAPI reset complete\n", drive->name);
 966         else {
 967                 if (time_before(jiffies, hwgroup->poll_timeout)) {
 968                         ide_set_handler(drive, &atapi_reset_pollfunc, HZ/20, NULL);
 969                         /* continue polling */
 970                         return ide_started;
 971                 }
 972                 /* end of polling */
 973                 hwgroup->polling = 0;
 974                 printk("%s: ATAPI reset timed-out, status=0x%02x\n",
 975                                 drive->name, stat);
 976                 /* do it the old fashioned way */
 977                 return do_reset1(drive, 1);
 978         }
 979         /* done polling */
 980         hwgroup->polling = 0;
 981         ide_complete_drive_reset(drive, 0);
 982         return ide_stopped;
 983 }
 984
 985 /*
 986  * reset_pollfunc() gets invoked to poll the interface for completion every 50ms
 987  * during an ide reset operation. If the drives have not yet responded,
 988  * and we have not yet hit our maximum waiting time, then the timer is restarted
 989  * for another 50ms.
 990  */
 991 static ide_startstop_t reset_pollfunc (ide_drive_t *drive)
 992 {
 993         ide_hwgroup_t *hwgroup  = HWGROUP(drive);
 994         ide_hwif_t *hwif        = HWIF(drive);
 995         const struct ide_port_ops *port_ops = hwif->port_ops;
 996         u8 tmp;
 997         int err = 0;
 998
 999         if (port_ops && port_ops->reset_poll) {
1000                 err = port_ops->reset_poll(drive);
1001                 if (err) {
1002                         printk(KERN_ERR "%s: host reset_poll failure for %s.\n",
1003                                 hwif->name, drive->name);
1004                         goto out;
1005                 }
1006         }
1007
1008         tmp = hwif->read_status(hwif);
1009
1010         if (!OK_STAT(tmp, 0, BUSY_STAT)) {
1011                 if (time_before(jiffies, hwgroup->poll_timeout)) {
1012                         ide_set_handler(drive, &reset_pollfunc, HZ/20, NULL);
1013                         /* continue polling */
1014                         return ide_started;
1015                 }
1016                 printk("%s: reset timed-out, status=0x%02x\n", hwif->name, tmp);
1017                 drive->failures++;
1018                 err = -EIO;
1019         } else  {
1020                 printk("%s: reset: ", hwif->name);
1021                 tmp = ide_read_error(drive);
1022
1023                 if (tmp == 1) {
1024                         printk("success\n");
1025                         drive->failures = 0;
1026                 } else {
1027                         drive->failures++;
1028                         printk("master: ");
1029                         switch (tmp & 0x7f) {
1030                                 case 1: printk("passed");
1031                                         break;
1032                                 case 2: printk("formatter device error");
1033                                         break;
1034                                 case 3: printk("sector buffer error");
1035                                         break;
1036                                 case 4: printk("ECC circuitry error");
1037                                         break;
1038                                 case 5: printk("controlling MPU error");
1039                                         break;
1040                                 default:printk("error (0x%02x?)", tmp);
1041                         }
1042                         if (tmp & 0x80)
1043                                 printk("; slave: failed");
1044                         printk("\n");
1045                         err = -EIO;
1046                 }
1047         }
1048 out:
1049         hwgroup->polling = 0;   /* done polling */
1050         ide_complete_drive_reset(drive, err);
1051         return ide_stopped;
1052 }
1053
1054 static void ide_disk_pre_reset(ide_drive_t *drive)
1055 {
1056         int legacy = (drive->id->cfs_enable_2 & 0x0400) ? 0 : 1;
1057
1058         drive->special.all = 0;
1059         drive->special.b.set_geometry = legacy;
1060         drive->special.b.recalibrate  = legacy;
1061         drive->mult_count = 0;
1062         if (!drive->keep_settings && !drive->using_dma)
1063                 drive->mult_req = 0;
1064         if (drive->mult_req != drive->mult_count)
1065                 drive->special.b.set_multmode = 1;
1066 }
1067
1068 static void pre_reset(ide_drive_t *drive)
1069 {
1070         const struct ide_port_ops *port_ops = drive->hwif->port_ops;
1071
1072         if (drive->media == ide_disk)
1073                 ide_disk_pre_reset(drive);
1074         else
1075                 drive->post_reset = 1;
1076
1077         if (drive->using_dma) {
1078                 if (drive->crc_count)
1079                         ide_check_dma_crc(drive);
1080                 else
1081                         ide_dma_off(drive);
1082         }
1083
1084         if (!drive->keep_settings) {
1085                 if (!drive->using_dma) {
1086                         drive->unmask = 0;
1087                         drive->io_32bit = 0;
1088                 }
1089                 return;
1090         }
1091
1092         if (port_ops && port_ops->pre_reset)
1093                 port_ops->pre_reset(drive);
1094
1095         if (drive->current_speed != 0xff)
1096                 drive->desired_speed = drive->current_speed;
1097         drive->current_speed = 0xff;
1098 }
1099
1100 /*
1101  * do_reset1() attempts to recover a confused drive by resetting it.
1102  * Unfortunately, resetting a disk drive actually resets all devices on
1103  * the same interface, so it can really be thought of as resetting the
1104  * interface rather than resetting the drive.
1105  *
1106  * ATAPI devices have their own reset mechanism which allows them to be
1107  * individually reset without clobbering other devices on the same interface.
1108  *
1109  * Unfortunately, the IDE interface does not generate an interrupt to let
1110  * us know when the reset operation has finished, so we must poll for this.
1111  * Equally poor, though, is the fact that this may a very long time to complete,
1112  * (up to 30 seconds worstcase).  So, instead of busy-waiting here for it,
1113  * we set a timer to poll at 50ms intervals.
1114  */
1115 static ide_startstop_t do_reset1 (ide_drive_t *drive, int do_not_try_atapi)
1116 {
1117         unsigned int unit;
1118         unsigned long flags;
1119         ide_hwif_t *hwif;
1120         ide_hwgroup_t *hwgroup;
1121         struct ide_io_ports *io_ports;
1122         const struct ide_port_ops *port_ops;
1123         u8 ctl;
1124
1125         spin_lock_irqsave(&ide_lock, flags);
1126         hwif = HWIF(drive);
1127         hwgroup = HWGROUP(drive);
1128
1129         io_ports = &hwif->io_ports;
1130
1131         /* We must not reset with running handlers */
1132         BUG_ON(hwgroup->handler != NULL);
1133
1134         /* For an ATAPI device, first try an ATAPI SRST. */
1135         if (drive->media != ide_disk && !do_not_try_atapi) {
1136                 pre_reset(drive);
1137                 SELECT_DRIVE(drive);
1138                 udelay (20);
1139                 hwif->exec_command(hwif, WIN_SRST);
1140                 ndelay(400);
1141                 hwgroup->poll_timeout = jiffies + WAIT_WORSTCASE;
1142                 hwgroup->polling = 1;
1143                 __ide_set_handler(drive, &atapi_reset_pollfunc, HZ/20, NULL);
1144                 spin_unlock_irqrestore(&ide_lock, flags);
1145                 return ide_started;
1146         }
1147
1148         /*
1149          * First, reset any device state data we were maintaining
1150          * for any of the drives on this interface.
1151          */
1152         for (unit = 0; unit < MAX_DRIVES; ++unit)
1153                 pre_reset(&hwif->drives[unit]);
1154
1155         if (io_ports->ctl_addr == 0) {
1156                 spin_unlock_irqrestore(&ide_lock, flags);
1157                 ide_complete_drive_reset(drive, -ENXIO);
1158                 return ide_stopped;
1159         }
1160
1161         /*
1162          * Note that we also set nIEN while resetting the device,
1163          * to mask unwanted interrupts from the interface during the reset.
1164          * However, due to the design of PC hardware, this will cause an
1165          * immediate interrupt due to the edge transition it produces.
1166          * This single interrupt gives us a "fast poll" for drives that
1167          * recover from reset very quickly, saving us the first 50ms wait time.
1168          */
1169         /* set SRST and nIEN */
1170         hwif->OUTBSYNC(hwif, ATA_DEVCTL_OBS | 6, io_ports->ctl_addr);
1171         /* more than enough time */
1172         udelay(10);
1173         if (drive->quirk_list == 2)
1174                 ctl = ATA_DEVCTL_OBS;           /* clear SRST and nIEN */
1175         else
1176                 ctl = ATA_DEVCTL_OBS | 2;       /* clear SRST, leave nIEN */
1177         hwif->OUTBSYNC(hwif, ctl, io_ports->ctl_addr);
1178         /* more than enough time */
1179         udelay(10);
1180         hwgroup->poll_timeout = jiffies + WAIT_WORSTCASE;
1181         hwgroup->polling = 1;
1182         __ide_set_handler(drive, &reset_pollfunc, HZ/20, NULL);
1183
1184         /*
1185          * Some weird controller like resetting themselves to a strange
1186          * state when the disks are reset this way. At least, the Winbond
1187          * 553 documentation says that
1188          */
1189         port_ops = hwif->port_ops;
1190         if (port_ops && port_ops->resetproc)
1191                 port_ops->resetproc(drive);
1192
1193         spin_unlock_irqrestore(&ide_lock, flags);
1194         return ide_started;
1195 }
1196
1197 /*
1198  * ide_do_reset() is the entry point to the drive/interface reset code.
1199  */
1200
1201 ide_startstop_t ide_do_reset (ide_drive_t *drive)
1202 {
1203         return do_reset1(drive, 0);
1204 }
1205
1206 EXPORT_SYMBOL(ide_do_reset);
1207
1208 /*
1209  * ide_wait_not_busy() waits for the currently selected device on the hwif
1210  * to report a non-busy status, see comments in ide_probe_port().
1211  */
1212 int ide_wait_not_busy(ide_hwif_t *hwif, unsigned long timeout)
1213 {
1214         u8 stat = 0;
1215
1216         while(timeout--) {
1217                 /*
1218                  * Turn this into a schedule() sleep once I'm sure
1219                  * about locking issues (2.5 work ?).
1220                  */
1221                 mdelay(1);
1222                 stat = hwif->read_status(hwif);
1223                 if ((stat & BUSY_STAT) == 0)
1224                         return 0;
1225                 /*
1226                  * Assume a value of 0xff means nothing is connected to
1227                  * the interface and it doesn't implement the pull-down
1228                  * resistor on D7.
1229                  */
1230                 if (stat == 0xff)
1231                         return -ENODEV;
1232                 touch_softlockup_watchdog();
1233                 touch_nmi_watchdog();
1234         }
1235         return -EBUSY;
1236 }
1237
1238 EXPORT_SYMBOL_GPL(ide_wait_not_busy);
1239