drivers/ide/ide-iops.c

   1 /*
   2  *  Copyright (C) 2000-2002     Andre Hedrick <andre@linux-ide.org>
   3  *  Copyright (C) 2003          Red Hat <alan@redhat.com>
   4  *
   5  */
   6
   7 #include <linux/module.h>
   8 #include <linux/types.h>
   9 #include <linux/string.h>
  10 #include <linux/kernel.h>
  11 #include <linux/timer.h>
  12 #include <linux/mm.h>
  13 #include <linux/interrupt.h>
  14 #include <linux/major.h>
  15 #include <linux/errno.h>
  16 #include <linux/genhd.h>
  17 #include <linux/blkpg.h>
  18 #include <linux/slab.h>
  19 #include <linux/pci.h>
  20 #include <linux/delay.h>
  21 #include <linux/hdreg.h>
  22 #include <linux/ide.h>
  23 #include <linux/bitops.h>
  24 #include <linux/nmi.h>
  25
  26 #include <asm/byteorder.h>
  27 #include <asm/irq.h>
  28 #include <asm/uaccess.h>
  29 #include <asm/io.h>
  30
  31 /*
  32  *      Conventional PIO operations for ATA devices
  33  */
  34
  35 static u8 ide_inb (unsigned long port)
  36 {
  37         return (u8) inb(port);
  38 }
  39
  40 static u16 ide_inw (unsigned long port)
  41 {
  42         return (u16) inw(port);
  43 }
  44
  45 static void ide_outb (u8 val, unsigned long port)
  46 {
  47         outb(val, port);
  48 }
  49
  50 static void ide_outbsync (ide_drive_t *drive, u8 addr, unsigned long port)
  51 {
  52         outb(addr, port);
  53 }
  54
  55 static void ide_outw (u16 val, unsigned long port)
  56 {
  57         outw(val, port);
  58 }
  59
  60 void default_hwif_iops (ide_hwif_t *hwif)
  61 {
  62         hwif->OUTB      = ide_outb;
  63         hwif->OUTBSYNC  = ide_outbsync;
  64         hwif->OUTW      = ide_outw;
  65         hwif->INB       = ide_inb;
  66         hwif->INW       = ide_inw;
  67 }
  68
  69 /*
  70  *      MMIO operations, typically used for SATA controllers
  71  */
  72
  73 static u8 ide_mm_inb (unsigned long port)
  74 {
  75         return (u8) readb((void __iomem *) port);
  76 }
  77
  78 static u16 ide_mm_inw (unsigned long port)
  79 {
  80         return (u16) readw((void __iomem *) port);
  81 }
  82
  83 static void ide_mm_outb (u8 value, unsigned long port)
  84 {
  85         writeb(value, (void __iomem *) port);
  86 }
  87
  88 static void ide_mm_outbsync (ide_drive_t *drive, u8 value, unsigned long port)
  89 {
  90         writeb(value, (void __iomem *) port);
  91 }
  92
  93 static void ide_mm_outw (u16 value, unsigned long port)
  94 {
  95         writew(value, (void __iomem *) port);
  96 }
  97
  98 void default_hwif_mmiops (ide_hwif_t *hwif)
  99 {
 100         hwif->OUTB      = ide_mm_outb;
 101         /* Most systems will need to override OUTBSYNC, alas however
 102            this one is controller specific! */
 103         hwif->OUTBSYNC  = ide_mm_outbsync;
 104         hwif->OUTW      = ide_mm_outw;
 105         hwif->INB       = ide_mm_inb;
 106         hwif->INW       = ide_mm_inw;
 107 }
 108
 109 EXPORT_SYMBOL(default_hwif_mmiops);
 110
 111 void SELECT_DRIVE (ide_drive_t *drive)
 112 {
 113         ide_hwif_t *hwif = drive->hwif;
 114         const struct ide_port_ops *port_ops = hwif->port_ops;
 115
 116         if (port_ops && port_ops->selectproc)
 117                 port_ops->selectproc(drive);
 118
 119         hwif->OUTB(drive->select.all, hwif->io_ports.device_addr);
 120 }
 121
 122 void SELECT_MASK (ide_drive_t *drive, int mask)
 123 {
 124         const struct ide_port_ops *port_ops = drive->hwif->port_ops;
 125
 126         if (port_ops && port_ops->maskproc)
 127                 port_ops->maskproc(drive, mask);
 128 }
 129
 130 static void ide_tf_load(ide_drive_t *drive, ide_task_t *task)
 131 {
 132         ide_hwif_t *hwif = drive->hwif;
 133         struct ide_io_ports *io_ports = &hwif->io_ports;
 134         struct ide_taskfile *tf = &task->tf;
 135         u8 HIHI = (task->tf_flags & IDE_TFLAG_LBA48) ? 0xE0 : 0xEF;
 136
 137         if (task->tf_flags & IDE_TFLAG_FLAGGED)
 138                 HIHI = 0xFF;
 139
 140         ide_set_irq(drive, 1);
 141
 142         if ((task->tf_flags & IDE_TFLAG_NO_SELECT_MASK) == 0)
 143                 SELECT_MASK(drive, 0);
 144
 145         if (task->tf_flags & IDE_TFLAG_OUT_DATA)
 146                 hwif->OUTW((tf->hob_data << 8) | tf->data, io_ports->data_addr);
 147
 148         if (task->tf_flags & IDE_TFLAG_OUT_HOB_FEATURE)
 149                 hwif->OUTB(tf->hob_feature, io_ports->feature_addr);
 150         if (task->tf_flags & IDE_TFLAG_OUT_HOB_NSECT)
 151                 hwif->OUTB(tf->hob_nsect, io_ports->nsect_addr);
 152         if (task->tf_flags & IDE_TFLAG_OUT_HOB_LBAL)
 153                 hwif->OUTB(tf->hob_lbal, io_ports->lbal_addr);
 154         if (task->tf_flags & IDE_TFLAG_OUT_HOB_LBAM)
 155                 hwif->OUTB(tf->hob_lbam, io_ports->lbam_addr);
 156         if (task->tf_flags & IDE_TFLAG_OUT_HOB_LBAH)
 157                 hwif->OUTB(tf->hob_lbah, io_ports->lbah_addr);
 158
 159         if (task->tf_flags & IDE_TFLAG_OUT_FEATURE)
 160                 hwif->OUTB(tf->feature, io_ports->feature_addr);
 161         if (task->tf_flags & IDE_TFLAG_OUT_NSECT)
 162                 hwif->OUTB(tf->nsect, io_ports->nsect_addr);
 163         if (task->tf_flags & IDE_TFLAG_OUT_LBAL)
 164                 hwif->OUTB(tf->lbal, io_ports->lbal_addr);
 165         if (task->tf_flags & IDE_TFLAG_OUT_LBAM)
 166                 hwif->OUTB(tf->lbam, io_ports->lbam_addr);
 167         if (task->tf_flags & IDE_TFLAG_OUT_LBAH)
 168                 hwif->OUTB(tf->lbah, io_ports->lbah_addr);
 169
 170         if (task->tf_flags & IDE_TFLAG_OUT_DEVICE)
 171                 hwif->OUTB((tf->device & HIHI) | drive->select.all,
 172                            io_ports->device_addr);
 173 }
 174
 175 static void ide_tf_read(ide_drive_t *drive, ide_task_t *task)
 176 {
 177         ide_hwif_t *hwif = drive->hwif;
 178         struct ide_io_ports *io_ports = &hwif->io_ports;
 179         struct ide_taskfile *tf = &task->tf;
 180
 181         if (task->tf_flags & IDE_TFLAG_IN_DATA) {
 182                 u16 data = hwif->INW(io_ports->data_addr);
 183
 184                 tf->data = data & 0xff;
 185                 tf->hob_data = (data >> 8) & 0xff;
 186         }
 187
 188         /* be sure we're looking at the low order bits */
 189         hwif->OUTB(drive->ctl & ~0x80, io_ports->ctl_addr);
 190
 191         if (task->tf_flags & IDE_TFLAG_IN_NSECT)
 192                 tf->nsect  = hwif->INB(io_ports->nsect_addr);
 193         if (task->tf_flags & IDE_TFLAG_IN_LBAL)
 194                 tf->lbal   = hwif->INB(io_ports->lbal_addr);
 195         if (task->tf_flags & IDE_TFLAG_IN_LBAM)
 196                 tf->lbam   = hwif->INB(io_ports->lbam_addr);
 197         if (task->tf_flags & IDE_TFLAG_IN_LBAH)
 198                 tf->lbah   = hwif->INB(io_ports->lbah_addr);
 199         if (task->tf_flags & IDE_TFLAG_IN_DEVICE)
 200                 tf->device = hwif->INB(io_ports->device_addr);
 201
 202         if (task->tf_flags & IDE_TFLAG_LBA48) {
 203                 hwif->OUTB(drive->ctl | 0x80, io_ports->ctl_addr);
 204
 205                 if (task->tf_flags & IDE_TFLAG_IN_HOB_FEATURE)
 206                         tf->hob_feature = hwif->INB(io_ports->feature_addr);
 207                 if (task->tf_flags & IDE_TFLAG_IN_HOB_NSECT)
 208                         tf->hob_nsect   = hwif->INB(io_ports->nsect_addr);
 209                 if (task->tf_flags & IDE_TFLAG_IN_HOB_LBAL)
 210                         tf->hob_lbal    = hwif->INB(io_ports->lbal_addr);
 211                 if (task->tf_flags & IDE_TFLAG_IN_HOB_LBAM)
 212                         tf->hob_lbam    = hwif->INB(io_ports->lbam_addr);
 213                 if (task->tf_flags & IDE_TFLAG_IN_HOB_LBAH)
 214                         tf->hob_lbah    = hwif->INB(io_ports->lbah_addr);
 215         }
 216 }
 217
 218 /*
 219  * Some localbus EIDE interfaces require a special access sequence
 220  * when using 32-bit I/O instructions to transfer data.  We call this
 221  * the "vlb_sync" sequence, which consists of three successive reads
 222  * of the sector count register location, with interrupts disabled
 223  * to ensure that the reads all happen together.
 224  */
 225 static void ata_vlb_sync(ide_drive_t *drive, unsigned long port)
 226 {
 227         (void) HWIF(drive)->INB(port);
 228         (void) HWIF(drive)->INB(port);
 229         (void) HWIF(drive)->INB(port);
 230 }
 231
 232 /*
 233  * This is used for most PIO data transfers *from* the IDE interface
 234  *
 235  * These routines will round up any request for an odd number of bytes,
 236  * so if an odd len is specified, be sure that there's at least one
 237  * extra byte allocated for the buffer.
 238  */
 239 static void ata_input_data(ide_drive_t *drive, struct request *rq,
 240                            void *buf, unsigned int len)
 241 {
 242         ide_hwif_t *hwif = drive->hwif;
 243         struct ide_io_ports *io_ports = &hwif->io_ports;
 244         unsigned long data_addr = io_ports->data_addr;
 245         u8 io_32bit = drive->io_32bit;
 246         u8 mmio = (hwif->host_flags & IDE_HFLAG_MMIO) ? 1 : 0;
 247
 248         len++;
 249
 250         if (io_32bit) {
 251                 unsigned long uninitialized_var(flags);
 252
 253                 if (io_32bit & 2) {
 254                         local_irq_save(flags);
 255                         ata_vlb_sync(drive, io_ports->nsect_addr);
 256                 }
 257
 258                 if (mmio)
 259                         __ide_mm_insl((void __iomem *)data_addr, buf, len / 4);
 260                 else
 261                         insl(data_addr, buf, len / 4);
 262
 263                 if (io_32bit & 2)
 264                         local_irq_restore(flags);
 265
 266                 if ((len & 3) >= 2) {
 267                         if (mmio)
 268                                 __ide_mm_insw((void __iomem *)data_addr,
 269                                                 (u8 *)buf + (len & ~3), 1);
 270                         else
 271                                 insw(data_addr, (u8 *)buf + (len & ~3), 1);
 272                 }
 273         } else {
 274                 if (mmio)
 275                         __ide_mm_insw((void __iomem *)data_addr, buf, len / 2);
 276                 else
 277                         insw(data_addr, buf, len / 2);
 278         }
 279 }
 280
 281 /*
 282  * This is used for most PIO data transfers *to* the IDE interface
 283  */
 284 static void ata_output_data(ide_drive_t *drive, struct request *rq,
 285                             void *buf, unsigned int len)
 286 {
 287         ide_hwif_t *hwif = drive->hwif;
 288         struct ide_io_ports *io_ports = &hwif->io_ports;
 289         unsigned long data_addr = io_ports->data_addr;
 290         u8 io_32bit = drive->io_32bit;
 291         u8 mmio = (hwif->host_flags & IDE_HFLAG_MMIO) ? 1 : 0;
 292
 293         if (io_32bit) {
 294                 unsigned long uninitialized_var(flags);
 295
 296                 if (io_32bit & 2) {
 297                         local_irq_save(flags);
 298                         ata_vlb_sync(drive, io_ports->nsect_addr);
 299                 }
 300
 301                 if (mmio)
 302                         __ide_mm_outsl((void __iomem *)data_addr, buf, len / 4);
 303                 else
 304                         outsl(data_addr, buf, len / 4);
 305
 306                 if (io_32bit & 2)
 307                         local_irq_restore(flags);
 308
 309                 if ((len & 3) >= 2) {
 310                         if (mmio)
 311                                 __ide_mm_outsw((void __iomem *)data_addr,
 312                                                  (u8 *)buf + (len & ~3), 1);
 313                         else
 314                                 outsw(data_addr, (u8 *)buf + (len & ~3), 1);
 315                 }
 316         } else {
 317                 if (mmio)
 318                         __ide_mm_outsw((void __iomem *)data_addr, buf, len / 2);
 319                 else
 320                         outsw(data_addr, buf, len / 2);
 321         }
 322 }
 323
 324 void default_hwif_transport(ide_hwif_t *hwif)
 325 {
 326         hwif->tf_load     = ide_tf_load;
 327         hwif->tf_read     = ide_tf_read;
 328
 329         hwif->input_data  = ata_input_data;
 330         hwif->output_data = ata_output_data;
 331 }
 332
 333 void ide_fix_driveid (struct hd_driveid *id)
 334 {
 335 #ifndef __LITTLE_ENDIAN
 336 # ifdef __BIG_ENDIAN
 337         int i;
 338         u16 *stringcast;
 339
 340         id->config         = __le16_to_cpu(id->config);
 341         id->cyls           = __le16_to_cpu(id->cyls);
 342         id->reserved2      = __le16_to_cpu(id->reserved2);
 343         id->heads          = __le16_to_cpu(id->heads);
 344         id->track_bytes    = __le16_to_cpu(id->track_bytes);
 345         id->sector_bytes   = __le16_to_cpu(id->sector_bytes);
 346         id->sectors        = __le16_to_cpu(id->sectors);
 347         id->vendor0        = __le16_to_cpu(id->vendor0);
 348         id->vendor1        = __le16_to_cpu(id->vendor1);
 349         id->vendor2        = __le16_to_cpu(id->vendor2);
 350         stringcast = (u16 *)&id->serial_no[0];
 351         for (i = 0; i < (20/2); i++)
 352                 stringcast[i] = __le16_to_cpu(stringcast[i]);
 353         id->buf_type       = __le16_to_cpu(id->buf_type);
 354         id->buf_size       = __le16_to_cpu(id->buf_size);
 355         id->ecc_bytes      = __le16_to_cpu(id->ecc_bytes);
 356         stringcast = (u16 *)&id->fw_rev[0];
 357         for (i = 0; i < (8/2); i++)
 358                 stringcast[i] = __le16_to_cpu(stringcast[i]);
 359         stringcast = (u16 *)&id->model[0];
 360         for (i = 0; i < (40/2); i++)
 361                 stringcast[i] = __le16_to_cpu(stringcast[i]);
 362         id->dword_io       = __le16_to_cpu(id->dword_io);
 363         id->reserved50     = __le16_to_cpu(id->reserved50);
 364         id->field_valid    = __le16_to_cpu(id->field_valid);
 365         id->cur_cyls       = __le16_to_cpu(id->cur_cyls);
 366         id->cur_heads      = __le16_to_cpu(id->cur_heads);
 367         id->cur_sectors    = __le16_to_cpu(id->cur_sectors);
 368         id->cur_capacity0  = __le16_to_cpu(id->cur_capacity0);
 369         id->cur_capacity1  = __le16_to_cpu(id->cur_capacity1);
 370         id->lba_capacity   = __le32_to_cpu(id->lba_capacity);
 371         id->dma_1word      = __le16_to_cpu(id->dma_1word);
 372         id->dma_mword      = __le16_to_cpu(id->dma_mword);
 373         id->eide_pio_modes = __le16_to_cpu(id->eide_pio_modes);
 374         id->eide_dma_min   = __le16_to_cpu(id->eide_dma_min);
 375         id->eide_dma_time  = __le16_to_cpu(id->eide_dma_time);
 376         id->eide_pio       = __le16_to_cpu(id->eide_pio);
 377         id->eide_pio_iordy = __le16_to_cpu(id->eide_pio_iordy);
 378         for (i = 0; i < 2; ++i)
 379                 id->words69_70[i] = __le16_to_cpu(id->words69_70[i]);
 380         for (i = 0; i < 4; ++i)
 381                 id->words71_74[i] = __le16_to_cpu(id->words71_74[i]);
 382         id->queue_depth    = __le16_to_cpu(id->queue_depth);
 383         for (i = 0; i < 4; ++i)
 384                 id->words76_79[i] = __le16_to_cpu(id->words76_79[i]);
 385         id->major_rev_num  = __le16_to_cpu(id->major_rev_num);
 386         id->minor_rev_num  = __le16_to_cpu(id->minor_rev_num);
 387         id->command_set_1  = __le16_to_cpu(id->command_set_1);
 388         id->command_set_2  = __le16_to_cpu(id->command_set_2);
 389         id->cfsse          = __le16_to_cpu(id->cfsse);
 390         id->cfs_enable_1   = __le16_to_cpu(id->cfs_enable_1);
 391         id->cfs_enable_2   = __le16_to_cpu(id->cfs_enable_2);
 392         id->csf_default    = __le16_to_cpu(id->csf_default);
 393         id->dma_ultra      = __le16_to_cpu(id->dma_ultra);
 394         id->trseuc         = __le16_to_cpu(id->trseuc);
 395         id->trsEuc         = __le16_to_cpu(id->trsEuc);
 396         id->CurAPMvalues   = __le16_to_cpu(id->CurAPMvalues);
 397         id->mprc           = __le16_to_cpu(id->mprc);
 398         id->hw_config      = __le16_to_cpu(id->hw_config);
 399         id->acoustic       = __le16_to_cpu(id->acoustic);
 400         id->msrqs          = __le16_to_cpu(id->msrqs);
 401         id->sxfert         = __le16_to_cpu(id->sxfert);
 402         id->sal            = __le16_to_cpu(id->sal);
 403         id->spg            = __le32_to_cpu(id->spg);
 404         id->lba_capacity_2 = __le64_to_cpu(id->lba_capacity_2);
 405         for (i = 0; i < 22; i++)
 406                 id->words104_125[i]   = __le16_to_cpu(id->words104_125[i]);
 407         id->last_lun       = __le16_to_cpu(id->last_lun);
 408         id->word127        = __le16_to_cpu(id->word127);
 409         id->dlf            = __le16_to_cpu(id->dlf);
 410         id->csfo           = __le16_to_cpu(id->csfo);
 411         for (i = 0; i < 26; i++)
 412                 id->words130_155[i] = __le16_to_cpu(id->words130_155[i]);
 413         id->word156        = __le16_to_cpu(id->word156);
 414         for (i = 0; i < 3; i++)
 415                 id->words157_159[i] = __le16_to_cpu(id->words157_159[i]);
 416         id->cfa_power      = __le16_to_cpu(id->cfa_power);
 417         for (i = 0; i < 14; i++)
 418                 id->words161_175[i] = __le16_to_cpu(id->words161_175[i]);
 419         for (i = 0; i < 31; i++)
 420                 id->words176_205[i] = __le16_to_cpu(id->words176_205[i]);
 421         for (i = 0; i < 48; i++)
 422                 id->words206_254[i] = __le16_to_cpu(id->words206_254[i]);
 423         id->integrity_word  = __le16_to_cpu(id->integrity_word);
 424 # else
 425 #  error "Please fix <asm/byteorder.h>"
 426 # endif
 427 #endif
 428 }
 429
 430 /*
 431  * ide_fixstring() cleans up and (optionally) byte-swaps a text string,
 432  * removing leading/trailing blanks and compressing internal blanks.
 433  * It is primarily used to tidy up the model name/number fields as
 434  * returned by the WIN_[P]IDENTIFY commands.
 435  */
 436
 437 void ide_fixstring (u8 *s, const int bytecount, const int byteswap)
 438 {
 439         u8 *p = s, *end = &s[bytecount & ~1]; /* bytecount must be even */
 440
 441         if (byteswap) {
 442                 /* convert from big-endian to host byte order */
 443                 for (p = end ; p != s;) {
 444                         unsigned short *pp = (unsigned short *) (p -= 2);
 445                         *pp = ntohs(*pp);
 446                 }
 447         }
 448         /* strip leading blanks */
 449         while (s != end && *s == ' ')
 450                 ++s;
 451         /* compress internal blanks and strip trailing blanks */
 452         while (s != end && *s) {
 453                 if (*s++ != ' ' || (s != end && *s && *s != ' '))
 454                         *p++ = *(s-1);
 455         }
 456         /* wipe out trailing garbage */
 457         while (p != end)
 458                 *p++ = '\0';
 459 }
 460
 461 EXPORT_SYMBOL(ide_fixstring);
 462
 463 /*
 464  * Needed for PCI irq sharing
 465  */
 466 int drive_is_ready (ide_drive_t *drive)
 467 {
 468         ide_hwif_t *hwif        = HWIF(drive);
 469         u8 stat                 = 0;
 470
 471         if (drive->waiting_for_dma)
 472                 return hwif->dma_ops->dma_test_irq(drive);
 473
 474 #if 0
 475         /* need to guarantee 400ns since last command was issued */
 476         udelay(1);
 477 #endif
 478
 479         /*
 480          * We do a passive status test under shared PCI interrupts on
 481          * cards that truly share the ATA side interrupt, but may also share
 482          * an interrupt with another pci card/device.  We make no assumptions
 483          * about possible isa-pnp and pci-pnp issues yet.
 484          */
 485         if (hwif->io_ports.ctl_addr)
 486                 stat = ide_read_altstatus(drive);
 487         else
 488                 /* Note: this may clear a pending IRQ!! */
 489                 stat = ide_read_status(drive);
 490
 491         if (stat & BUSY_STAT)
 492                 /* drive busy:  definitely not interrupting */
 493                 return 0;
 494
 495         /* drive ready: *might* be interrupting */
 496         return 1;
 497 }
 498
 499 EXPORT_SYMBOL(drive_is_ready);
 500
 501 /*
 502  * This routine busy-waits for the drive status to be not "busy".
 503  * It then checks the status for all of the "good" bits and none
 504  * of the "bad" bits, and if all is okay it returns 0.  All other
 505  * cases return error -- caller may then invoke ide_error().
 506  *
 507  * This routine should get fixed to not hog the cpu during extra long waits..
 508  * That could be done by busy-waiting for the first jiffy or two, and then
 509  * setting a timer to wake up at half second intervals thereafter,
 510  * until timeout is achieved, before timing out.
 511  */
 512 static int __ide_wait_stat(ide_drive_t *drive, u8 good, u8 bad, unsigned long timeout, u8 *rstat)
 513 {
 514         unsigned long flags;
 515         int i;
 516         u8 stat;
 517
 518         udelay(1);      /* spec allows drive 400ns to assert "BUSY" */
 519         stat = ide_read_status(drive);
 520
 521         if (stat & BUSY_STAT) {
 522                 local_irq_set(flags);
 523                 timeout += jiffies;
 524                 while ((stat = ide_read_status(drive)) & BUSY_STAT) {
 525                         if (time_after(jiffies, timeout)) {
 526                                 /*
 527                                  * One last read after the timeout in case
 528                                  * heavy interrupt load made us not make any
 529                                  * progress during the timeout..
 530                                  */
 531                                 stat = ide_read_status(drive);
 532                                 if (!(stat & BUSY_STAT))
 533                                         break;
 534
 535                                 local_irq_restore(flags);
 536                                 *rstat = stat;
 537                                 return -EBUSY;
 538                         }
 539                 }
 540                 local_irq_restore(flags);
 541         }
 542         /*
 543          * Allow status to settle, then read it again.
 544          * A few rare drives vastly violate the 400ns spec here,
 545          * so we'll wait up to 10usec for a "good" status
 546          * rather than expensively fail things immediately.
 547          * This fix courtesy of Matthew Faupel & Niccolo Rigacci.
 548          */
 549         for (i = 0; i < 10; i++) {
 550                 udelay(1);
 551                 stat = ide_read_status(drive);
 552
 553                 if (OK_STAT(stat, good, bad)) {
 554                         *rstat = stat;
 555                         return 0;
 556                 }
 557         }
 558         *rstat = stat;
 559         return -EFAULT;
 560 }
 561
 562 /*
 563  * In case of error returns error value after doing "*startstop = ide_error()".
 564  * The caller should return the updated value of "startstop" in this case,
 565  * "startstop" is unchanged when the function returns 0.
 566  */
 567 int ide_wait_stat(ide_startstop_t *startstop, ide_drive_t *drive, u8 good, u8 bad, unsigned long timeout)
 568 {
 569         int err;
 570         u8 stat;
 571
 572         /* bail early if we've exceeded max_failures */
 573         if (drive->max_failures && (drive->failures > drive->max_failures)) {
 574                 *startstop = ide_stopped;
 575                 return 1;
 576         }
 577
 578         err = __ide_wait_stat(drive, good, bad, timeout, &stat);
 579
 580         if (err) {
 581                 char *s = (err == -EBUSY) ? "status timeout" : "status error";
 582                 *startstop = ide_error(drive, s, stat);
 583         }
 584
 585         return err;
 586 }
 587
 588 EXPORT_SYMBOL(ide_wait_stat);
 589
 590 /**
 591  *      ide_in_drive_list       -       look for drive in black/white list
 592  *      @id: drive identifier
 593  *      @drive_table: list to inspect
 594  *
 595  *      Look for a drive in the blacklist and the whitelist tables
 596  *      Returns 1 if the drive is found in the table.
 597  */
 598
 599 int ide_in_drive_list(struct hd_driveid *id, const struct drive_list_entry *drive_table)
 600 {
 601         for ( ; drive_table->id_model; drive_table++)
 602                 if ((!strcmp(drive_table->id_model, id->model)) &&
 603                     (!drive_table->id_firmware ||
 604                      strstr(id->fw_rev, drive_table->id_firmware)))
 605                         return 1;
 606         return 0;
 607 }
 608
 609 EXPORT_SYMBOL_GPL(ide_in_drive_list);
 610
 611 /*
 612  * Early UDMA66 devices don't set bit14 to 1, only bit13 is valid.
 613  * We list them here and depend on the device side cable detection for them.
 614  *
 615  * Some optical devices with the buggy firmwares have the same problem.
 616  */
 617 static const struct drive_list_entry ivb_list[] = {
 618         { "QUANTUM FIREBALLlct10 05"    , "A03.0900"    },
 619         { "TSSTcorp CDDVDW SH-S202J"    , "SB00"        },
 620         { "TSSTcorp CDDVDW SH-S202J"    , "SB01"        },
 621         { "TSSTcorp CDDVDW SH-S202N"    , "SB00"        },
 622         { "TSSTcorp CDDVDW SH-S202N"    , "SB01"        },
 623         { NULL                          , NULL          }
 624 };
 625
 626 /*
 627  *  All hosts that use the 80c ribbon must use!
 628  *  The name is derived from upper byte of word 93 and the 80c ribbon.
 629  */
 630 u8 eighty_ninty_three (ide_drive_t *drive)
 631 {
 632         ide_hwif_t *hwif = drive->hwif;
 633         struct hd_driveid *id = drive->id;
 634         int ivb = ide_in_drive_list(id, ivb_list);
 635
 636         if (hwif->cbl == ATA_CBL_PATA40_SHORT)
 637                 return 1;
 638
 639         if (ivb)
 640                 printk(KERN_DEBUG "%s: skipping word 93 validity check\n",
 641                                   drive->name);
 642
 643         if (ide_dev_is_sata(id) && !ivb)
 644                 return 1;
 645
 646         if (hwif->cbl != ATA_CBL_PATA80 && !ivb)
 647                 goto no_80w;
 648
 649         /*
 650          * FIXME:
 651          * - change master/slave IDENTIFY order
 652          * - force bit13 (80c cable present) check also for !ivb devices
 653          *   (unless the slave device is pre-ATA3)
 654          */
 655         if ((id->hw_config & 0x4000) || (ivb && (id->hw_config & 0x2000)))
 656                 return 1;
 657
 658 no_80w:
 659         if (drive->udma33_warned == 1)
 660                 return 0;
 661
 662         printk(KERN_WARNING "%s: %s side 80-wire cable detection failed, "
 663                             "limiting max speed to UDMA33\n",
 664                             drive->name,
 665                             hwif->cbl == ATA_CBL_PATA80 ? "drive" : "host");
 666
 667         drive->udma33_warned = 1;
 668
 669         return 0;
 670 }
 671
 672 int ide_driveid_update(ide_drive_t *drive)
 673 {
 674         ide_hwif_t *hwif = drive->hwif;
 675         struct hd_driveid *id;
 676         unsigned long timeout, flags;
 677         u8 stat;
 678
 679         /*
 680          * Re-read drive->id for possible DMA mode
 681          * change (copied from ide-probe.c)
 682          */
 683
 684         SELECT_MASK(drive, 1);
 685         ide_set_irq(drive, 1);
 686         msleep(50);
 687         hwif->OUTBSYNC(drive, WIN_IDENTIFY, hwif->io_ports.command_addr);
 688         timeout = jiffies + WAIT_WORSTCASE;
 689         do {
 690                 if (time_after(jiffies, timeout)) {
 691                         SELECT_MASK(drive, 0);
 692                         return 0;       /* drive timed-out */
 693                 }
 694
 695                 msleep(50);     /* give drive a breather */
 696                 stat = ide_read_altstatus(drive);
 697         } while (stat & BUSY_STAT);
 698
 699         msleep(50);     /* wait for IRQ and DRQ_STAT */
 700         stat = ide_read_status(drive);
 701
 702         if (!OK_STAT(stat, DRQ_STAT, BAD_R_STAT)) {
 703                 SELECT_MASK(drive, 0);
 704                 printk("%s: CHECK for good STATUS\n", drive->name);
 705                 return 0;
 706         }
 707         local_irq_save(flags);
 708         SELECT_MASK(drive, 0);
 709         id = kmalloc(SECTOR_WORDS*4, GFP_ATOMIC);
 710         if (!id) {
 711                 local_irq_restore(flags);
 712                 return 0;
 713         }
 714         hwif->input_data(drive, NULL, id, SECTOR_SIZE);
 715         (void)ide_read_status(drive);   /* clear drive IRQ */
 716         local_irq_enable();
 717         local_irq_restore(flags);
 718         ide_fix_driveid(id);
 719         if (id) {
 720                 drive->id->dma_ultra = id->dma_ultra;
 721                 drive->id->dma_mword = id->dma_mword;
 722                 drive->id->dma_1word = id->dma_1word;
 723                 /* anything more ? */
 724                 kfree(id);
 725
 726                 if (drive->using_dma && ide_id_dma_bug(drive))
 727                         ide_dma_off(drive);
 728         }
 729
 730         return 1;
 731 }
 732
 733 int ide_config_drive_speed(ide_drive_t *drive, u8 speed)
 734 {
 735         ide_hwif_t *hwif = drive->hwif;
 736         struct ide_io_ports *io_ports = &hwif->io_ports;
 737         int error = 0;
 738         u8 stat;
 739
 740 //      while (HWGROUP(drive)->busy)
 741 //              msleep(50);
 742
 743 #ifdef CONFIG_BLK_DEV_IDEDMA
 744         if (hwif->dma_ops)      /* check if host supports DMA */
 745                 hwif->dma_ops->dma_host_set(drive, 0);
 746 #endif
 747
 748         /* Skip setting PIO flow-control modes on pre-EIDE drives */
 749         if ((speed & 0xf8) == XFER_PIO_0 && !(drive->id->capability & 0x08))
 750                 goto skip;
 751
 752         /*
 753          * Don't use ide_wait_cmd here - it will
 754          * attempt to set_geometry and recalibrate,
 755          * but for some reason these don't work at
 756          * this point (lost interrupt).
 757          */
 758         /*
 759          * Select the drive, and issue the SETFEATURES command
 760          */
 761         disable_irq_nosync(hwif->irq);
 762
 763         /*
 764          *      FIXME: we race against the running IRQ here if
 765          *      this is called from non IRQ context. If we use
 766          *      disable_irq() we hang on the error path. Work
 767          *      is needed.
 768          */
 769
 770         udelay(1);
 771         SELECT_DRIVE(drive);
 772         SELECT_MASK(drive, 0);
 773         udelay(1);
 774         ide_set_irq(drive, 0);
 775         hwif->OUTB(speed, io_ports->nsect_addr);
 776         hwif->OUTB(SETFEATURES_XFER, io_ports->feature_addr);
 777         hwif->OUTBSYNC(drive, WIN_SETFEATURES, io_ports->command_addr);
 778         if (drive->quirk_list == 2)
 779                 ide_set_irq(drive, 1);
 780
 781         error = __ide_wait_stat(drive, drive->ready_stat,
 782                                 BUSY_STAT|DRQ_STAT|ERR_STAT,
 783                                 WAIT_CMD, &stat);
 784
 785         SELECT_MASK(drive, 0);
 786
 787         enable_irq(hwif->irq);
 788
 789         if (error) {
 790                 (void) ide_dump_status(drive, "set_drive_speed_status", stat);
 791                 return error;
 792         }
 793
 794         drive->id->dma_ultra &= ~0xFF00;
 795         drive->id->dma_mword &= ~0x0F00;
 796         drive->id->dma_1word &= ~0x0F00;
 797
 798  skip:
 799 #ifdef CONFIG_BLK_DEV_IDEDMA
 800         if ((speed >= XFER_SW_DMA_0 || (hwif->host_flags & IDE_HFLAG_VDMA)) &&
 801             drive->using_dma)
 802                 hwif->dma_ops->dma_host_set(drive, 1);
 803         else if (hwif->dma_ops) /* check if host supports DMA */
 804                 ide_dma_off_quietly(drive);
 805 #endif
 806
 807         switch(speed) {
 808                 case XFER_UDMA_7:   drive->id->dma_ultra |= 0x8080; break;
 809                 case XFER_UDMA_6:   drive->id->dma_ultra |= 0x4040; break;
 810                 case XFER_UDMA_5:   drive->id->dma_ultra |= 0x2020; break;
 811                 case XFER_UDMA_4:   drive->id->dma_ultra |= 0x1010; break;
 812                 case XFER_UDMA_3:   drive->id->dma_ultra |= 0x0808; break;
 813                 case XFER_UDMA_2:   drive->id->dma_ultra |= 0x0404; break;
 814                 case XFER_UDMA_1:   drive->id->dma_ultra |= 0x0202; break;
 815                 case XFER_UDMA_0:   drive->id->dma_ultra |= 0x0101; break;
 816                 case XFER_MW_DMA_2: drive->id->dma_mword |= 0x0404; break;
 817                 case XFER_MW_DMA_1: drive->id->dma_mword |= 0x0202; break;
 818                 case XFER_MW_DMA_0: drive->id->dma_mword |= 0x0101; break;
 819                 case XFER_SW_DMA_2: drive->id->dma_1word |= 0x0404; break;
 820                 case XFER_SW_DMA_1: drive->id->dma_1word |= 0x0202; break;
 821                 case XFER_SW_DMA_0: drive->id->dma_1word |= 0x0101; break;
 822                 default: break;
 823         }
 824         if (!drive->init_speed)
 825                 drive->init_speed = speed;
 826         drive->current_speed = speed;
 827         return error;
 828 }
 829
 830 /*
 831  * This should get invoked any time we exit the driver to
 832  * wait for an interrupt response from a drive.  handler() points
 833  * at the appropriate code to handle the next interrupt, and a
 834  * timer is started to prevent us from waiting forever in case
 835  * something goes wrong (see the ide_timer_expiry() handler later on).
 836  *
 837  * See also ide_execute_command
 838  */
 839 static void __ide_set_handler (ide_drive_t *drive, ide_handler_t *handler,
 840                       unsigned int timeout, ide_expiry_t *expiry)
 841 {
 842         ide_hwgroup_t *hwgroup = HWGROUP(drive);
 843
 844         BUG_ON(hwgroup->handler);
 845         hwgroup->handler        = handler;
 846         hwgroup->expiry         = expiry;
 847         hwgroup->timer.expires  = jiffies + timeout;
 848         hwgroup->req_gen_timer  = hwgroup->req_gen;
 849         add_timer(&hwgroup->timer);
 850 }
 851
 852 void ide_set_handler (ide_drive_t *drive, ide_handler_t *handler,
 853                       unsigned int timeout, ide_expiry_t *expiry)
 854 {
 855         unsigned long flags;
 856         spin_lock_irqsave(&ide_lock, flags);
 857         __ide_set_handler(drive, handler, timeout, expiry);
 858         spin_unlock_irqrestore(&ide_lock, flags);
 859 }
 860
 861 EXPORT_SYMBOL(ide_set_handler);
 862
 863 /**
 864  *      ide_execute_command     -       execute an IDE command
 865  *      @drive: IDE drive to issue the command against
 866  *      @command: command byte to write
 867  *      @handler: handler for next phase
 868  *      @timeout: timeout for command
 869  *      @expiry:  handler to run on timeout
 870  *
 871  *      Helper function to issue an IDE command. This handles the
 872  *      atomicity requirements, command timing and ensures that the
 873  *      handler and IRQ setup do not race. All IDE command kick off
 874  *      should go via this function or do equivalent locking.
 875  */
 876
 877 void ide_execute_command(ide_drive_t *drive, u8 cmd, ide_handler_t *handler,
 878                          unsigned timeout, ide_expiry_t *expiry)
 879 {
 880         unsigned long flags;
 881         ide_hwif_t *hwif = HWIF(drive);
 882
 883         spin_lock_irqsave(&ide_lock, flags);
 884         __ide_set_handler(drive, handler, timeout, expiry);
 885         hwif->OUTBSYNC(drive, cmd, hwif->io_ports.command_addr);
 886         /*
 887          * Drive takes 400nS to respond, we must avoid the IRQ being
 888          * serviced before that.
 889          *
 890          * FIXME: we could skip this delay with care on non shared devices
 891          */
 892         ndelay(400);
 893         spin_unlock_irqrestore(&ide_lock, flags);
 894 }
 895 EXPORT_SYMBOL(ide_execute_command);
 896
 897 void ide_execute_pkt_cmd(ide_drive_t *drive)
 898 {
 899         ide_hwif_t *hwif = drive->hwif;
 900         unsigned long flags;
 901
 902         spin_lock_irqsave(&ide_lock, flags);
 903         hwif->OUTBSYNC(drive, WIN_PACKETCMD, hwif->io_ports.command_addr);
 904         ndelay(400);
 905         spin_unlock_irqrestore(&ide_lock, flags);
 906 }
 907 EXPORT_SYMBOL_GPL(ide_execute_pkt_cmd);
 908
 909 /* needed below */
 910 static ide_startstop_t do_reset1 (ide_drive_t *, int);
 911
 912 /*
 913  * atapi_reset_pollfunc() gets invoked to poll the interface for completion every 50ms
 914  * during an atapi drive reset operation. If the drive has not yet responded,
 915  * and we have not yet hit our maximum waiting time, then the timer is restarted
 916  * for another 50ms.
 917  */
 918 static ide_startstop_t atapi_reset_pollfunc (ide_drive_t *drive)
 919 {
 920         ide_hwgroup_t *hwgroup  = HWGROUP(drive);
 921         u8 stat;
 922
 923         SELECT_DRIVE(drive);
 924         udelay (10);
 925         stat = ide_read_status(drive);
 926
 927         if (OK_STAT(stat, 0, BUSY_STAT))
 928                 printk("%s: ATAPI reset complete\n", drive->name);
 929         else {
 930                 if (time_before(jiffies, hwgroup->poll_timeout)) {
 931                         ide_set_handler(drive, &atapi_reset_pollfunc, HZ/20, NULL);
 932                         /* continue polling */
 933                         return ide_started;
 934                 }
 935                 /* end of polling */
 936                 hwgroup->polling = 0;
 937                 printk("%s: ATAPI reset timed-out, status=0x%02x\n",
 938                                 drive->name, stat);
 939                 /* do it the old fashioned way */
 940                 return do_reset1(drive, 1);
 941         }
 942         /* done polling */
 943         hwgroup->polling = 0;
 944         hwgroup->resetting = 0;
 945         return ide_stopped;
 946 }
 947
 948 /*
 949  * reset_pollfunc() gets invoked to poll the interface for completion every 50ms
 950  * during an ide reset operation. If the drives have not yet responded,
 951  * and we have not yet hit our maximum waiting time, then the timer is restarted
 952  * for another 50ms.
 953  */
 954 static ide_startstop_t reset_pollfunc (ide_drive_t *drive)
 955 {
 956         ide_hwgroup_t *hwgroup  = HWGROUP(drive);
 957         ide_hwif_t *hwif        = HWIF(drive);
 958         const struct ide_port_ops *port_ops = hwif->port_ops;
 959         u8 tmp;
 960
 961         if (port_ops && port_ops->reset_poll) {
 962                 if (port_ops->reset_poll(drive)) {
 963                         printk(KERN_ERR "%s: host reset_poll failure for %s.\n",
 964                                 hwif->name, drive->name);
 965                         return ide_stopped;
 966                 }
 967         }
 968
 969         tmp = ide_read_status(drive);
 970
 971         if (!OK_STAT(tmp, 0, BUSY_STAT)) {
 972                 if (time_before(jiffies, hwgroup->poll_timeout)) {
 973                         ide_set_handler(drive, &reset_pollfunc, HZ/20, NULL);
 974                         /* continue polling */
 975                         return ide_started;
 976                 }
 977                 printk("%s: reset timed-out, status=0x%02x\n", hwif->name, tmp);
 978                 drive->failures++;
 979         } else  {
 980                 printk("%s: reset: ", hwif->name);
 981                 tmp = ide_read_error(drive);
 982
 983                 if (tmp == 1) {
 984                         printk("success\n");
 985                         drive->failures = 0;
 986                 } else {
 987                         drive->failures++;
 988                         printk("master: ");
 989                         switch (tmp & 0x7f) {
 990                                 case 1: printk("passed");
 991                                         break;
 992                                 case 2: printk("formatter device error");
 993                                         break;
 994                                 case 3: printk("sector buffer error");
 995                                         break;
 996                                 case 4: printk("ECC circuitry error");
 997                                         break;
 998                                 case 5: printk("controlling MPU error");
 999                                         break;
1000                                 default:printk("error (0x%02x?)", tmp);
1001                         }
1002                         if (tmp & 0x80)
1003                                 printk("; slave: failed");
1004                         printk("\n");
1005                 }
1006         }
1007         hwgroup->polling = 0;   /* done polling */
1008         hwgroup->resetting = 0; /* done reset attempt */
1009         return ide_stopped;
1010 }
1011
1012 static void ide_disk_pre_reset(ide_drive_t *drive)
1013 {
1014         int legacy = (drive->id->cfs_enable_2 & 0x0400) ? 0 : 1;
1015
1016         drive->special.all = 0;
1017         drive->special.b.set_geometry = legacy;
1018         drive->special.b.recalibrate  = legacy;
1019         drive->mult_count = 0;
1020         if (!drive->keep_settings && !drive->using_dma)
1021                 drive->mult_req = 0;
1022         if (drive->mult_req != drive->mult_count)
1023                 drive->special.b.set_multmode = 1;
1024 }
1025
1026 static void pre_reset(ide_drive_t *drive)
1027 {
1028         const struct ide_port_ops *port_ops = drive->hwif->port_ops;
1029
1030         if (drive->media == ide_disk)
1031                 ide_disk_pre_reset(drive);
1032         else
1033                 drive->post_reset = 1;
1034
1035         if (drive->using_dma) {
1036                 if (drive->crc_count)
1037                         ide_check_dma_crc(drive);
1038                 else
1039                         ide_dma_off(drive);
1040         }
1041
1042         if (!drive->keep_settings) {
1043                 if (!drive->using_dma) {
1044                         drive->unmask = 0;
1045                         drive->io_32bit = 0;
1046                 }
1047                 return;
1048         }
1049
1050         if (port_ops && port_ops->pre_reset)
1051                 port_ops->pre_reset(drive);
1052
1053         if (drive->current_speed != 0xff)
1054                 drive->desired_speed = drive->current_speed;
1055         drive->current_speed = 0xff;
1056 }
1057
1058 /*
1059  * do_reset1() attempts to recover a confused drive by resetting it.
1060  * Unfortunately, resetting a disk drive actually resets all devices on
1061  * the same interface, so it can really be thought of as resetting the
1062  * interface rather than resetting the drive.
1063  *
1064  * ATAPI devices have their own reset mechanism which allows them to be
1065  * individually reset without clobbering other devices on the same interface.
1066  *
1067  * Unfortunately, the IDE interface does not generate an interrupt to let
1068  * us know when the reset operation has finished, so we must poll for this.
1069  * Equally poor, though, is the fact that this may a very long time to complete,
1070  * (up to 30 seconds worstcase).  So, instead of busy-waiting here for it,
1071  * we set a timer to poll at 50ms intervals.
1072  */
1073 static ide_startstop_t do_reset1 (ide_drive_t *drive, int do_not_try_atapi)
1074 {
1075         unsigned int unit;
1076         unsigned long flags;
1077         ide_hwif_t *hwif;
1078         ide_hwgroup_t *hwgroup;
1079         struct ide_io_ports *io_ports;
1080         const struct ide_port_ops *port_ops;
1081         u8 ctl;
1082
1083         spin_lock_irqsave(&ide_lock, flags);
1084         hwif = HWIF(drive);
1085         hwgroup = HWGROUP(drive);
1086
1087         io_ports = &hwif->io_ports;
1088
1089         /* We must not reset with running handlers */
1090         BUG_ON(hwgroup->handler != NULL);
1091
1092         /* For an ATAPI device, first try an ATAPI SRST. */
1093         if (drive->media != ide_disk && !do_not_try_atapi) {
1094                 hwgroup->resetting = 1;
1095                 pre_reset(drive);
1096                 SELECT_DRIVE(drive);
1097                 udelay (20);
1098                 hwif->OUTBSYNC(drive, WIN_SRST, io_ports->command_addr);
1099                 ndelay(400);
1100                 hwgroup->poll_timeout = jiffies + WAIT_WORSTCASE;
1101                 hwgroup->polling = 1;
1102                 __ide_set_handler(drive, &atapi_reset_pollfunc, HZ/20, NULL);
1103                 spin_unlock_irqrestore(&ide_lock, flags);
1104                 return ide_started;
1105         }
1106
1107         /*
1108          * First, reset any device state data we were maintaining
1109          * for any of the drives on this interface.
1110          */
1111         for (unit = 0; unit < MAX_DRIVES; ++unit)
1112                 pre_reset(&hwif->drives[unit]);
1113
1114         if (io_ports->ctl_addr == 0) {
1115                 spin_unlock_irqrestore(&ide_lock, flags);
1116                 return ide_stopped;
1117         }
1118
1119         hwgroup->resetting = 1;
1120         /*
1121          * Note that we also set nIEN while resetting the device,
1122          * to mask unwanted interrupts from the interface during the reset.
1123          * However, due to the design of PC hardware, this will cause an
1124          * immediate interrupt due to the edge transition it produces.
1125          * This single interrupt gives us a "fast poll" for drives that
1126          * recover from reset very quickly, saving us the first 50ms wait time.
1127          */
1128         /* set SRST and nIEN */
1129         hwif->OUTBSYNC(drive, drive->ctl|6, io_ports->ctl_addr);
1130         /* more than enough time */
1131         udelay(10);
1132         if (drive->quirk_list == 2)
1133                 ctl = drive->ctl;       /* clear SRST and nIEN */
1134         else
1135                 ctl = drive->ctl | 2;   /* clear SRST, leave nIEN */
1136         hwif->OUTBSYNC(drive, ctl, io_ports->ctl_addr);
1137         /* more than enough time */
1138         udelay(10);
1139         hwgroup->poll_timeout = jiffies + WAIT_WORSTCASE;
1140         hwgroup->polling = 1;
1141         __ide_set_handler(drive, &reset_pollfunc, HZ/20, NULL);
1142
1143         /*
1144          * Some weird controller like resetting themselves to a strange
1145          * state when the disks are reset this way. At least, the Winbond
1146          * 553 documentation says that
1147          */
1148         port_ops = hwif->port_ops;
1149         if (port_ops && port_ops->resetproc)
1150                 port_ops->resetproc(drive);
1151
1152         spin_unlock_irqrestore(&ide_lock, flags);
1153         return ide_started;
1154 }
1155
1156 /*
1157  * ide_do_reset() is the entry point to the drive/interface reset code.
1158  */
1159
1160 ide_startstop_t ide_do_reset (ide_drive_t *drive)
1161 {
1162         return do_reset1(drive, 0);
1163 }
1164
1165 EXPORT_SYMBOL(ide_do_reset);
1166
1167 /*
1168  * ide_wait_not_busy() waits for the currently selected device on the hwif
1169  * to report a non-busy status, see comments in ide_probe_port().
1170  */
1171 int ide_wait_not_busy(ide_hwif_t *hwif, unsigned long timeout)
1172 {
1173         u8 stat = 0;
1174
1175         while(timeout--) {
1176                 /*
1177                  * Turn this into a schedule() sleep once I'm sure
1178                  * about locking issues (2.5 work ?).
1179                  */
1180                 mdelay(1);
1181                 stat = hwif->INB(hwif->io_ports.status_addr);
1182                 if ((stat & BUSY_STAT) == 0)
1183                         return 0;
1184                 /*
1185                  * Assume a value of 0xff means nothing is connected to
1186                  * the interface and it doesn't implement the pull-down
1187                  * resistor on D7.
1188                  */
1189                 if (stat == 0xff)
1190                         return -ENODEV;
1191                 touch_softlockup_watchdog();
1192                 touch_nmi_watchdog();
1193         }
1194         return -EBUSY;
1195 }
1196
1197 EXPORT_SYMBOL_GPL(ide_wait_not_busy);
1198