5 * VIA IDE driver for Linux. Supported southbridges:
7 * vt82c576, vt82c586, vt82c586a, vt82c586b, vt82c596a, vt82c596b,
8 * vt82c686, vt82c686a, vt82c686b, vt8231, vt8233, vt8233c, vt8233a,
9 * vt8235, vt8237, vt8237a
11 * Copyright (c) 2000-2002 Vojtech Pavlik
13 * Based on the work of:
19 * Obsolete device documentation publically available from via.com.tw
20 * Current device documentation available under NDA only
24 * This program is free software; you can redistribute it and/or modify it
25 * under the terms of the GNU General Public License version 2 as published by
26 * the Free Software Foundation.
29 #include <linux/module.h>
30 #include <linux/kernel.h>
31 #include <linux/ioport.h>
32 #include <linux/blkdev.h>
33 #include <linux/pci.h>
34 #include <linux/init.h>
35 #include <linux/ide.h>
38 #include "ide-timing.h"
40 #define DISPLAY_VIA_TIMINGS
42 #define VIA_IDE_ENABLE 0x40
43 #define VIA_IDE_CONFIG 0x41
44 #define VIA_FIFO_CONFIG 0x43
45 #define VIA_MISC_1 0x44
46 #define VIA_MISC_2 0x45
47 #define VIA_MISC_3 0x46
48 #define VIA_DRIVE_TIMING 0x48
49 #define VIA_8BIT_TIMING 0x4e
50 #define VIA_ADDRESS_SETUP 0x4c
51 #define VIA_UDMA_TIMING 0x50
53 #define VIA_UDMA 0x007
54 #define VIA_UDMA_NONE 0x000
55 #define VIA_UDMA_33 0x001
56 #define VIA_UDMA_66 0x002
57 #define VIA_UDMA_100 0x003
58 #define VIA_UDMA_133 0x004
59 #define VIA_BAD_PREQ 0x010 /* Crashes if PREQ# till DDACK# set */
60 #define VIA_BAD_CLK66 0x020 /* 66 MHz clock doesn't work correctly */
61 #define VIA_SET_FIFO 0x040 /* Needs to have FIFO split set */
62 #define VIA_NO_UNMASK 0x080 /* Doesn't work with IRQ unmasking on */
63 #define VIA_BAD_ID 0x100 /* Has wrong vendor ID (0x1107) */
64 #define VIA_BAD_AST 0x200 /* Don't touch Address Setup Timing */
67 * VIA SouthBridge chips.
70 static struct via_isa_bridge {
76 } via_isa_bridges[] = {
77 { "cx700", PCI_DEVICE_ID_VIA_CX700, 0x00, 0x2f, VIA_UDMA_133 | VIA_BAD_AST },
78 { "vt8237s", PCI_DEVICE_ID_VIA_8237S, 0x00, 0x2f, VIA_UDMA_133 | VIA_BAD_AST },
79 { "vt6410", PCI_DEVICE_ID_VIA_6410, 0x00, 0x2f, VIA_UDMA_133 | VIA_BAD_AST },
80 { "vt8251", PCI_DEVICE_ID_VIA_8251, 0x00, 0x2f, VIA_UDMA_133 | VIA_BAD_AST },
81 { "vt8237", PCI_DEVICE_ID_VIA_8237, 0x00, 0x2f, VIA_UDMA_133 | VIA_BAD_AST },
82 { "vt8237a", PCI_DEVICE_ID_VIA_8237A, 0x00, 0x2f, VIA_UDMA_133 | VIA_BAD_AST },
83 { "vt8235", PCI_DEVICE_ID_VIA_8235, 0x00, 0x2f, VIA_UDMA_133 | VIA_BAD_AST },
84 { "vt8233a", PCI_DEVICE_ID_VIA_8233A, 0x00, 0x2f, VIA_UDMA_133 | VIA_BAD_AST },
85 { "vt8233c", PCI_DEVICE_ID_VIA_8233C_0, 0x00, 0x2f, VIA_UDMA_100 },
86 { "vt8233", PCI_DEVICE_ID_VIA_8233_0, 0x00, 0x2f, VIA_UDMA_100 },
87 { "vt8231", PCI_DEVICE_ID_VIA_8231, 0x00, 0x2f, VIA_UDMA_100 },
88 { "vt82c686b", PCI_DEVICE_ID_VIA_82C686, 0x40, 0x4f, VIA_UDMA_100 },
89 { "vt82c686a", PCI_DEVICE_ID_VIA_82C686, 0x10, 0x2f, VIA_UDMA_66 },
90 { "vt82c686", PCI_DEVICE_ID_VIA_82C686, 0x00, 0x0f, VIA_UDMA_33 | VIA_BAD_CLK66 },
91 { "vt82c596b", PCI_DEVICE_ID_VIA_82C596, 0x10, 0x2f, VIA_UDMA_66 },
92 { "vt82c596a", PCI_DEVICE_ID_VIA_82C596, 0x00, 0x0f, VIA_UDMA_33 | VIA_BAD_CLK66 },
93 { "vt82c586b", PCI_DEVICE_ID_VIA_82C586_0, 0x47, 0x4f, VIA_UDMA_33 | VIA_SET_FIFO },
94 { "vt82c586b", PCI_DEVICE_ID_VIA_82C586_0, 0x40, 0x46, VIA_UDMA_33 | VIA_SET_FIFO | VIA_BAD_PREQ },
95 { "vt82c586b", PCI_DEVICE_ID_VIA_82C586_0, 0x30, 0x3f, VIA_UDMA_33 | VIA_SET_FIFO },
96 { "vt82c586a", PCI_DEVICE_ID_VIA_82C586_0, 0x20, 0x2f, VIA_UDMA_33 | VIA_SET_FIFO },
97 { "vt82c586", PCI_DEVICE_ID_VIA_82C586_0, 0x00, 0x0f, VIA_UDMA_NONE | VIA_SET_FIFO },
98 { "vt82c576", PCI_DEVICE_ID_VIA_82C576, 0x00, 0x2f, VIA_UDMA_NONE | VIA_SET_FIFO | VIA_NO_UNMASK },
99 { "vt82c576", PCI_DEVICE_ID_VIA_82C576, 0x00, 0x2f, VIA_UDMA_NONE | VIA_SET_FIFO | VIA_NO_UNMASK | VIA_BAD_ID },
103 static unsigned int via_clock;
104 static char *via_dma[] = { "MWDMA16", "UDMA33", "UDMA66", "UDMA100", "UDMA133" };
108 struct via_isa_bridge *via_config;
109 unsigned int via_80w;
113 * via_set_speed - write timing registers
116 * @timing: IDE timing data to use
118 * via_set_speed writes timing values to the chipset registers
121 static void via_set_speed(ide_hwif_t *hwif, u8 dn, struct ide_timing *timing)
123 struct pci_dev *dev = hwif->pci_dev;
124 struct via82cxxx_dev *vdev = pci_get_drvdata(hwif->pci_dev);
127 if (~vdev->via_config->flags & VIA_BAD_AST) {
128 pci_read_config_byte(dev, VIA_ADDRESS_SETUP, &t);
129 t = (t & ~(3 << ((3 - dn) << 1))) | ((FIT(timing->setup, 1, 4) - 1) << ((3 - dn) << 1));
130 pci_write_config_byte(dev, VIA_ADDRESS_SETUP, t);
133 pci_write_config_byte(dev, VIA_8BIT_TIMING + (1 - (dn >> 1)),
134 ((FIT(timing->act8b, 1, 16) - 1) << 4) | (FIT(timing->rec8b, 1, 16) - 1));
136 pci_write_config_byte(dev, VIA_DRIVE_TIMING + (3 - dn),
137 ((FIT(timing->active, 1, 16) - 1) << 4) | (FIT(timing->recover, 1, 16) - 1));
139 switch (vdev->via_config->flags & VIA_UDMA) {
140 case VIA_UDMA_33: t = timing->udma ? (0xe0 | (FIT(timing->udma, 2, 5) - 2)) : 0x03; break;
141 case VIA_UDMA_66: t = timing->udma ? (0xe8 | (FIT(timing->udma, 2, 9) - 2)) : 0x0f; break;
142 case VIA_UDMA_100: t = timing->udma ? (0xe0 | (FIT(timing->udma, 2, 9) - 2)) : 0x07; break;
143 case VIA_UDMA_133: t = timing->udma ? (0xe0 | (FIT(timing->udma, 2, 9) - 2)) : 0x07; break;
147 pci_write_config_byte(dev, VIA_UDMA_TIMING + (3 - dn), t);
151 * via_set_drive - configure transfer mode
152 * @drive: Drive to set up
153 * @speed: desired speed
155 * via_set_drive() computes timing values configures the drive and
156 * the chipset to a desired transfer mode. It also can be called
160 static int via_set_drive(ide_drive_t *drive, u8 speed)
162 ide_drive_t *peer = HWIF(drive)->drives + (~drive->dn & 1);
163 struct via82cxxx_dev *vdev = pci_get_drvdata(drive->hwif->pci_dev);
164 struct ide_timing t, p;
167 if (speed != XFER_PIO_SLOW)
168 ide_config_drive_speed(drive, speed);
170 T = 1000000000 / via_clock;
172 switch (vdev->via_config->flags & VIA_UDMA) {
173 case VIA_UDMA_33: UT = T; break;
174 case VIA_UDMA_66: UT = T/2; break;
175 case VIA_UDMA_100: UT = T/3; break;
176 case VIA_UDMA_133: UT = T/4; break;
180 ide_timing_compute(drive, speed, &t, T, UT);
183 ide_timing_compute(peer, peer->current_speed, &p, T, UT);
184 ide_timing_merge(&p, &t, &t, IDE_TIMING_8BIT);
187 via_set_speed(HWIF(drive), drive->dn, &t);
189 if (!drive->init_speed)
190 drive->init_speed = speed;
191 drive->current_speed = speed;
197 * via82cxxx_tune_drive - PIO setup
198 * @drive: drive to set up
199 * @pio: mode to use (255 for 'best possible')
201 * A callback from the upper layers for PIO-only tuning.
204 static void via82cxxx_tune_drive(ide_drive_t *drive, u8 pio)
208 ide_find_best_mode(drive, XFER_PIO | XFER_EPIO));
212 via_set_drive(drive, XFER_PIO_0 + min_t(u8, pio, 5));
216 * via82cxxx_ide_dma_check - set up for DMA if possible
217 * @drive: IDE drive to set up
219 * Set up the drive for the highest supported speed considering the
220 * driver, controller and cable
223 static int via82cxxx_ide_dma_check (ide_drive_t *drive)
225 ide_hwif_t *hwif = HWIF(drive);
226 struct via82cxxx_dev *vdev = pci_get_drvdata(hwif->pci_dev);
227 u16 w80 = hwif->udma_four;
229 u16 speed = ide_find_best_mode(drive,
230 XFER_PIO | XFER_EPIO | XFER_SWDMA | XFER_MWDMA |
231 (vdev->via_config->flags & VIA_UDMA ? XFER_UDMA : 0) |
232 (w80 && (vdev->via_config->flags & VIA_UDMA) >= VIA_UDMA_66 ? XFER_UDMA_66 : 0) |
233 (w80 && (vdev->via_config->flags & VIA_UDMA) >= VIA_UDMA_100 ? XFER_UDMA_100 : 0) |
234 (w80 && (vdev->via_config->flags & VIA_UDMA) >= VIA_UDMA_133 ? XFER_UDMA_133 : 0));
236 via_set_drive(drive, speed);
238 if (drive->autodma && (speed & XFER_MODE) != XFER_PIO)
244 static struct via_isa_bridge *via_config_find(struct pci_dev **isa)
246 struct via_isa_bridge *via_config;
249 for (via_config = via_isa_bridges; via_config->id; via_config++)
250 if ((*isa = pci_get_device(PCI_VENDOR_ID_VIA +
251 !!(via_config->flags & VIA_BAD_ID),
252 via_config->id, NULL))) {
254 pci_read_config_byte(*isa, PCI_REVISION_ID, &t);
255 if (t >= via_config->rev_min &&
256 t <= via_config->rev_max)
265 * Check and handle 80-wire cable presence
267 static void __devinit via_cable_detect(struct via82cxxx_dev *vdev, u32 u)
271 switch (vdev->via_config->flags & VIA_UDMA) {
273 for (i = 24; i >= 0; i -= 8)
274 if (((u >> (i & 16)) & 8) &&
276 (((u >> i) & 7) < 2)) {
281 vdev->via_80w |= (1 << (1 - (i >> 4)));
286 for (i = 24; i >= 0; i -= 8)
287 if (((u >> i) & 0x10) ||
288 (((u >> i) & 0x20) &&
289 (((u >> i) & 7) < 4))) {
290 /* BIOS 80-wire bit or
291 * UDMA w/ < 60ns/cycle
293 vdev->via_80w |= (1 << (1 - (i >> 4)));
298 for (i = 24; i >= 0; i -= 8)
299 if (((u >> i) & 0x10) ||
300 (((u >> i) & 0x20) &&
301 (((u >> i) & 7) < 6))) {
302 /* BIOS 80-wire bit or
303 * UDMA w/ < 60ns/cycle
305 vdev->via_80w |= (1 << (1 - (i >> 4)));
312 * init_chipset_via82cxxx - initialization handler
314 * @name: Name of interface
316 * The initialization callback. Here we determine the IDE chip type
317 * and initialize its drive independent registers.
320 static unsigned int __devinit init_chipset_via82cxxx(struct pci_dev *dev, const char *name)
322 struct pci_dev *isa = NULL;
323 struct via82cxxx_dev *vdev;
324 struct via_isa_bridge *via_config;
328 vdev = kzalloc(sizeof(*vdev), GFP_KERNEL);
330 printk(KERN_ERR "VP_IDE: out of memory :(\n");
333 pci_set_drvdata(dev, vdev);
336 * Find the ISA bridge to see how good the IDE is.
338 vdev->via_config = via_config = via_config_find(&isa);
340 /* We checked this earlier so if it fails here deeep badness
343 BUG_ON(!via_config->id);
346 * Detect cable and configure Clk66
348 pci_read_config_dword(dev, VIA_UDMA_TIMING, &u);
350 via_cable_detect(vdev, u);
352 if ((via_config->flags & VIA_UDMA) == VIA_UDMA_66) {
354 pci_write_config_dword(dev, VIA_UDMA_TIMING, u|0x80008);
355 } else if (via_config->flags & VIA_BAD_CLK66) {
356 /* Would cause trouble on 596a and 686 */
357 pci_write_config_dword(dev, VIA_UDMA_TIMING, u & ~0x80008);
361 * Check whether interfaces are enabled.
364 pci_read_config_byte(dev, VIA_IDE_ENABLE, &v);
367 * Set up FIFO sizes and thresholds.
370 pci_read_config_byte(dev, VIA_FIFO_CONFIG, &t);
372 /* Disable PREQ# till DDACK# */
373 if (via_config->flags & VIA_BAD_PREQ) {
374 /* Would crash on 586b rev 41 */
378 /* Fix FIFO split between channels */
379 if (via_config->flags & VIA_SET_FIFO) {
382 case 2: t |= 0x00; break; /* 16 on primary */
383 case 1: t |= 0x60; break; /* 16 on secondary */
384 case 3: t |= 0x20; break; /* 8 pri 8 sec */
388 pci_write_config_byte(dev, VIA_FIFO_CONFIG, t);
391 * Determine system bus clock.
394 via_clock = system_bus_clock() * 1000;
397 case 33000: via_clock = 33333; break;
398 case 37000: via_clock = 37500; break;
399 case 41000: via_clock = 41666; break;
402 if (via_clock < 20000 || via_clock > 50000) {
403 printk(KERN_WARNING "VP_IDE: User given PCI clock speed "
404 "impossible (%d), using 33 MHz instead.\n", via_clock);
405 printk(KERN_WARNING "VP_IDE: Use ide0=ata66 if you want "
406 "to assume 80-wire cable.\n");
411 * Print the boot message.
414 pci_read_config_byte(isa, PCI_REVISION_ID, &t);
415 printk(KERN_INFO "VP_IDE: VIA %s (rev %02x) IDE %s "
416 "controller on pci%s\n",
418 via_dma[via_config->flags & VIA_UDMA],
425 static void __devinit init_hwif_via82cxxx(ide_hwif_t *hwif)
427 struct via82cxxx_dev *vdev = pci_get_drvdata(hwif->pci_dev);
432 hwif->tuneproc = &via82cxxx_tune_drive;
433 hwif->speedproc = &via_set_drive;
435 for (i = 0; i < 2; i++) {
436 hwif->drives[i].io_32bit = 1;
437 hwif->drives[i].unmask = (vdev->via_config->flags & VIA_NO_UNMASK) ? 0 : 1;
438 hwif->drives[i].autotune = 1;
439 hwif->drives[i].dn = hwif->channel * 2 + i;
446 hwif->ultra_mask = 0x7f;
447 hwif->mwdma_mask = 0x07;
448 hwif->swdma_mask = 0x07;
450 if (!hwif->udma_four)
451 hwif->udma_four = (vdev->via_80w >> hwif->channel) & 1;
452 hwif->ide_dma_check = &via82cxxx_ide_dma_check;
455 hwif->drives[0].autodma = hwif->autodma;
456 hwif->drives[1].autodma = hwif->autodma;
459 static ide_pci_device_t via82cxxx_chipsets[] __devinitdata = {
462 .init_chipset = init_chipset_via82cxxx,
463 .init_hwif = init_hwif_via82cxxx,
465 .autodma = NOAUTODMA,
466 .enablebits = {{0x40,0x02,0x02}, {0x40,0x01,0x01}},
470 .init_chipset = init_chipset_via82cxxx,
471 .init_hwif = init_hwif_via82cxxx,
474 .enablebits = {{0x00,0x00,0x00}, {0x00,0x00,0x00}},
475 .bootable = ON_BOARD,
479 static int __devinit via_init_one(struct pci_dev *dev, const struct pci_device_id *id)
481 struct pci_dev *isa = NULL;
482 struct via_isa_bridge *via_config;
484 * Find the ISA bridge and check we know what it is.
486 via_config = via_config_find(&isa);
488 if (!via_config->id) {
489 printk(KERN_WARNING "VP_IDE: Unknown VIA SouthBridge, disabling DMA.\n");
492 return ide_setup_pci_device(dev, &via82cxxx_chipsets[id->driver_data]);
495 static struct pci_device_id via_pci_tbl[] = {
496 { PCI_VENDOR_ID_VIA, PCI_DEVICE_ID_VIA_82C576_1, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0},
497 { PCI_VENDOR_ID_VIA, PCI_DEVICE_ID_VIA_82C586_1, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0},
498 { PCI_VENDOR_ID_VIA, PCI_DEVICE_ID_VIA_6410, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 1},
499 { PCI_VENDOR_ID_VIA, PCI_DEVICE_ID_VIA_SATA_EIDE, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 1},
502 MODULE_DEVICE_TABLE(pci, via_pci_tbl);
504 static struct pci_driver driver = {
506 .id_table = via_pci_tbl,
507 .probe = via_init_one,
510 static int __init via_ide_init(void)
512 return ide_pci_register_driver(&driver);
515 module_init(via_ide_init);
517 MODULE_AUTHOR("Vojtech Pavlik, Michel Aubry, Jeff Garzik, Andre Hedrick");
518 MODULE_DESCRIPTION("PCI driver module for VIA IDE");
519 MODULE_LICENSE("GPL");