2 * 3-axis accelerometer driver supporting following Bosch-Sensortec chips:
10 * Copyright (c) 2014, Intel Corporation.
12 * This program is free software; you can redistribute it and/or modify it
13 * under the terms and conditions of the GNU General Public License,
14 * version 2, as published by the Free Software Foundation.
16 * This program is distributed in the hope it will be useful, but WITHOUT
17 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
18 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
22 #include <linux/module.h>
23 #include <linux/i2c.h>
24 #include <linux/interrupt.h>
25 #include <linux/delay.h>
26 #include <linux/slab.h>
27 #include <linux/acpi.h>
28 #include <linux/gpio/consumer.h>
30 #include <linux/pm_runtime.h>
31 #include <linux/iio/iio.h>
32 #include <linux/iio/sysfs.h>
33 #include <linux/iio/buffer.h>
34 #include <linux/iio/events.h>
35 #include <linux/iio/trigger.h>
36 #include <linux/iio/trigger_consumer.h>
37 #include <linux/iio/triggered_buffer.h>
39 #define BMC150_ACCEL_DRV_NAME "bmc150_accel"
40 #define BMC150_ACCEL_IRQ_NAME "bmc150_accel_event"
41 #define BMC150_ACCEL_GPIO_NAME "bmc150_accel_int"
43 #define BMC150_ACCEL_REG_CHIP_ID 0x00
45 #define BMC150_ACCEL_REG_INT_STATUS_2 0x0B
46 #define BMC150_ACCEL_ANY_MOTION_MASK 0x07
47 #define BMC150_ACCEL_ANY_MOTION_BIT_X BIT(0)
48 #define BMC150_ACCEL_ANY_MOTION_BIT_Y BIT(1)
49 #define BMC150_ACCEL_ANY_MOTION_BIT_Z BIT(2)
50 #define BMC150_ACCEL_ANY_MOTION_BIT_SIGN BIT(3)
52 #define BMC150_ACCEL_REG_PMU_LPW 0x11
53 #define BMC150_ACCEL_PMU_MODE_MASK 0xE0
54 #define BMC150_ACCEL_PMU_MODE_SHIFT 5
55 #define BMC150_ACCEL_PMU_BIT_SLEEP_DUR_MASK 0x17
56 #define BMC150_ACCEL_PMU_BIT_SLEEP_DUR_SHIFT 1
58 #define BMC150_ACCEL_REG_PMU_RANGE 0x0F
60 #define BMC150_ACCEL_DEF_RANGE_2G 0x03
61 #define BMC150_ACCEL_DEF_RANGE_4G 0x05
62 #define BMC150_ACCEL_DEF_RANGE_8G 0x08
63 #define BMC150_ACCEL_DEF_RANGE_16G 0x0C
65 /* Default BW: 125Hz */
66 #define BMC150_ACCEL_REG_PMU_BW 0x10
67 #define BMC150_ACCEL_DEF_BW 125
69 #define BMC150_ACCEL_REG_INT_MAP_0 0x19
70 #define BMC150_ACCEL_INT_MAP_0_BIT_SLOPE BIT(2)
72 #define BMC150_ACCEL_REG_INT_MAP_1 0x1A
73 #define BMC150_ACCEL_INT_MAP_1_BIT_DATA BIT(0)
75 #define BMC150_ACCEL_REG_INT_RST_LATCH 0x21
76 #define BMC150_ACCEL_INT_MODE_LATCH_RESET 0x80
77 #define BMC150_ACCEL_INT_MODE_LATCH_INT 0x0F
78 #define BMC150_ACCEL_INT_MODE_NON_LATCH_INT 0x00
80 #define BMC150_ACCEL_REG_INT_EN_0 0x16
81 #define BMC150_ACCEL_INT_EN_BIT_SLP_X BIT(0)
82 #define BMC150_ACCEL_INT_EN_BIT_SLP_Y BIT(1)
83 #define BMC150_ACCEL_INT_EN_BIT_SLP_Z BIT(2)
85 #define BMC150_ACCEL_REG_INT_EN_1 0x17
86 #define BMC150_ACCEL_INT_EN_BIT_DATA_EN BIT(4)
88 #define BMC150_ACCEL_REG_INT_OUT_CTRL 0x20
89 #define BMC150_ACCEL_INT_OUT_CTRL_INT1_LVL BIT(0)
91 #define BMC150_ACCEL_REG_INT_5 0x27
92 #define BMC150_ACCEL_SLOPE_DUR_MASK 0x03
94 #define BMC150_ACCEL_REG_INT_6 0x28
95 #define BMC150_ACCEL_SLOPE_THRES_MASK 0xFF
97 /* Slope duration in terms of number of samples */
98 #define BMC150_ACCEL_DEF_SLOPE_DURATION 1
99 /* in terms of multiples of g's/LSB, based on range */
100 #define BMC150_ACCEL_DEF_SLOPE_THRESHOLD 1
102 #define BMC150_ACCEL_REG_XOUT_L 0x02
104 #define BMC150_ACCEL_MAX_STARTUP_TIME_MS 100
106 /* Sleep Duration values */
107 #define BMC150_ACCEL_SLEEP_500_MICRO 0x05
108 #define BMC150_ACCEL_SLEEP_1_MS 0x06
109 #define BMC150_ACCEL_SLEEP_2_MS 0x07
110 #define BMC150_ACCEL_SLEEP_4_MS 0x08
111 #define BMC150_ACCEL_SLEEP_6_MS 0x09
112 #define BMC150_ACCEL_SLEEP_10_MS 0x0A
113 #define BMC150_ACCEL_SLEEP_25_MS 0x0B
114 #define BMC150_ACCEL_SLEEP_50_MS 0x0C
115 #define BMC150_ACCEL_SLEEP_100_MS 0x0D
116 #define BMC150_ACCEL_SLEEP_500_MS 0x0E
117 #define BMC150_ACCEL_SLEEP_1_SEC 0x0F
119 #define BMC150_ACCEL_REG_TEMP 0x08
120 #define BMC150_ACCEL_TEMP_CENTER_VAL 24
122 #define BMC150_ACCEL_AXIS_TO_REG(axis) (BMC150_ACCEL_REG_XOUT_L + (axis * 2))
123 #define BMC150_AUTO_SUSPEND_DELAY_MS 2000
125 enum bmc150_accel_axis {
131 enum bmc150_power_modes {
132 BMC150_ACCEL_SLEEP_MODE_NORMAL,
133 BMC150_ACCEL_SLEEP_MODE_DEEP_SUSPEND,
134 BMC150_ACCEL_SLEEP_MODE_LPM,
135 BMC150_ACCEL_SLEEP_MODE_SUSPEND = 0x04,
138 struct bmc150_scale_info {
143 struct bmc150_accel_chip_info {
145 const struct iio_chan_spec *channels;
147 const struct bmc150_scale_info scale_table[4];
150 struct bmc150_accel_data {
151 struct i2c_client *client;
152 struct iio_trigger *dready_trig;
153 struct iio_trigger *motion_trig;
161 bool dready_trigger_on;
162 bool motion_trigger_on;
164 const struct bmc150_accel_chip_info *chip_info;
167 static const struct {
171 } bmc150_accel_samp_freq_table[] = { {7, 810000, 0x08},
180 static const struct {
183 } bmc150_accel_sample_upd_time[] = { {0x08, 64},
192 static const struct {
195 } bmc150_accel_sleep_value_table[] = { {0, 0},
196 {500, BMC150_ACCEL_SLEEP_500_MICRO},
197 {1000, BMC150_ACCEL_SLEEP_1_MS},
198 {2000, BMC150_ACCEL_SLEEP_2_MS},
199 {4000, BMC150_ACCEL_SLEEP_4_MS},
200 {6000, BMC150_ACCEL_SLEEP_6_MS},
201 {10000, BMC150_ACCEL_SLEEP_10_MS},
202 {25000, BMC150_ACCEL_SLEEP_25_MS},
203 {50000, BMC150_ACCEL_SLEEP_50_MS},
204 {100000, BMC150_ACCEL_SLEEP_100_MS},
205 {500000, BMC150_ACCEL_SLEEP_500_MS},
206 {1000000, BMC150_ACCEL_SLEEP_1_SEC} };
209 static int bmc150_accel_set_mode(struct bmc150_accel_data *data,
210 enum bmc150_power_modes mode,
219 for (i = 0; i < ARRAY_SIZE(bmc150_accel_sleep_value_table);
221 if (bmc150_accel_sleep_value_table[i].sleep_dur ==
224 bmc150_accel_sleep_value_table[i].reg_value;
232 lpw_bits = mode << BMC150_ACCEL_PMU_MODE_SHIFT;
233 lpw_bits |= (dur_val << BMC150_ACCEL_PMU_BIT_SLEEP_DUR_SHIFT);
235 dev_dbg(&data->client->dev, "Set Mode bits %x\n", lpw_bits);
237 ret = i2c_smbus_write_byte_data(data->client,
238 BMC150_ACCEL_REG_PMU_LPW, lpw_bits);
240 dev_err(&data->client->dev, "Error writing reg_pmu_lpw\n");
247 static int bmc150_accel_set_bw(struct bmc150_accel_data *data, int val,
253 for (i = 0; i < ARRAY_SIZE(bmc150_accel_samp_freq_table); ++i) {
254 if (bmc150_accel_samp_freq_table[i].val == val &&
255 bmc150_accel_samp_freq_table[i].val2 == val2) {
256 ret = i2c_smbus_write_byte_data(
258 BMC150_ACCEL_REG_PMU_BW,
259 bmc150_accel_samp_freq_table[i].bw_bits);
264 bmc150_accel_samp_freq_table[i].bw_bits;
272 static int bmc150_accel_update_slope(struct bmc150_accel_data *data)
276 ret = i2c_smbus_write_byte_data(data->client, BMC150_ACCEL_REG_INT_6,
279 dev_err(&data->client->dev, "Error writing reg_int_6\n");
283 ret = i2c_smbus_read_byte_data(data->client, BMC150_ACCEL_REG_INT_5);
285 dev_err(&data->client->dev, "Error reading reg_int_5\n");
289 val = (ret & ~BMC150_ACCEL_SLOPE_DUR_MASK) | data->slope_dur;
290 ret = i2c_smbus_write_byte_data(data->client, BMC150_ACCEL_REG_INT_5,
293 dev_err(&data->client->dev, "Error write reg_int_5\n");
297 dev_dbg(&data->client->dev, "%s: %x %x\n", __func__, data->slope_thres,
303 static int bmc150_accel_chip_init(struct bmc150_accel_data *data)
307 ret = i2c_smbus_read_byte_data(data->client, BMC150_ACCEL_REG_CHIP_ID);
309 dev_err(&data->client->dev,
310 "Error: Reading chip id\n");
314 dev_dbg(&data->client->dev, "Chip Id %x\n", ret);
315 if (ret != data->chip_info->chip_id) {
316 dev_err(&data->client->dev, "Invalid chip %x\n", ret);
320 ret = bmc150_accel_set_mode(data, BMC150_ACCEL_SLEEP_MODE_NORMAL, 0);
325 ret = bmc150_accel_set_bw(data, BMC150_ACCEL_DEF_BW, 0);
329 /* Set Default Range */
330 ret = i2c_smbus_write_byte_data(data->client,
331 BMC150_ACCEL_REG_PMU_RANGE,
332 BMC150_ACCEL_DEF_RANGE_4G);
334 dev_err(&data->client->dev,
335 "Error writing reg_pmu_range\n");
339 data->range = BMC150_ACCEL_DEF_RANGE_4G;
341 /* Set default slope duration and thresholds */
342 data->slope_thres = BMC150_ACCEL_DEF_SLOPE_THRESHOLD;
343 data->slope_dur = BMC150_ACCEL_DEF_SLOPE_DURATION;
344 ret = bmc150_accel_update_slope(data);
348 /* Set default as latched interrupts */
349 ret = i2c_smbus_write_byte_data(data->client,
350 BMC150_ACCEL_REG_INT_RST_LATCH,
351 BMC150_ACCEL_INT_MODE_LATCH_INT |
352 BMC150_ACCEL_INT_MODE_LATCH_RESET);
354 dev_err(&data->client->dev,
355 "Error writing reg_int_rst_latch\n");
362 static int bmc150_accel_get_bw(struct bmc150_accel_data *data, int *val,
367 for (i = 0; i < ARRAY_SIZE(bmc150_accel_samp_freq_table); ++i) {
368 if (bmc150_accel_samp_freq_table[i].bw_bits == data->bw_bits) {
369 *val = bmc150_accel_samp_freq_table[i].val;
370 *val2 = bmc150_accel_samp_freq_table[i].val2;
371 return IIO_VAL_INT_PLUS_MICRO;
379 static int bmc150_accel_get_startup_times(struct bmc150_accel_data *data)
383 for (i = 0; i < ARRAY_SIZE(bmc150_accel_sample_upd_time); ++i) {
384 if (bmc150_accel_sample_upd_time[i].bw_bits == data->bw_bits)
385 return bmc150_accel_sample_upd_time[i].msec;
388 return BMC150_ACCEL_MAX_STARTUP_TIME_MS;
391 static int bmc150_accel_set_power_state(struct bmc150_accel_data *data, bool on)
396 ret = pm_runtime_get_sync(&data->client->dev);
398 pm_runtime_mark_last_busy(&data->client->dev);
399 ret = pm_runtime_put_autosuspend(&data->client->dev);
402 dev_err(&data->client->dev,
403 "Failed: bmc150_accel_set_power_state for %d\n", on);
405 pm_runtime_put_noidle(&data->client->dev);
413 static int bmc150_accel_set_power_state(struct bmc150_accel_data *data, bool on)
419 static const struct bmc150_accel_interrupt_info {
424 } bmc150_accel_interrupts[] = {
425 { /* data ready interrupt */
426 .map_reg = BMC150_ACCEL_REG_INT_MAP_1,
427 .map_bitmask = BMC150_ACCEL_INT_MAP_1_BIT_DATA,
428 .en_reg = BMC150_ACCEL_REG_INT_EN_1,
429 .en_bitmask = BMC150_ACCEL_INT_EN_BIT_DATA_EN,
431 { /* motion interrupt */
432 .map_reg = BMC150_ACCEL_REG_INT_MAP_0,
433 .map_bitmask = BMC150_ACCEL_INT_MAP_0_BIT_SLOPE,
434 .en_reg = BMC150_ACCEL_REG_INT_EN_0,
435 .en_bitmask = BMC150_ACCEL_INT_EN_BIT_SLP_X |
436 BMC150_ACCEL_INT_EN_BIT_SLP_Y |
437 BMC150_ACCEL_INT_EN_BIT_SLP_Z
441 static int bmc150_accel_set_interrupt(struct bmc150_accel_data *data,
442 const struct bmc150_accel_interrupt_info *info,
448 * We will expect the enable and disable to do operation in
449 * in reverse order. This will happen here anyway as our
450 * resume operation uses sync mode runtime pm calls, the
451 * suspend operation will be delayed by autosuspend delay
452 * So the disable operation will still happen in reverse of
453 * enable operation. When runtime pm is disabled the mode
454 * is always on so sequence doesn't matter
456 ret = bmc150_accel_set_power_state(data, state);
460 /* map the interrupt to the appropriate pins */
461 ret = i2c_smbus_read_byte_data(data->client, info->map_reg);
463 dev_err(&data->client->dev, "Error reading reg_int_map\n");
464 goto out_fix_power_state;
467 ret |= info->map_bitmask;
469 ret &= ~info->map_bitmask;
471 ret = i2c_smbus_write_byte_data(data->client, info->map_reg,
474 dev_err(&data->client->dev, "Error writing reg_int_map\n");
475 goto out_fix_power_state;
478 /* enable/disable the interrupt */
479 ret = i2c_smbus_read_byte_data(data->client, info->en_reg);
481 dev_err(&data->client->dev, "Error reading reg_int_en\n");
482 goto out_fix_power_state;
486 ret |= info->en_bitmask;
488 ret &= ~info->en_bitmask;
490 ret = i2c_smbus_write_byte_data(data->client, info->en_reg, ret);
492 dev_err(&data->client->dev, "Error writing reg_int_en\n");
493 goto out_fix_power_state;
499 bmc150_accel_set_power_state(data, false);
503 static int bmc150_accel_setup_any_motion_interrupt(
504 struct bmc150_accel_data *data,
507 return bmc150_accel_set_interrupt(data, &bmc150_accel_interrupts[1],
511 static int bmc150_accel_setup_new_data_interrupt(struct bmc150_accel_data *data,
514 return bmc150_accel_set_interrupt(data, &bmc150_accel_interrupts[0],
518 static int bmc150_accel_set_scale(struct bmc150_accel_data *data, int val)
522 for (i = 0; i < ARRAY_SIZE(data->chip_info->scale_table); ++i) {
523 if (data->chip_info->scale_table[i].scale == val) {
524 ret = i2c_smbus_write_byte_data(
526 BMC150_ACCEL_REG_PMU_RANGE,
527 data->chip_info->scale_table[i].reg_range);
529 dev_err(&data->client->dev,
530 "Error writing pmu_range\n");
534 data->range = data->chip_info->scale_table[i].reg_range;
542 static int bmc150_accel_get_temp(struct bmc150_accel_data *data, int *val)
546 mutex_lock(&data->mutex);
548 ret = i2c_smbus_read_byte_data(data->client, BMC150_ACCEL_REG_TEMP);
550 dev_err(&data->client->dev, "Error reading reg_temp\n");
551 mutex_unlock(&data->mutex);
554 *val = sign_extend32(ret, 7);
556 mutex_unlock(&data->mutex);
561 static int bmc150_accel_get_axis(struct bmc150_accel_data *data,
562 struct iio_chan_spec const *chan,
566 int axis = chan->scan_index;
568 mutex_lock(&data->mutex);
569 ret = bmc150_accel_set_power_state(data, true);
571 mutex_unlock(&data->mutex);
575 ret = i2c_smbus_read_word_data(data->client,
576 BMC150_ACCEL_AXIS_TO_REG(axis));
578 dev_err(&data->client->dev, "Error reading axis %d\n", axis);
579 bmc150_accel_set_power_state(data, false);
580 mutex_unlock(&data->mutex);
583 *val = sign_extend32(ret >> chan->scan_type.shift,
584 chan->scan_type.realbits - 1);
585 ret = bmc150_accel_set_power_state(data, false);
586 mutex_unlock(&data->mutex);
593 static int bmc150_accel_read_raw(struct iio_dev *indio_dev,
594 struct iio_chan_spec const *chan,
595 int *val, int *val2, long mask)
597 struct bmc150_accel_data *data = iio_priv(indio_dev);
601 case IIO_CHAN_INFO_RAW:
602 switch (chan->type) {
604 return bmc150_accel_get_temp(data, val);
606 if (iio_buffer_enabled(indio_dev))
609 return bmc150_accel_get_axis(data, chan, val);
613 case IIO_CHAN_INFO_OFFSET:
614 if (chan->type == IIO_TEMP) {
615 *val = BMC150_ACCEL_TEMP_CENTER_VAL;
619 case IIO_CHAN_INFO_SCALE:
621 switch (chan->type) {
624 return IIO_VAL_INT_PLUS_MICRO;
628 const struct bmc150_scale_info *si;
629 int st_size = ARRAY_SIZE(data->chip_info->scale_table);
631 for (i = 0; i < st_size; ++i) {
632 si = &data->chip_info->scale_table[i];
633 if (si->reg_range == data->range) {
635 return IIO_VAL_INT_PLUS_MICRO;
643 case IIO_CHAN_INFO_SAMP_FREQ:
644 mutex_lock(&data->mutex);
645 ret = bmc150_accel_get_bw(data, val, val2);
646 mutex_unlock(&data->mutex);
653 static int bmc150_accel_write_raw(struct iio_dev *indio_dev,
654 struct iio_chan_spec const *chan,
655 int val, int val2, long mask)
657 struct bmc150_accel_data *data = iio_priv(indio_dev);
661 case IIO_CHAN_INFO_SAMP_FREQ:
662 mutex_lock(&data->mutex);
663 ret = bmc150_accel_set_bw(data, val, val2);
664 mutex_unlock(&data->mutex);
666 case IIO_CHAN_INFO_SCALE:
670 mutex_lock(&data->mutex);
671 ret = bmc150_accel_set_scale(data, val2);
672 mutex_unlock(&data->mutex);
681 static int bmc150_accel_read_event(struct iio_dev *indio_dev,
682 const struct iio_chan_spec *chan,
683 enum iio_event_type type,
684 enum iio_event_direction dir,
685 enum iio_event_info info,
688 struct bmc150_accel_data *data = iio_priv(indio_dev);
692 case IIO_EV_INFO_VALUE:
693 *val = data->slope_thres;
695 case IIO_EV_INFO_PERIOD:
696 *val = data->slope_dur;
705 static int bmc150_accel_write_event(struct iio_dev *indio_dev,
706 const struct iio_chan_spec *chan,
707 enum iio_event_type type,
708 enum iio_event_direction dir,
709 enum iio_event_info info,
712 struct bmc150_accel_data *data = iio_priv(indio_dev);
714 if (data->ev_enable_state)
718 case IIO_EV_INFO_VALUE:
719 data->slope_thres = val & 0xFF;
721 case IIO_EV_INFO_PERIOD:
722 data->slope_dur = val & BMC150_ACCEL_SLOPE_DUR_MASK;
731 static int bmc150_accel_read_event_config(struct iio_dev *indio_dev,
732 const struct iio_chan_spec *chan,
733 enum iio_event_type type,
734 enum iio_event_direction dir)
737 struct bmc150_accel_data *data = iio_priv(indio_dev);
739 return data->ev_enable_state;
742 static int bmc150_accel_write_event_config(struct iio_dev *indio_dev,
743 const struct iio_chan_spec *chan,
744 enum iio_event_type type,
745 enum iio_event_direction dir,
748 struct bmc150_accel_data *data = iio_priv(indio_dev);
751 if (state == data->ev_enable_state)
754 mutex_lock(&data->mutex);
756 if (!state && data->motion_trigger_on) {
757 data->ev_enable_state = 0;
758 mutex_unlock(&data->mutex);
762 ret = bmc150_accel_setup_any_motion_interrupt(data, state);
764 mutex_unlock(&data->mutex);
768 data->ev_enable_state = state;
769 mutex_unlock(&data->mutex);
774 static int bmc150_accel_validate_trigger(struct iio_dev *indio_dev,
775 struct iio_trigger *trig)
777 struct bmc150_accel_data *data = iio_priv(indio_dev);
779 if (data->dready_trig != trig && data->motion_trig != trig)
785 static IIO_CONST_ATTR_SAMP_FREQ_AVAIL(
786 "7.810000 15.630000 31.250000 62.500000 125 250 500 1000");
788 static struct attribute *bmc150_accel_attributes[] = {
789 &iio_const_attr_sampling_frequency_available.dev_attr.attr,
793 static const struct attribute_group bmc150_accel_attrs_group = {
794 .attrs = bmc150_accel_attributes,
797 static const struct iio_event_spec bmc150_accel_event = {
798 .type = IIO_EV_TYPE_ROC,
799 .dir = IIO_EV_DIR_EITHER,
800 .mask_separate = BIT(IIO_EV_INFO_VALUE) |
801 BIT(IIO_EV_INFO_ENABLE) |
802 BIT(IIO_EV_INFO_PERIOD)
805 #define BMC150_ACCEL_CHANNEL(_axis, bits) { \
808 .channel2 = IIO_MOD_##_axis, \
809 .info_mask_separate = BIT(IIO_CHAN_INFO_RAW), \
810 .info_mask_shared_by_type = BIT(IIO_CHAN_INFO_SCALE) | \
811 BIT(IIO_CHAN_INFO_SAMP_FREQ), \
812 .scan_index = AXIS_##_axis, \
815 .realbits = (bits), \
817 .shift = 16 - (bits), \
819 .event_spec = &bmc150_accel_event, \
820 .num_event_specs = 1 \
823 #define BMC150_ACCEL_CHANNELS(bits) { \
826 .info_mask_separate = BIT(IIO_CHAN_INFO_RAW) | \
827 BIT(IIO_CHAN_INFO_SCALE) | \
828 BIT(IIO_CHAN_INFO_OFFSET), \
831 BMC150_ACCEL_CHANNEL(X, bits), \
832 BMC150_ACCEL_CHANNEL(Y, bits), \
833 BMC150_ACCEL_CHANNEL(Z, bits), \
834 IIO_CHAN_SOFT_TIMESTAMP(3), \
837 static const struct iio_chan_spec bma222e_accel_channels[] =
838 BMC150_ACCEL_CHANNELS(8);
839 static const struct iio_chan_spec bma250e_accel_channels[] =
840 BMC150_ACCEL_CHANNELS(10);
841 static const struct iio_chan_spec bmc150_accel_channels[] =
842 BMC150_ACCEL_CHANNELS(12);
843 static const struct iio_chan_spec bma280_accel_channels[] =
844 BMC150_ACCEL_CHANNELS(14);
855 static const struct bmc150_accel_chip_info bmc150_accel_chip_info_tbl[] = {
858 .channels = bmc150_accel_channels,
859 .num_channels = ARRAY_SIZE(bmc150_accel_channels),
860 .scale_table = { {9610, BMC150_ACCEL_DEF_RANGE_2G},
861 {19122, BMC150_ACCEL_DEF_RANGE_4G},
862 {38344, BMC150_ACCEL_DEF_RANGE_8G},
863 {76590, BMC150_ACCEL_DEF_RANGE_16G} },
867 .channels = bmc150_accel_channels,
868 .num_channels = ARRAY_SIZE(bmc150_accel_channels),
869 .scale_table = { {9610, BMC150_ACCEL_DEF_RANGE_2G},
870 {19122, BMC150_ACCEL_DEF_RANGE_4G},
871 {38344, BMC150_ACCEL_DEF_RANGE_8G},
872 {76590, BMC150_ACCEL_DEF_RANGE_16G} },
876 .channels = bmc150_accel_channels,
877 .num_channels = ARRAY_SIZE(bmc150_accel_channels),
878 .scale_table = { {9610, BMC150_ACCEL_DEF_RANGE_2G},
879 {19122, BMC150_ACCEL_DEF_RANGE_4G},
880 {38344, BMC150_ACCEL_DEF_RANGE_8G},
881 {76590, BMC150_ACCEL_DEF_RANGE_16G} },
885 .channels = bma250e_accel_channels,
886 .num_channels = ARRAY_SIZE(bma250e_accel_channels),
887 .scale_table = { {38344, BMC150_ACCEL_DEF_RANGE_2G},
888 {76590, BMC150_ACCEL_DEF_RANGE_4G},
889 {153277, BMC150_ACCEL_DEF_RANGE_8G},
890 {306457, BMC150_ACCEL_DEF_RANGE_16G} },
894 .channels = bma222e_accel_channels,
895 .num_channels = ARRAY_SIZE(bma222e_accel_channels),
896 .scale_table = { {153277, BMC150_ACCEL_DEF_RANGE_2G},
897 {306457, BMC150_ACCEL_DEF_RANGE_4G},
898 {612915, BMC150_ACCEL_DEF_RANGE_8G},
899 {1225831, BMC150_ACCEL_DEF_RANGE_16G} },
903 .channels = bma280_accel_channels,
904 .num_channels = ARRAY_SIZE(bma280_accel_channels),
905 .scale_table = { {2392, BMC150_ACCEL_DEF_RANGE_2G},
906 {4785, BMC150_ACCEL_DEF_RANGE_4G},
907 {9581, BMC150_ACCEL_DEF_RANGE_8G},
908 {19152, BMC150_ACCEL_DEF_RANGE_16G} },
912 static const struct iio_info bmc150_accel_info = {
913 .attrs = &bmc150_accel_attrs_group,
914 .read_raw = bmc150_accel_read_raw,
915 .write_raw = bmc150_accel_write_raw,
916 .read_event_value = bmc150_accel_read_event,
917 .write_event_value = bmc150_accel_write_event,
918 .write_event_config = bmc150_accel_write_event_config,
919 .read_event_config = bmc150_accel_read_event_config,
920 .validate_trigger = bmc150_accel_validate_trigger,
921 .driver_module = THIS_MODULE,
924 static irqreturn_t bmc150_accel_trigger_handler(int irq, void *p)
926 struct iio_poll_func *pf = p;
927 struct iio_dev *indio_dev = pf->indio_dev;
928 struct bmc150_accel_data *data = iio_priv(indio_dev);
931 mutex_lock(&data->mutex);
932 for_each_set_bit(bit, indio_dev->buffer->scan_mask,
933 indio_dev->masklength) {
934 ret = i2c_smbus_read_word_data(data->client,
935 BMC150_ACCEL_AXIS_TO_REG(bit));
937 mutex_unlock(&data->mutex);
940 data->buffer[i++] = ret;
942 mutex_unlock(&data->mutex);
944 iio_push_to_buffers_with_timestamp(indio_dev, data->buffer,
947 iio_trigger_notify_done(indio_dev->trig);
952 static int bmc150_accel_trig_try_reen(struct iio_trigger *trig)
954 struct iio_dev *indio_dev = iio_trigger_get_drvdata(trig);
955 struct bmc150_accel_data *data = iio_priv(indio_dev);
958 /* new data interrupts don't need ack */
959 if (data->dready_trigger_on)
962 mutex_lock(&data->mutex);
963 /* clear any latched interrupt */
964 ret = i2c_smbus_write_byte_data(data->client,
965 BMC150_ACCEL_REG_INT_RST_LATCH,
966 BMC150_ACCEL_INT_MODE_LATCH_INT |
967 BMC150_ACCEL_INT_MODE_LATCH_RESET);
968 mutex_unlock(&data->mutex);
970 dev_err(&data->client->dev,
971 "Error writing reg_int_rst_latch\n");
978 static int bmc150_accel_data_rdy_trigger_set_state(struct iio_trigger *trig,
981 struct iio_dev *indio_dev = iio_trigger_get_drvdata(trig);
982 struct bmc150_accel_data *data = iio_priv(indio_dev);
985 mutex_lock(&data->mutex);
987 if (data->motion_trig == trig) {
988 if (data->motion_trigger_on == state) {
989 mutex_unlock(&data->mutex);
993 if (data->dready_trigger_on == state) {
994 mutex_unlock(&data->mutex);
999 if (!state && data->ev_enable_state && data->motion_trigger_on) {
1000 data->motion_trigger_on = false;
1001 mutex_unlock(&data->mutex);
1005 if (data->motion_trig == trig) {
1006 ret = bmc150_accel_update_slope(data);
1008 ret = bmc150_accel_setup_any_motion_interrupt(data,
1011 ret = bmc150_accel_setup_new_data_interrupt(data, state);
1014 mutex_unlock(&data->mutex);
1017 if (data->motion_trig == trig)
1018 data->motion_trigger_on = state;
1020 data->dready_trigger_on = state;
1022 mutex_unlock(&data->mutex);
1027 static const struct iio_trigger_ops bmc150_accel_trigger_ops = {
1028 .set_trigger_state = bmc150_accel_data_rdy_trigger_set_state,
1029 .try_reenable = bmc150_accel_trig_try_reen,
1030 .owner = THIS_MODULE,
1033 static irqreturn_t bmc150_accel_event_handler(int irq, void *private)
1035 struct iio_dev *indio_dev = private;
1036 struct bmc150_accel_data *data = iio_priv(indio_dev);
1040 ret = i2c_smbus_read_byte_data(data->client,
1041 BMC150_ACCEL_REG_INT_STATUS_2);
1043 dev_err(&data->client->dev, "Error reading reg_int_status_2\n");
1044 goto ack_intr_status;
1047 if (ret & BMC150_ACCEL_ANY_MOTION_BIT_SIGN)
1048 dir = IIO_EV_DIR_FALLING;
1050 dir = IIO_EV_DIR_RISING;
1052 if (ret & BMC150_ACCEL_ANY_MOTION_BIT_X)
1053 iio_push_event(indio_dev, IIO_MOD_EVENT_CODE(IIO_ACCEL,
1059 if (ret & BMC150_ACCEL_ANY_MOTION_BIT_Y)
1060 iio_push_event(indio_dev, IIO_MOD_EVENT_CODE(IIO_ACCEL,
1066 if (ret & BMC150_ACCEL_ANY_MOTION_BIT_Z)
1067 iio_push_event(indio_dev, IIO_MOD_EVENT_CODE(IIO_ACCEL,
1074 if (!data->dready_trigger_on)
1075 ret = i2c_smbus_write_byte_data(data->client,
1076 BMC150_ACCEL_REG_INT_RST_LATCH,
1077 BMC150_ACCEL_INT_MODE_LATCH_INT |
1078 BMC150_ACCEL_INT_MODE_LATCH_RESET);
1083 static irqreturn_t bmc150_accel_data_rdy_trig_poll(int irq, void *private)
1085 struct iio_dev *indio_dev = private;
1086 struct bmc150_accel_data *data = iio_priv(indio_dev);
1088 data->timestamp = iio_get_time_ns();
1090 if (data->dready_trigger_on)
1091 iio_trigger_poll(data->dready_trig);
1092 else if (data->motion_trigger_on)
1093 iio_trigger_poll(data->motion_trig);
1095 if (data->ev_enable_state)
1096 return IRQ_WAKE_THREAD;
1101 static const char *bmc150_accel_match_acpi_device(struct device *dev, int *data)
1103 const struct acpi_device_id *id;
1105 id = acpi_match_device(dev->driver->acpi_match_table, dev);
1110 *data = (int) id->driver_data;
1112 return dev_name(dev);
1115 static int bmc150_accel_gpio_probe(struct i2c_client *client,
1116 struct bmc150_accel_data *data)
1119 struct gpio_desc *gpio;
1127 /* data ready gpio interrupt pin */
1128 gpio = devm_gpiod_get_index(dev, BMC150_ACCEL_GPIO_NAME, 0, GPIOD_IN);
1130 dev_err(dev, "Failed: gpio get index\n");
1131 return PTR_ERR(gpio);
1134 ret = gpiod_to_irq(gpio);
1136 dev_dbg(dev, "GPIO resource, no:%d irq:%d\n", desc_to_gpio(gpio), ret);
1141 static int bmc150_accel_probe(struct i2c_client *client,
1142 const struct i2c_device_id *id)
1144 struct bmc150_accel_data *data;
1145 struct iio_dev *indio_dev;
1147 const char *name = NULL;
1150 indio_dev = devm_iio_device_alloc(&client->dev, sizeof(*data));
1154 data = iio_priv(indio_dev);
1155 i2c_set_clientdata(client, indio_dev);
1156 data->client = client;
1160 chip_id = id->driver_data;
1163 if (ACPI_HANDLE(&client->dev))
1164 name = bmc150_accel_match_acpi_device(&client->dev, &chip_id);
1166 data->chip_info = &bmc150_accel_chip_info_tbl[chip_id];
1168 ret = bmc150_accel_chip_init(data);
1172 mutex_init(&data->mutex);
1174 indio_dev->dev.parent = &client->dev;
1175 indio_dev->channels = data->chip_info->channels;
1176 indio_dev->num_channels = data->chip_info->num_channels;
1177 indio_dev->name = name;
1178 indio_dev->modes = INDIO_DIRECT_MODE;
1179 indio_dev->info = &bmc150_accel_info;
1181 if (client->irq < 0)
1182 client->irq = bmc150_accel_gpio_probe(client, data);
1184 if (client->irq >= 0) {
1185 ret = devm_request_threaded_irq(
1186 &client->dev, client->irq,
1187 bmc150_accel_data_rdy_trig_poll,
1188 bmc150_accel_event_handler,
1189 IRQF_TRIGGER_RISING,
1190 BMC150_ACCEL_IRQ_NAME,
1196 * Set latched mode interrupt. While certain interrupts are
1197 * non-latched regardless of this settings (e.g. new data) we
1198 * want to use latch mode when we can to prevent interrupt
1201 ret = i2c_smbus_write_byte_data(data->client,
1202 BMC150_ACCEL_REG_INT_RST_LATCH,
1203 BMC150_ACCEL_INT_MODE_LATCH_RESET);
1205 dev_err(&data->client->dev, "Error writing reg_int_rst_latch\n");
1209 data->dready_trig = devm_iio_trigger_alloc(&client->dev,
1213 if (!data->dready_trig)
1216 data->motion_trig = devm_iio_trigger_alloc(&client->dev,
1217 "%s-any-motion-dev%d",
1220 if (!data->motion_trig)
1223 data->dready_trig->dev.parent = &client->dev;
1224 data->dready_trig->ops = &bmc150_accel_trigger_ops;
1225 iio_trigger_set_drvdata(data->dready_trig, indio_dev);
1226 ret = iio_trigger_register(data->dready_trig);
1230 data->motion_trig->dev.parent = &client->dev;
1231 data->motion_trig->ops = &bmc150_accel_trigger_ops;
1232 iio_trigger_set_drvdata(data->motion_trig, indio_dev);
1233 ret = iio_trigger_register(data->motion_trig);
1235 data->motion_trig = NULL;
1236 goto err_trigger_unregister;
1239 ret = iio_triggered_buffer_setup(indio_dev,
1240 &iio_pollfunc_store_time,
1241 bmc150_accel_trigger_handler,
1244 dev_err(&client->dev,
1245 "Failed: iio triggered buffer setup\n");
1246 goto err_trigger_unregister;
1250 ret = iio_device_register(indio_dev);
1252 dev_err(&client->dev, "Unable to register iio device\n");
1253 goto err_buffer_cleanup;
1256 ret = pm_runtime_set_active(&client->dev);
1258 goto err_iio_unregister;
1260 pm_runtime_enable(&client->dev);
1261 pm_runtime_set_autosuspend_delay(&client->dev,
1262 BMC150_AUTO_SUSPEND_DELAY_MS);
1263 pm_runtime_use_autosuspend(&client->dev);
1268 iio_device_unregister(indio_dev);
1270 if (data->dready_trig)
1271 iio_triggered_buffer_cleanup(indio_dev);
1272 err_trigger_unregister:
1273 if (data->dready_trig)
1274 iio_trigger_unregister(data->dready_trig);
1275 if (data->motion_trig)
1276 iio_trigger_unregister(data->motion_trig);
1281 static int bmc150_accel_remove(struct i2c_client *client)
1283 struct iio_dev *indio_dev = i2c_get_clientdata(client);
1284 struct bmc150_accel_data *data = iio_priv(indio_dev);
1286 pm_runtime_disable(&client->dev);
1287 pm_runtime_set_suspended(&client->dev);
1288 pm_runtime_put_noidle(&client->dev);
1290 iio_device_unregister(indio_dev);
1292 if (data->dready_trig) {
1293 iio_triggered_buffer_cleanup(indio_dev);
1294 iio_trigger_unregister(data->dready_trig);
1295 iio_trigger_unregister(data->motion_trig);
1298 mutex_lock(&data->mutex);
1299 bmc150_accel_set_mode(data, BMC150_ACCEL_SLEEP_MODE_DEEP_SUSPEND, 0);
1300 mutex_unlock(&data->mutex);
1305 #ifdef CONFIG_PM_SLEEP
1306 static int bmc150_accel_suspend(struct device *dev)
1308 struct iio_dev *indio_dev = i2c_get_clientdata(to_i2c_client(dev));
1309 struct bmc150_accel_data *data = iio_priv(indio_dev);
1311 mutex_lock(&data->mutex);
1312 bmc150_accel_set_mode(data, BMC150_ACCEL_SLEEP_MODE_SUSPEND, 0);
1313 mutex_unlock(&data->mutex);
1318 static int bmc150_accel_resume(struct device *dev)
1320 struct iio_dev *indio_dev = i2c_get_clientdata(to_i2c_client(dev));
1321 struct bmc150_accel_data *data = iio_priv(indio_dev);
1323 mutex_lock(&data->mutex);
1324 if (data->dready_trigger_on || data->motion_trigger_on ||
1325 data->ev_enable_state)
1326 bmc150_accel_set_mode(data, BMC150_ACCEL_SLEEP_MODE_NORMAL, 0);
1327 mutex_unlock(&data->mutex);
1334 static int bmc150_accel_runtime_suspend(struct device *dev)
1336 struct iio_dev *indio_dev = i2c_get_clientdata(to_i2c_client(dev));
1337 struct bmc150_accel_data *data = iio_priv(indio_dev);
1340 dev_dbg(&data->client->dev, __func__);
1341 ret = bmc150_accel_set_mode(data, BMC150_ACCEL_SLEEP_MODE_SUSPEND, 0);
1348 static int bmc150_accel_runtime_resume(struct device *dev)
1350 struct iio_dev *indio_dev = i2c_get_clientdata(to_i2c_client(dev));
1351 struct bmc150_accel_data *data = iio_priv(indio_dev);
1355 dev_dbg(&data->client->dev, __func__);
1357 ret = bmc150_accel_set_mode(data, BMC150_ACCEL_SLEEP_MODE_NORMAL, 0);
1361 sleep_val = bmc150_accel_get_startup_times(data);
1363 usleep_range(sleep_val * 1000, 20000);
1365 msleep_interruptible(sleep_val);
1371 static const struct dev_pm_ops bmc150_accel_pm_ops = {
1372 SET_SYSTEM_SLEEP_PM_OPS(bmc150_accel_suspend, bmc150_accel_resume)
1373 SET_RUNTIME_PM_OPS(bmc150_accel_runtime_suspend,
1374 bmc150_accel_runtime_resume, NULL)
1377 static const struct acpi_device_id bmc150_accel_acpi_match[] = {
1378 {"BSBA0150", bmc150},
1379 {"BMC150A", bmc150},
1380 {"BMI055A", bmi055},
1381 {"BMA0255", bma255},
1382 {"BMA250E", bma250e},
1383 {"BMA222E", bma222e},
1384 {"BMA0280", bma280},
1387 MODULE_DEVICE_TABLE(acpi, bmc150_accel_acpi_match);
1389 static const struct i2c_device_id bmc150_accel_id[] = {
1390 {"bmc150_accel", bmc150},
1391 {"bmi055_accel", bmi055},
1393 {"bma250e", bma250e},
1394 {"bma222e", bma222e},
1399 MODULE_DEVICE_TABLE(i2c, bmc150_accel_id);
1401 static struct i2c_driver bmc150_accel_driver = {
1403 .name = BMC150_ACCEL_DRV_NAME,
1404 .acpi_match_table = ACPI_PTR(bmc150_accel_acpi_match),
1405 .pm = &bmc150_accel_pm_ops,
1407 .probe = bmc150_accel_probe,
1408 .remove = bmc150_accel_remove,
1409 .id_table = bmc150_accel_id,
1411 module_i2c_driver(bmc150_accel_driver);
1413 MODULE_AUTHOR("Srinivas Pandruvada <srinivas.pandruvada@linux.intel.com>");
1414 MODULE_LICENSE("GPL v2");
1415 MODULE_DESCRIPTION("BMC150 accelerometer driver");