iio: improve usage of gpiod API
[firefly-linux-kernel-4.4.55.git] / drivers / iio / accel / bmc150-accel.c
1 /*
2  * 3-axis accelerometer driver supporting following Bosch-Sensortec chips:
3  *  - BMC150
4  *  - BMI055
5  *  - BMA255
6  *  - BMA250E
7  *  - BMA222E
8  *  - BMA280
9  *
10  * Copyright (c) 2014, Intel Corporation.
11  *
12  * This program is free software; you can redistribute it and/or modify it
13  * under the terms and conditions of the GNU General Public License,
14  * version 2, as published by the Free Software Foundation.
15  *
16  * This program is distributed in the hope it will be useful, but WITHOUT
17  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
18  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
19  * more details.
20  */
21
22 #include <linux/module.h>
23 #include <linux/i2c.h>
24 #include <linux/interrupt.h>
25 #include <linux/delay.h>
26 #include <linux/slab.h>
27 #include <linux/acpi.h>
28 #include <linux/gpio/consumer.h>
29 #include <linux/pm.h>
30 #include <linux/pm_runtime.h>
31 #include <linux/iio/iio.h>
32 #include <linux/iio/sysfs.h>
33 #include <linux/iio/buffer.h>
34 #include <linux/iio/events.h>
35 #include <linux/iio/trigger.h>
36 #include <linux/iio/trigger_consumer.h>
37 #include <linux/iio/triggered_buffer.h>
38
39 #define BMC150_ACCEL_DRV_NAME                   "bmc150_accel"
40 #define BMC150_ACCEL_IRQ_NAME                   "bmc150_accel_event"
41 #define BMC150_ACCEL_GPIO_NAME                  "bmc150_accel_int"
42
43 #define BMC150_ACCEL_REG_CHIP_ID                0x00
44
45 #define BMC150_ACCEL_REG_INT_STATUS_2           0x0B
46 #define BMC150_ACCEL_ANY_MOTION_MASK            0x07
47 #define BMC150_ACCEL_ANY_MOTION_BIT_X           BIT(0)
48 #define BMC150_ACCEL_ANY_MOTION_BIT_Y           BIT(1)
49 #define BMC150_ACCEL_ANY_MOTION_BIT_Z           BIT(2)
50 #define BMC150_ACCEL_ANY_MOTION_BIT_SIGN        BIT(3)
51
52 #define BMC150_ACCEL_REG_PMU_LPW                0x11
53 #define BMC150_ACCEL_PMU_MODE_MASK              0xE0
54 #define BMC150_ACCEL_PMU_MODE_SHIFT             5
55 #define BMC150_ACCEL_PMU_BIT_SLEEP_DUR_MASK     0x17
56 #define BMC150_ACCEL_PMU_BIT_SLEEP_DUR_SHIFT    1
57
58 #define BMC150_ACCEL_REG_PMU_RANGE              0x0F
59
60 #define BMC150_ACCEL_DEF_RANGE_2G               0x03
61 #define BMC150_ACCEL_DEF_RANGE_4G               0x05
62 #define BMC150_ACCEL_DEF_RANGE_8G               0x08
63 #define BMC150_ACCEL_DEF_RANGE_16G              0x0C
64
65 /* Default BW: 125Hz */
66 #define BMC150_ACCEL_REG_PMU_BW         0x10
67 #define BMC150_ACCEL_DEF_BW                     125
68
69 #define BMC150_ACCEL_REG_INT_MAP_0              0x19
70 #define BMC150_ACCEL_INT_MAP_0_BIT_SLOPE        BIT(2)
71
72 #define BMC150_ACCEL_REG_INT_MAP_1              0x1A
73 #define BMC150_ACCEL_INT_MAP_1_BIT_DATA BIT(0)
74
75 #define BMC150_ACCEL_REG_INT_RST_LATCH          0x21
76 #define BMC150_ACCEL_INT_MODE_LATCH_RESET       0x80
77 #define BMC150_ACCEL_INT_MODE_LATCH_INT 0x0F
78 #define BMC150_ACCEL_INT_MODE_NON_LATCH_INT     0x00
79
80 #define BMC150_ACCEL_REG_INT_EN_0               0x16
81 #define BMC150_ACCEL_INT_EN_BIT_SLP_X           BIT(0)
82 #define BMC150_ACCEL_INT_EN_BIT_SLP_Y           BIT(1)
83 #define BMC150_ACCEL_INT_EN_BIT_SLP_Z           BIT(2)
84
85 #define BMC150_ACCEL_REG_INT_EN_1               0x17
86 #define BMC150_ACCEL_INT_EN_BIT_DATA_EN BIT(4)
87
88 #define BMC150_ACCEL_REG_INT_OUT_CTRL           0x20
89 #define BMC150_ACCEL_INT_OUT_CTRL_INT1_LVL      BIT(0)
90
91 #define BMC150_ACCEL_REG_INT_5                  0x27
92 #define BMC150_ACCEL_SLOPE_DUR_MASK             0x03
93
94 #define BMC150_ACCEL_REG_INT_6                  0x28
95 #define BMC150_ACCEL_SLOPE_THRES_MASK           0xFF
96
97 /* Slope duration in terms of number of samples */
98 #define BMC150_ACCEL_DEF_SLOPE_DURATION         1
99 /* in terms of multiples of g's/LSB, based on range */
100 #define BMC150_ACCEL_DEF_SLOPE_THRESHOLD        1
101
102 #define BMC150_ACCEL_REG_XOUT_L         0x02
103
104 #define BMC150_ACCEL_MAX_STARTUP_TIME_MS        100
105
106 /* Sleep Duration values */
107 #define BMC150_ACCEL_SLEEP_500_MICRO            0x05
108 #define BMC150_ACCEL_SLEEP_1_MS         0x06
109 #define BMC150_ACCEL_SLEEP_2_MS         0x07
110 #define BMC150_ACCEL_SLEEP_4_MS         0x08
111 #define BMC150_ACCEL_SLEEP_6_MS         0x09
112 #define BMC150_ACCEL_SLEEP_10_MS                0x0A
113 #define BMC150_ACCEL_SLEEP_25_MS                0x0B
114 #define BMC150_ACCEL_SLEEP_50_MS                0x0C
115 #define BMC150_ACCEL_SLEEP_100_MS               0x0D
116 #define BMC150_ACCEL_SLEEP_500_MS               0x0E
117 #define BMC150_ACCEL_SLEEP_1_SEC                0x0F
118
119 #define BMC150_ACCEL_REG_TEMP                   0x08
120 #define BMC150_ACCEL_TEMP_CENTER_VAL            24
121
122 #define BMC150_ACCEL_AXIS_TO_REG(axis)  (BMC150_ACCEL_REG_XOUT_L + (axis * 2))
123 #define BMC150_AUTO_SUSPEND_DELAY_MS            2000
124
125 enum bmc150_accel_axis {
126         AXIS_X,
127         AXIS_Y,
128         AXIS_Z,
129 };
130
131 enum bmc150_power_modes {
132         BMC150_ACCEL_SLEEP_MODE_NORMAL,
133         BMC150_ACCEL_SLEEP_MODE_DEEP_SUSPEND,
134         BMC150_ACCEL_SLEEP_MODE_LPM,
135         BMC150_ACCEL_SLEEP_MODE_SUSPEND = 0x04,
136 };
137
138 struct bmc150_scale_info {
139         int scale;
140         u8 reg_range;
141 };
142
143 struct bmc150_accel_chip_info {
144         u8 chip_id;
145         const struct iio_chan_spec *channels;
146         int num_channels;
147         const struct bmc150_scale_info scale_table[4];
148 };
149
150 struct bmc150_accel_data {
151         struct i2c_client *client;
152         struct iio_trigger *dready_trig;
153         struct iio_trigger *motion_trig;
154         struct mutex mutex;
155         s16 buffer[8];
156         u8 bw_bits;
157         u32 slope_dur;
158         u32 slope_thres;
159         u32 range;
160         int ev_enable_state;
161         bool dready_trigger_on;
162         bool motion_trigger_on;
163         int64_t timestamp;
164         const struct bmc150_accel_chip_info *chip_info;
165 };
166
167 static const struct {
168         int val;
169         int val2;
170         u8 bw_bits;
171 } bmc150_accel_samp_freq_table[] = { {7, 810000, 0x08},
172                                      {15, 630000, 0x09},
173                                      {31, 250000, 0x0A},
174                                      {62, 500000, 0x0B},
175                                      {125, 0, 0x0C},
176                                      {250, 0, 0x0D},
177                                      {500, 0, 0x0E},
178                                      {1000, 0, 0x0F} };
179
180 static const struct {
181         int bw_bits;
182         int msec;
183 } bmc150_accel_sample_upd_time[] = { {0x08, 64},
184                                      {0x09, 32},
185                                      {0x0A, 16},
186                                      {0x0B, 8},
187                                      {0x0C, 4},
188                                      {0x0D, 2},
189                                      {0x0E, 1},
190                                      {0x0F, 1} };
191
192 static const struct {
193         int sleep_dur;
194         u8 reg_value;
195 } bmc150_accel_sleep_value_table[] = { {0, 0},
196                                        {500, BMC150_ACCEL_SLEEP_500_MICRO},
197                                        {1000, BMC150_ACCEL_SLEEP_1_MS},
198                                        {2000, BMC150_ACCEL_SLEEP_2_MS},
199                                        {4000, BMC150_ACCEL_SLEEP_4_MS},
200                                        {6000, BMC150_ACCEL_SLEEP_6_MS},
201                                        {10000, BMC150_ACCEL_SLEEP_10_MS},
202                                        {25000, BMC150_ACCEL_SLEEP_25_MS},
203                                        {50000, BMC150_ACCEL_SLEEP_50_MS},
204                                        {100000, BMC150_ACCEL_SLEEP_100_MS},
205                                        {500000, BMC150_ACCEL_SLEEP_500_MS},
206                                        {1000000, BMC150_ACCEL_SLEEP_1_SEC} };
207
208
209 static int bmc150_accel_set_mode(struct bmc150_accel_data *data,
210                                  enum bmc150_power_modes mode,
211                                  int dur_us)
212 {
213         int i;
214         int ret;
215         u8 lpw_bits;
216         int dur_val = -1;
217
218         if (dur_us > 0) {
219                 for (i = 0; i < ARRAY_SIZE(bmc150_accel_sleep_value_table);
220                                                                          ++i) {
221                         if (bmc150_accel_sleep_value_table[i].sleep_dur ==
222                                                                         dur_us)
223                                 dur_val =
224                                 bmc150_accel_sleep_value_table[i].reg_value;
225                 }
226         } else
227                 dur_val = 0;
228
229         if (dur_val < 0)
230                 return -EINVAL;
231
232         lpw_bits = mode << BMC150_ACCEL_PMU_MODE_SHIFT;
233         lpw_bits |= (dur_val << BMC150_ACCEL_PMU_BIT_SLEEP_DUR_SHIFT);
234
235         dev_dbg(&data->client->dev, "Set Mode bits %x\n", lpw_bits);
236
237         ret = i2c_smbus_write_byte_data(data->client,
238                                         BMC150_ACCEL_REG_PMU_LPW, lpw_bits);
239         if (ret < 0) {
240                 dev_err(&data->client->dev, "Error writing reg_pmu_lpw\n");
241                 return ret;
242         }
243
244         return 0;
245 }
246
247 static int bmc150_accel_set_bw(struct bmc150_accel_data *data, int val,
248                                int val2)
249 {
250         int i;
251         int ret;
252
253         for (i = 0; i < ARRAY_SIZE(bmc150_accel_samp_freq_table); ++i) {
254                 if (bmc150_accel_samp_freq_table[i].val == val &&
255                                 bmc150_accel_samp_freq_table[i].val2 == val2) {
256                         ret = i2c_smbus_write_byte_data(
257                                 data->client,
258                                 BMC150_ACCEL_REG_PMU_BW,
259                                 bmc150_accel_samp_freq_table[i].bw_bits);
260                         if (ret < 0)
261                                 return ret;
262
263                         data->bw_bits =
264                                 bmc150_accel_samp_freq_table[i].bw_bits;
265                         return 0;
266                 }
267         }
268
269         return -EINVAL;
270 }
271
272 static int bmc150_accel_update_slope(struct bmc150_accel_data *data)
273 {
274         int ret, val;
275
276         ret = i2c_smbus_write_byte_data(data->client, BMC150_ACCEL_REG_INT_6,
277                                         data->slope_thres);
278         if (ret < 0) {
279                 dev_err(&data->client->dev, "Error writing reg_int_6\n");
280                 return ret;
281         }
282
283         ret = i2c_smbus_read_byte_data(data->client, BMC150_ACCEL_REG_INT_5);
284         if (ret < 0) {
285                 dev_err(&data->client->dev, "Error reading reg_int_5\n");
286                 return ret;
287         }
288
289         val = (ret & ~BMC150_ACCEL_SLOPE_DUR_MASK) | data->slope_dur;
290         ret = i2c_smbus_write_byte_data(data->client, BMC150_ACCEL_REG_INT_5,
291                                         val);
292         if (ret < 0) {
293                 dev_err(&data->client->dev, "Error write reg_int_5\n");
294                 return ret;
295         }
296
297         dev_dbg(&data->client->dev, "%s: %x %x\n", __func__, data->slope_thres,
298                 data->slope_dur);
299
300         return ret;
301 }
302
303 static int bmc150_accel_chip_init(struct bmc150_accel_data *data)
304 {
305         int ret;
306
307         ret = i2c_smbus_read_byte_data(data->client, BMC150_ACCEL_REG_CHIP_ID);
308         if (ret < 0) {
309                 dev_err(&data->client->dev,
310                         "Error: Reading chip id\n");
311                 return ret;
312         }
313
314         dev_dbg(&data->client->dev, "Chip Id %x\n", ret);
315         if (ret != data->chip_info->chip_id) {
316                 dev_err(&data->client->dev, "Invalid chip %x\n", ret);
317                 return -ENODEV;
318         }
319
320         ret = bmc150_accel_set_mode(data, BMC150_ACCEL_SLEEP_MODE_NORMAL, 0);
321         if (ret < 0)
322                 return ret;
323
324         /* Set Bandwidth */
325         ret = bmc150_accel_set_bw(data, BMC150_ACCEL_DEF_BW, 0);
326         if (ret < 0)
327                 return ret;
328
329         /* Set Default Range */
330         ret = i2c_smbus_write_byte_data(data->client,
331                                         BMC150_ACCEL_REG_PMU_RANGE,
332                                         BMC150_ACCEL_DEF_RANGE_4G);
333         if (ret < 0) {
334                 dev_err(&data->client->dev,
335                                         "Error writing reg_pmu_range\n");
336                 return ret;
337         }
338
339         data->range = BMC150_ACCEL_DEF_RANGE_4G;
340
341         /* Set default slope duration and thresholds */
342         data->slope_thres = BMC150_ACCEL_DEF_SLOPE_THRESHOLD;
343         data->slope_dur = BMC150_ACCEL_DEF_SLOPE_DURATION;
344         ret = bmc150_accel_update_slope(data);
345         if (ret < 0)
346                 return ret;
347
348         /* Set default as latched interrupts */
349         ret = i2c_smbus_write_byte_data(data->client,
350                                         BMC150_ACCEL_REG_INT_RST_LATCH,
351                                         BMC150_ACCEL_INT_MODE_LATCH_INT |
352                                         BMC150_ACCEL_INT_MODE_LATCH_RESET);
353         if (ret < 0) {
354                 dev_err(&data->client->dev,
355                         "Error writing reg_int_rst_latch\n");
356                 return ret;
357         }
358
359         return 0;
360 }
361
362 static int bmc150_accel_get_bw(struct bmc150_accel_data *data, int *val,
363                                int *val2)
364 {
365         int i;
366
367         for (i = 0; i < ARRAY_SIZE(bmc150_accel_samp_freq_table); ++i) {
368                 if (bmc150_accel_samp_freq_table[i].bw_bits == data->bw_bits) {
369                         *val = bmc150_accel_samp_freq_table[i].val;
370                         *val2 = bmc150_accel_samp_freq_table[i].val2;
371                         return IIO_VAL_INT_PLUS_MICRO;
372                 }
373         }
374
375         return -EINVAL;
376 }
377
378 #ifdef CONFIG_PM
379 static int bmc150_accel_get_startup_times(struct bmc150_accel_data *data)
380 {
381         int i;
382
383         for (i = 0; i < ARRAY_SIZE(bmc150_accel_sample_upd_time); ++i) {
384                 if (bmc150_accel_sample_upd_time[i].bw_bits == data->bw_bits)
385                         return bmc150_accel_sample_upd_time[i].msec;
386         }
387
388         return BMC150_ACCEL_MAX_STARTUP_TIME_MS;
389 }
390
391 static int bmc150_accel_set_power_state(struct bmc150_accel_data *data, bool on)
392 {
393         int ret;
394
395         if (on)
396                 ret = pm_runtime_get_sync(&data->client->dev);
397         else {
398                 pm_runtime_mark_last_busy(&data->client->dev);
399                 ret = pm_runtime_put_autosuspend(&data->client->dev);
400         }
401         if (ret < 0) {
402                 dev_err(&data->client->dev,
403                         "Failed: bmc150_accel_set_power_state for %d\n", on);
404                 if (on)
405                         pm_runtime_put_noidle(&data->client->dev);
406
407                 return ret;
408         }
409
410         return 0;
411 }
412 #else
413 static int bmc150_accel_set_power_state(struct bmc150_accel_data *data, bool on)
414 {
415         return 0;
416 }
417 #endif
418
419 static const struct bmc150_accel_interrupt_info {
420         u8 map_reg;
421         u8 map_bitmask;
422         u8 en_reg;
423         u8 en_bitmask;
424 } bmc150_accel_interrupts[] = {
425         { /* data ready interrupt */
426                 .map_reg = BMC150_ACCEL_REG_INT_MAP_1,
427                 .map_bitmask = BMC150_ACCEL_INT_MAP_1_BIT_DATA,
428                 .en_reg = BMC150_ACCEL_REG_INT_EN_1,
429                 .en_bitmask = BMC150_ACCEL_INT_EN_BIT_DATA_EN,
430         },
431         {  /* motion interrupt */
432                 .map_reg = BMC150_ACCEL_REG_INT_MAP_0,
433                 .map_bitmask = BMC150_ACCEL_INT_MAP_0_BIT_SLOPE,
434                 .en_reg = BMC150_ACCEL_REG_INT_EN_0,
435                 .en_bitmask =  BMC150_ACCEL_INT_EN_BIT_SLP_X |
436                         BMC150_ACCEL_INT_EN_BIT_SLP_Y |
437                         BMC150_ACCEL_INT_EN_BIT_SLP_Z
438         },
439 };
440
441 static int bmc150_accel_set_interrupt(struct bmc150_accel_data *data,
442                                 const struct bmc150_accel_interrupt_info *info,
443                                       bool state)
444 {
445         int ret;
446
447         /*
448          * We will expect the enable and disable to do operation in
449          * in reverse order. This will happen here anyway as our
450          * resume operation uses sync mode runtime pm calls, the
451          * suspend operation will be delayed by autosuspend delay
452          * So the disable operation will still happen in reverse of
453          * enable operation. When runtime pm is disabled the mode
454          * is always on so sequence doesn't matter
455          */
456         ret = bmc150_accel_set_power_state(data, state);
457         if (ret < 0)
458                 return ret;
459
460         /* map the interrupt to the appropriate pins */
461         ret = i2c_smbus_read_byte_data(data->client, info->map_reg);
462         if (ret < 0) {
463                 dev_err(&data->client->dev, "Error reading reg_int_map\n");
464                 goto out_fix_power_state;
465         }
466         if (state)
467                 ret |= info->map_bitmask;
468         else
469                 ret &= ~info->map_bitmask;
470
471         ret = i2c_smbus_write_byte_data(data->client, info->map_reg,
472                                         ret);
473         if (ret < 0) {
474                 dev_err(&data->client->dev, "Error writing reg_int_map\n");
475                 goto out_fix_power_state;
476         }
477
478         /* enable/disable the interrupt */
479         ret = i2c_smbus_read_byte_data(data->client, info->en_reg);
480         if (ret < 0) {
481                 dev_err(&data->client->dev, "Error reading reg_int_en\n");
482                 goto out_fix_power_state;
483         }
484
485         if (state)
486                 ret |= info->en_bitmask;
487         else
488                 ret &= ~info->en_bitmask;
489
490         ret = i2c_smbus_write_byte_data(data->client, info->en_reg, ret);
491         if (ret < 0) {
492                 dev_err(&data->client->dev, "Error writing reg_int_en\n");
493                 goto out_fix_power_state;
494         }
495
496         return 0;
497
498 out_fix_power_state:
499         bmc150_accel_set_power_state(data, false);
500         return ret;
501 }
502
503 static int bmc150_accel_setup_any_motion_interrupt(
504                                         struct bmc150_accel_data *data,
505                                         bool status)
506 {
507         return bmc150_accel_set_interrupt(data, &bmc150_accel_interrupts[1],
508                                           status);
509 }
510
511 static int bmc150_accel_setup_new_data_interrupt(struct bmc150_accel_data *data,
512                                                  bool status)
513 {
514         return bmc150_accel_set_interrupt(data, &bmc150_accel_interrupts[0],
515                                           status);
516 }
517
518 static int bmc150_accel_set_scale(struct bmc150_accel_data *data, int val)
519 {
520         int ret, i;
521
522         for (i = 0; i < ARRAY_SIZE(data->chip_info->scale_table); ++i) {
523                 if (data->chip_info->scale_table[i].scale == val) {
524                         ret = i2c_smbus_write_byte_data(
525                                      data->client,
526                                      BMC150_ACCEL_REG_PMU_RANGE,
527                                      data->chip_info->scale_table[i].reg_range);
528                         if (ret < 0) {
529                                 dev_err(&data->client->dev,
530                                         "Error writing pmu_range\n");
531                                 return ret;
532                         }
533
534                         data->range = data->chip_info->scale_table[i].reg_range;
535                         return 0;
536                 }
537         }
538
539         return -EINVAL;
540 }
541
542 static int bmc150_accel_get_temp(struct bmc150_accel_data *data, int *val)
543 {
544         int ret;
545
546         mutex_lock(&data->mutex);
547
548         ret = i2c_smbus_read_byte_data(data->client, BMC150_ACCEL_REG_TEMP);
549         if (ret < 0) {
550                 dev_err(&data->client->dev, "Error reading reg_temp\n");
551                 mutex_unlock(&data->mutex);
552                 return ret;
553         }
554         *val = sign_extend32(ret, 7);
555
556         mutex_unlock(&data->mutex);
557
558         return IIO_VAL_INT;
559 }
560
561 static int bmc150_accel_get_axis(struct bmc150_accel_data *data,
562                                  struct iio_chan_spec const *chan,
563                                  int *val)
564 {
565         int ret;
566         int axis = chan->scan_index;
567
568         mutex_lock(&data->mutex);
569         ret = bmc150_accel_set_power_state(data, true);
570         if (ret < 0) {
571                 mutex_unlock(&data->mutex);
572                 return ret;
573         }
574
575         ret = i2c_smbus_read_word_data(data->client,
576                                        BMC150_ACCEL_AXIS_TO_REG(axis));
577         if (ret < 0) {
578                 dev_err(&data->client->dev, "Error reading axis %d\n", axis);
579                 bmc150_accel_set_power_state(data, false);
580                 mutex_unlock(&data->mutex);
581                 return ret;
582         }
583         *val = sign_extend32(ret >> chan->scan_type.shift,
584                              chan->scan_type.realbits - 1);
585         ret = bmc150_accel_set_power_state(data, false);
586         mutex_unlock(&data->mutex);
587         if (ret < 0)
588                 return ret;
589
590         return IIO_VAL_INT;
591 }
592
593 static int bmc150_accel_read_raw(struct iio_dev *indio_dev,
594                                  struct iio_chan_spec const *chan,
595                                  int *val, int *val2, long mask)
596 {
597         struct bmc150_accel_data *data = iio_priv(indio_dev);
598         int ret;
599
600         switch (mask) {
601         case IIO_CHAN_INFO_RAW:
602                 switch (chan->type) {
603                 case IIO_TEMP:
604                         return bmc150_accel_get_temp(data, val);
605                 case IIO_ACCEL:
606                         if (iio_buffer_enabled(indio_dev))
607                                 return -EBUSY;
608                         else
609                                 return bmc150_accel_get_axis(data, chan, val);
610                 default:
611                         return -EINVAL;
612                 }
613         case IIO_CHAN_INFO_OFFSET:
614                 if (chan->type == IIO_TEMP) {
615                         *val = BMC150_ACCEL_TEMP_CENTER_VAL;
616                         return IIO_VAL_INT;
617                 } else
618                         return -EINVAL;
619         case IIO_CHAN_INFO_SCALE:
620                 *val = 0;
621                 switch (chan->type) {
622                 case IIO_TEMP:
623                         *val2 = 500000;
624                         return IIO_VAL_INT_PLUS_MICRO;
625                 case IIO_ACCEL:
626                 {
627                         int i;
628                         const struct bmc150_scale_info *si;
629                         int st_size = ARRAY_SIZE(data->chip_info->scale_table);
630
631                         for (i = 0; i < st_size; ++i) {
632                                 si = &data->chip_info->scale_table[i];
633                                 if (si->reg_range == data->range) {
634                                         *val2 = si->scale;
635                                         return IIO_VAL_INT_PLUS_MICRO;
636                                 }
637                         }
638                         return -EINVAL;
639                 }
640                 default:
641                         return -EINVAL;
642                 }
643         case IIO_CHAN_INFO_SAMP_FREQ:
644                 mutex_lock(&data->mutex);
645                 ret = bmc150_accel_get_bw(data, val, val2);
646                 mutex_unlock(&data->mutex);
647                 return ret;
648         default:
649                 return -EINVAL;
650         }
651 }
652
653 static int bmc150_accel_write_raw(struct iio_dev *indio_dev,
654                                   struct iio_chan_spec const *chan,
655                                   int val, int val2, long mask)
656 {
657         struct bmc150_accel_data *data = iio_priv(indio_dev);
658         int ret;
659
660         switch (mask) {
661         case IIO_CHAN_INFO_SAMP_FREQ:
662                 mutex_lock(&data->mutex);
663                 ret = bmc150_accel_set_bw(data, val, val2);
664                 mutex_unlock(&data->mutex);
665                 break;
666         case IIO_CHAN_INFO_SCALE:
667                 if (val)
668                         return -EINVAL;
669
670                 mutex_lock(&data->mutex);
671                 ret = bmc150_accel_set_scale(data, val2);
672                 mutex_unlock(&data->mutex);
673                 return ret;
674         default:
675                 ret = -EINVAL;
676         }
677
678         return ret;
679 }
680
681 static int bmc150_accel_read_event(struct iio_dev *indio_dev,
682                                    const struct iio_chan_spec *chan,
683                                    enum iio_event_type type,
684                                    enum iio_event_direction dir,
685                                    enum iio_event_info info,
686                                    int *val, int *val2)
687 {
688         struct bmc150_accel_data *data = iio_priv(indio_dev);
689
690         *val2 = 0;
691         switch (info) {
692         case IIO_EV_INFO_VALUE:
693                 *val = data->slope_thres;
694                 break;
695         case IIO_EV_INFO_PERIOD:
696                 *val = data->slope_dur;
697                 break;
698         default:
699                 return -EINVAL;
700         }
701
702         return IIO_VAL_INT;
703 }
704
705 static int bmc150_accel_write_event(struct iio_dev *indio_dev,
706                                     const struct iio_chan_spec *chan,
707                                     enum iio_event_type type,
708                                     enum iio_event_direction dir,
709                                     enum iio_event_info info,
710                                     int val, int val2)
711 {
712         struct bmc150_accel_data *data = iio_priv(indio_dev);
713
714         if (data->ev_enable_state)
715                 return -EBUSY;
716
717         switch (info) {
718         case IIO_EV_INFO_VALUE:
719                 data->slope_thres = val & 0xFF;
720                 break;
721         case IIO_EV_INFO_PERIOD:
722                 data->slope_dur = val & BMC150_ACCEL_SLOPE_DUR_MASK;
723                 break;
724         default:
725                 return -EINVAL;
726         }
727
728         return 0;
729 }
730
731 static int bmc150_accel_read_event_config(struct iio_dev *indio_dev,
732                                           const struct iio_chan_spec *chan,
733                                           enum iio_event_type type,
734                                           enum iio_event_direction dir)
735 {
736
737         struct bmc150_accel_data *data = iio_priv(indio_dev);
738
739         return data->ev_enable_state;
740 }
741
742 static int bmc150_accel_write_event_config(struct iio_dev *indio_dev,
743                                            const struct iio_chan_spec *chan,
744                                            enum iio_event_type type,
745                                            enum iio_event_direction dir,
746                                            int state)
747 {
748         struct bmc150_accel_data *data = iio_priv(indio_dev);
749         int ret;
750
751         if (state == data->ev_enable_state)
752                 return 0;
753
754         mutex_lock(&data->mutex);
755
756         if (!state && data->motion_trigger_on) {
757                 data->ev_enable_state = 0;
758                 mutex_unlock(&data->mutex);
759                 return 0;
760         }
761
762         ret =  bmc150_accel_setup_any_motion_interrupt(data, state);
763         if (ret < 0) {
764                 mutex_unlock(&data->mutex);
765                 return ret;
766         }
767
768         data->ev_enable_state = state;
769         mutex_unlock(&data->mutex);
770
771         return 0;
772 }
773
774 static int bmc150_accel_validate_trigger(struct iio_dev *indio_dev,
775                                    struct iio_trigger *trig)
776 {
777         struct bmc150_accel_data *data = iio_priv(indio_dev);
778
779         if (data->dready_trig != trig && data->motion_trig != trig)
780                 return -EINVAL;
781
782         return 0;
783 }
784
785 static IIO_CONST_ATTR_SAMP_FREQ_AVAIL(
786                 "7.810000 15.630000 31.250000 62.500000 125 250 500 1000");
787
788 static struct attribute *bmc150_accel_attributes[] = {
789         &iio_const_attr_sampling_frequency_available.dev_attr.attr,
790         NULL,
791 };
792
793 static const struct attribute_group bmc150_accel_attrs_group = {
794         .attrs = bmc150_accel_attributes,
795 };
796
797 static const struct iio_event_spec bmc150_accel_event = {
798                 .type = IIO_EV_TYPE_ROC,
799                 .dir = IIO_EV_DIR_EITHER,
800                 .mask_separate = BIT(IIO_EV_INFO_VALUE) |
801                                  BIT(IIO_EV_INFO_ENABLE) |
802                                  BIT(IIO_EV_INFO_PERIOD)
803 };
804
805 #define BMC150_ACCEL_CHANNEL(_axis, bits) {                             \
806         .type = IIO_ACCEL,                                              \
807         .modified = 1,                                                  \
808         .channel2 = IIO_MOD_##_axis,                                    \
809         .info_mask_separate = BIT(IIO_CHAN_INFO_RAW),                   \
810         .info_mask_shared_by_type = BIT(IIO_CHAN_INFO_SCALE) |          \
811                                 BIT(IIO_CHAN_INFO_SAMP_FREQ),           \
812         .scan_index = AXIS_##_axis,                                     \
813         .scan_type = {                                                  \
814                 .sign = 's',                                            \
815                 .realbits = (bits),                                     \
816                 .storagebits = 16,                                      \
817                 .shift = 16 - (bits),                                   \
818         },                                                              \
819         .event_spec = &bmc150_accel_event,                              \
820         .num_event_specs = 1                                            \
821 }
822
823 #define BMC150_ACCEL_CHANNELS(bits) {                                   \
824         {                                                               \
825                 .type = IIO_TEMP,                                       \
826                 .info_mask_separate = BIT(IIO_CHAN_INFO_RAW) |          \
827                                       BIT(IIO_CHAN_INFO_SCALE) |        \
828                                       BIT(IIO_CHAN_INFO_OFFSET),        \
829                 .scan_index = -1,                                       \
830         },                                                              \
831         BMC150_ACCEL_CHANNEL(X, bits),                                  \
832         BMC150_ACCEL_CHANNEL(Y, bits),                                  \
833         BMC150_ACCEL_CHANNEL(Z, bits),                                  \
834         IIO_CHAN_SOFT_TIMESTAMP(3),                                     \
835 }
836
837 static const struct iio_chan_spec bma222e_accel_channels[] =
838         BMC150_ACCEL_CHANNELS(8);
839 static const struct iio_chan_spec bma250e_accel_channels[] =
840         BMC150_ACCEL_CHANNELS(10);
841 static const struct iio_chan_spec bmc150_accel_channels[] =
842         BMC150_ACCEL_CHANNELS(12);
843 static const struct iio_chan_spec bma280_accel_channels[] =
844         BMC150_ACCEL_CHANNELS(14);
845
846 enum {
847         bmc150,
848         bmi055,
849         bma255,
850         bma250e,
851         bma222e,
852         bma280,
853 };
854
855 static const struct bmc150_accel_chip_info bmc150_accel_chip_info_tbl[] = {
856         [bmc150] = {
857                 .chip_id = 0xFA,
858                 .channels = bmc150_accel_channels,
859                 .num_channels = ARRAY_SIZE(bmc150_accel_channels),
860                 .scale_table = { {9610, BMC150_ACCEL_DEF_RANGE_2G},
861                                  {19122, BMC150_ACCEL_DEF_RANGE_4G},
862                                  {38344, BMC150_ACCEL_DEF_RANGE_8G},
863                                  {76590, BMC150_ACCEL_DEF_RANGE_16G} },
864         },
865         [bmi055] = {
866                 .chip_id = 0xFA,
867                 .channels = bmc150_accel_channels,
868                 .num_channels = ARRAY_SIZE(bmc150_accel_channels),
869                 .scale_table = { {9610, BMC150_ACCEL_DEF_RANGE_2G},
870                                  {19122, BMC150_ACCEL_DEF_RANGE_4G},
871                                  {38344, BMC150_ACCEL_DEF_RANGE_8G},
872                                  {76590, BMC150_ACCEL_DEF_RANGE_16G} },
873         },
874         [bma255] = {
875                 .chip_id = 0xFA,
876                 .channels = bmc150_accel_channels,
877                 .num_channels = ARRAY_SIZE(bmc150_accel_channels),
878                 .scale_table = { {9610, BMC150_ACCEL_DEF_RANGE_2G},
879                                  {19122, BMC150_ACCEL_DEF_RANGE_4G},
880                                  {38344, BMC150_ACCEL_DEF_RANGE_8G},
881                                  {76590, BMC150_ACCEL_DEF_RANGE_16G} },
882         },
883         [bma250e] = {
884                 .chip_id = 0xF9,
885                 .channels = bma250e_accel_channels,
886                 .num_channels = ARRAY_SIZE(bma250e_accel_channels),
887                 .scale_table = { {38344, BMC150_ACCEL_DEF_RANGE_2G},
888                                  {76590, BMC150_ACCEL_DEF_RANGE_4G},
889                                  {153277, BMC150_ACCEL_DEF_RANGE_8G},
890                                  {306457, BMC150_ACCEL_DEF_RANGE_16G} },
891         },
892         [bma222e] = {
893                 .chip_id = 0xF8,
894                 .channels = bma222e_accel_channels,
895                 .num_channels = ARRAY_SIZE(bma222e_accel_channels),
896                 .scale_table = { {153277, BMC150_ACCEL_DEF_RANGE_2G},
897                                  {306457, BMC150_ACCEL_DEF_RANGE_4G},
898                                  {612915, BMC150_ACCEL_DEF_RANGE_8G},
899                                  {1225831, BMC150_ACCEL_DEF_RANGE_16G} },
900         },
901         [bma280] = {
902                 .chip_id = 0xFB,
903                 .channels = bma280_accel_channels,
904                 .num_channels = ARRAY_SIZE(bma280_accel_channels),
905                 .scale_table = { {2392, BMC150_ACCEL_DEF_RANGE_2G},
906                                  {4785, BMC150_ACCEL_DEF_RANGE_4G},
907                                  {9581, BMC150_ACCEL_DEF_RANGE_8G},
908                                  {19152, BMC150_ACCEL_DEF_RANGE_16G} },
909         },
910 };
911
912 static const struct iio_info bmc150_accel_info = {
913         .attrs                  = &bmc150_accel_attrs_group,
914         .read_raw               = bmc150_accel_read_raw,
915         .write_raw              = bmc150_accel_write_raw,
916         .read_event_value       = bmc150_accel_read_event,
917         .write_event_value      = bmc150_accel_write_event,
918         .write_event_config     = bmc150_accel_write_event_config,
919         .read_event_config      = bmc150_accel_read_event_config,
920         .validate_trigger       = bmc150_accel_validate_trigger,
921         .driver_module          = THIS_MODULE,
922 };
923
924 static irqreturn_t bmc150_accel_trigger_handler(int irq, void *p)
925 {
926         struct iio_poll_func *pf = p;
927         struct iio_dev *indio_dev = pf->indio_dev;
928         struct bmc150_accel_data *data = iio_priv(indio_dev);
929         int bit, ret, i = 0;
930
931         mutex_lock(&data->mutex);
932         for_each_set_bit(bit, indio_dev->buffer->scan_mask,
933                          indio_dev->masklength) {
934                 ret = i2c_smbus_read_word_data(data->client,
935                                                BMC150_ACCEL_AXIS_TO_REG(bit));
936                 if (ret < 0) {
937                         mutex_unlock(&data->mutex);
938                         goto err_read;
939                 }
940                 data->buffer[i++] = ret;
941         }
942         mutex_unlock(&data->mutex);
943
944         iio_push_to_buffers_with_timestamp(indio_dev, data->buffer,
945                                            data->timestamp);
946 err_read:
947         iio_trigger_notify_done(indio_dev->trig);
948
949         return IRQ_HANDLED;
950 }
951
952 static int bmc150_accel_trig_try_reen(struct iio_trigger *trig)
953 {
954         struct iio_dev *indio_dev = iio_trigger_get_drvdata(trig);
955         struct bmc150_accel_data *data = iio_priv(indio_dev);
956         int ret;
957
958         /* new data interrupts don't need ack */
959         if (data->dready_trigger_on)
960                 return 0;
961
962         mutex_lock(&data->mutex);
963         /* clear any latched interrupt */
964         ret = i2c_smbus_write_byte_data(data->client,
965                                         BMC150_ACCEL_REG_INT_RST_LATCH,
966                                         BMC150_ACCEL_INT_MODE_LATCH_INT |
967                                         BMC150_ACCEL_INT_MODE_LATCH_RESET);
968         mutex_unlock(&data->mutex);
969         if (ret < 0) {
970                 dev_err(&data->client->dev,
971                         "Error writing reg_int_rst_latch\n");
972                 return ret;
973         }
974
975         return 0;
976 }
977
978 static int bmc150_accel_data_rdy_trigger_set_state(struct iio_trigger *trig,
979                                                    bool state)
980 {
981         struct iio_dev *indio_dev = iio_trigger_get_drvdata(trig);
982         struct bmc150_accel_data *data = iio_priv(indio_dev);
983         int ret;
984
985         mutex_lock(&data->mutex);
986
987         if (data->motion_trig == trig) {
988                 if (data->motion_trigger_on == state) {
989                         mutex_unlock(&data->mutex);
990                         return 0;
991                 }
992         } else {
993                 if (data->dready_trigger_on == state) {
994                         mutex_unlock(&data->mutex);
995                         return 0;
996                 }
997         }
998
999         if (!state && data->ev_enable_state && data->motion_trigger_on) {
1000                 data->motion_trigger_on = false;
1001                 mutex_unlock(&data->mutex);
1002                 return 0;
1003         }
1004
1005         if (data->motion_trig == trig) {
1006                 ret = bmc150_accel_update_slope(data);
1007                 if (!ret)
1008                         ret = bmc150_accel_setup_any_motion_interrupt(data,
1009                                                                       state);
1010         } else {
1011                 ret = bmc150_accel_setup_new_data_interrupt(data, state);
1012         }
1013         if (ret < 0) {
1014                 mutex_unlock(&data->mutex);
1015                 return ret;
1016         }
1017         if (data->motion_trig == trig)
1018                 data->motion_trigger_on = state;
1019         else
1020                 data->dready_trigger_on = state;
1021
1022         mutex_unlock(&data->mutex);
1023
1024         return ret;
1025 }
1026
1027 static const struct iio_trigger_ops bmc150_accel_trigger_ops = {
1028         .set_trigger_state = bmc150_accel_data_rdy_trigger_set_state,
1029         .try_reenable = bmc150_accel_trig_try_reen,
1030         .owner = THIS_MODULE,
1031 };
1032
1033 static irqreturn_t bmc150_accel_event_handler(int irq, void *private)
1034 {
1035         struct iio_dev *indio_dev = private;
1036         struct bmc150_accel_data *data = iio_priv(indio_dev);
1037         int ret;
1038         int dir;
1039
1040         ret = i2c_smbus_read_byte_data(data->client,
1041                                        BMC150_ACCEL_REG_INT_STATUS_2);
1042         if (ret < 0) {
1043                 dev_err(&data->client->dev, "Error reading reg_int_status_2\n");
1044                 goto ack_intr_status;
1045         }
1046
1047         if (ret & BMC150_ACCEL_ANY_MOTION_BIT_SIGN)
1048                 dir = IIO_EV_DIR_FALLING;
1049         else
1050                 dir = IIO_EV_DIR_RISING;
1051
1052         if (ret & BMC150_ACCEL_ANY_MOTION_BIT_X)
1053                 iio_push_event(indio_dev, IIO_MOD_EVENT_CODE(IIO_ACCEL,
1054                                                         0,
1055                                                         IIO_MOD_X,
1056                                                         IIO_EV_TYPE_ROC,
1057                                                         dir),
1058                                                         data->timestamp);
1059         if (ret & BMC150_ACCEL_ANY_MOTION_BIT_Y)
1060                 iio_push_event(indio_dev, IIO_MOD_EVENT_CODE(IIO_ACCEL,
1061                                                         0,
1062                                                         IIO_MOD_Y,
1063                                                         IIO_EV_TYPE_ROC,
1064                                                         dir),
1065                                                         data->timestamp);
1066         if (ret & BMC150_ACCEL_ANY_MOTION_BIT_Z)
1067                 iio_push_event(indio_dev, IIO_MOD_EVENT_CODE(IIO_ACCEL,
1068                                                         0,
1069                                                         IIO_MOD_Z,
1070                                                         IIO_EV_TYPE_ROC,
1071                                                         dir),
1072                                                         data->timestamp);
1073 ack_intr_status:
1074         if (!data->dready_trigger_on)
1075                 ret = i2c_smbus_write_byte_data(data->client,
1076                                         BMC150_ACCEL_REG_INT_RST_LATCH,
1077                                         BMC150_ACCEL_INT_MODE_LATCH_INT |
1078                                         BMC150_ACCEL_INT_MODE_LATCH_RESET);
1079
1080         return IRQ_HANDLED;
1081 }
1082
1083 static irqreturn_t bmc150_accel_data_rdy_trig_poll(int irq, void *private)
1084 {
1085         struct iio_dev *indio_dev = private;
1086         struct bmc150_accel_data *data = iio_priv(indio_dev);
1087
1088         data->timestamp = iio_get_time_ns();
1089
1090         if (data->dready_trigger_on)
1091                 iio_trigger_poll(data->dready_trig);
1092         else if (data->motion_trigger_on)
1093                 iio_trigger_poll(data->motion_trig);
1094
1095         if (data->ev_enable_state)
1096                 return IRQ_WAKE_THREAD;
1097         else
1098                 return IRQ_HANDLED;
1099 }
1100
1101 static const char *bmc150_accel_match_acpi_device(struct device *dev, int *data)
1102 {
1103         const struct acpi_device_id *id;
1104
1105         id = acpi_match_device(dev->driver->acpi_match_table, dev);
1106
1107         if (!id)
1108                 return NULL;
1109
1110         *data = (int) id->driver_data;
1111
1112         return dev_name(dev);
1113 }
1114
1115 static int bmc150_accel_gpio_probe(struct i2c_client *client,
1116                                         struct bmc150_accel_data *data)
1117 {
1118         struct device *dev;
1119         struct gpio_desc *gpio;
1120         int ret;
1121
1122         if (!client)
1123                 return -EINVAL;
1124
1125         dev = &client->dev;
1126
1127         /* data ready gpio interrupt pin */
1128         gpio = devm_gpiod_get_index(dev, BMC150_ACCEL_GPIO_NAME, 0, GPIOD_IN);
1129         if (IS_ERR(gpio)) {
1130                 dev_err(dev, "Failed: gpio get index\n");
1131                 return PTR_ERR(gpio);
1132         }
1133
1134         ret = gpiod_to_irq(gpio);
1135
1136         dev_dbg(dev, "GPIO resource, no:%d irq:%d\n", desc_to_gpio(gpio), ret);
1137
1138         return ret;
1139 }
1140
1141 static int bmc150_accel_probe(struct i2c_client *client,
1142                               const struct i2c_device_id *id)
1143 {
1144         struct bmc150_accel_data *data;
1145         struct iio_dev *indio_dev;
1146         int ret;
1147         const char *name = NULL;
1148         int chip_id = 0;
1149
1150         indio_dev = devm_iio_device_alloc(&client->dev, sizeof(*data));
1151         if (!indio_dev)
1152                 return -ENOMEM;
1153
1154         data = iio_priv(indio_dev);
1155         i2c_set_clientdata(client, indio_dev);
1156         data->client = client;
1157
1158         if (id) {
1159                 name = id->name;
1160                 chip_id = id->driver_data;
1161         }
1162
1163         if (ACPI_HANDLE(&client->dev))
1164                 name = bmc150_accel_match_acpi_device(&client->dev, &chip_id);
1165
1166         data->chip_info = &bmc150_accel_chip_info_tbl[chip_id];
1167
1168         ret = bmc150_accel_chip_init(data);
1169         if (ret < 0)
1170                 return ret;
1171
1172         mutex_init(&data->mutex);
1173
1174         indio_dev->dev.parent = &client->dev;
1175         indio_dev->channels = data->chip_info->channels;
1176         indio_dev->num_channels = data->chip_info->num_channels;
1177         indio_dev->name = name;
1178         indio_dev->modes = INDIO_DIRECT_MODE;
1179         indio_dev->info = &bmc150_accel_info;
1180
1181         if (client->irq < 0)
1182                 client->irq = bmc150_accel_gpio_probe(client, data);
1183
1184         if (client->irq >= 0) {
1185                 ret = devm_request_threaded_irq(
1186                                                 &client->dev, client->irq,
1187                                                 bmc150_accel_data_rdy_trig_poll,
1188                                                 bmc150_accel_event_handler,
1189                                                 IRQF_TRIGGER_RISING,
1190                                                 BMC150_ACCEL_IRQ_NAME,
1191                                                 indio_dev);
1192                 if (ret)
1193                         return ret;
1194
1195                 /*
1196                  * Set latched mode interrupt. While certain interrupts are
1197                  * non-latched regardless of this settings (e.g. new data) we
1198                  * want to use latch mode when we can to prevent interrupt
1199                  * flooding.
1200                  */
1201                 ret = i2c_smbus_write_byte_data(data->client,
1202                                                 BMC150_ACCEL_REG_INT_RST_LATCH,
1203                                              BMC150_ACCEL_INT_MODE_LATCH_RESET);
1204                 if (ret < 0) {
1205                         dev_err(&data->client->dev, "Error writing reg_int_rst_latch\n");
1206                         return ret;
1207                 }
1208
1209                 data->dready_trig = devm_iio_trigger_alloc(&client->dev,
1210                                                            "%s-dev%d",
1211                                                            indio_dev->name,
1212                                                            indio_dev->id);
1213                 if (!data->dready_trig)
1214                         return -ENOMEM;
1215
1216                 data->motion_trig = devm_iio_trigger_alloc(&client->dev,
1217                                                           "%s-any-motion-dev%d",
1218                                                           indio_dev->name,
1219                                                           indio_dev->id);
1220                 if (!data->motion_trig)
1221                         return -ENOMEM;
1222
1223                 data->dready_trig->dev.parent = &client->dev;
1224                 data->dready_trig->ops = &bmc150_accel_trigger_ops;
1225                 iio_trigger_set_drvdata(data->dready_trig, indio_dev);
1226                 ret = iio_trigger_register(data->dready_trig);
1227                 if (ret)
1228                         return ret;
1229
1230                 data->motion_trig->dev.parent = &client->dev;
1231                 data->motion_trig->ops = &bmc150_accel_trigger_ops;
1232                 iio_trigger_set_drvdata(data->motion_trig, indio_dev);
1233                 ret = iio_trigger_register(data->motion_trig);
1234                 if (ret) {
1235                         data->motion_trig = NULL;
1236                         goto err_trigger_unregister;
1237                 }
1238
1239                 ret = iio_triggered_buffer_setup(indio_dev,
1240                                                  &iio_pollfunc_store_time,
1241                                                  bmc150_accel_trigger_handler,
1242                                                  NULL);
1243                 if (ret < 0) {
1244                         dev_err(&client->dev,
1245                                 "Failed: iio triggered buffer setup\n");
1246                         goto err_trigger_unregister;
1247                 }
1248         }
1249
1250         ret = iio_device_register(indio_dev);
1251         if (ret < 0) {
1252                 dev_err(&client->dev, "Unable to register iio device\n");
1253                 goto err_buffer_cleanup;
1254         }
1255
1256         ret = pm_runtime_set_active(&client->dev);
1257         if (ret)
1258                 goto err_iio_unregister;
1259
1260         pm_runtime_enable(&client->dev);
1261         pm_runtime_set_autosuspend_delay(&client->dev,
1262                                          BMC150_AUTO_SUSPEND_DELAY_MS);
1263         pm_runtime_use_autosuspend(&client->dev);
1264
1265         return 0;
1266
1267 err_iio_unregister:
1268         iio_device_unregister(indio_dev);
1269 err_buffer_cleanup:
1270         if (data->dready_trig)
1271                 iio_triggered_buffer_cleanup(indio_dev);
1272 err_trigger_unregister:
1273         if (data->dready_trig)
1274                 iio_trigger_unregister(data->dready_trig);
1275         if (data->motion_trig)
1276                 iio_trigger_unregister(data->motion_trig);
1277
1278         return ret;
1279 }
1280
1281 static int bmc150_accel_remove(struct i2c_client *client)
1282 {
1283         struct iio_dev *indio_dev = i2c_get_clientdata(client);
1284         struct bmc150_accel_data *data = iio_priv(indio_dev);
1285
1286         pm_runtime_disable(&client->dev);
1287         pm_runtime_set_suspended(&client->dev);
1288         pm_runtime_put_noidle(&client->dev);
1289
1290         iio_device_unregister(indio_dev);
1291
1292         if (data->dready_trig) {
1293                 iio_triggered_buffer_cleanup(indio_dev);
1294                 iio_trigger_unregister(data->dready_trig);
1295                 iio_trigger_unregister(data->motion_trig);
1296         }
1297
1298         mutex_lock(&data->mutex);
1299         bmc150_accel_set_mode(data, BMC150_ACCEL_SLEEP_MODE_DEEP_SUSPEND, 0);
1300         mutex_unlock(&data->mutex);
1301
1302         return 0;
1303 }
1304
1305 #ifdef CONFIG_PM_SLEEP
1306 static int bmc150_accel_suspend(struct device *dev)
1307 {
1308         struct iio_dev *indio_dev = i2c_get_clientdata(to_i2c_client(dev));
1309         struct bmc150_accel_data *data = iio_priv(indio_dev);
1310
1311         mutex_lock(&data->mutex);
1312         bmc150_accel_set_mode(data, BMC150_ACCEL_SLEEP_MODE_SUSPEND, 0);
1313         mutex_unlock(&data->mutex);
1314
1315         return 0;
1316 }
1317
1318 static int bmc150_accel_resume(struct device *dev)
1319 {
1320         struct iio_dev *indio_dev = i2c_get_clientdata(to_i2c_client(dev));
1321         struct bmc150_accel_data *data = iio_priv(indio_dev);
1322
1323         mutex_lock(&data->mutex);
1324         if (data->dready_trigger_on || data->motion_trigger_on ||
1325                                                         data->ev_enable_state)
1326                 bmc150_accel_set_mode(data, BMC150_ACCEL_SLEEP_MODE_NORMAL, 0);
1327         mutex_unlock(&data->mutex);
1328
1329         return 0;
1330 }
1331 #endif
1332
1333 #ifdef CONFIG_PM
1334 static int bmc150_accel_runtime_suspend(struct device *dev)
1335 {
1336         struct iio_dev *indio_dev = i2c_get_clientdata(to_i2c_client(dev));
1337         struct bmc150_accel_data *data = iio_priv(indio_dev);
1338         int ret;
1339
1340         dev_dbg(&data->client->dev,  __func__);
1341         ret = bmc150_accel_set_mode(data, BMC150_ACCEL_SLEEP_MODE_SUSPEND, 0);
1342         if (ret < 0)
1343                 return -EAGAIN;
1344
1345         return 0;
1346 }
1347
1348 static int bmc150_accel_runtime_resume(struct device *dev)
1349 {
1350         struct iio_dev *indio_dev = i2c_get_clientdata(to_i2c_client(dev));
1351         struct bmc150_accel_data *data = iio_priv(indio_dev);
1352         int ret;
1353         int sleep_val;
1354
1355         dev_dbg(&data->client->dev,  __func__);
1356
1357         ret = bmc150_accel_set_mode(data, BMC150_ACCEL_SLEEP_MODE_NORMAL, 0);
1358         if (ret < 0)
1359                 return ret;
1360
1361         sleep_val = bmc150_accel_get_startup_times(data);
1362         if (sleep_val < 20)
1363                 usleep_range(sleep_val * 1000, 20000);
1364         else
1365                 msleep_interruptible(sleep_val);
1366
1367         return 0;
1368 }
1369 #endif
1370
1371 static const struct dev_pm_ops bmc150_accel_pm_ops = {
1372         SET_SYSTEM_SLEEP_PM_OPS(bmc150_accel_suspend, bmc150_accel_resume)
1373         SET_RUNTIME_PM_OPS(bmc150_accel_runtime_suspend,
1374                            bmc150_accel_runtime_resume, NULL)
1375 };
1376
1377 static const struct acpi_device_id bmc150_accel_acpi_match[] = {
1378         {"BSBA0150",    bmc150},
1379         {"BMC150A",     bmc150},
1380         {"BMI055A",     bmi055},
1381         {"BMA0255",     bma255},
1382         {"BMA250E",     bma250e},
1383         {"BMA222E",     bma222e},
1384         {"BMA0280",     bma280},
1385         { },
1386 };
1387 MODULE_DEVICE_TABLE(acpi, bmc150_accel_acpi_match);
1388
1389 static const struct i2c_device_id bmc150_accel_id[] = {
1390         {"bmc150_accel",        bmc150},
1391         {"bmi055_accel",        bmi055},
1392         {"bma255",              bma255},
1393         {"bma250e",             bma250e},
1394         {"bma222e",             bma222e},
1395         {"bma280",              bma280},
1396         {}
1397 };
1398
1399 MODULE_DEVICE_TABLE(i2c, bmc150_accel_id);
1400
1401 static struct i2c_driver bmc150_accel_driver = {
1402         .driver = {
1403                 .name   = BMC150_ACCEL_DRV_NAME,
1404                 .acpi_match_table = ACPI_PTR(bmc150_accel_acpi_match),
1405                 .pm     = &bmc150_accel_pm_ops,
1406         },
1407         .probe          = bmc150_accel_probe,
1408         .remove         = bmc150_accel_remove,
1409         .id_table       = bmc150_accel_id,
1410 };
1411 module_i2c_driver(bmc150_accel_driver);
1412
1413 MODULE_AUTHOR("Srinivas Pandruvada <srinivas.pandruvada@linux.intel.com>");
1414 MODULE_LICENSE("GPL v2");
1415 MODULE_DESCRIPTION("BMC150 accelerometer driver");