3 * Copyright (C) 2008-2010 Jonathan Cameron
5 * based on linux/drivers/i2c/chips/max123x
6 * Copyright (C) 2002-2004 Stefan Eletzhofer
8 * based on linux/drivers/acron/char/pcf8583.c
9 * Copyright (C) 2000 Russell King
11 * This program is free software; you can redistribute it and/or modify
12 * it under the terms of the GNU General Public License version 2 as
13 * published by the Free Software Foundation.
17 * Partial support for max1363 and similar chips.
19 * Not currently implemented.
21 * - Control of internal reference.
24 #include <linux/interrupt.h>
25 #include <linux/device.h>
26 #include <linux/kernel.h>
27 #include <linux/sysfs.h>
28 #include <linux/list.h>
29 #include <linux/i2c.h>
30 #include <linux/regulator/consumer.h>
31 #include <linux/slab.h>
32 #include <linux/err.h>
33 #include <linux/module.h>
35 #include <linux/iio/iio.h>
36 #include <linux/iio/sysfs.h>
37 #include <linux/iio/events.h>
38 #include <linux/iio/buffer.h>
39 #include <linux/iio/driver.h>
40 #include <linux/iio/kfifo_buf.h>
41 #include <linux/iio/trigger_consumer.h>
42 #include <linux/iio/triggered_buffer.h>
44 #define MAX1363_SETUP_BYTE(a) ((a) | 0x80)
46 /* There is a fair bit more defined here than currently
47 * used, but the intention is to support everything these
48 * chips do in the long run */
51 /* max1363 and max1236, max1237, max1238, max1239 */
52 #define MAX1363_SETUP_AIN3_IS_AIN3_REF_IS_VDD 0x00
53 #define MAX1363_SETUP_AIN3_IS_REF_EXT_TO_REF 0x20
54 #define MAX1363_SETUP_AIN3_IS_AIN3_REF_IS_INT 0x40
55 #define MAX1363_SETUP_AIN3_IS_REF_REF_IS_INT 0x60
56 #define MAX1363_SETUP_POWER_UP_INT_REF 0x10
57 #define MAX1363_SETUP_POWER_DOWN_INT_REF 0x00
59 /* think about including max11600 etc - more settings */
60 #define MAX1363_SETUP_EXT_CLOCK 0x08
61 #define MAX1363_SETUP_INT_CLOCK 0x00
62 #define MAX1363_SETUP_UNIPOLAR 0x00
63 #define MAX1363_SETUP_BIPOLAR 0x04
64 #define MAX1363_SETUP_RESET 0x00
65 #define MAX1363_SETUP_NORESET 0x02
66 /* max1363 only - though don't care on others.
67 * For now monitor modes are not implemented as the relevant
68 * line is not connected on my test board.
69 * The definitions are here as I intend to add this soon.
71 #define MAX1363_SETUP_MONITOR_SETUP 0x01
73 /* Specific to the max1363 */
74 #define MAX1363_MON_RESET_CHAN(a) (1 << ((a) + 4))
75 #define MAX1363_MON_INT_ENABLE 0x01
77 /* defined for readability reasons */
79 #define MAX1363_CONFIG_BYTE(a) ((a))
81 #define MAX1363_CONFIG_SE 0x01
82 #define MAX1363_CONFIG_DE 0x00
83 #define MAX1363_CONFIG_SCAN_TO_CS 0x00
84 #define MAX1363_CONFIG_SCAN_SINGLE_8 0x20
85 #define MAX1363_CONFIG_SCAN_MONITOR_MODE 0x40
86 #define MAX1363_CONFIG_SCAN_SINGLE_1 0x60
87 /* max123{6-9} only */
88 #define MAX1236_SCAN_MID_TO_CHANNEL 0x40
90 /* max1363 only - merely part of channel selects or don't care for others */
91 #define MAX1363_CONFIG_EN_MON_MODE_READ 0x18
93 #define MAX1363_CHANNEL_SEL(a) ((a) << 1)
95 /* max1363 strictly 0x06 - but doesn't matter */
96 #define MAX1363_CHANNEL_SEL_MASK 0x1E
97 #define MAX1363_SCAN_MASK 0x60
98 #define MAX1363_SE_DE_MASK 0x01
100 #define MAX1363_MAX_CHANNELS 25
102 * struct max1363_mode - scan mode information
103 * @conf: The corresponding value of the configuration register
104 * @modemask: Bit mask corresponding to channels enabled in this mode
106 struct max1363_mode {
108 DECLARE_BITMAP(modemask, MAX1363_MAX_CHANNELS);
111 /* This must be maintained along side the max1363_mode_table in max1363_core */
113 /* Single read of a single channel */
114 _s0, _s1, _s2, _s3, _s4, _s5, _s6, _s7, _s8, _s9, _s10, _s11,
115 /* Differential single read */
116 d0m1, d2m3, d4m5, d6m7, d8m9, d10m11,
117 d1m0, d3m2, d5m4, d7m6, d9m8, d11m10,
118 /* Scan to channel and mid to channel where overlapping */
119 s0to1, s0to2, s2to3, s0to3, s0to4, s0to5, s0to6,
120 s6to7, s0to7, s6to8, s0to8, s6to9,
121 s0to9, s6to10, s0to10, s6to11, s0to11,
122 /* Differential scan to channel and mid to channel where overlapping */
123 d0m1to2m3, d0m1to4m5, d0m1to6m7, d6m7to8m9,
124 d0m1to8m9, d6m7to10m11, d0m1to10m11, d1m0to3m2,
125 d1m0to5m4, d1m0to7m6, d7m6to9m8, d1m0to9m8,
126 d7m6to11m10, d1m0to11m10,
130 * struct max1363_chip_info - chip specifc information
131 * @info: iio core function callbacks structure
132 * @channels: channel specification
133 * @num_channels: number of channels
134 * @mode_list: array of available scan modes
135 * @default_mode: the scan mode in which the chip starts up
136 * @int_vref_mv: the internal reference voltage
137 * @num_modes: number of modes
138 * @bits: accuracy of the adc in bits
140 struct max1363_chip_info {
141 const struct iio_info *info;
142 const struct iio_chan_spec *channels;
144 const enum max1363_modes *mode_list;
145 enum max1363_modes default_mode;
152 * struct max1363_state - driver instance specific data
153 * @client: i2c_client
154 * @setupbyte: cache of current device setup byte
155 * @configbyte: cache of current device config byte
156 * @chip_info: chip model specific constants, available modes, etc.
157 * @current_mode: the scan mode of this chip
158 * @requestedmask: a valid requested set of channels
159 * @reg: supply regulator
160 * @monitor_on: whether monitor mode is enabled
161 * @monitor_speed: parameter corresponding to device monitor speed setting
162 * @mask_high: bitmask for enabled high thresholds
163 * @mask_low: bitmask for enabled low thresholds
164 * @thresh_high: high threshold values
165 * @thresh_low: low threshold values
166 * @vref: Reference voltage regulator
167 * @vref_uv: Actual (external or internal) reference voltage
169 struct max1363_state {
170 struct i2c_client *client;
173 const struct max1363_chip_info *chip_info;
174 const struct max1363_mode *current_mode;
176 struct regulator *reg;
178 /* Using monitor modes and buffer at the same time is
179 currently not supported */
181 unsigned int monitor_speed:3;
184 /* 4x unipolar first then the fours bipolar ones */
187 struct regulator *vref;
191 #define MAX1363_MODE_SINGLE(_num, _mask) { \
192 .conf = MAX1363_CHANNEL_SEL(_num) \
193 | MAX1363_CONFIG_SCAN_SINGLE_1 \
194 | MAX1363_CONFIG_SE, \
195 .modemask[0] = _mask, \
198 #define MAX1363_MODE_SCAN_TO_CHANNEL(_num, _mask) { \
199 .conf = MAX1363_CHANNEL_SEL(_num) \
200 | MAX1363_CONFIG_SCAN_TO_CS \
201 | MAX1363_CONFIG_SE, \
202 .modemask[0] = _mask, \
205 /* note not available for max1363 hence naming */
206 #define MAX1236_MODE_SCAN_MID_TO_CHANNEL(_mid, _num, _mask) { \
207 .conf = MAX1363_CHANNEL_SEL(_num) \
208 | MAX1236_SCAN_MID_TO_CHANNEL \
209 | MAX1363_CONFIG_SE, \
210 .modemask[0] = _mask \
213 #define MAX1363_MODE_DIFF_SINGLE(_nump, _numm, _mask) { \
214 .conf = MAX1363_CHANNEL_SEL(_nump) \
215 | MAX1363_CONFIG_SCAN_SINGLE_1 \
216 | MAX1363_CONFIG_DE, \
217 .modemask[0] = _mask \
220 /* Can't think how to automate naming so specify for now */
221 #define MAX1363_MODE_DIFF_SCAN_TO_CHANNEL(_num, _numvals, _mask) { \
222 .conf = MAX1363_CHANNEL_SEL(_num) \
223 | MAX1363_CONFIG_SCAN_TO_CS \
224 | MAX1363_CONFIG_DE, \
225 .modemask[0] = _mask \
228 /* note only available for max1363 hence naming */
229 #define MAX1236_MODE_DIFF_SCAN_MID_TO_CHANNEL(_num, _numvals, _mask) { \
230 .conf = MAX1363_CHANNEL_SEL(_num) \
231 | MAX1236_SCAN_MID_TO_CHANNEL \
232 | MAX1363_CONFIG_SE, \
233 .modemask[0] = _mask \
236 static const struct max1363_mode max1363_mode_table[] = {
237 /* All of the single channel options first */
238 MAX1363_MODE_SINGLE(0, 1 << 0),
239 MAX1363_MODE_SINGLE(1, 1 << 1),
240 MAX1363_MODE_SINGLE(2, 1 << 2),
241 MAX1363_MODE_SINGLE(3, 1 << 3),
242 MAX1363_MODE_SINGLE(4, 1 << 4),
243 MAX1363_MODE_SINGLE(5, 1 << 5),
244 MAX1363_MODE_SINGLE(6, 1 << 6),
245 MAX1363_MODE_SINGLE(7, 1 << 7),
246 MAX1363_MODE_SINGLE(8, 1 << 8),
247 MAX1363_MODE_SINGLE(9, 1 << 9),
248 MAX1363_MODE_SINGLE(10, 1 << 10),
249 MAX1363_MODE_SINGLE(11, 1 << 11),
251 MAX1363_MODE_DIFF_SINGLE(0, 1, 1 << 12),
252 MAX1363_MODE_DIFF_SINGLE(2, 3, 1 << 13),
253 MAX1363_MODE_DIFF_SINGLE(4, 5, 1 << 14),
254 MAX1363_MODE_DIFF_SINGLE(6, 7, 1 << 15),
255 MAX1363_MODE_DIFF_SINGLE(8, 9, 1 << 16),
256 MAX1363_MODE_DIFF_SINGLE(10, 11, 1 << 17),
257 MAX1363_MODE_DIFF_SINGLE(1, 0, 1 << 18),
258 MAX1363_MODE_DIFF_SINGLE(3, 2, 1 << 19),
259 MAX1363_MODE_DIFF_SINGLE(5, 4, 1 << 20),
260 MAX1363_MODE_DIFF_SINGLE(7, 6, 1 << 21),
261 MAX1363_MODE_DIFF_SINGLE(9, 8, 1 << 22),
262 MAX1363_MODE_DIFF_SINGLE(11, 10, 1 << 23),
264 /* The multichannel scans next */
265 MAX1363_MODE_SCAN_TO_CHANNEL(1, 0x003),
266 MAX1363_MODE_SCAN_TO_CHANNEL(2, 0x007),
267 MAX1236_MODE_SCAN_MID_TO_CHANNEL(2, 3, 0x00C),
268 MAX1363_MODE_SCAN_TO_CHANNEL(3, 0x00F),
269 MAX1363_MODE_SCAN_TO_CHANNEL(4, 0x01F),
270 MAX1363_MODE_SCAN_TO_CHANNEL(5, 0x03F),
271 MAX1363_MODE_SCAN_TO_CHANNEL(6, 0x07F),
272 MAX1236_MODE_SCAN_MID_TO_CHANNEL(6, 7, 0x0C0),
273 MAX1363_MODE_SCAN_TO_CHANNEL(7, 0x0FF),
274 MAX1236_MODE_SCAN_MID_TO_CHANNEL(6, 8, 0x1C0),
275 MAX1363_MODE_SCAN_TO_CHANNEL(8, 0x1FF),
276 MAX1236_MODE_SCAN_MID_TO_CHANNEL(6, 9, 0x3C0),
277 MAX1363_MODE_SCAN_TO_CHANNEL(9, 0x3FF),
278 MAX1236_MODE_SCAN_MID_TO_CHANNEL(6, 10, 0x7C0),
279 MAX1363_MODE_SCAN_TO_CHANNEL(10, 0x7FF),
280 MAX1236_MODE_SCAN_MID_TO_CHANNEL(6, 11, 0xFC0),
281 MAX1363_MODE_SCAN_TO_CHANNEL(11, 0xFFF),
283 MAX1363_MODE_DIFF_SCAN_TO_CHANNEL(2, 2, 0x003000),
284 MAX1363_MODE_DIFF_SCAN_TO_CHANNEL(4, 3, 0x007000),
285 MAX1363_MODE_DIFF_SCAN_TO_CHANNEL(6, 4, 0x00F000),
286 MAX1236_MODE_DIFF_SCAN_MID_TO_CHANNEL(8, 2, 0x018000),
287 MAX1363_MODE_DIFF_SCAN_TO_CHANNEL(8, 5, 0x01F000),
288 MAX1236_MODE_DIFF_SCAN_MID_TO_CHANNEL(10, 3, 0x038000),
289 MAX1363_MODE_DIFF_SCAN_TO_CHANNEL(10, 6, 0x3F000),
290 MAX1363_MODE_DIFF_SCAN_TO_CHANNEL(3, 2, 0x0C0000),
291 MAX1363_MODE_DIFF_SCAN_TO_CHANNEL(5, 3, 0x1C0000),
292 MAX1363_MODE_DIFF_SCAN_TO_CHANNEL(7, 4, 0x3C0000),
293 MAX1236_MODE_DIFF_SCAN_MID_TO_CHANNEL(9, 2, 0x600000),
294 MAX1363_MODE_DIFF_SCAN_TO_CHANNEL(9, 5, 0x7C0000),
295 MAX1236_MODE_DIFF_SCAN_MID_TO_CHANNEL(11, 3, 0xE00000),
296 MAX1363_MODE_DIFF_SCAN_TO_CHANNEL(11, 6, 0xFC0000),
299 static const struct max1363_mode
300 *max1363_match_mode(const unsigned long *mask,
301 const struct max1363_chip_info *ci)
305 for (i = 0; i < ci->num_modes; i++)
306 if (bitmap_subset(mask,
307 max1363_mode_table[ci->mode_list[i]].
309 MAX1363_MAX_CHANNELS))
310 return &max1363_mode_table[ci->mode_list[i]];
314 static int max1363_write_basic_config(struct i2c_client *client,
318 u8 tx_buf[2] = {d1, d2};
320 return i2c_master_send(client, tx_buf, 2);
323 static int max1363_set_scan_mode(struct max1363_state *st)
325 st->configbyte &= ~(MAX1363_CHANNEL_SEL_MASK
327 | MAX1363_SE_DE_MASK);
328 st->configbyte |= st->current_mode->conf;
330 return max1363_write_basic_config(st->client,
335 static int max1363_read_single_chan(struct iio_dev *indio_dev,
336 struct iio_chan_spec const *chan,
343 struct max1363_state *st = iio_priv(indio_dev);
344 struct i2c_client *client = st->client;
346 mutex_lock(&indio_dev->mlock);
348 * If monitor mode is enabled, the method for reading a single
349 * channel will have to be rather different and has not yet
352 * Also, cannot read directly if buffered capture enabled.
354 if (st->monitor_on || iio_buffer_enabled(indio_dev)) {
359 /* Check to see if current scan mode is correct */
360 if (st->current_mode != &max1363_mode_table[chan->address]) {
361 /* Update scan mode if needed */
362 st->current_mode = &max1363_mode_table[chan->address];
363 ret = max1363_set_scan_mode(st);
367 if (st->chip_info->bits != 8) {
369 data = i2c_master_recv(client, rxbuf, 2);
374 data = (rxbuf[1] | rxbuf[0] << 8) &
375 ((1 << st->chip_info->bits) - 1);
378 data = i2c_master_recv(client, rxbuf, 1);
387 mutex_unlock(&indio_dev->mlock);
392 static int max1363_read_raw(struct iio_dev *indio_dev,
393 struct iio_chan_spec const *chan,
398 struct max1363_state *st = iio_priv(indio_dev);
402 case IIO_CHAN_INFO_RAW:
403 ret = max1363_read_single_chan(indio_dev, chan, val, m);
407 case IIO_CHAN_INFO_SCALE:
408 *val = st->vref_uv / 1000;
409 *val2 = st->chip_info->bits;
410 return IIO_VAL_FRACTIONAL_LOG2;
417 /* Applies to max1363 */
418 static const enum max1363_modes max1363_mode_list[] = {
421 d0m1, d2m3, d1m0, d3m2,
422 d0m1to2m3, d1m0to3m2,
425 static const struct iio_event_spec max1363_events[] = {
427 .type = IIO_EV_TYPE_THRESH,
428 .dir = IIO_EV_DIR_RISING,
429 .mask_separate = BIT(IIO_EV_INFO_VALUE) |
430 BIT(IIO_EV_INFO_ENABLE),
432 .type = IIO_EV_TYPE_THRESH,
433 .dir = IIO_EV_DIR_FALLING,
434 .mask_separate = BIT(IIO_EV_INFO_VALUE) |
435 BIT(IIO_EV_INFO_ENABLE),
439 #define MAX1363_CHAN_U(num, addr, si, bits, ev_spec, num_ev_spec) \
441 .type = IIO_VOLTAGE, \
445 .info_mask_separate = BIT(IIO_CHAN_INFO_RAW), \
446 .info_mask_shared_by_type = BIT(IIO_CHAN_INFO_SCALE), \
447 .datasheet_name = "AIN"#num, \
451 .storagebits = (bits > 8) ? 16 : 8, \
452 .endianness = IIO_BE, \
455 .event_spec = ev_spec, \
456 .num_event_specs = num_ev_spec, \
459 /* bipolar channel */
460 #define MAX1363_CHAN_B(num, num2, addr, si, bits, ev_spec, num_ev_spec) \
462 .type = IIO_VOLTAGE, \
468 .info_mask_separate = BIT(IIO_CHAN_INFO_RAW), \
469 .info_mask_shared_by_type = BIT(IIO_CHAN_INFO_SCALE), \
470 .datasheet_name = "AIN"#num"-AIN"#num2, \
474 .storagebits = (bits > 8) ? 16 : 8, \
475 .endianness = IIO_BE, \
478 .event_spec = ev_spec, \
479 .num_event_specs = num_ev_spec, \
482 #define MAX1363_4X_CHANS(bits, ev_spec, num_ev_spec) { \
483 MAX1363_CHAN_U(0, _s0, 0, bits, ev_spec, num_ev_spec), \
484 MAX1363_CHAN_U(1, _s1, 1, bits, ev_spec, num_ev_spec), \
485 MAX1363_CHAN_U(2, _s2, 2, bits, ev_spec, num_ev_spec), \
486 MAX1363_CHAN_U(3, _s3, 3, bits, ev_spec, num_ev_spec), \
487 MAX1363_CHAN_B(0, 1, d0m1, 4, bits, ev_spec, num_ev_spec), \
488 MAX1363_CHAN_B(2, 3, d2m3, 5, bits, ev_spec, num_ev_spec), \
489 MAX1363_CHAN_B(1, 0, d1m0, 6, bits, ev_spec, num_ev_spec), \
490 MAX1363_CHAN_B(3, 2, d3m2, 7, bits, ev_spec, num_ev_spec), \
491 IIO_CHAN_SOFT_TIMESTAMP(8) \
494 static const struct iio_chan_spec max1036_channels[] =
495 MAX1363_4X_CHANS(8, NULL, 0);
496 static const struct iio_chan_spec max1136_channels[] =
497 MAX1363_4X_CHANS(10, NULL, 0);
498 static const struct iio_chan_spec max1236_channels[] =
499 MAX1363_4X_CHANS(12, NULL, 0);
500 static const struct iio_chan_spec max1361_channels[] =
501 MAX1363_4X_CHANS(10, max1363_events, ARRAY_SIZE(max1363_events));
502 static const struct iio_chan_spec max1363_channels[] =
503 MAX1363_4X_CHANS(12, max1363_events, ARRAY_SIZE(max1363_events));
505 /* Applies to max1236, max1237 */
506 static const enum max1363_modes max1236_mode_list[] = {
509 d0m1, d2m3, d1m0, d3m2,
510 d0m1to2m3, d1m0to3m2,
514 /* Applies to max1238, max1239 */
515 static const enum max1363_modes max1238_mode_list[] = {
516 _s0, _s1, _s2, _s3, _s4, _s5, _s6, _s7, _s8, _s9, _s10, _s11,
517 s0to1, s0to2, s0to3, s0to4, s0to5, s0to6,
518 s0to7, s0to8, s0to9, s0to10, s0to11,
519 d0m1, d2m3, d4m5, d6m7, d8m9, d10m11,
520 d1m0, d3m2, d5m4, d7m6, d9m8, d11m10,
521 d0m1to2m3, d0m1to4m5, d0m1to6m7, d0m1to8m9, d0m1to10m11,
522 d1m0to3m2, d1m0to5m4, d1m0to7m6, d1m0to9m8, d1m0to11m10,
523 s6to7, s6to8, s6to9, s6to10, s6to11,
524 d6m7to8m9, d6m7to10m11, d7m6to9m8, d7m6to11m10,
527 #define MAX1363_12X_CHANS(bits) { \
528 MAX1363_CHAN_U(0, _s0, 0, bits, NULL, 0), \
529 MAX1363_CHAN_U(1, _s1, 1, bits, NULL, 0), \
530 MAX1363_CHAN_U(2, _s2, 2, bits, NULL, 0), \
531 MAX1363_CHAN_U(3, _s3, 3, bits, NULL, 0), \
532 MAX1363_CHAN_U(4, _s4, 4, bits, NULL, 0), \
533 MAX1363_CHAN_U(5, _s5, 5, bits, NULL, 0), \
534 MAX1363_CHAN_U(6, _s6, 6, bits, NULL, 0), \
535 MAX1363_CHAN_U(7, _s7, 7, bits, NULL, 0), \
536 MAX1363_CHAN_U(8, _s8, 8, bits, NULL, 0), \
537 MAX1363_CHAN_U(9, _s9, 9, bits, NULL, 0), \
538 MAX1363_CHAN_U(10, _s10, 10, bits, NULL, 0), \
539 MAX1363_CHAN_U(11, _s11, 11, bits, NULL, 0), \
540 MAX1363_CHAN_B(0, 1, d0m1, 12, bits, NULL, 0), \
541 MAX1363_CHAN_B(2, 3, d2m3, 13, bits, NULL, 0), \
542 MAX1363_CHAN_B(4, 5, d4m5, 14, bits, NULL, 0), \
543 MAX1363_CHAN_B(6, 7, d6m7, 15, bits, NULL, 0), \
544 MAX1363_CHAN_B(8, 9, d8m9, 16, bits, NULL, 0), \
545 MAX1363_CHAN_B(10, 11, d10m11, 17, bits, NULL, 0), \
546 MAX1363_CHAN_B(1, 0, d1m0, 18, bits, NULL, 0), \
547 MAX1363_CHAN_B(3, 2, d3m2, 19, bits, NULL, 0), \
548 MAX1363_CHAN_B(5, 4, d5m4, 20, bits, NULL, 0), \
549 MAX1363_CHAN_B(7, 6, d7m6, 21, bits, NULL, 0), \
550 MAX1363_CHAN_B(9, 8, d9m8, 22, bits, NULL, 0), \
551 MAX1363_CHAN_B(11, 10, d11m10, 23, bits, NULL, 0), \
552 IIO_CHAN_SOFT_TIMESTAMP(24) \
554 static const struct iio_chan_spec max1038_channels[] = MAX1363_12X_CHANS(8);
555 static const struct iio_chan_spec max1138_channels[] = MAX1363_12X_CHANS(10);
556 static const struct iio_chan_spec max1238_channels[] = MAX1363_12X_CHANS(12);
558 static const enum max1363_modes max11607_mode_list[] = {
562 d0m1, d2m3, d1m0, d3m2,
563 d0m1to2m3, d1m0to3m2,
566 static const enum max1363_modes max11608_mode_list[] = {
567 _s0, _s1, _s2, _s3, _s4, _s5, _s6, _s7,
568 s0to1, s0to2, s0to3, s0to4, s0to5, s0to6, s0to7,
570 d0m1, d2m3, d4m5, d6m7,
571 d1m0, d3m2, d5m4, d7m6,
572 d0m1to2m3, d0m1to4m5, d0m1to6m7,
573 d1m0to3m2, d1m0to5m4, d1m0to7m6,
576 #define MAX1363_8X_CHANS(bits) { \
577 MAX1363_CHAN_U(0, _s0, 0, bits, NULL, 0), \
578 MAX1363_CHAN_U(1, _s1, 1, bits, NULL, 0), \
579 MAX1363_CHAN_U(2, _s2, 2, bits, NULL, 0), \
580 MAX1363_CHAN_U(3, _s3, 3, bits, NULL, 0), \
581 MAX1363_CHAN_U(4, _s4, 4, bits, NULL, 0), \
582 MAX1363_CHAN_U(5, _s5, 5, bits, NULL, 0), \
583 MAX1363_CHAN_U(6, _s6, 6, bits, NULL, 0), \
584 MAX1363_CHAN_U(7, _s7, 7, bits, NULL, 0), \
585 MAX1363_CHAN_B(0, 1, d0m1, 8, bits, NULL, 0), \
586 MAX1363_CHAN_B(2, 3, d2m3, 9, bits, NULL, 0), \
587 MAX1363_CHAN_B(4, 5, d4m5, 10, bits, NULL, 0), \
588 MAX1363_CHAN_B(6, 7, d6m7, 11, bits, NULL, 0), \
589 MAX1363_CHAN_B(1, 0, d1m0, 12, bits, NULL, 0), \
590 MAX1363_CHAN_B(3, 2, d3m2, 13, bits, NULL, 0), \
591 MAX1363_CHAN_B(5, 4, d5m4, 14, bits, NULL, 0), \
592 MAX1363_CHAN_B(7, 6, d7m6, 15, bits, NULL, 0), \
593 IIO_CHAN_SOFT_TIMESTAMP(16) \
595 static const struct iio_chan_spec max11602_channels[] = MAX1363_8X_CHANS(8);
596 static const struct iio_chan_spec max11608_channels[] = MAX1363_8X_CHANS(10);
597 static const struct iio_chan_spec max11614_channels[] = MAX1363_8X_CHANS(12);
599 static const enum max1363_modes max11644_mode_list[] = {
600 _s0, _s1, s0to1, d0m1, d1m0,
603 #define MAX1363_2X_CHANS(bits) { \
604 MAX1363_CHAN_U(0, _s0, 0, bits, NULL, 0), \
605 MAX1363_CHAN_U(1, _s1, 1, bits, NULL, 0), \
606 MAX1363_CHAN_B(0, 1, d0m1, 2, bits, NULL, 0), \
607 MAX1363_CHAN_B(1, 0, d1m0, 3, bits, NULL, 0), \
608 IIO_CHAN_SOFT_TIMESTAMP(4) \
611 static const struct iio_chan_spec max11646_channels[] = MAX1363_2X_CHANS(10);
612 static const struct iio_chan_spec max11644_channels[] = MAX1363_2X_CHANS(12);
654 static const int max1363_monitor_speeds[] = { 133000, 665000, 33300, 16600,
655 8300, 4200, 2000, 1000 };
657 static ssize_t max1363_monitor_show_freq(struct device *dev,
658 struct device_attribute *attr,
661 struct max1363_state *st = iio_priv(dev_to_iio_dev(dev));
662 return sprintf(buf, "%d\n", max1363_monitor_speeds[st->monitor_speed]);
665 static ssize_t max1363_monitor_store_freq(struct device *dev,
666 struct device_attribute *attr,
670 struct iio_dev *indio_dev = dev_to_iio_dev(dev);
671 struct max1363_state *st = iio_priv(indio_dev);
676 ret = kstrtoul(buf, 10, &val);
679 for (i = 0; i < ARRAY_SIZE(max1363_monitor_speeds); i++)
680 if (val == max1363_monitor_speeds[i]) {
687 mutex_lock(&indio_dev->mlock);
688 st->monitor_speed = i;
689 mutex_unlock(&indio_dev->mlock);
694 static IIO_DEV_ATTR_SAMP_FREQ(S_IRUGO | S_IWUSR,
695 max1363_monitor_show_freq,
696 max1363_monitor_store_freq);
698 static IIO_CONST_ATTR(sampling_frequency_available,
699 "133000 665000 33300 16600 8300 4200 2000 1000");
701 static int max1363_read_thresh(struct iio_dev *indio_dev,
702 const struct iio_chan_spec *chan, enum iio_event_type type,
703 enum iio_event_direction dir, enum iio_event_info info, int *val,
706 struct max1363_state *st = iio_priv(indio_dev);
707 if (dir == IIO_EV_DIR_FALLING)
708 *val = st->thresh_low[chan->channel];
710 *val = st->thresh_high[chan->channel];
714 static int max1363_write_thresh(struct iio_dev *indio_dev,
715 const struct iio_chan_spec *chan, enum iio_event_type type,
716 enum iio_event_direction dir, enum iio_event_info info, int val,
719 struct max1363_state *st = iio_priv(indio_dev);
720 /* make it handle signed correctly as well */
721 switch (st->chip_info->bits) {
733 case IIO_EV_DIR_FALLING:
734 st->thresh_low[chan->channel] = val;
736 case IIO_EV_DIR_RISING:
737 st->thresh_high[chan->channel] = val;
746 static const u64 max1363_event_codes[] = {
747 IIO_UNMOD_EVENT_CODE(IIO_VOLTAGE, 0,
748 IIO_EV_TYPE_THRESH, IIO_EV_DIR_FALLING),
749 IIO_UNMOD_EVENT_CODE(IIO_VOLTAGE, 1,
750 IIO_EV_TYPE_THRESH, IIO_EV_DIR_FALLING),
751 IIO_UNMOD_EVENT_CODE(IIO_VOLTAGE, 2,
752 IIO_EV_TYPE_THRESH, IIO_EV_DIR_FALLING),
753 IIO_UNMOD_EVENT_CODE(IIO_VOLTAGE, 3,
754 IIO_EV_TYPE_THRESH, IIO_EV_DIR_FALLING),
755 IIO_UNMOD_EVENT_CODE(IIO_VOLTAGE, 0,
756 IIO_EV_TYPE_THRESH, IIO_EV_DIR_RISING),
757 IIO_UNMOD_EVENT_CODE(IIO_VOLTAGE, 1,
758 IIO_EV_TYPE_THRESH, IIO_EV_DIR_RISING),
759 IIO_UNMOD_EVENT_CODE(IIO_VOLTAGE, 2,
760 IIO_EV_TYPE_THRESH, IIO_EV_DIR_RISING),
761 IIO_UNMOD_EVENT_CODE(IIO_VOLTAGE, 3,
762 IIO_EV_TYPE_THRESH, IIO_EV_DIR_RISING),
765 static irqreturn_t max1363_event_handler(int irq, void *private)
767 struct iio_dev *indio_dev = private;
768 struct max1363_state *st = iio_priv(indio_dev);
769 s64 timestamp = iio_get_time_ns();
770 unsigned long mask, loc;
772 u8 tx[2] = { st->setupbyte,
773 MAX1363_MON_INT_ENABLE | (st->monitor_speed << 1) | 0xF0 };
775 i2c_master_recv(st->client, &rx, 1);
777 for_each_set_bit(loc, &mask, 8)
778 iio_push_event(indio_dev, max1363_event_codes[loc], timestamp);
779 i2c_master_send(st->client, tx, 2);
784 static int max1363_read_event_config(struct iio_dev *indio_dev,
785 const struct iio_chan_spec *chan, enum iio_event_type type,
786 enum iio_event_direction dir)
788 struct max1363_state *st = iio_priv(indio_dev);
790 int number = chan->channel;
792 mutex_lock(&indio_dev->mlock);
793 if (dir == IIO_EV_DIR_FALLING)
794 val = (1 << number) & st->mask_low;
796 val = (1 << number) & st->mask_high;
797 mutex_unlock(&indio_dev->mlock);
802 static int max1363_monitor_mode_update(struct max1363_state *st, int enabled)
806 unsigned long numelements;
808 const long *modemask;
811 /* transition to buffered capture is not currently supported */
812 st->setupbyte &= ~MAX1363_SETUP_MONITOR_SETUP;
813 st->configbyte &= ~MAX1363_SCAN_MASK;
814 st->monitor_on = false;
815 return max1363_write_basic_config(st->client,
820 /* Ensure we are in the relevant mode */
821 st->setupbyte |= MAX1363_SETUP_MONITOR_SETUP;
822 st->configbyte &= ~(MAX1363_CHANNEL_SEL_MASK
824 | MAX1363_SE_DE_MASK);
825 st->configbyte |= MAX1363_CONFIG_SCAN_MONITOR_MODE;
826 if ((st->mask_low | st->mask_high) & 0x0F) {
827 st->configbyte |= max1363_mode_table[s0to3].conf;
828 modemask = max1363_mode_table[s0to3].modemask;
829 } else if ((st->mask_low | st->mask_high) & 0x30) {
830 st->configbyte |= max1363_mode_table[d0m1to2m3].conf;
831 modemask = max1363_mode_table[d0m1to2m3].modemask;
833 st->configbyte |= max1363_mode_table[d1m0to3m2].conf;
834 modemask = max1363_mode_table[d1m0to3m2].modemask;
836 numelements = bitmap_weight(modemask, MAX1363_MAX_CHANNELS);
837 len = 3 * numelements + 3;
838 tx_buf = kmalloc(len, GFP_KERNEL);
843 tx_buf[0] = st->configbyte;
844 tx_buf[1] = st->setupbyte;
845 tx_buf[2] = (st->monitor_speed << 1);
848 * So we need to do yet another bit of nefarious scan mode
849 * setup to match what we need.
851 for (j = 0; j < 8; j++)
852 if (test_bit(j, modemask)) {
853 /* Establish the mode is in the scan */
854 if (st->mask_low & (1 << j)) {
855 tx_buf[i] = (st->thresh_low[j] >> 4) & 0xFF;
856 tx_buf[i + 1] = (st->thresh_low[j] << 4) & 0xF0;
864 if (st->mask_high & (1 << j)) {
866 (st->thresh_high[j] >> 8) & 0x0F;
867 tx_buf[i + 2] = st->thresh_high[j] & 0xFF;
869 tx_buf[i + 1] |= 0x0F;
870 tx_buf[i + 2] = 0xFF;
872 tx_buf[i + 1] |= 0x07;
873 tx_buf[i + 2] = 0xFF;
879 ret = i2c_master_send(st->client, tx_buf, len);
888 * Now that we hopefully have sensible thresholds in place it is
889 * time to turn the interrupts on.
890 * It is unclear from the data sheet if this should be necessary
891 * (i.e. whether monitor mode setup is atomic) but it appears to
894 tx_buf[0] = st->setupbyte;
895 tx_buf[1] = MAX1363_MON_INT_ENABLE | (st->monitor_speed << 1) | 0xF0;
896 ret = i2c_master_send(st->client, tx_buf, 2);
904 st->monitor_on = true;
913 * To keep this manageable we always use one of 3 scan modes.
914 * Scan 0...3, 0-1,2-3 and 1-0,3-2
917 static inline int __max1363_check_event_mask(int thismask, int checkmask)
922 if (checkmask & ~0x0F) {
926 } else if (thismask < 6) {
927 if (checkmask & ~0x30) {
931 } else if (checkmask & ~0xC0)
937 static int max1363_write_event_config(struct iio_dev *indio_dev,
938 const struct iio_chan_spec *chan, enum iio_event_type type,
939 enum iio_event_direction dir, int state)
942 struct max1363_state *st = iio_priv(indio_dev);
944 int number = chan->channel;
946 mutex_lock(&indio_dev->mlock);
947 unifiedmask = st->mask_low | st->mask_high;
948 if (dir == IIO_EV_DIR_FALLING) {
951 st->mask_low &= ~(1 << number);
953 ret = __max1363_check_event_mask((1 << number),
957 st->mask_low |= (1 << number);
961 st->mask_high &= ~(1 << number);
963 ret = __max1363_check_event_mask((1 << number),
967 st->mask_high |= (1 << number);
971 max1363_monitor_mode_update(st, !!(st->mask_high | st->mask_low));
973 mutex_unlock(&indio_dev->mlock);
979 * As with scan_elements, only certain sets of these can
982 static struct attribute *max1363_event_attributes[] = {
983 &iio_dev_attr_sampling_frequency.dev_attr.attr,
984 &iio_const_attr_sampling_frequency_available.dev_attr.attr,
988 static struct attribute_group max1363_event_attribute_group = {
989 .attrs = max1363_event_attributes,
993 static int max1363_update_scan_mode(struct iio_dev *indio_dev,
994 const unsigned long *scan_mask)
996 struct max1363_state *st = iio_priv(indio_dev);
999 * Need to figure out the current mode based upon the requested
1000 * scan mask in iio_dev
1002 st->current_mode = max1363_match_mode(scan_mask, st->chip_info);
1003 if (!st->current_mode)
1005 max1363_set_scan_mode(st);
1009 static const struct iio_info max1238_info = {
1010 .read_raw = &max1363_read_raw,
1011 .driver_module = THIS_MODULE,
1012 .update_scan_mode = &max1363_update_scan_mode,
1015 static const struct iio_info max1363_info = {
1016 .read_event_value_new = &max1363_read_thresh,
1017 .write_event_value_new = &max1363_write_thresh,
1018 .read_event_config_new = &max1363_read_event_config,
1019 .write_event_config_new = &max1363_write_event_config,
1020 .read_raw = &max1363_read_raw,
1021 .update_scan_mode = &max1363_update_scan_mode,
1022 .driver_module = THIS_MODULE,
1023 .event_attrs = &max1363_event_attribute_group,
1026 /* max1363 and max1368 tested - rest from data sheet */
1027 static const struct max1363_chip_info max1363_chip_info_tbl[] = {
1030 .int_vref_mv = 2048,
1031 .mode_list = max1363_mode_list,
1032 .num_modes = ARRAY_SIZE(max1363_mode_list),
1033 .default_mode = s0to3,
1034 .channels = max1361_channels,
1035 .num_channels = ARRAY_SIZE(max1361_channels),
1036 .info = &max1363_info,
1040 .int_vref_mv = 4096,
1041 .mode_list = max1363_mode_list,
1042 .num_modes = ARRAY_SIZE(max1363_mode_list),
1043 .default_mode = s0to3,
1044 .channels = max1361_channels,
1045 .num_channels = ARRAY_SIZE(max1361_channels),
1046 .info = &max1363_info,
1050 .int_vref_mv = 2048,
1051 .mode_list = max1363_mode_list,
1052 .num_modes = ARRAY_SIZE(max1363_mode_list),
1053 .default_mode = s0to3,
1054 .channels = max1363_channels,
1055 .num_channels = ARRAY_SIZE(max1363_channels),
1056 .info = &max1363_info,
1060 .int_vref_mv = 4096,
1061 .mode_list = max1363_mode_list,
1062 .num_modes = ARRAY_SIZE(max1363_mode_list),
1063 .default_mode = s0to3,
1064 .channels = max1363_channels,
1065 .num_channels = ARRAY_SIZE(max1363_channels),
1066 .info = &max1363_info,
1070 .int_vref_mv = 4096,
1071 .mode_list = max1236_mode_list,
1072 .num_modes = ARRAY_SIZE(max1236_mode_list),
1073 .default_mode = s0to3,
1074 .info = &max1238_info,
1075 .channels = max1036_channels,
1076 .num_channels = ARRAY_SIZE(max1036_channels),
1080 .int_vref_mv = 2048,
1081 .mode_list = max1236_mode_list,
1082 .num_modes = ARRAY_SIZE(max1236_mode_list),
1083 .default_mode = s0to3,
1084 .info = &max1238_info,
1085 .channels = max1036_channels,
1086 .num_channels = ARRAY_SIZE(max1036_channels),
1090 .int_vref_mv = 4096,
1091 .mode_list = max1238_mode_list,
1092 .num_modes = ARRAY_SIZE(max1238_mode_list),
1093 .default_mode = s0to11,
1094 .info = &max1238_info,
1095 .channels = max1038_channels,
1096 .num_channels = ARRAY_SIZE(max1038_channels),
1100 .int_vref_mv = 2048,
1101 .mode_list = max1238_mode_list,
1102 .num_modes = ARRAY_SIZE(max1238_mode_list),
1103 .default_mode = s0to11,
1104 .info = &max1238_info,
1105 .channels = max1038_channels,
1106 .num_channels = ARRAY_SIZE(max1038_channels),
1110 .int_vref_mv = 4096,
1111 .mode_list = max1236_mode_list,
1112 .num_modes = ARRAY_SIZE(max1236_mode_list),
1113 .default_mode = s0to3,
1114 .info = &max1238_info,
1115 .channels = max1136_channels,
1116 .num_channels = ARRAY_SIZE(max1136_channels),
1120 .int_vref_mv = 2048,
1121 .mode_list = max1236_mode_list,
1122 .num_modes = ARRAY_SIZE(max1236_mode_list),
1123 .default_mode = s0to3,
1124 .info = &max1238_info,
1125 .channels = max1136_channels,
1126 .num_channels = ARRAY_SIZE(max1136_channels),
1130 .int_vref_mv = 4096,
1131 .mode_list = max1238_mode_list,
1132 .num_modes = ARRAY_SIZE(max1238_mode_list),
1133 .default_mode = s0to11,
1134 .info = &max1238_info,
1135 .channels = max1138_channels,
1136 .num_channels = ARRAY_SIZE(max1138_channels),
1140 .int_vref_mv = 2048,
1141 .mode_list = max1238_mode_list,
1142 .num_modes = ARRAY_SIZE(max1238_mode_list),
1143 .default_mode = s0to11,
1144 .info = &max1238_info,
1145 .channels = max1138_channels,
1146 .num_channels = ARRAY_SIZE(max1138_channels),
1150 .int_vref_mv = 4096,
1151 .mode_list = max1236_mode_list,
1152 .num_modes = ARRAY_SIZE(max1236_mode_list),
1153 .default_mode = s0to3,
1154 .info = &max1238_info,
1155 .channels = max1236_channels,
1156 .num_channels = ARRAY_SIZE(max1236_channels),
1160 .int_vref_mv = 2048,
1161 .mode_list = max1236_mode_list,
1162 .num_modes = ARRAY_SIZE(max1236_mode_list),
1163 .default_mode = s0to3,
1164 .info = &max1238_info,
1165 .channels = max1236_channels,
1166 .num_channels = ARRAY_SIZE(max1236_channels),
1170 .int_vref_mv = 4096,
1171 .mode_list = max1238_mode_list,
1172 .num_modes = ARRAY_SIZE(max1238_mode_list),
1173 .default_mode = s0to11,
1174 .info = &max1238_info,
1175 .channels = max1238_channels,
1176 .num_channels = ARRAY_SIZE(max1238_channels),
1180 .int_vref_mv = 2048,
1181 .mode_list = max1238_mode_list,
1182 .num_modes = ARRAY_SIZE(max1238_mode_list),
1183 .default_mode = s0to11,
1184 .info = &max1238_info,
1185 .channels = max1238_channels,
1186 .num_channels = ARRAY_SIZE(max1238_channels),
1190 .int_vref_mv = 4096,
1191 .mode_list = max11607_mode_list,
1192 .num_modes = ARRAY_SIZE(max11607_mode_list),
1193 .default_mode = s0to3,
1194 .info = &max1238_info,
1195 .channels = max1036_channels,
1196 .num_channels = ARRAY_SIZE(max1036_channels),
1200 .int_vref_mv = 2048,
1201 .mode_list = max11607_mode_list,
1202 .num_modes = ARRAY_SIZE(max11607_mode_list),
1203 .default_mode = s0to3,
1204 .info = &max1238_info,
1205 .channels = max1036_channels,
1206 .num_channels = ARRAY_SIZE(max1036_channels),
1210 .int_vref_mv = 4096,
1211 .mode_list = max11608_mode_list,
1212 .num_modes = ARRAY_SIZE(max11608_mode_list),
1213 .default_mode = s0to7,
1214 .info = &max1238_info,
1215 .channels = max11602_channels,
1216 .num_channels = ARRAY_SIZE(max11602_channels),
1220 .int_vref_mv = 2048,
1221 .mode_list = max11608_mode_list,
1222 .num_modes = ARRAY_SIZE(max11608_mode_list),
1223 .default_mode = s0to7,
1224 .info = &max1238_info,
1225 .channels = max11602_channels,
1226 .num_channels = ARRAY_SIZE(max11602_channels),
1230 .int_vref_mv = 4098,
1231 .mode_list = max1238_mode_list,
1232 .num_modes = ARRAY_SIZE(max1238_mode_list),
1233 .default_mode = s0to11,
1234 .info = &max1238_info,
1235 .channels = max1238_channels,
1236 .num_channels = ARRAY_SIZE(max1238_channels),
1240 .int_vref_mv = 2048,
1241 .mode_list = max1238_mode_list,
1242 .num_modes = ARRAY_SIZE(max1238_mode_list),
1243 .default_mode = s0to11,
1244 .info = &max1238_info,
1245 .channels = max1238_channels,
1246 .num_channels = ARRAY_SIZE(max1238_channels),
1250 .int_vref_mv = 4096,
1251 .mode_list = max11607_mode_list,
1252 .num_modes = ARRAY_SIZE(max11607_mode_list),
1253 .default_mode = s0to3,
1254 .info = &max1238_info,
1255 .channels = max1136_channels,
1256 .num_channels = ARRAY_SIZE(max1136_channels),
1260 .int_vref_mv = 2048,
1261 .mode_list = max11607_mode_list,
1262 .num_modes = ARRAY_SIZE(max11607_mode_list),
1263 .default_mode = s0to3,
1264 .info = &max1238_info,
1265 .channels = max1136_channels,
1266 .num_channels = ARRAY_SIZE(max1136_channels),
1270 .int_vref_mv = 4096,
1271 .mode_list = max11608_mode_list,
1272 .num_modes = ARRAY_SIZE(max11608_mode_list),
1273 .default_mode = s0to7,
1274 .info = &max1238_info,
1275 .channels = max11608_channels,
1276 .num_channels = ARRAY_SIZE(max11608_channels),
1280 .int_vref_mv = 2048,
1281 .mode_list = max11608_mode_list,
1282 .num_modes = ARRAY_SIZE(max11608_mode_list),
1283 .default_mode = s0to7,
1284 .info = &max1238_info,
1285 .channels = max11608_channels,
1286 .num_channels = ARRAY_SIZE(max11608_channels),
1290 .int_vref_mv = 4098,
1291 .mode_list = max1238_mode_list,
1292 .num_modes = ARRAY_SIZE(max1238_mode_list),
1293 .default_mode = s0to11,
1294 .info = &max1238_info,
1295 .channels = max1238_channels,
1296 .num_channels = ARRAY_SIZE(max1238_channels),
1300 .int_vref_mv = 2048,
1301 .mode_list = max1238_mode_list,
1302 .num_modes = ARRAY_SIZE(max1238_mode_list),
1303 .default_mode = s0to11,
1304 .info = &max1238_info,
1305 .channels = max1238_channels,
1306 .num_channels = ARRAY_SIZE(max1238_channels),
1310 .int_vref_mv = 4096,
1311 .mode_list = max11607_mode_list,
1312 .num_modes = ARRAY_SIZE(max11607_mode_list),
1313 .default_mode = s0to3,
1314 .info = &max1238_info,
1315 .channels = max1363_channels,
1316 .num_channels = ARRAY_SIZE(max1363_channels),
1320 .int_vref_mv = 2048,
1321 .mode_list = max11607_mode_list,
1322 .num_modes = ARRAY_SIZE(max11607_mode_list),
1323 .default_mode = s0to3,
1324 .info = &max1238_info,
1325 .channels = max1363_channels,
1326 .num_channels = ARRAY_SIZE(max1363_channels),
1330 .int_vref_mv = 4096,
1331 .mode_list = max11608_mode_list,
1332 .num_modes = ARRAY_SIZE(max11608_mode_list),
1333 .default_mode = s0to7,
1334 .info = &max1238_info,
1335 .channels = max11614_channels,
1336 .num_channels = ARRAY_SIZE(max11614_channels),
1340 .int_vref_mv = 2048,
1341 .mode_list = max11608_mode_list,
1342 .num_modes = ARRAY_SIZE(max11608_mode_list),
1343 .default_mode = s0to7,
1344 .info = &max1238_info,
1345 .channels = max11614_channels,
1346 .num_channels = ARRAY_SIZE(max11614_channels),
1350 .int_vref_mv = 4098,
1351 .mode_list = max1238_mode_list,
1352 .num_modes = ARRAY_SIZE(max1238_mode_list),
1353 .default_mode = s0to11,
1354 .info = &max1238_info,
1355 .channels = max1238_channels,
1356 .num_channels = ARRAY_SIZE(max1238_channels),
1360 .int_vref_mv = 2048,
1361 .mode_list = max1238_mode_list,
1362 .num_modes = ARRAY_SIZE(max1238_mode_list),
1363 .default_mode = s0to11,
1364 .info = &max1238_info,
1365 .channels = max1238_channels,
1366 .num_channels = ARRAY_SIZE(max1238_channels),
1370 .int_vref_mv = 2048,
1371 .mode_list = max11644_mode_list,
1372 .num_modes = ARRAY_SIZE(max11644_mode_list),
1373 .default_mode = s0to1,
1374 .info = &max1238_info,
1375 .channels = max11644_channels,
1376 .num_channels = ARRAY_SIZE(max11644_channels),
1380 .int_vref_mv = 4096,
1381 .mode_list = max11644_mode_list,
1382 .num_modes = ARRAY_SIZE(max11644_mode_list),
1383 .default_mode = s0to1,
1384 .info = &max1238_info,
1385 .channels = max11644_channels,
1386 .num_channels = ARRAY_SIZE(max11644_channels),
1390 .int_vref_mv = 2048,
1391 .mode_list = max11644_mode_list,
1392 .num_modes = ARRAY_SIZE(max11644_mode_list),
1393 .default_mode = s0to1,
1394 .info = &max1238_info,
1395 .channels = max11646_channels,
1396 .num_channels = ARRAY_SIZE(max11646_channels),
1400 .int_vref_mv = 4096,
1401 .mode_list = max11644_mode_list,
1402 .num_modes = ARRAY_SIZE(max11644_mode_list),
1403 .default_mode = s0to1,
1404 .info = &max1238_info,
1405 .channels = max11646_channels,
1406 .num_channels = ARRAY_SIZE(max11646_channels),
1410 static int max1363_initial_setup(struct max1363_state *st)
1412 st->setupbyte = MAX1363_SETUP_INT_CLOCK
1413 | MAX1363_SETUP_UNIPOLAR
1414 | MAX1363_SETUP_NORESET;
1417 st->setupbyte |= MAX1363_SETUP_AIN3_IS_REF_EXT_TO_REF;
1419 st->setupbyte |= MAX1363_SETUP_POWER_UP_INT_REF
1420 | MAX1363_SETUP_AIN3_IS_AIN3_REF_IS_INT;
1422 /* Set scan mode writes the config anyway so wait until then */
1423 st->setupbyte = MAX1363_SETUP_BYTE(st->setupbyte);
1424 st->current_mode = &max1363_mode_table[st->chip_info->default_mode];
1425 st->configbyte = MAX1363_CONFIG_BYTE(st->configbyte);
1427 return max1363_set_scan_mode(st);
1430 static int max1363_alloc_scan_masks(struct iio_dev *indio_dev)
1432 struct max1363_state *st = iio_priv(indio_dev);
1433 unsigned long *masks;
1436 masks = devm_kzalloc(&indio_dev->dev,
1437 BITS_TO_LONGS(MAX1363_MAX_CHANNELS) * sizeof(long) *
1438 (st->chip_info->num_modes + 1), GFP_KERNEL);
1442 for (i = 0; i < st->chip_info->num_modes; i++)
1443 bitmap_copy(masks + BITS_TO_LONGS(MAX1363_MAX_CHANNELS)*i,
1444 max1363_mode_table[st->chip_info->mode_list[i]]
1445 .modemask, MAX1363_MAX_CHANNELS);
1447 indio_dev->available_scan_masks = masks;
1452 static irqreturn_t max1363_trigger_handler(int irq, void *p)
1454 struct iio_poll_func *pf = p;
1455 struct iio_dev *indio_dev = pf->indio_dev;
1456 struct max1363_state *st = iio_priv(indio_dev);
1460 unsigned long numvals = bitmap_weight(st->current_mode->modemask,
1461 MAX1363_MAX_CHANNELS);
1463 /* Ensure the timestamp is 8 byte aligned */
1464 if (st->chip_info->bits != 8)
1468 if (indio_dev->scan_timestamp) {
1469 d_size += sizeof(s64);
1470 if (d_size % sizeof(s64))
1471 d_size += sizeof(s64) - (d_size % sizeof(s64));
1473 /* Monitor mode prevents reading. Whilst not currently implemented
1474 * might as well have this test in here in the meantime as it does
1480 rxbuf = kmalloc(d_size, GFP_KERNEL);
1483 if (st->chip_info->bits != 8)
1484 b_sent = i2c_master_recv(st->client, rxbuf, numvals*2);
1486 b_sent = i2c_master_recv(st->client, rxbuf, numvals);
1490 iio_push_to_buffers_with_timestamp(indio_dev, rxbuf, iio_get_time_ns());
1495 iio_trigger_notify_done(indio_dev->trig);
1500 static int max1363_probe(struct i2c_client *client,
1501 const struct i2c_device_id *id)
1504 struct max1363_state *st;
1505 struct iio_dev *indio_dev;
1506 struct regulator *vref;
1508 indio_dev = devm_iio_device_alloc(&client->dev,
1509 sizeof(struct max1363_state));
1513 indio_dev->dev.of_node = client->dev.of_node;
1514 ret = iio_map_array_register(indio_dev, client->dev.platform_data);
1518 st = iio_priv(indio_dev);
1520 st->reg = devm_regulator_get(&client->dev, "vcc");
1521 if (IS_ERR(st->reg)) {
1522 ret = PTR_ERR(st->reg);
1523 goto error_unregister_map;
1526 ret = regulator_enable(st->reg);
1528 goto error_unregister_map;
1530 /* this is only used for device removal purposes */
1531 i2c_set_clientdata(client, indio_dev);
1533 st->chip_info = &max1363_chip_info_tbl[id->driver_data];
1534 st->client = client;
1536 st->vref_uv = st->chip_info->int_vref_mv * 1000;
1537 vref = devm_regulator_get(&client->dev, "vref");
1538 if (!IS_ERR(vref)) {
1541 ret = regulator_enable(vref);
1543 goto error_disable_reg;
1545 vref_uv = regulator_get_voltage(vref);
1548 goto error_disable_reg;
1550 st->vref_uv = vref_uv;
1553 ret = max1363_alloc_scan_masks(indio_dev);
1555 goto error_disable_reg;
1557 /* Establish that the iio_dev is a child of the i2c device */
1558 indio_dev->dev.parent = &client->dev;
1559 indio_dev->name = id->name;
1560 indio_dev->channels = st->chip_info->channels;
1561 indio_dev->num_channels = st->chip_info->num_channels;
1562 indio_dev->info = st->chip_info->info;
1563 indio_dev->modes = INDIO_DIRECT_MODE;
1564 ret = max1363_initial_setup(st);
1566 goto error_disable_reg;
1568 ret = iio_triggered_buffer_setup(indio_dev, NULL,
1569 &max1363_trigger_handler, NULL);
1571 goto error_disable_reg;
1574 ret = devm_request_threaded_irq(&client->dev, st->client->irq,
1576 &max1363_event_handler,
1577 IRQF_TRIGGER_RISING | IRQF_ONESHOT,
1582 goto error_uninit_buffer;
1585 ret = iio_device_register(indio_dev);
1587 goto error_uninit_buffer;
1591 error_uninit_buffer:
1592 iio_triggered_buffer_cleanup(indio_dev);
1595 regulator_disable(st->vref);
1596 regulator_disable(st->reg);
1597 error_unregister_map:
1598 iio_map_array_unregister(indio_dev);
1602 static int max1363_remove(struct i2c_client *client)
1604 struct iio_dev *indio_dev = i2c_get_clientdata(client);
1605 struct max1363_state *st = iio_priv(indio_dev);
1607 iio_device_unregister(indio_dev);
1608 iio_triggered_buffer_cleanup(indio_dev);
1610 regulator_disable(st->vref);
1611 regulator_disable(st->reg);
1612 iio_map_array_unregister(indio_dev);
1617 static const struct i2c_device_id max1363_id[] = {
1618 { "max1361", max1361 },
1619 { "max1362", max1362 },
1620 { "max1363", max1363 },
1621 { "max1364", max1364 },
1622 { "max1036", max1036 },
1623 { "max1037", max1037 },
1624 { "max1038", max1038 },
1625 { "max1039", max1039 },
1626 { "max1136", max1136 },
1627 { "max1137", max1137 },
1628 { "max1138", max1138 },
1629 { "max1139", max1139 },
1630 { "max1236", max1236 },
1631 { "max1237", max1237 },
1632 { "max1238", max1238 },
1633 { "max1239", max1239 },
1634 { "max11600", max11600 },
1635 { "max11601", max11601 },
1636 { "max11602", max11602 },
1637 { "max11603", max11603 },
1638 { "max11604", max11604 },
1639 { "max11605", max11605 },
1640 { "max11606", max11606 },
1641 { "max11607", max11607 },
1642 { "max11608", max11608 },
1643 { "max11609", max11609 },
1644 { "max11610", max11610 },
1645 { "max11611", max11611 },
1646 { "max11612", max11612 },
1647 { "max11613", max11613 },
1648 { "max11614", max11614 },
1649 { "max11615", max11615 },
1650 { "max11616", max11616 },
1651 { "max11617", max11617 },
1655 MODULE_DEVICE_TABLE(i2c, max1363_id);
1657 static struct i2c_driver max1363_driver = {
1661 .probe = max1363_probe,
1662 .remove = max1363_remove,
1663 .id_table = max1363_id,
1665 module_i2c_driver(max1363_driver);
1667 MODULE_AUTHOR("Jonathan Cameron <jic23@kernel.org>");
1668 MODULE_DESCRIPTION("Maxim 1363 ADC");
1669 MODULE_LICENSE("GPL v2");