2 * Copyright (c) 2009-2010 Chelsio, Inc. All rights reserved.
4 * This software is available to you under a choice of one of two
5 * licenses. You may choose to be licensed under the terms of the GNU
6 * General Public License (GPL) Version 2, available from the file
7 * COPYING in the main directory of this source tree, or the
8 * OpenIB.org BSD license below:
10 * Redistribution and use in source and binary forms, with or
11 * without modification, are permitted provided that the following
14 * - Redistributions of source code must retain the above
15 * copyright notice, this list of conditions and the following
17 * - Redistributions in binary form must reproduce the above
18 * copyright notice, this list of conditions and the following
19 * disclaimer in the documentation and/or other materials
20 * provided with the distribution.
22 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
23 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
24 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
25 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
26 * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
27 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
28 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
31 #ifndef __IW_CXGB4_H__
32 #define __IW_CXGB4_H__
34 #include <linux/mutex.h>
35 #include <linux/list.h>
36 #include <linux/spinlock.h>
37 #include <linux/idr.h>
38 #include <linux/completion.h>
39 #include <linux/netdevice.h>
40 #include <linux/sched.h>
41 #include <linux/pci.h>
42 #include <linux/dma-mapping.h>
43 #include <linux/inet.h>
44 #include <linux/wait.h>
45 #include <linux/kref.h>
46 #include <linux/timer.h>
49 #include <asm/byteorder.h>
51 #include <net/net_namespace.h>
53 #include <rdma/ib_verbs.h>
54 #include <rdma/iw_cm.h>
57 #include "cxgb4_uld.h"
61 #define DRV_NAME "iw_cxgb4"
62 #define MOD DRV_NAME ":"
64 extern int c4iw_debug;
65 #define PDBG(fmt, args...) \
68 printk(MOD fmt, ## args); \
73 #define PBL_OFF(rdev_p, a) ((a) - (rdev_p)->lldi.vr->pbl.start)
74 #define RQT_OFF(rdev_p, a) ((a) - (rdev_p)->lldi.vr->rq.start)
76 static inline void *cplhdr(struct sk_buff *skb)
81 #define C4IW_ID_TABLE_F_RANDOM 1 /* Pseudo-randomize the id's returned */
82 #define C4IW_ID_TABLE_F_EMPTY 2 /* Table is initially empty */
84 struct c4iw_id_table {
86 u32 start; /* logical minimal id */
87 u32 last; /* hint for find */
93 struct c4iw_resource {
94 struct c4iw_id_table tpt_table;
95 struct c4iw_id_table qid_table;
96 struct c4iw_id_table pdid_table;
99 struct c4iw_qid_list {
100 struct list_head entry;
104 struct c4iw_dev_ucontext {
105 struct list_head qpids;
106 struct list_head cqids;
110 enum c4iw_rdev_flags {
111 T4_FATAL_ERROR = (1<<0),
123 struct c4iw_stat qid;
125 struct c4iw_stat stag;
126 struct c4iw_stat pbl;
127 struct c4iw_stat rqt;
128 struct c4iw_stat ocqp;
132 u64 db_state_transitions;
134 u64 act_ofld_conn_fails;
135 u64 pas_ofld_conn_fails;
139 struct c4iw_resource resource;
140 unsigned long qpshift;
142 unsigned long cqshift;
144 struct c4iw_dev_ucontext uctx;
145 struct gen_pool *pbl_pool;
146 struct gen_pool *rqt_pool;
147 struct gen_pool *ocqp_pool;
149 struct cxgb4_lld_info lldi;
150 unsigned long oc_mw_pa;
151 void __iomem *oc_mw_kva;
152 struct c4iw_stats stats;
155 static inline int c4iw_fatal_error(struct c4iw_rdev *rdev)
157 return rdev->flags & T4_FATAL_ERROR;
160 static inline int c4iw_num_stags(struct c4iw_rdev *rdev)
162 return min((int)T4_MAX_NUM_STAG, (int)(rdev->lldi.vr->stag.size >> 5));
165 #define C4IW_WR_TO (10*HZ)
167 struct c4iw_wr_wait {
168 struct completion completion;
172 static inline void c4iw_init_wr_wait(struct c4iw_wr_wait *wr_waitp)
175 init_completion(&wr_waitp->completion);
178 static inline void c4iw_wake_up(struct c4iw_wr_wait *wr_waitp, int ret)
181 complete(&wr_waitp->completion);
184 static inline int c4iw_wait_for_reply(struct c4iw_rdev *rdev,
185 struct c4iw_wr_wait *wr_waitp,
189 unsigned to = C4IW_WR_TO;
193 ret = wait_for_completion_timeout(&wr_waitp->completion, to);
195 printk(KERN_ERR MOD "%s - Device %s not responding - "
196 "tid %u qpid %u\n", func,
197 pci_name(rdev->lldi.pdev), hwtid, qpid);
198 if (c4iw_fatal_error(rdev)) {
199 wr_waitp->ret = -EIO;
206 PDBG("%s: FW reply %d tid %u qpid %u\n",
207 pci_name(rdev->lldi.pdev), wr_waitp->ret, hwtid, qpid);
208 return wr_waitp->ret;
218 struct ib_device ibdev;
219 struct c4iw_rdev rdev;
220 u32 device_cap_flags;
225 struct mutex db_mutex;
226 struct dentry *debugfs_root;
227 enum db_state db_state;
229 struct idr hwtid_idr;
234 static inline struct c4iw_dev *to_c4iw_dev(struct ib_device *ibdev)
236 return container_of(ibdev, struct c4iw_dev, ibdev);
239 static inline struct c4iw_dev *rdev_to_c4iw_dev(struct c4iw_rdev *rdev)
241 return container_of(rdev, struct c4iw_dev, rdev);
244 static inline struct c4iw_cq *get_chp(struct c4iw_dev *rhp, u32 cqid)
246 return idr_find(&rhp->cqidr, cqid);
249 static inline struct c4iw_qp *get_qhp(struct c4iw_dev *rhp, u32 qpid)
251 return idr_find(&rhp->qpidr, qpid);
254 static inline struct c4iw_mr *get_mhp(struct c4iw_dev *rhp, u32 mmid)
256 return idr_find(&rhp->mmidr, mmid);
259 static inline int _insert_handle(struct c4iw_dev *rhp, struct idr *idr,
260 void *handle, u32 id, int lock)
265 idr_preload(GFP_KERNEL);
266 spin_lock_irq(&rhp->lock);
269 ret = idr_alloc(idr, handle, id, id + 1, GFP_ATOMIC);
272 spin_unlock_irq(&rhp->lock);
276 BUG_ON(ret == -ENOSPC);
277 return ret < 0 ? ret : 0;
280 static inline int insert_handle(struct c4iw_dev *rhp, struct idr *idr,
281 void *handle, u32 id)
283 return _insert_handle(rhp, idr, handle, id, 1);
286 static inline int insert_handle_nolock(struct c4iw_dev *rhp, struct idr *idr,
287 void *handle, u32 id)
289 return _insert_handle(rhp, idr, handle, id, 0);
292 static inline void _remove_handle(struct c4iw_dev *rhp, struct idr *idr,
296 spin_lock_irq(&rhp->lock);
299 spin_unlock_irq(&rhp->lock);
302 static inline void remove_handle(struct c4iw_dev *rhp, struct idr *idr, u32 id)
304 _remove_handle(rhp, idr, id, 1);
307 static inline void remove_handle_nolock(struct c4iw_dev *rhp,
308 struct idr *idr, u32 id)
310 _remove_handle(rhp, idr, id, 0);
316 struct c4iw_dev *rhp;
319 static inline struct c4iw_pd *to_c4iw_pd(struct ib_pd *ibpd)
321 return container_of(ibpd, struct c4iw_pd, ibpd);
324 struct tpt_attributes {
327 enum fw_ri_mem_perms perms;
336 u32 remote_invaliate_disable:1;
338 u32 mw_bind_enable:1;
344 struct ib_umem *umem;
345 struct c4iw_dev *rhp;
347 struct tpt_attributes attr;
350 static inline struct c4iw_mr *to_c4iw_mr(struct ib_mr *ibmr)
352 return container_of(ibmr, struct c4iw_mr, ibmr);
357 struct c4iw_dev *rhp;
359 struct tpt_attributes attr;
362 static inline struct c4iw_mw *to_c4iw_mw(struct ib_mw *ibmw)
364 return container_of(ibmw, struct c4iw_mw, ibmw);
367 struct c4iw_fr_page_list {
368 struct ib_fast_reg_page_list ibpl;
369 DEFINE_DMA_UNMAP_ADDR(mapping);
371 struct c4iw_dev *dev;
375 static inline struct c4iw_fr_page_list *to_c4iw_fr_page_list(
376 struct ib_fast_reg_page_list *ibpl)
378 return container_of(ibpl, struct c4iw_fr_page_list, ibpl);
383 struct c4iw_dev *rhp;
386 spinlock_t comp_handler_lock;
388 wait_queue_head_t wait;
391 static inline struct c4iw_cq *to_c4iw_cq(struct ib_cq *ibcq)
393 return container_of(ibcq, struct c4iw_cq, ibcq);
396 struct c4iw_mpa_attributes {
398 u8 recv_marker_enabled;
399 u8 xmit_marker_enabled;
401 u8 enhanced_rdma_conn;
406 struct c4iw_qp_attributes {
412 u32 sq_max_sges_rdma_write;
416 u8 enable_rdma_write;
418 u8 enable_mmid0_fastreg;
423 char terminate_buffer[52];
424 u32 terminate_msg_len;
425 u8 is_terminate_local;
426 struct c4iw_mpa_attributes mpa_attr;
427 struct c4iw_ep *llp_stream_handle;
436 struct c4iw_dev *rhp;
438 struct c4iw_qp_attributes attr;
443 wait_queue_head_t wait;
444 struct timer_list timer;
447 static inline struct c4iw_qp *to_c4iw_qp(struct ib_qp *ibqp)
449 return container_of(ibqp, struct c4iw_qp, ibqp);
452 struct c4iw_ucontext {
453 struct ib_ucontext ibucontext;
454 struct c4iw_dev_ucontext uctx;
456 spinlock_t mmap_lock;
457 struct list_head mmaps;
460 static inline struct c4iw_ucontext *to_c4iw_ucontext(struct ib_ucontext *c)
462 return container_of(c, struct c4iw_ucontext, ibucontext);
465 struct c4iw_mm_entry {
466 struct list_head entry;
472 static inline struct c4iw_mm_entry *remove_mmap(struct c4iw_ucontext *ucontext,
473 u32 key, unsigned len)
475 struct list_head *pos, *nxt;
476 struct c4iw_mm_entry *mm;
478 spin_lock(&ucontext->mmap_lock);
479 list_for_each_safe(pos, nxt, &ucontext->mmaps) {
481 mm = list_entry(pos, struct c4iw_mm_entry, entry);
482 if (mm->key == key && mm->len == len) {
483 list_del_init(&mm->entry);
484 spin_unlock(&ucontext->mmap_lock);
485 PDBG("%s key 0x%x addr 0x%llx len %d\n", __func__,
486 key, (unsigned long long) mm->addr, mm->len);
490 spin_unlock(&ucontext->mmap_lock);
494 static inline void insert_mmap(struct c4iw_ucontext *ucontext,
495 struct c4iw_mm_entry *mm)
497 spin_lock(&ucontext->mmap_lock);
498 PDBG("%s key 0x%x addr 0x%llx len %d\n", __func__,
499 mm->key, (unsigned long long) mm->addr, mm->len);
500 list_add_tail(&mm->entry, &ucontext->mmaps);
501 spin_unlock(&ucontext->mmap_lock);
504 enum c4iw_qp_attr_mask {
505 C4IW_QP_ATTR_NEXT_STATE = 1 << 0,
506 C4IW_QP_ATTR_SQ_DB = 1<<1,
507 C4IW_QP_ATTR_RQ_DB = 1<<2,
508 C4IW_QP_ATTR_ENABLE_RDMA_READ = 1 << 7,
509 C4IW_QP_ATTR_ENABLE_RDMA_WRITE = 1 << 8,
510 C4IW_QP_ATTR_ENABLE_RDMA_BIND = 1 << 9,
511 C4IW_QP_ATTR_MAX_ORD = 1 << 11,
512 C4IW_QP_ATTR_MAX_IRD = 1 << 12,
513 C4IW_QP_ATTR_LLP_STREAM_HANDLE = 1 << 22,
514 C4IW_QP_ATTR_STREAM_MSG_BUFFER = 1 << 23,
515 C4IW_QP_ATTR_MPA_ATTR = 1 << 24,
516 C4IW_QP_ATTR_QP_CONTEXT_ACTIVATE = 1 << 25,
517 C4IW_QP_ATTR_VALID_MODIFY = (C4IW_QP_ATTR_ENABLE_RDMA_READ |
518 C4IW_QP_ATTR_ENABLE_RDMA_WRITE |
519 C4IW_QP_ATTR_MAX_ORD |
520 C4IW_QP_ATTR_MAX_IRD |
521 C4IW_QP_ATTR_LLP_STREAM_HANDLE |
522 C4IW_QP_ATTR_STREAM_MSG_BUFFER |
523 C4IW_QP_ATTR_MPA_ATTR |
524 C4IW_QP_ATTR_QP_CONTEXT_ACTIVATE)
527 int c4iw_modify_qp(struct c4iw_dev *rhp,
529 enum c4iw_qp_attr_mask mask,
530 struct c4iw_qp_attributes *attrs,
537 C4IW_QP_STATE_TERMINATE,
538 C4IW_QP_STATE_CLOSING,
542 static inline int c4iw_convert_state(enum ib_qp_state ib_state)
547 return C4IW_QP_STATE_IDLE;
549 return C4IW_QP_STATE_RTS;
551 return C4IW_QP_STATE_CLOSING;
553 return C4IW_QP_STATE_TERMINATE;
555 return C4IW_QP_STATE_ERROR;
561 static inline int to_ib_qp_state(int c4iw_qp_state)
563 switch (c4iw_qp_state) {
564 case C4IW_QP_STATE_IDLE:
566 case C4IW_QP_STATE_RTS:
568 case C4IW_QP_STATE_CLOSING:
570 case C4IW_QP_STATE_TERMINATE:
572 case C4IW_QP_STATE_ERROR:
578 static inline u32 c4iw_ib_to_tpt_access(int a)
580 return (a & IB_ACCESS_REMOTE_WRITE ? FW_RI_MEM_ACCESS_REM_WRITE : 0) |
581 (a & IB_ACCESS_REMOTE_READ ? FW_RI_MEM_ACCESS_REM_READ : 0) |
582 (a & IB_ACCESS_LOCAL_WRITE ? FW_RI_MEM_ACCESS_LOCAL_WRITE : 0) |
583 FW_RI_MEM_ACCESS_LOCAL_READ;
586 static inline u32 c4iw_ib_to_tpt_bind_access(int acc)
588 return (acc & IB_ACCESS_REMOTE_WRITE ? FW_RI_MEM_ACCESS_REM_WRITE : 0) |
589 (acc & IB_ACCESS_REMOTE_READ ? FW_RI_MEM_ACCESS_REM_READ : 0);
592 enum c4iw_mmid_state {
593 C4IW_STAG_STATE_VALID,
594 C4IW_STAG_STATE_INVALID
597 #define C4IW_NODE_DESC "cxgb4 Chelsio Communications"
599 #define MPA_KEY_REQ "MPA ID Req Frame"
600 #define MPA_KEY_REP "MPA ID Rep Frame"
602 #define MPA_MAX_PRIVATE_DATA 256
603 #define MPA_ENHANCED_RDMA_CONN 0x10
604 #define MPA_REJECT 0x20
606 #define MPA_MARKERS 0x80
607 #define MPA_FLAGS_MASK 0xE0
609 #define MPA_V2_PEER2PEER_MODEL 0x8000
610 #define MPA_V2_ZERO_LEN_FPDU_RTR 0x4000
611 #define MPA_V2_RDMA_WRITE_RTR 0x8000
612 #define MPA_V2_RDMA_READ_RTR 0x4000
613 #define MPA_V2_IRD_ORD_MASK 0x3FFF
615 #define c4iw_put_ep(ep) { \
616 PDBG("put_ep (via %s:%u) ep %p refcnt %d\n", __func__, __LINE__, \
617 ep, atomic_read(&((ep)->kref.refcount))); \
618 WARN_ON(atomic_read(&((ep)->kref.refcount)) < 1); \
619 kref_put(&((ep)->kref), _c4iw_free_ep); \
622 #define c4iw_get_ep(ep) { \
623 PDBG("get_ep (via %s:%u) ep %p, refcnt %d\n", __func__, __LINE__, \
624 ep, atomic_read(&((ep)->kref.refcount))); \
625 kref_get(&((ep)->kref)); \
627 void _c4iw_free_ep(struct kref *kref);
633 __be16 private_data_size;
637 struct mpa_v2_conn_params {
642 struct terminate_message {
649 #define TERM_MAX_LENGTH (sizeof(struct terminate_message) + 2 + 18 + 28)
651 enum c4iw_layers_types {
655 RDMAP_LOCAL_CATA = 0x00,
656 RDMAP_REMOTE_PROT = 0x01,
657 RDMAP_REMOTE_OP = 0x02,
658 DDP_LOCAL_CATA = 0x00,
659 DDP_TAGGED_ERR = 0x01,
660 DDP_UNTAGGED_ERR = 0x02,
664 enum c4iw_rdma_ecodes {
665 RDMAP_INV_STAG = 0x00,
666 RDMAP_BASE_BOUNDS = 0x01,
667 RDMAP_ACC_VIOL = 0x02,
668 RDMAP_STAG_NOT_ASSOC = 0x03,
669 RDMAP_TO_WRAP = 0x04,
670 RDMAP_INV_VERS = 0x05,
671 RDMAP_INV_OPCODE = 0x06,
672 RDMAP_STREAM_CATA = 0x07,
673 RDMAP_GLOBAL_CATA = 0x08,
674 RDMAP_CANT_INV_STAG = 0x09,
675 RDMAP_UNSPECIFIED = 0xff
678 enum c4iw_ddp_ecodes {
679 DDPT_INV_STAG = 0x00,
680 DDPT_BASE_BOUNDS = 0x01,
681 DDPT_STAG_NOT_ASSOC = 0x02,
683 DDPT_INV_VERS = 0x04,
685 DDPU_INV_MSN_NOBUF = 0x02,
686 DDPU_INV_MSN_RANGE = 0x03,
688 DDPU_MSG_TOOBIG = 0x05,
692 enum c4iw_mpa_ecodes {
694 MPA_MARKER_ERR = 0x03,
695 MPA_LOCAL_CATA = 0x05,
696 MPA_INSUFF_IRD = 0x06,
697 MPA_NOMATCH_RTR = 0x07,
716 PEER_ABORT_IN_PROGRESS = 0,
717 ABORT_REQ_IN_PROGRESS = 1,
718 RELEASE_RESOURCES = 2,
724 enum c4iw_ep_history {
744 CONN_RPL_UPCALL = 19,
745 ACT_RETRY_NOMEM = 20,
749 struct c4iw_ep_common {
750 struct iw_cm_id *cm_id;
752 struct c4iw_dev *dev;
753 enum c4iw_ep_state state;
756 struct sockaddr_in local_addr;
757 struct sockaddr_in remote_addr;
758 struct c4iw_wr_wait wr_wait;
760 unsigned long history;
763 struct c4iw_listen_ep {
764 struct c4iw_ep_common com;
770 struct c4iw_ep_common com;
771 struct c4iw_ep *parent_ep;
772 struct timer_list timer;
773 struct list_head entry;
778 struct l2t_entry *l2t;
779 struct dst_entry *dst;
780 struct sk_buff *mpa_skb;
781 struct c4iw_mpa_attributes mpa_attr;
782 u8 mpa_pkt[sizeof(struct mpa_message) + MPA_MAX_PRIVATE_DATA];
783 unsigned int mpa_pkt_len;
796 u8 retry_with_mpa_v1;
797 u8 tried_with_mpa_v1;
798 unsigned int retry_count;
801 static inline struct c4iw_ep *to_ep(struct iw_cm_id *cm_id)
803 return cm_id->provider_data;
806 static inline struct c4iw_listen_ep *to_listen_ep(struct iw_cm_id *cm_id)
808 return cm_id->provider_data;
811 static inline int compute_wscale(int win)
815 while (wscale < 14 && (65535<<wscale) < win)
820 u32 c4iw_id_alloc(struct c4iw_id_table *alloc);
821 void c4iw_id_free(struct c4iw_id_table *alloc, u32 obj);
822 int c4iw_id_table_alloc(struct c4iw_id_table *alloc, u32 start, u32 num,
823 u32 reserved, u32 flags);
824 void c4iw_id_table_free(struct c4iw_id_table *alloc);
826 typedef int (*c4iw_handler_func)(struct c4iw_dev *dev, struct sk_buff *skb);
828 int c4iw_ep_redirect(void *ctx, struct dst_entry *old, struct dst_entry *new,
829 struct l2t_entry *l2t);
830 void c4iw_put_qpid(struct c4iw_rdev *rdev, u32 qpid,
831 struct c4iw_dev_ucontext *uctx);
832 u32 c4iw_get_resource(struct c4iw_id_table *id_table);
833 void c4iw_put_resource(struct c4iw_id_table *id_table, u32 entry);
834 int c4iw_init_resource(struct c4iw_rdev *rdev, u32 nr_tpt, u32 nr_pdid);
835 int c4iw_init_ctrl_qp(struct c4iw_rdev *rdev);
836 int c4iw_pblpool_create(struct c4iw_rdev *rdev);
837 int c4iw_rqtpool_create(struct c4iw_rdev *rdev);
838 int c4iw_ocqp_pool_create(struct c4iw_rdev *rdev);
839 void c4iw_pblpool_destroy(struct c4iw_rdev *rdev);
840 void c4iw_rqtpool_destroy(struct c4iw_rdev *rdev);
841 void c4iw_ocqp_pool_destroy(struct c4iw_rdev *rdev);
842 void c4iw_destroy_resource(struct c4iw_resource *rscp);
843 int c4iw_destroy_ctrl_qp(struct c4iw_rdev *rdev);
844 int c4iw_register_device(struct c4iw_dev *dev);
845 void c4iw_unregister_device(struct c4iw_dev *dev);
846 int __init c4iw_cm_init(void);
847 void __exit c4iw_cm_term(void);
848 void c4iw_release_dev_ucontext(struct c4iw_rdev *rdev,
849 struct c4iw_dev_ucontext *uctx);
850 void c4iw_init_dev_ucontext(struct c4iw_rdev *rdev,
851 struct c4iw_dev_ucontext *uctx);
852 int c4iw_poll_cq(struct ib_cq *ibcq, int num_entries, struct ib_wc *wc);
853 int c4iw_post_send(struct ib_qp *ibqp, struct ib_send_wr *wr,
854 struct ib_send_wr **bad_wr);
855 int c4iw_post_receive(struct ib_qp *ibqp, struct ib_recv_wr *wr,
856 struct ib_recv_wr **bad_wr);
857 int c4iw_bind_mw(struct ib_qp *qp, struct ib_mw *mw,
858 struct ib_mw_bind *mw_bind);
859 int c4iw_connect(struct iw_cm_id *cm_id, struct iw_cm_conn_param *conn_param);
860 int c4iw_create_listen(struct iw_cm_id *cm_id, int backlog);
861 int c4iw_destroy_listen(struct iw_cm_id *cm_id);
862 int c4iw_accept_cr(struct iw_cm_id *cm_id, struct iw_cm_conn_param *conn_param);
863 int c4iw_reject_cr(struct iw_cm_id *cm_id, const void *pdata, u8 pdata_len);
864 void c4iw_qp_add_ref(struct ib_qp *qp);
865 void c4iw_qp_rem_ref(struct ib_qp *qp);
866 void c4iw_free_fastreg_pbl(struct ib_fast_reg_page_list *page_list);
867 struct ib_fast_reg_page_list *c4iw_alloc_fastreg_pbl(
868 struct ib_device *device,
870 struct ib_mr *c4iw_alloc_fast_reg_mr(struct ib_pd *pd, int pbl_depth);
871 int c4iw_dealloc_mw(struct ib_mw *mw);
872 struct ib_mw *c4iw_alloc_mw(struct ib_pd *pd, enum ib_mw_type type);
873 struct ib_mr *c4iw_reg_user_mr(struct ib_pd *pd, u64 start,
874 u64 length, u64 virt, int acc,
875 struct ib_udata *udata);
876 struct ib_mr *c4iw_get_dma_mr(struct ib_pd *pd, int acc);
877 struct ib_mr *c4iw_register_phys_mem(struct ib_pd *pd,
878 struct ib_phys_buf *buffer_list,
882 int c4iw_reregister_phys_mem(struct ib_mr *mr,
885 struct ib_phys_buf *buffer_list,
887 int acc, u64 *iova_start);
888 int c4iw_dereg_mr(struct ib_mr *ib_mr);
889 int c4iw_destroy_cq(struct ib_cq *ib_cq);
890 struct ib_cq *c4iw_create_cq(struct ib_device *ibdev, int entries,
892 struct ib_ucontext *ib_context,
893 struct ib_udata *udata);
894 int c4iw_resize_cq(struct ib_cq *cq, int cqe, struct ib_udata *udata);
895 int c4iw_arm_cq(struct ib_cq *ibcq, enum ib_cq_notify_flags flags);
896 int c4iw_destroy_qp(struct ib_qp *ib_qp);
897 struct ib_qp *c4iw_create_qp(struct ib_pd *pd,
898 struct ib_qp_init_attr *attrs,
899 struct ib_udata *udata);
900 int c4iw_ib_modify_qp(struct ib_qp *ibqp, struct ib_qp_attr *attr,
901 int attr_mask, struct ib_udata *udata);
902 int c4iw_ib_query_qp(struct ib_qp *ibqp, struct ib_qp_attr *attr,
903 int attr_mask, struct ib_qp_init_attr *init_attr);
904 struct ib_qp *c4iw_get_qp(struct ib_device *dev, int qpn);
905 u32 c4iw_rqtpool_alloc(struct c4iw_rdev *rdev, int size);
906 void c4iw_rqtpool_free(struct c4iw_rdev *rdev, u32 addr, int size);
907 u32 c4iw_pblpool_alloc(struct c4iw_rdev *rdev, int size);
908 void c4iw_pblpool_free(struct c4iw_rdev *rdev, u32 addr, int size);
909 u32 c4iw_ocqp_pool_alloc(struct c4iw_rdev *rdev, int size);
910 void c4iw_ocqp_pool_free(struct c4iw_rdev *rdev, u32 addr, int size);
911 int c4iw_ofld_send(struct c4iw_rdev *rdev, struct sk_buff *skb);
912 void c4iw_flush_hw_cq(struct t4_cq *cq);
913 void c4iw_count_rcqes(struct t4_cq *cq, struct t4_wq *wq, int *count);
914 void c4iw_count_scqes(struct t4_cq *cq, struct t4_wq *wq, int *count);
915 int c4iw_ep_disconnect(struct c4iw_ep *ep, int abrupt, gfp_t gfp);
916 int c4iw_flush_rq(struct t4_wq *wq, struct t4_cq *cq, int count);
917 int c4iw_flush_sq(struct t4_wq *wq, struct t4_cq *cq, int count);
918 int c4iw_ev_handler(struct c4iw_dev *rnicp, u32 qid);
919 u16 c4iw_rqes_posted(struct c4iw_qp *qhp);
920 int c4iw_post_terminate(struct c4iw_qp *qhp, struct t4_cqe *err_cqe);
921 u32 c4iw_get_cqid(struct c4iw_rdev *rdev, struct c4iw_dev_ucontext *uctx);
922 void c4iw_put_cqid(struct c4iw_rdev *rdev, u32 qid,
923 struct c4iw_dev_ucontext *uctx);
924 u32 c4iw_get_qpid(struct c4iw_rdev *rdev, struct c4iw_dev_ucontext *uctx);
925 void c4iw_put_qpid(struct c4iw_rdev *rdev, u32 qid,
926 struct c4iw_dev_ucontext *uctx);
927 void c4iw_ev_dispatch(struct c4iw_dev *dev, struct t4_cqe *err_cqe);
929 extern struct cxgb4_client t4c_client;
930 extern c4iw_handler_func c4iw_handlers[NUM_CPL_CMDS];
931 extern int c4iw_max_read_depth;
932 extern int db_fc_threshold;