2 * IBM eServer eHCA Infiniband device driver for Linux on POWER
4 * Struct definition for eHCA internal structures
6 * Authors: Heiko J Schick <schickhj@de.ibm.com>
7 * Christoph Raisch <raisch@de.ibm.com>
9 * Copyright (c) 2005 IBM Corporation
11 * All rights reserved.
13 * This source code is distributed under a dual license of GPL v2.0 and OpenIB
18 * Redistribution and use in source and binary forms, with or without
19 * modification, are permitted provided that the following conditions are met:
21 * Redistributions of source code must retain the above copyright notice, this
22 * list of conditions and the following disclaimer.
24 * Redistributions in binary form must reproduce the above copyright notice,
25 * this list of conditions and the following disclaimer in the documentation
26 * and/or other materials
27 * provided with the distribution.
29 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
30 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
31 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
32 * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
33 * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
34 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
35 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR
36 * BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER
37 * IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
38 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
39 * POSSIBILITY OF SUCH DAMAGE.
42 #ifndef __EHCA_CLASSES_H__
43 #define __EHCA_CLASSES_H__
55 #include <linux/wait.h>
57 #include <rdma/ib_verbs.h>
58 #include <rdma/ib_user_verbs.h>
61 #include "ehca_classes_pSeries.h"
63 #include "ipz_pt_fn.h"
67 #define EHCA_EQE_CACHE_SIZE 20
69 struct ehca_eqe_cache_entry {
76 struct ipz_queue ipz_queue;
77 struct ipz_eq_handle ipz_eq_handle;
78 struct work_struct work;
79 struct h_galpas galpas;
83 struct tasklet_struct interrupt_task;
85 spinlock_t irq_spinlock;
86 struct ehca_eqe_cache_entry eqe_cache[EHCA_EQE_CACHE_SIZE];
90 struct ib_cq *ibcq_aqp1;
91 struct ib_qp *ibqp_aqp1;
93 enum ib_port_state port_state;
97 struct ib_device ib_device;
98 struct ibmebus_dev *ibmebus_dev;
101 struct list_head shca_list;
102 struct ipz_adapter_handle ipz_hca_handle;
103 struct ehca_sport sport[2];
106 struct ehca_mr *maxmr;
108 struct h_galpas galpas;
120 struct ipz_queue ipz_squeue;
121 struct ipz_queue ipz_rqueue;
122 struct h_galpas galpas;
126 spinlock_t spinlock_s;
127 spinlock_t spinlock_r;
128 u32 sq_max_inline_data_size;
129 struct ipz_qp_handle ipz_qp_handle;
131 struct ib_qp_init_attr init_attr;
132 struct ehca_cq *send_cq;
133 struct ehca_cq *recv_cq;
134 unsigned int sqerr_purgeflag;
135 struct hlist_node list_entries;
136 /* mmap counter for resources mapped into user space */
142 /* must be power of 2 */
143 #define QP_HASHTAB_LEN 8
147 struct ipz_queue ipz_queue;
148 struct h_galpas galpas;
153 struct ipz_cq_handle ipz_cq_handle;
156 struct hlist_head qp_hashtab[QP_HASHTAB_LEN];
157 struct list_head entry;
158 u32 nr_callbacks; /* #events assigned to cpu by scaling code */
159 u32 nr_events; /* #events seen */
160 wait_queue_head_t wait_completion;
161 spinlock_t task_lock;
163 /* mmap counter for resources mapped into user space */
169 EHCA_MR_FLAG_FMR = 0x80000000, /* FMR, created with ehca_alloc_fmr */
170 EHCA_MR_FLAG_MAXMR = 0x40000000, /* max-MR */
175 struct ib_mr ib_mr; /* must always be first in ehca_mr */
176 struct ib_fmr ib_fmr; /* must always be first in ehca_mr */
180 enum ehca_mr_flag flags;
181 u32 num_pages; /* number of MR pages */
182 u32 num_4k; /* number of 4k "page" portions to form MR */
183 int acl; /* ACL (stored here for usage in reregister) */
184 u64 *start; /* virtual start address (stored here for */
185 /* usage in reregister) */
186 u64 size; /* size (stored here for usage in reregister) */
187 u32 fmr_page_size; /* page size for FMR */
188 u32 fmr_max_pages; /* max pages for FMR */
189 u32 fmr_max_maps; /* max outstanding maps for FMR */
190 u32 fmr_map_cnt; /* map counter for FMR */
191 /* fw specific data */
192 struct ipz_mrmw_handle ipz_mr_handle; /* MR handle for h-calls */
193 struct h_galpas galpas;
194 /* data for userspace bridge */
200 struct ib_mw ib_mw; /* gen2 mw, must always be first in ehca_mw */
203 u8 never_bound; /* indication MW was never bound */
204 struct ipz_mrmw_handle ipz_mw_handle; /* MW handle for h-calls */
205 struct h_galpas galpas;
208 enum ehca_mr_pgi_type {
209 EHCA_MR_PGI_PHYS = 1, /* type of ehca_reg_phys_mr,
210 * ehca_rereg_phys_mr,
211 * ehca_reg_internal_maxmr */
212 EHCA_MR_PGI_USER = 2, /* type of ehca_reg_user_mr */
213 EHCA_MR_PGI_FMR = 3 /* type of ehca_map_phys_fmr */
216 struct ehca_mr_pginfo {
217 enum ehca_mr_pgi_type type;
220 u64 num_4k; /* number of 4k "page" portions */
221 u64 page_4k_cnt; /* counter for 4k "page" portions */
222 u64 next_4k; /* next 4k "page" portion in buffer/chunk/listelem */
224 /* type EHCA_MR_PGI_PHYS section */
226 struct ib_phys_buf *phys_buf_array;
229 /* type EHCA_MR_PGI_USER section */
230 struct ib_umem *region;
231 struct ib_umem_chunk *next_chunk;
234 /* type EHCA_MR_PGI_FMR section */
237 /* next_4k also used within EHCA_MR_PGI_FMR */
240 /* output parameters for MR/FMR hipz calls */
241 struct ehca_mr_hipzout_parms {
242 struct ipz_mrmw_handle handle;
250 /* output parameters for MW hipz calls */
251 struct ehca_mw_hipzout_parms {
252 struct ipz_mrmw_handle handle;
258 struct ehca_ud_av av;
261 struct ehca_ucontext {
262 struct ib_ucontext ib_ucontext;
265 int ehca_init_pd_cache(void);
266 void ehca_cleanup_pd_cache(void);
267 int ehca_init_cq_cache(void);
268 void ehca_cleanup_cq_cache(void);
269 int ehca_init_qp_cache(void);
270 void ehca_cleanup_qp_cache(void);
271 int ehca_init_av_cache(void);
272 void ehca_cleanup_av_cache(void);
273 int ehca_init_mrmw_cache(void);
274 void ehca_cleanup_mrmw_cache(void);
276 extern spinlock_t ehca_qp_idr_lock;
277 extern spinlock_t ehca_cq_idr_lock;
278 extern struct idr ehca_qp_idr;
279 extern struct idr ehca_cq_idr;
281 extern int ehca_static_rate;
282 extern int ehca_port_act_time;
283 extern int ehca_use_hp_mr;
284 extern int ehca_scaling_code;
286 struct ipzu_queue_resp {
287 u32 qe_size; /* queue entry size */
289 u32 queue_length; /* queue length allocated in bytes */
292 u32 dummy; /* padding for 8 byte alignment */
295 struct ehca_create_cq_resp {
298 struct ipzu_queue_resp ipz_queue;
301 struct ehca_create_qp_resp {
306 /* qp_num assigned by ehca: sqp0/1 may have got different numbers */
308 u32 dummy; /* padding for 8 byte alignment */
309 struct ipzu_queue_resp ipz_squeue;
310 struct ipzu_queue_resp ipz_rqueue;
313 struct ehca_alloc_cq_parms {
315 u32 act_nr_of_entries;
317 struct ipz_eq_handle eq_handle;
320 struct ehca_alloc_qp_parms {
328 u16 act_nr_send_wqes;
329 u16 act_nr_recv_wqes;
336 struct ipz_eq_handle ipz_eq_handle;
340 int ehca_cq_assign_qp(struct ehca_cq *cq, struct ehca_qp *qp);
341 int ehca_cq_unassign_qp(struct ehca_cq *cq, unsigned int qp_num);
342 struct ehca_qp* ehca_cq_get_qp(struct ehca_cq *cq, int qp_num);