drivers/infiniband/hw/mlx4/mad.c

   1 /*
   2  * Copyright (c) 2007 Cisco Systems, Inc. All rights reserved.
   3  *
   4  * This software is available to you under a choice of one of two
   5  * licenses.  You may choose to be licensed under the terms of the GNU
   6  * General Public License (GPL) Version 2, available from the file
   7  * COPYING in the main directory of this source tree, or the
   8  * OpenIB.org BSD license below:
   9  *
  10  *     Redistribution and use in source and binary forms, with or
  11  *     without modification, are permitted provided that the following
  12  *     conditions are met:
  13  *
  14  *      - Redistributions of source code must retain the above
  15  *        copyright notice, this list of conditions and the following
  16  *        disclaimer.
  17  *
  18  *      - Redistributions in binary form must reproduce the above
  19  *        copyright notice, this list of conditions and the following
  20  *        disclaimer in the documentation and/or other materials
  21  *        provided with the distribution.
  22  *
  23  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
  24  * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
  25  * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
  26  * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
  27  * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
  28  * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  29  * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
  30  * SOFTWARE.
  31  */
  32
  33 #include <rdma/ib_mad.h>
  34 #include <rdma/ib_smi.h>
  35 #include <rdma/ib_sa.h>
  36 #include <rdma/ib_cache.h>
  37
  38 #include <linux/random.h>
  39 #include <linux/mlx4/cmd.h>
  40 #include <linux/gfp.h>
  41 #include <rdma/ib_pma.h>
  42
  43 #include "mlx4_ib.h"
  44
  45 enum {
  46         MLX4_IB_VENDOR_CLASS1 = 0x9,
  47         MLX4_IB_VENDOR_CLASS2 = 0xa
  48 };
  49
  50 #define MLX4_TUN_SEND_WRID_SHIFT 34
  51 #define MLX4_TUN_QPN_SHIFT 32
  52 #define MLX4_TUN_WRID_RECV (((u64) 1) << MLX4_TUN_SEND_WRID_SHIFT)
  53 #define MLX4_TUN_SET_WRID_QPN(a) (((u64) ((a) & 0x3)) << MLX4_TUN_QPN_SHIFT)
  54
  55 #define MLX4_TUN_IS_RECV(a)  (((a) >>  MLX4_TUN_SEND_WRID_SHIFT) & 0x1)
  56 #define MLX4_TUN_WRID_QPN(a) (((a) >> MLX4_TUN_QPN_SHIFT) & 0x3)
  57
  58  /* Port mgmt change event handling */
  59
  60 #define GET_BLK_PTR_FROM_EQE(eqe) be32_to_cpu(eqe->event.port_mgmt_change.params.tbl_change_info.block_ptr)
  61 #define GET_MASK_FROM_EQE(eqe) be32_to_cpu(eqe->event.port_mgmt_change.params.tbl_change_info.tbl_entries_mask)
  62 #define NUM_IDX_IN_PKEY_TBL_BLK 32
  63 #define GUID_TBL_ENTRY_SIZE 8      /* size in bytes */
  64 #define GUID_TBL_BLK_NUM_ENTRIES 8
  65 #define GUID_TBL_BLK_SIZE (GUID_TBL_ENTRY_SIZE * GUID_TBL_BLK_NUM_ENTRIES)
  66
  67 /* Counters should be saturate once they reach their maximum value */
  68 #define ASSIGN_32BIT_COUNTER(counter, value) do {\
  69         if ((value) > U32_MAX)                   \
  70                 counter = cpu_to_be32(U32_MAX); \
  71         else                                     \
  72                 counter = cpu_to_be32(value);    \
  73 } while (0)
  74
  75 struct mlx4_mad_rcv_buf {
  76         struct ib_grh grh;
  77         u8 payload[256];
  78 } __packed;
  79
  80 struct mlx4_mad_snd_buf {
  81         u8 payload[256];
  82 } __packed;
  83
  84 struct mlx4_tunnel_mad {
  85         struct ib_grh grh;
  86         struct mlx4_ib_tunnel_header hdr;
  87         struct ib_mad mad;
  88 } __packed;
  89
  90 struct mlx4_rcv_tunnel_mad {
  91         struct mlx4_rcv_tunnel_hdr hdr;
  92         struct ib_grh grh;
  93         struct ib_mad mad;
  94 } __packed;
  95
  96 static void handle_client_rereg_event(struct mlx4_ib_dev *dev, u8 port_num);
  97 static void handle_lid_change_event(struct mlx4_ib_dev *dev, u8 port_num);
  98 static void __propagate_pkey_ev(struct mlx4_ib_dev *dev, int port_num,
  99                                 int block, u32 change_bitmap);
 100
 101 __be64 mlx4_ib_gen_node_guid(void)
 102 {
 103 #define NODE_GUID_HI    ((u64) (((u64)IB_OPENIB_OUI) << 40))
 104         return cpu_to_be64(NODE_GUID_HI | prandom_u32());
 105 }
 106
 107 __be64 mlx4_ib_get_new_demux_tid(struct mlx4_ib_demux_ctx *ctx)
 108 {
 109         return cpu_to_be64(atomic_inc_return(&ctx->tid)) |
 110                 cpu_to_be64(0xff00000000000000LL);
 111 }
 112
 113 int mlx4_MAD_IFC(struct mlx4_ib_dev *dev, int mad_ifc_flags,
 114                  int port, const struct ib_wc *in_wc,
 115                  const struct ib_grh *in_grh,
 116                  const void *in_mad, void *response_mad)
 117 {
 118         struct mlx4_cmd_mailbox *inmailbox, *outmailbox;
 119         void *inbox;
 120         int err;
 121         u32 in_modifier = port;
 122         u8 op_modifier = 0;
 123
 124         inmailbox = mlx4_alloc_cmd_mailbox(dev->dev);
 125         if (IS_ERR(inmailbox))
 126                 return PTR_ERR(inmailbox);
 127         inbox = inmailbox->buf;
 128
 129         outmailbox = mlx4_alloc_cmd_mailbox(dev->dev);
 130         if (IS_ERR(outmailbox)) {
 131                 mlx4_free_cmd_mailbox(dev->dev, inmailbox);
 132                 return PTR_ERR(outmailbox);
 133         }
 134
 135         memcpy(inbox, in_mad, 256);
 136
 137         /*
 138          * Key check traps can't be generated unless we have in_wc to
 139          * tell us where to send the trap.
 140          */
 141         if ((mad_ifc_flags & MLX4_MAD_IFC_IGNORE_MKEY) || !in_wc)
 142                 op_modifier |= 0x1;
 143         if ((mad_ifc_flags & MLX4_MAD_IFC_IGNORE_BKEY) || !in_wc)
 144                 op_modifier |= 0x2;
 145         if (mlx4_is_mfunc(dev->dev) &&
 146             (mad_ifc_flags & MLX4_MAD_IFC_NET_VIEW || in_wc))
 147                 op_modifier |= 0x8;
 148
 149         if (in_wc) {
 150                 struct {
 151                         __be32          my_qpn;
 152                         u32             reserved1;
 153                         __be32          rqpn;
 154                         u8              sl;
 155                         u8              g_path;
 156                         u16             reserved2[2];
 157                         __be16          pkey;
 158                         u32             reserved3[11];
 159                         u8              grh[40];
 160                 } *ext_info;
 161
 162                 memset(inbox + 256, 0, 256);
 163                 ext_info = inbox + 256;
 164
 165                 ext_info->my_qpn = cpu_to_be32(in_wc->qp->qp_num);
 166                 ext_info->rqpn   = cpu_to_be32(in_wc->src_qp);
 167                 ext_info->sl     = in_wc->sl << 4;
 168                 ext_info->g_path = in_wc->dlid_path_bits |
 169                         (in_wc->wc_flags & IB_WC_GRH ? 0x80 : 0);
 170                 ext_info->pkey   = cpu_to_be16(in_wc->pkey_index);
 171
 172                 if (in_grh)
 173                         memcpy(ext_info->grh, in_grh, 40);
 174
 175                 op_modifier |= 0x4;
 176
 177                 in_modifier |= in_wc->slid << 16;
 178         }
 179
 180         err = mlx4_cmd_box(dev->dev, inmailbox->dma, outmailbox->dma, in_modifier,
 181                            mlx4_is_master(dev->dev) ? (op_modifier & ~0x8) : op_modifier,
 182                            MLX4_CMD_MAD_IFC, MLX4_CMD_TIME_CLASS_C,
 183                            (op_modifier & 0x8) ? MLX4_CMD_NATIVE : MLX4_CMD_WRAPPED);
 184
 185         if (!err)
 186                 memcpy(response_mad, outmailbox->buf, 256);
 187
 188         mlx4_free_cmd_mailbox(dev->dev, inmailbox);
 189         mlx4_free_cmd_mailbox(dev->dev, outmailbox);
 190
 191         return err;
 192 }
 193
 194 static void update_sm_ah(struct mlx4_ib_dev *dev, u8 port_num, u16 lid, u8 sl)
 195 {
 196         struct ib_ah *new_ah;
 197         struct ib_ah_attr ah_attr;
 198         unsigned long flags;
 199
 200         if (!dev->send_agent[port_num - 1][0])
 201                 return;
 202
 203         memset(&ah_attr, 0, sizeof ah_attr);
 204         ah_attr.dlid     = lid;
 205         ah_attr.sl       = sl;
 206         ah_attr.port_num = port_num;
 207
 208         new_ah = ib_create_ah(dev->send_agent[port_num - 1][0]->qp->pd,
 209                               &ah_attr);
 210         if (IS_ERR(new_ah))
 211                 return;
 212
 213         spin_lock_irqsave(&dev->sm_lock, flags);
 214         if (dev->sm_ah[port_num - 1])
 215                 ib_destroy_ah(dev->sm_ah[port_num - 1]);
 216         dev->sm_ah[port_num - 1] = new_ah;
 217         spin_unlock_irqrestore(&dev->sm_lock, flags);
 218 }
 219
 220 /*
 221  * Snoop SM MADs for port info, GUID info, and  P_Key table sets, so we can
 222  * synthesize LID change, Client-Rereg, GID change, and P_Key change events.
 223  */
 224 static void smp_snoop(struct ib_device *ibdev, u8 port_num, const struct ib_mad *mad,
 225                       u16 prev_lid)
 226 {
 227         struct ib_port_info *pinfo;
 228         u16 lid;
 229         __be16 *base;
 230         u32 bn, pkey_change_bitmap;
 231         int i;
 232
 233
 234         struct mlx4_ib_dev *dev = to_mdev(ibdev);
 235         if ((mad->mad_hdr.mgmt_class == IB_MGMT_CLASS_SUBN_LID_ROUTED ||
 236              mad->mad_hdr.mgmt_class == IB_MGMT_CLASS_SUBN_DIRECTED_ROUTE) &&
 237             mad->mad_hdr.method == IB_MGMT_METHOD_SET)
 238                 switch (mad->mad_hdr.attr_id) {
 239                 case IB_SMP_ATTR_PORT_INFO:
 240                         pinfo = (struct ib_port_info *) ((struct ib_smp *) mad)->data;
 241                         lid = be16_to_cpu(pinfo->lid);
 242
 243                         update_sm_ah(dev, port_num,
 244                                      be16_to_cpu(pinfo->sm_lid),
 245                                      pinfo->neighbormtu_mastersmsl & 0xf);
 246
 247                         if (pinfo->clientrereg_resv_subnetto & 0x80)
 248                                 handle_client_rereg_event(dev, port_num);
 249
 250                         if (prev_lid != lid)
 251                                 handle_lid_change_event(dev, port_num);
 252                         break;
 253
 254                 case IB_SMP_ATTR_PKEY_TABLE:
 255                         if (!mlx4_is_mfunc(dev->dev)) {
 256                                 mlx4_ib_dispatch_event(dev, port_num,
 257                                                        IB_EVENT_PKEY_CHANGE);
 258                                 break;
 259                         }
 260
 261                         /* at this point, we are running in the master.
 262                          * Slaves do not receive SMPs.
 263                          */
 264                         bn  = be32_to_cpu(((struct ib_smp *)mad)->attr_mod) & 0xFFFF;
 265                         base = (__be16 *) &(((struct ib_smp *)mad)->data[0]);
 266                         pkey_change_bitmap = 0;
 267                         for (i = 0; i < 32; i++) {
 268                                 pr_debug("PKEY[%d] = x%x\n",
 269                                          i + bn*32, be16_to_cpu(base[i]));
 270                                 if (be16_to_cpu(base[i]) !=
 271                                     dev->pkeys.phys_pkey_cache[port_num - 1][i + bn*32]) {
 272                                         pkey_change_bitmap |= (1 << i);
 273                                         dev->pkeys.phys_pkey_cache[port_num - 1][i + bn*32] =
 274                                                 be16_to_cpu(base[i]);
 275                                 }
 276                         }
 277                         pr_debug("PKEY Change event: port=%d, "
 278                                  "block=0x%x, change_bitmap=0x%x\n",
 279                                  port_num, bn, pkey_change_bitmap);
 280
 281                         if (pkey_change_bitmap) {
 282                                 mlx4_ib_dispatch_event(dev, port_num,
 283                                                        IB_EVENT_PKEY_CHANGE);
 284                                 if (!dev->sriov.is_going_down)
 285                                         __propagate_pkey_ev(dev, port_num, bn,
 286                                                             pkey_change_bitmap);
 287                         }
 288                         break;
 289
 290                 case IB_SMP_ATTR_GUID_INFO:
 291                         /* paravirtualized master's guid is guid 0 -- does not change */
 292                         if (!mlx4_is_master(dev->dev))
 293                                 mlx4_ib_dispatch_event(dev, port_num,
 294                                                        IB_EVENT_GID_CHANGE);
 295                         /*if master, notify relevant slaves*/
 296                         if (mlx4_is_master(dev->dev) &&
 297                             !dev->sriov.is_going_down) {
 298                                 bn = be32_to_cpu(((struct ib_smp *)mad)->attr_mod);
 299                                 mlx4_ib_update_cache_on_guid_change(dev, bn, port_num,
 300                                                                     (u8 *)(&((struct ib_smp *)mad)->data));
 301                                 mlx4_ib_notify_slaves_on_guid_change(dev, bn, port_num,
 302                                                                      (u8 *)(&((struct ib_smp *)mad)->data));
 303                         }
 304                         break;
 305
 306                 default:
 307                         break;
 308                 }
 309 }
 310
 311 static void __propagate_pkey_ev(struct mlx4_ib_dev *dev, int port_num,
 312                                 int block, u32 change_bitmap)
 313 {
 314         int i, ix, slave, err;
 315         int have_event = 0;
 316
 317         for (slave = 0; slave < dev->dev->caps.sqp_demux; slave++) {
 318                 if (slave == mlx4_master_func_num(dev->dev))
 319                         continue;
 320                 if (!mlx4_is_slave_active(dev->dev, slave))
 321                         continue;
 322
 323                 have_event = 0;
 324                 for (i = 0; i < 32; i++) {
 325                         if (!(change_bitmap & (1 << i)))
 326                                 continue;
 327                         for (ix = 0;
 328                              ix < dev->dev->caps.pkey_table_len[port_num]; ix++) {
 329                                 if (dev->pkeys.virt2phys_pkey[slave][port_num - 1]
 330                                     [ix] == i + 32 * block) {
 331                                         err = mlx4_gen_pkey_eqe(dev->dev, slave, port_num);
 332                                         pr_debug("propagate_pkey_ev: slave %d,"
 333                                                  " port %d, ix %d (%d)\n",
 334                                                  slave, port_num, ix, err);
 335                                         have_event = 1;
 336                                         break;
 337                                 }
 338                         }
 339                         if (have_event)
 340                                 break;
 341                 }
 342         }
 343 }
 344
 345 static void node_desc_override(struct ib_device *dev,
 346                                struct ib_mad *mad)
 347 {
 348         unsigned long flags;
 349
 350         if ((mad->mad_hdr.mgmt_class == IB_MGMT_CLASS_SUBN_LID_ROUTED ||
 351              mad->mad_hdr.mgmt_class == IB_MGMT_CLASS_SUBN_DIRECTED_ROUTE) &&
 352             mad->mad_hdr.method == IB_MGMT_METHOD_GET_RESP &&
 353             mad->mad_hdr.attr_id == IB_SMP_ATTR_NODE_DESC) {
 354                 spin_lock_irqsave(&to_mdev(dev)->sm_lock, flags);
 355                 memcpy(((struct ib_smp *) mad)->data, dev->node_desc, 64);
 356                 spin_unlock_irqrestore(&to_mdev(dev)->sm_lock, flags);
 357         }
 358 }
 359
 360 static void forward_trap(struct mlx4_ib_dev *dev, u8 port_num, const struct ib_mad *mad)
 361 {
 362         int qpn = mad->mad_hdr.mgmt_class != IB_MGMT_CLASS_SUBN_LID_ROUTED;
 363         struct ib_mad_send_buf *send_buf;
 364         struct ib_mad_agent *agent = dev->send_agent[port_num - 1][qpn];
 365         int ret;
 366         unsigned long flags;
 367
 368         if (agent) {
 369                 send_buf = ib_create_send_mad(agent, qpn, 0, 0, IB_MGMT_MAD_HDR,
 370                                               IB_MGMT_MAD_DATA, GFP_ATOMIC);
 371                 if (IS_ERR(send_buf))
 372                         return;
 373                 /*
 374                  * We rely here on the fact that MLX QPs don't use the
 375                  * address handle after the send is posted (this is
 376                  * wrong following the IB spec strictly, but we know
 377                  * it's OK for our devices).
 378                  */
 379                 spin_lock_irqsave(&dev->sm_lock, flags);
 380                 memcpy(send_buf->mad, mad, sizeof *mad);
 381                 if ((send_buf->ah = dev->sm_ah[port_num - 1]))
 382                         ret = ib_post_send_mad(send_buf, NULL);
 383                 else
 384                         ret = -EINVAL;
 385                 spin_unlock_irqrestore(&dev->sm_lock, flags);
 386
 387                 if (ret)
 388                         ib_free_send_mad(send_buf);
 389         }
 390 }
 391
 392 static int mlx4_ib_demux_sa_handler(struct ib_device *ibdev, int port, int slave,
 393                                                              struct ib_sa_mad *sa_mad)
 394 {
 395         int ret = 0;
 396
 397         /* dispatch to different sa handlers */
 398         switch (be16_to_cpu(sa_mad->mad_hdr.attr_id)) {
 399         case IB_SA_ATTR_MC_MEMBER_REC:
 400                 ret = mlx4_ib_mcg_demux_handler(ibdev, port, slave, sa_mad);
 401                 break;
 402         default:
 403                 break;
 404         }
 405         return ret;
 406 }
 407
 408 int mlx4_ib_find_real_gid(struct ib_device *ibdev, u8 port, __be64 guid)
 409 {
 410         struct mlx4_ib_dev *dev = to_mdev(ibdev);
 411         int i;
 412
 413         for (i = 0; i < dev->dev->caps.sqp_demux; i++) {
 414                 if (dev->sriov.demux[port - 1].guid_cache[i] == guid)
 415                         return i;
 416         }
 417         return -1;
 418 }
 419
 420
 421 static int find_slave_port_pkey_ix(struct mlx4_ib_dev *dev, int slave,
 422                                    u8 port, u16 pkey, u16 *ix)
 423 {
 424         int i, ret;
 425         u8 unassigned_pkey_ix, pkey_ix, partial_ix = 0xFF;
 426         u16 slot_pkey;
 427
 428         if (slave == mlx4_master_func_num(dev->dev))
 429                 return ib_find_cached_pkey(&dev->ib_dev, port, pkey, ix);
 430
 431         unassigned_pkey_ix = dev->dev->phys_caps.pkey_phys_table_len[port] - 1;
 432
 433         for (i = 0; i < dev->dev->caps.pkey_table_len[port]; i++) {
 434                 if (dev->pkeys.virt2phys_pkey[slave][port - 1][i] == unassigned_pkey_ix)
 435                         continue;
 436
 437                 pkey_ix = dev->pkeys.virt2phys_pkey[slave][port - 1][i];
 438
 439                 ret = ib_get_cached_pkey(&dev->ib_dev, port, pkey_ix, &slot_pkey);
 440                 if (ret)
 441                         continue;
 442                 if ((slot_pkey & 0x7FFF) == (pkey & 0x7FFF)) {
 443                         if (slot_pkey & 0x8000) {
 444                                 *ix = (u16) pkey_ix;
 445                                 return 0;
 446                         } else {
 447                                 /* take first partial pkey index found */
 448                                 if (partial_ix == 0xFF)
 449                                         partial_ix = pkey_ix;
 450                         }
 451                 }
 452         }
 453
 454         if (partial_ix < 0xFF) {
 455                 *ix = (u16) partial_ix;
 456                 return 0;
 457         }
 458
 459         return -EINVAL;
 460 }
 461
 462 int mlx4_ib_send_to_slave(struct mlx4_ib_dev *dev, int slave, u8 port,
 463                           enum ib_qp_type dest_qpt, struct ib_wc *wc,
 464                           struct ib_grh *grh, struct ib_mad *mad)
 465 {
 466         struct ib_sge list;
 467         struct ib_send_wr wr, *bad_wr;
 468         struct mlx4_ib_demux_pv_ctx *tun_ctx;
 469         struct mlx4_ib_demux_pv_qp *tun_qp;
 470         struct mlx4_rcv_tunnel_mad *tun_mad;
 471         struct ib_ah_attr attr;
 472         struct ib_ah *ah;
 473         struct ib_qp *src_qp = NULL;
 474         unsigned tun_tx_ix = 0;
 475         int dqpn;
 476         int ret = 0;
 477         u16 tun_pkey_ix;
 478         u16 cached_pkey;
 479         u8 is_eth = dev->dev->caps.port_type[port] == MLX4_PORT_TYPE_ETH;
 480
 481         if (dest_qpt > IB_QPT_GSI)
 482                 return -EINVAL;
 483
 484         tun_ctx = dev->sriov.demux[port-1].tun[slave];
 485
 486         /* check if proxy qp created */
 487         if (!tun_ctx || tun_ctx->state != DEMUX_PV_STATE_ACTIVE)
 488                 return -EAGAIN;
 489
 490         if (!dest_qpt)
 491                 tun_qp = &tun_ctx->qp[0];
 492         else
 493                 tun_qp = &tun_ctx->qp[1];
 494
 495         /* compute P_Key index to put in tunnel header for slave */
 496         if (dest_qpt) {
 497                 u16 pkey_ix;
 498                 ret = ib_get_cached_pkey(&dev->ib_dev, port, wc->pkey_index, &cached_pkey);
 499                 if (ret)
 500                         return -EINVAL;
 501
 502                 ret = find_slave_port_pkey_ix(dev, slave, port, cached_pkey, &pkey_ix);
 503                 if (ret)
 504                         return -EINVAL;
 505                 tun_pkey_ix = pkey_ix;
 506         } else
 507                 tun_pkey_ix = dev->pkeys.virt2phys_pkey[slave][port - 1][0];
 508
 509         dqpn = dev->dev->phys_caps.base_proxy_sqpn + 8 * slave + port + (dest_qpt * 2) - 1;
 510
 511         /* get tunnel tx data buf for slave */
 512         src_qp = tun_qp->qp;
 513
 514         /* create ah. Just need an empty one with the port num for the post send.
 515          * The driver will set the force loopback bit in post_send */
 516         memset(&attr, 0, sizeof attr);
 517         attr.port_num = port;
 518         if (is_eth) {
 519                 memcpy(&attr.grh.dgid.raw[0], &grh->dgid.raw[0], 16);
 520                 attr.ah_flags = IB_AH_GRH;
 521         }
 522         ah = ib_create_ah(tun_ctx->pd, &attr);
 523         if (IS_ERR(ah))
 524                 return -ENOMEM;
 525
 526         /* allocate tunnel tx buf after pass failure returns */
 527         spin_lock(&tun_qp->tx_lock);
 528         if (tun_qp->tx_ix_head - tun_qp->tx_ix_tail >=
 529             (MLX4_NUM_TUNNEL_BUFS - 1))
 530                 ret = -EAGAIN;
 531         else
 532                 tun_tx_ix = (++tun_qp->tx_ix_head) & (MLX4_NUM_TUNNEL_BUFS - 1);
 533         spin_unlock(&tun_qp->tx_lock);
 534         if (ret)
 535                 goto out;
 536
 537         tun_mad = (struct mlx4_rcv_tunnel_mad *) (tun_qp->tx_ring[tun_tx_ix].buf.addr);
 538         if (tun_qp->tx_ring[tun_tx_ix].ah)
 539                 ib_destroy_ah(tun_qp->tx_ring[tun_tx_ix].ah);
 540         tun_qp->tx_ring[tun_tx_ix].ah = ah;
 541         ib_dma_sync_single_for_cpu(&dev->ib_dev,
 542                                    tun_qp->tx_ring[tun_tx_ix].buf.map,
 543                                    sizeof (struct mlx4_rcv_tunnel_mad),
 544                                    DMA_TO_DEVICE);
 545
 546         /* copy over to tunnel buffer */
 547         if (grh)
 548                 memcpy(&tun_mad->grh, grh, sizeof *grh);
 549         memcpy(&tun_mad->mad, mad, sizeof *mad);
 550
 551         /* adjust tunnel data */
 552         tun_mad->hdr.pkey_index = cpu_to_be16(tun_pkey_ix);
 553         tun_mad->hdr.flags_src_qp = cpu_to_be32(wc->src_qp & 0xFFFFFF);
 554         tun_mad->hdr.g_ml_path = (grh && (wc->wc_flags & IB_WC_GRH)) ? 0x80 : 0;
 555
 556         if (is_eth) {
 557                 u16 vlan = 0;
 558                 if (mlx4_get_slave_default_vlan(dev->dev, port, slave, &vlan,
 559                                                 NULL)) {
 560                         /* VST mode */
 561                         if (vlan != wc->vlan_id)
 562                                 /* Packet vlan is not the VST-assigned vlan.
 563                                  * Drop the packet.
 564                                  */
 565                                 goto out;
 566                          else
 567                                 /* Remove the vlan tag before forwarding
 568                                  * the packet to the VF.
 569                                  */
 570                                 vlan = 0xffff;
 571                 } else {
 572                         vlan = wc->vlan_id;
 573                 }
 574
 575                 tun_mad->hdr.sl_vid = cpu_to_be16(vlan);
 576                 memcpy((char *)&tun_mad->hdr.mac_31_0, &(wc->smac[0]), 4);
 577                 memcpy((char *)&tun_mad->hdr.slid_mac_47_32, &(wc->smac[4]), 2);
 578         } else {
 579                 tun_mad->hdr.sl_vid = cpu_to_be16(((u16)(wc->sl)) << 12);
 580                 tun_mad->hdr.slid_mac_47_32 = cpu_to_be16(wc->slid);
 581         }
 582
 583         ib_dma_sync_single_for_device(&dev->ib_dev,
 584                                       tun_qp->tx_ring[tun_tx_ix].buf.map,
 585                                       sizeof (struct mlx4_rcv_tunnel_mad),
 586                                       DMA_TO_DEVICE);
 587
 588         list.addr = tun_qp->tx_ring[tun_tx_ix].buf.map;
 589         list.length = sizeof (struct mlx4_rcv_tunnel_mad);
 590         list.lkey = tun_ctx->mr->lkey;
 591
 592         wr.wr.ud.ah = ah;
 593         wr.wr.ud.port_num = port;
 594         wr.wr.ud.remote_qkey = IB_QP_SET_QKEY;
 595         wr.wr.ud.remote_qpn = dqpn;
 596         wr.next = NULL;
 597         wr.wr_id = ((u64) tun_tx_ix) | MLX4_TUN_SET_WRID_QPN(dest_qpt);
 598         wr.sg_list = &list;
 599         wr.num_sge = 1;
 600         wr.opcode = IB_WR_SEND;
 601         wr.send_flags = IB_SEND_SIGNALED;
 602
 603         ret = ib_post_send(src_qp, &wr, &bad_wr);
 604 out:
 605         if (ret)
 606                 ib_destroy_ah(ah);
 607         return ret;
 608 }
 609
 610 static int mlx4_ib_demux_mad(struct ib_device *ibdev, u8 port,
 611                         struct ib_wc *wc, struct ib_grh *grh,
 612                         struct ib_mad *mad)
 613 {
 614         struct mlx4_ib_dev *dev = to_mdev(ibdev);
 615         int err;
 616         int slave;
 617         u8 *slave_id;
 618         int is_eth = 0;
 619
 620         if (rdma_port_get_link_layer(ibdev, port) == IB_LINK_LAYER_INFINIBAND)
 621                 is_eth = 0;
 622         else
 623                 is_eth = 1;
 624
 625         if (is_eth) {
 626                 if (!(wc->wc_flags & IB_WC_GRH)) {
 627                         mlx4_ib_warn(ibdev, "RoCE grh not present.\n");
 628                         return -EINVAL;
 629                 }
 630                 if (mad->mad_hdr.mgmt_class != IB_MGMT_CLASS_CM) {
 631                         mlx4_ib_warn(ibdev, "RoCE mgmt class is not CM\n");
 632                         return -EINVAL;
 633                 }
 634                 if (mlx4_get_slave_from_roce_gid(dev->dev, port, grh->dgid.raw, &slave)) {
 635                         mlx4_ib_warn(ibdev, "failed matching grh\n");
 636                         return -ENOENT;
 637                 }
 638                 if (slave >= dev->dev->caps.sqp_demux) {
 639                         mlx4_ib_warn(ibdev, "slave id: %d is bigger than allowed:%d\n",
 640                                      slave, dev->dev->caps.sqp_demux);
 641                         return -ENOENT;
 642                 }
 643
 644                 if (mlx4_ib_demux_cm_handler(ibdev, port, NULL, mad))
 645                         return 0;
 646
 647                 err = mlx4_ib_send_to_slave(dev, slave, port, wc->qp->qp_type, wc, grh, mad);
 648                 if (err)
 649                         pr_debug("failed sending to slave %d via tunnel qp (%d)\n",
 650                                  slave, err);
 651                 return 0;
 652         }
 653
 654         /* Initially assume that this mad is for us */
 655         slave = mlx4_master_func_num(dev->dev);
 656
 657         /* See if the slave id is encoded in a response mad */
 658         if (mad->mad_hdr.method & 0x80) {
 659                 slave_id = (u8 *) &mad->mad_hdr.tid;
 660                 slave = *slave_id;
 661                 if (slave != 255) /*255 indicates the dom0*/
 662                         *slave_id = 0; /* remap tid */
 663         }
 664
 665         /* If a grh is present, we demux according to it */
 666         if (wc->wc_flags & IB_WC_GRH) {
 667                 slave = mlx4_ib_find_real_gid(ibdev, port, grh->dgid.global.interface_id);
 668                 if (slave < 0) {
 669                         mlx4_ib_warn(ibdev, "failed matching grh\n");
 670                         return -ENOENT;
 671                 }
 672         }
 673         /* Class-specific handling */
 674         switch (mad->mad_hdr.mgmt_class) {
 675         case IB_MGMT_CLASS_SUBN_LID_ROUTED:
 676         case IB_MGMT_CLASS_SUBN_DIRECTED_ROUTE:
 677                 /* 255 indicates the dom0 */
 678                 if (slave != 255 && slave != mlx4_master_func_num(dev->dev)) {
 679                         if (!mlx4_vf_smi_enabled(dev->dev, slave, port))
 680                                 return -EPERM;
 681                         /* for a VF. drop unsolicited MADs */
 682                         if (!(mad->mad_hdr.method & IB_MGMT_METHOD_RESP)) {
 683                                 mlx4_ib_warn(ibdev, "demux QP0. rejecting unsolicited mad for slave %d class 0x%x, method 0x%x\n",
 684                                              slave, mad->mad_hdr.mgmt_class,
 685                                              mad->mad_hdr.method);
 686                                 return -EINVAL;
 687                         }
 688                 }
 689                 break;
 690         case IB_MGMT_CLASS_SUBN_ADM:
 691                 if (mlx4_ib_demux_sa_handler(ibdev, port, slave,
 692                                              (struct ib_sa_mad *) mad))
 693                         return 0;
 694                 break;
 695         case IB_MGMT_CLASS_CM:
 696                 if (mlx4_ib_demux_cm_handler(ibdev, port, &slave, mad))
 697                         return 0;
 698                 break;
 699         case IB_MGMT_CLASS_DEVICE_MGMT:
 700                 if (mad->mad_hdr.method != IB_MGMT_METHOD_GET_RESP)
 701                         return 0;
 702                 break;
 703         default:
 704                 /* Drop unsupported classes for slaves in tunnel mode */
 705                 if (slave != mlx4_master_func_num(dev->dev)) {
 706                         pr_debug("dropping unsupported ingress mad from class:%d "
 707                                  "for slave:%d\n", mad->mad_hdr.mgmt_class, slave);
 708                         return 0;
 709                 }
 710         }
 711         /*make sure that no slave==255 was not handled yet.*/
 712         if (slave >= dev->dev->caps.sqp_demux) {
 713                 mlx4_ib_warn(ibdev, "slave id: %d is bigger than allowed:%d\n",
 714                              slave, dev->dev->caps.sqp_demux);
 715                 return -ENOENT;
 716         }
 717
 718         err = mlx4_ib_send_to_slave(dev, slave, port, wc->qp->qp_type, wc, grh, mad);
 719         if (err)
 720                 pr_debug("failed sending to slave %d via tunnel qp (%d)\n",
 721                          slave, err);
 722         return 0;
 723 }
 724
 725 static int ib_process_mad(struct ib_device *ibdev, int mad_flags, u8 port_num,
 726                         const struct ib_wc *in_wc, const struct ib_grh *in_grh,
 727                         const struct ib_mad *in_mad, struct ib_mad *out_mad)
 728 {
 729         u16 slid, prev_lid = 0;
 730         int err;
 731         struct ib_port_attr pattr;
 732
 733         if (in_wc && in_wc->qp->qp_num) {
 734                 pr_debug("received MAD: slid:%d sqpn:%d "
 735                         "dlid_bits:%d dqpn:%d wc_flags:0x%x, cls %x, mtd %x, atr %x\n",
 736                         in_wc->slid, in_wc->src_qp,
 737                         in_wc->dlid_path_bits,
 738                         in_wc->qp->qp_num,
 739                         in_wc->wc_flags,
 740                         in_mad->mad_hdr.mgmt_class, in_mad->mad_hdr.method,
 741                         be16_to_cpu(in_mad->mad_hdr.attr_id));
 742                 if (in_wc->wc_flags & IB_WC_GRH) {
 743                         pr_debug("sgid_hi:0x%016llx sgid_lo:0x%016llx\n",
 744                                  be64_to_cpu(in_grh->sgid.global.subnet_prefix),
 745                                  be64_to_cpu(in_grh->sgid.global.interface_id));
 746                         pr_debug("dgid_hi:0x%016llx dgid_lo:0x%016llx\n",
 747                                  be64_to_cpu(in_grh->dgid.global.subnet_prefix),
 748                                  be64_to_cpu(in_grh->dgid.global.interface_id));
 749                 }
 750         }
 751
 752         slid = in_wc ? in_wc->slid : be16_to_cpu(IB_LID_PERMISSIVE);
 753
 754         if (in_mad->mad_hdr.method == IB_MGMT_METHOD_TRAP && slid == 0) {
 755                 forward_trap(to_mdev(ibdev), port_num, in_mad);
 756                 return IB_MAD_RESULT_SUCCESS | IB_MAD_RESULT_CONSUMED;
 757         }
 758
 759         if (in_mad->mad_hdr.mgmt_class == IB_MGMT_CLASS_SUBN_LID_ROUTED ||
 760             in_mad->mad_hdr.mgmt_class == IB_MGMT_CLASS_SUBN_DIRECTED_ROUTE) {
 761                 if (in_mad->mad_hdr.method   != IB_MGMT_METHOD_GET &&
 762                     in_mad->mad_hdr.method   != IB_MGMT_METHOD_SET &&
 763                     in_mad->mad_hdr.method   != IB_MGMT_METHOD_TRAP_REPRESS)
 764                         return IB_MAD_RESULT_SUCCESS;
 765
 766                 /*
 767                  * Don't process SMInfo queries -- the SMA can't handle them.
 768                  */
 769                 if (in_mad->mad_hdr.attr_id == IB_SMP_ATTR_SM_INFO)
 770                         return IB_MAD_RESULT_SUCCESS;
 771         } else if (in_mad->mad_hdr.mgmt_class == IB_MGMT_CLASS_PERF_MGMT ||
 772                    in_mad->mad_hdr.mgmt_class == MLX4_IB_VENDOR_CLASS1   ||
 773                    in_mad->mad_hdr.mgmt_class == MLX4_IB_VENDOR_CLASS2   ||
 774                    in_mad->mad_hdr.mgmt_class == IB_MGMT_CLASS_CONG_MGMT) {
 775                 if (in_mad->mad_hdr.method  != IB_MGMT_METHOD_GET &&
 776                     in_mad->mad_hdr.method  != IB_MGMT_METHOD_SET)
 777                         return IB_MAD_RESULT_SUCCESS;
 778         } else
 779                 return IB_MAD_RESULT_SUCCESS;
 780
 781         if ((in_mad->mad_hdr.mgmt_class == IB_MGMT_CLASS_SUBN_LID_ROUTED ||
 782              in_mad->mad_hdr.mgmt_class == IB_MGMT_CLASS_SUBN_DIRECTED_ROUTE) &&
 783             in_mad->mad_hdr.method == IB_MGMT_METHOD_SET &&
 784             in_mad->mad_hdr.attr_id == IB_SMP_ATTR_PORT_INFO &&
 785             !ib_query_port(ibdev, port_num, &pattr))
 786                 prev_lid = pattr.lid;
 787
 788         err = mlx4_MAD_IFC(to_mdev(ibdev),
 789                            (mad_flags & IB_MAD_IGNORE_MKEY ? MLX4_MAD_IFC_IGNORE_MKEY : 0) |
 790                            (mad_flags & IB_MAD_IGNORE_BKEY ? MLX4_MAD_IFC_IGNORE_BKEY : 0) |
 791                            MLX4_MAD_IFC_NET_VIEW,
 792                            port_num, in_wc, in_grh, in_mad, out_mad);
 793         if (err)
 794                 return IB_MAD_RESULT_FAILURE;
 795
 796         if (!out_mad->mad_hdr.status) {
 797                 if (!(to_mdev(ibdev)->dev->caps.flags & MLX4_DEV_CAP_FLAG_PORT_MNG_CHG_EV))
 798                         smp_snoop(ibdev, port_num, in_mad, prev_lid);
 799                 /* slaves get node desc from FW */
 800                 if (!mlx4_is_slave(to_mdev(ibdev)->dev))
 801                         node_desc_override(ibdev, out_mad);
 802         }
 803
 804         /* set return bit in status of directed route responses */
 805         if (in_mad->mad_hdr.mgmt_class == IB_MGMT_CLASS_SUBN_DIRECTED_ROUTE)
 806                 out_mad->mad_hdr.status |= cpu_to_be16(1 << 15);
 807
 808         if (in_mad->mad_hdr.method == IB_MGMT_METHOD_TRAP_REPRESS)
 809                 /* no response for trap repress */
 810                 return IB_MAD_RESULT_SUCCESS | IB_MAD_RESULT_CONSUMED;
 811
 812         return IB_MAD_RESULT_SUCCESS | IB_MAD_RESULT_REPLY;
 813 }
 814
 815 static void edit_counter(struct mlx4_counter *cnt,
 816                                         struct ib_pma_portcounters *pma_cnt)
 817 {
 818         ASSIGN_32BIT_COUNTER(pma_cnt->port_xmit_data,
 819                              (be64_to_cpu(cnt->tx_bytes) >> 2));
 820         ASSIGN_32BIT_COUNTER(pma_cnt->port_rcv_data,
 821                              (be64_to_cpu(cnt->rx_bytes) >> 2));
 822         ASSIGN_32BIT_COUNTER(pma_cnt->port_xmit_packets,
 823                              be64_to_cpu(cnt->tx_frames));
 824         ASSIGN_32BIT_COUNTER(pma_cnt->port_rcv_packets,
 825                              be64_to_cpu(cnt->rx_frames));
 826 }
 827
 828 static int iboe_process_mad(struct ib_device *ibdev, int mad_flags, u8 port_num,
 829                         const struct ib_wc *in_wc, const struct ib_grh *in_grh,
 830                         const struct ib_mad *in_mad, struct ib_mad *out_mad)
 831 {
 832         struct mlx4_cmd_mailbox *mailbox;
 833         struct mlx4_ib_dev *dev = to_mdev(ibdev);
 834         int err;
 835         u32 inmod = dev->counters[port_num - 1] & 0xffff;
 836         u8 mode;
 837
 838         if (in_mad->mad_hdr.mgmt_class != IB_MGMT_CLASS_PERF_MGMT)
 839                 return -EINVAL;
 840
 841         mailbox = mlx4_alloc_cmd_mailbox(dev->dev);
 842         if (IS_ERR(mailbox))
 843                 return IB_MAD_RESULT_FAILURE;
 844
 845         err = mlx4_cmd_box(dev->dev, 0, mailbox->dma, inmod, 0,
 846                            MLX4_CMD_QUERY_IF_STAT, MLX4_CMD_TIME_CLASS_C,
 847                            MLX4_CMD_WRAPPED);
 848         if (err)
 849                 err = IB_MAD_RESULT_FAILURE;
 850         else {
 851                 memset(out_mad->data, 0, sizeof out_mad->data);
 852                 mode = ((struct mlx4_counter *)mailbox->buf)->counter_mode;
 853                 switch (mode & 0xf) {
 854                 case 0:
 855                         edit_counter(mailbox->buf,
 856                                                 (void *)(out_mad->data + 40));
 857                         err = IB_MAD_RESULT_SUCCESS | IB_MAD_RESULT_REPLY;
 858                         break;
 859                 default:
 860                         err = IB_MAD_RESULT_FAILURE;
 861                 }
 862         }
 863
 864         mlx4_free_cmd_mailbox(dev->dev, mailbox);
 865
 866         return err;
 867 }
 868
 869 int mlx4_ib_process_mad(struct ib_device *ibdev, int mad_flags, u8 port_num,
 870                         const struct ib_wc *in_wc, const struct ib_grh *in_grh,
 871                         const struct ib_mad *in_mad, struct ib_mad *out_mad)
 872 {
 873         switch (rdma_port_get_link_layer(ibdev, port_num)) {
 874         case IB_LINK_LAYER_INFINIBAND:
 875                 return ib_process_mad(ibdev, mad_flags, port_num, in_wc,
 876                                       in_grh, in_mad, out_mad);
 877         case IB_LINK_LAYER_ETHERNET:
 878                 return iboe_process_mad(ibdev, mad_flags, port_num, in_wc,
 879                                           in_grh, in_mad, out_mad);
 880         default:
 881                 return -EINVAL;
 882         }
 883 }
 884
 885 static void send_handler(struct ib_mad_agent *agent,
 886                          struct ib_mad_send_wc *mad_send_wc)
 887 {
 888         if (mad_send_wc->send_buf->context[0])
 889                 ib_destroy_ah(mad_send_wc->send_buf->context[0]);
 890         ib_free_send_mad(mad_send_wc->send_buf);
 891 }
 892
 893 int mlx4_ib_mad_init(struct mlx4_ib_dev *dev)
 894 {
 895         struct ib_mad_agent *agent;
 896         int p, q;
 897         int ret;
 898         enum rdma_link_layer ll;
 899
 900         for (p = 0; p < dev->num_ports; ++p) {
 901                 ll = rdma_port_get_link_layer(&dev->ib_dev, p + 1);
 902                 for (q = 0; q <= 1; ++q) {
 903                         if (ll == IB_LINK_LAYER_INFINIBAND) {
 904                                 agent = ib_register_mad_agent(&dev->ib_dev, p + 1,
 905                                                               q ? IB_QPT_GSI : IB_QPT_SMI,
 906                                                               NULL, 0, send_handler,
 907                                                               NULL, NULL, 0);
 908                                 if (IS_ERR(agent)) {
 909                                         ret = PTR_ERR(agent);
 910                                         goto err;
 911                                 }
 912                                 dev->send_agent[p][q] = agent;
 913                         } else
 914                                 dev->send_agent[p][q] = NULL;
 915                 }
 916         }
 917
 918         return 0;
 919
 920 err:
 921         for (p = 0; p < dev->num_ports; ++p)
 922                 for (q = 0; q <= 1; ++q)
 923                         if (dev->send_agent[p][q])
 924                                 ib_unregister_mad_agent(dev->send_agent[p][q]);
 925
 926         return ret;
 927 }
 928
 929 void mlx4_ib_mad_cleanup(struct mlx4_ib_dev *dev)
 930 {
 931         struct ib_mad_agent *agent;
 932         int p, q;
 933
 934         for (p = 0; p < dev->num_ports; ++p) {
 935                 for (q = 0; q <= 1; ++q) {
 936                         agent = dev->send_agent[p][q];
 937                         if (agent) {
 938                                 dev->send_agent[p][q] = NULL;
 939                                 ib_unregister_mad_agent(agent);
 940                         }
 941                 }
 942
 943                 if (dev->sm_ah[p])
 944                         ib_destroy_ah(dev->sm_ah[p]);
 945         }
 946 }
 947
 948 static void handle_lid_change_event(struct mlx4_ib_dev *dev, u8 port_num)
 949 {
 950         mlx4_ib_dispatch_event(dev, port_num, IB_EVENT_LID_CHANGE);
 951
 952         if (mlx4_is_master(dev->dev) && !dev->sriov.is_going_down)
 953                 mlx4_gen_slaves_port_mgt_ev(dev->dev, port_num,
 954                                             MLX4_EQ_PORT_INFO_LID_CHANGE_MASK);
 955 }
 956
 957 static void handle_client_rereg_event(struct mlx4_ib_dev *dev, u8 port_num)
 958 {
 959         /* re-configure the alias-guid and mcg's */
 960         if (mlx4_is_master(dev->dev)) {
 961                 mlx4_ib_invalidate_all_guid_record(dev, port_num);
 962
 963                 if (!dev->sriov.is_going_down) {
 964                         mlx4_ib_mcg_port_cleanup(&dev->sriov.demux[port_num - 1], 0);
 965                         mlx4_gen_slaves_port_mgt_ev(dev->dev, port_num,
 966                                                     MLX4_EQ_PORT_INFO_CLIENT_REREG_MASK);
 967                 }
 968         }
 969         mlx4_ib_dispatch_event(dev, port_num, IB_EVENT_CLIENT_REREGISTER);
 970 }
 971
 972 static void propagate_pkey_ev(struct mlx4_ib_dev *dev, int port_num,
 973                               struct mlx4_eqe *eqe)
 974 {
 975         __propagate_pkey_ev(dev, port_num, GET_BLK_PTR_FROM_EQE(eqe),
 976                             GET_MASK_FROM_EQE(eqe));
 977 }
 978
 979 static void handle_slaves_guid_change(struct mlx4_ib_dev *dev, u8 port_num,
 980                                       u32 guid_tbl_blk_num, u32 change_bitmap)
 981 {
 982         struct ib_smp *in_mad  = NULL;
 983         struct ib_smp *out_mad  = NULL;
 984         u16 i;
 985
 986         if (!mlx4_is_mfunc(dev->dev) || !mlx4_is_master(dev->dev))
 987                 return;
 988
 989         in_mad  = kmalloc(sizeof *in_mad, GFP_KERNEL);
 990         out_mad = kmalloc(sizeof *out_mad, GFP_KERNEL);
 991         if (!in_mad || !out_mad) {
 992                 mlx4_ib_warn(&dev->ib_dev, "failed to allocate memory for guid info mads\n");
 993                 goto out;
 994         }
 995
 996         guid_tbl_blk_num  *= 4;
 997
 998         for (i = 0; i < 4; i++) {
 999                 if (change_bitmap && (!((change_bitmap >> (8 * i)) & 0xff)))
1000                         continue;
1001                 memset(in_mad, 0, sizeof *in_mad);
1002                 memset(out_mad, 0, sizeof *out_mad);
1003
1004                 in_mad->base_version  = 1;
1005                 in_mad->mgmt_class    = IB_MGMT_CLASS_SUBN_LID_ROUTED;
1006                 in_mad->class_version = 1;
1007                 in_mad->method        = IB_MGMT_METHOD_GET;
1008                 in_mad->attr_id       = IB_SMP_ATTR_GUID_INFO;
1009                 in_mad->attr_mod      = cpu_to_be32(guid_tbl_blk_num + i);
1010
1011                 if (mlx4_MAD_IFC(dev,
1012                                  MLX4_MAD_IFC_IGNORE_KEYS | MLX4_MAD_IFC_NET_VIEW,
1013                                  port_num, NULL, NULL, in_mad, out_mad)) {
1014                         mlx4_ib_warn(&dev->ib_dev, "Failed in get GUID INFO MAD_IFC\n");
1015                         goto out;
1016                 }
1017
1018                 mlx4_ib_update_cache_on_guid_change(dev, guid_tbl_blk_num + i,
1019                                                     port_num,
1020                                                     (u8 *)(&((struct ib_smp *)out_mad)->data));
1021                 mlx4_ib_notify_slaves_on_guid_change(dev, guid_tbl_blk_num + i,
1022                                                      port_num,
1023                                                      (u8 *)(&((struct ib_smp *)out_mad)->data));
1024         }
1025
1026 out:
1027         kfree(in_mad);
1028         kfree(out_mad);
1029         return;
1030 }
1031
1032 void handle_port_mgmt_change_event(struct work_struct *work)
1033 {
1034         struct ib_event_work *ew = container_of(work, struct ib_event_work, work);
1035         struct mlx4_ib_dev *dev = ew->ib_dev;
1036         struct mlx4_eqe *eqe = &(ew->ib_eqe);
1037         u8 port = eqe->event.port_mgmt_change.port;
1038         u32 changed_attr;
1039         u32 tbl_block;
1040         u32 change_bitmap;
1041
1042         switch (eqe->subtype) {
1043         case MLX4_DEV_PMC_SUBTYPE_PORT_INFO:
1044                 changed_attr = be32_to_cpu(eqe->event.port_mgmt_change.params.port_info.changed_attr);
1045
1046                 /* Update the SM ah - This should be done before handling
1047                    the other changed attributes so that MADs can be sent to the SM */
1048                 if (changed_attr & MSTR_SM_CHANGE_MASK) {
1049                         u16 lid = be16_to_cpu(eqe->event.port_mgmt_change.params.port_info.mstr_sm_lid);
1050                         u8 sl = eqe->event.port_mgmt_change.params.port_info.mstr_sm_sl & 0xf;
1051                         update_sm_ah(dev, port, lid, sl);
1052                 }
1053
1054                 /* Check if it is a lid change event */
1055                 if (changed_attr & MLX4_EQ_PORT_INFO_LID_CHANGE_MASK)
1056                         handle_lid_change_event(dev, port);
1057
1058                 /* Generate GUID changed event */
1059                 if (changed_attr & MLX4_EQ_PORT_INFO_GID_PFX_CHANGE_MASK) {
1060                         mlx4_ib_dispatch_event(dev, port, IB_EVENT_GID_CHANGE);
1061                         /*if master, notify all slaves*/
1062                         if (mlx4_is_master(dev->dev))
1063                                 mlx4_gen_slaves_port_mgt_ev(dev->dev, port,
1064                                                             MLX4_EQ_PORT_INFO_GID_PFX_CHANGE_MASK);
1065                 }
1066
1067                 if (changed_attr & MLX4_EQ_PORT_INFO_CLIENT_REREG_MASK)
1068                         handle_client_rereg_event(dev, port);
1069                 break;
1070
1071         case MLX4_DEV_PMC_SUBTYPE_PKEY_TABLE:
1072                 mlx4_ib_dispatch_event(dev, port, IB_EVENT_PKEY_CHANGE);
1073                 if (mlx4_is_master(dev->dev) && !dev->sriov.is_going_down)
1074                         propagate_pkey_ev(dev, port, eqe);
1075                 break;
1076         case MLX4_DEV_PMC_SUBTYPE_GUID_INFO:
1077                 /* paravirtualized master's guid is guid 0 -- does not change */
1078                 if (!mlx4_is_master(dev->dev))
1079                         mlx4_ib_dispatch_event(dev, port, IB_EVENT_GID_CHANGE);
1080                 /*if master, notify relevant slaves*/
1081                 else if (!dev->sriov.is_going_down) {
1082                         tbl_block = GET_BLK_PTR_FROM_EQE(eqe);
1083                         change_bitmap = GET_MASK_FROM_EQE(eqe);
1084                         handle_slaves_guid_change(dev, port, tbl_block, change_bitmap);
1085                 }
1086                 break;
1087         default:
1088                 pr_warn("Unsupported subtype 0x%x for "
1089                         "Port Management Change event\n", eqe->subtype);
1090         }
1091
1092         kfree(ew);
1093 }
1094
1095 void mlx4_ib_dispatch_event(struct mlx4_ib_dev *dev, u8 port_num,
1096                             enum ib_event_type type)
1097 {
1098         struct ib_event event;
1099
1100         event.device            = &dev->ib_dev;
1101         event.element.port_num  = port_num;
1102         event.event             = type;
1103
1104         ib_dispatch_event(&event);
1105 }
1106
1107 static void mlx4_ib_tunnel_comp_handler(struct ib_cq *cq, void *arg)
1108 {
1109         unsigned long flags;
1110         struct mlx4_ib_demux_pv_ctx *ctx = cq->cq_context;
1111         struct mlx4_ib_dev *dev = to_mdev(ctx->ib_dev);
1112         spin_lock_irqsave(&dev->sriov.going_down_lock, flags);
1113         if (!dev->sriov.is_going_down && ctx->state == DEMUX_PV_STATE_ACTIVE)
1114                 queue_work(ctx->wq, &ctx->work);
1115         spin_unlock_irqrestore(&dev->sriov.going_down_lock, flags);
1116 }
1117
1118 static int mlx4_ib_post_pv_qp_buf(struct mlx4_ib_demux_pv_ctx *ctx,
1119                                   struct mlx4_ib_demux_pv_qp *tun_qp,
1120                                   int index)
1121 {
1122         struct ib_sge sg_list;
1123         struct ib_recv_wr recv_wr, *bad_recv_wr;
1124         int size;
1125
1126         size = (tun_qp->qp->qp_type == IB_QPT_UD) ?
1127                 sizeof (struct mlx4_tunnel_mad) : sizeof (struct mlx4_mad_rcv_buf);
1128
1129         sg_list.addr = tun_qp->ring[index].map;
1130         sg_list.length = size;
1131         sg_list.lkey = ctx->mr->lkey;
1132
1133         recv_wr.next = NULL;
1134         recv_wr.sg_list = &sg_list;
1135         recv_wr.num_sge = 1;
1136         recv_wr.wr_id = (u64) index | MLX4_TUN_WRID_RECV |
1137                 MLX4_TUN_SET_WRID_QPN(tun_qp->proxy_qpt);
1138         ib_dma_sync_single_for_device(ctx->ib_dev, tun_qp->ring[index].map,
1139                                       size, DMA_FROM_DEVICE);
1140         return ib_post_recv(tun_qp->qp, &recv_wr, &bad_recv_wr);
1141 }
1142
1143 static int mlx4_ib_multiplex_sa_handler(struct ib_device *ibdev, int port,
1144                 int slave, struct ib_sa_mad *sa_mad)
1145 {
1146         int ret = 0;
1147
1148         /* dispatch to different sa handlers */
1149         switch (be16_to_cpu(sa_mad->mad_hdr.attr_id)) {
1150         case IB_SA_ATTR_MC_MEMBER_REC:
1151                 ret = mlx4_ib_mcg_multiplex_handler(ibdev, port, slave, sa_mad);
1152                 break;
1153         default:
1154                 break;
1155         }
1156         return ret;
1157 }
1158
1159 static int is_proxy_qp0(struct mlx4_ib_dev *dev, int qpn, int slave)
1160 {
1161         int proxy_start = dev->dev->phys_caps.base_proxy_sqpn + 8 * slave;
1162
1163         return (qpn >= proxy_start && qpn <= proxy_start + 1);
1164 }
1165
1166
1167 int mlx4_ib_send_to_wire(struct mlx4_ib_dev *dev, int slave, u8 port,
1168                          enum ib_qp_type dest_qpt, u16 pkey_index,
1169                          u32 remote_qpn, u32 qkey, struct ib_ah_attr *attr,
1170                          u8 *s_mac, struct ib_mad *mad)
1171 {
1172         struct ib_sge list;
1173         struct ib_send_wr wr, *bad_wr;
1174         struct mlx4_ib_demux_pv_ctx *sqp_ctx;
1175         struct mlx4_ib_demux_pv_qp *sqp;
1176         struct mlx4_mad_snd_buf *sqp_mad;
1177         struct ib_ah *ah;
1178         struct ib_qp *send_qp = NULL;
1179         unsigned wire_tx_ix = 0;
1180         int ret = 0;
1181         u16 wire_pkey_ix;
1182         int src_qpnum;
1183         u8 sgid_index;
1184
1185
1186         sqp_ctx = dev->sriov.sqps[port-1];
1187
1188         /* check if proxy qp created */
1189         if (!sqp_ctx || sqp_ctx->state != DEMUX_PV_STATE_ACTIVE)
1190                 return -EAGAIN;
1191
1192         if (dest_qpt == IB_QPT_SMI) {
1193                 src_qpnum = 0;
1194                 sqp = &sqp_ctx->qp[0];
1195                 wire_pkey_ix = dev->pkeys.virt2phys_pkey[slave][port - 1][0];
1196         } else {
1197                 src_qpnum = 1;
1198                 sqp = &sqp_ctx->qp[1];
1199                 wire_pkey_ix = dev->pkeys.virt2phys_pkey[slave][port - 1][pkey_index];
1200         }
1201
1202         send_qp = sqp->qp;
1203
1204         /* create ah */
1205         sgid_index = attr->grh.sgid_index;
1206         attr->grh.sgid_index = 0;
1207         ah = ib_create_ah(sqp_ctx->pd, attr);
1208         if (IS_ERR(ah))
1209                 return -ENOMEM;
1210         attr->grh.sgid_index = sgid_index;
1211         to_mah(ah)->av.ib.gid_index = sgid_index;
1212         /* get rid of force-loopback bit */
1213         to_mah(ah)->av.ib.port_pd &= cpu_to_be32(0x7FFFFFFF);
1214         spin_lock(&sqp->tx_lock);
1215         if (sqp->tx_ix_head - sqp->tx_ix_tail >=
1216             (MLX4_NUM_TUNNEL_BUFS - 1))
1217                 ret = -EAGAIN;
1218         else
1219                 wire_tx_ix = (++sqp->tx_ix_head) & (MLX4_NUM_TUNNEL_BUFS - 1);
1220         spin_unlock(&sqp->tx_lock);
1221         if (ret)
1222                 goto out;
1223
1224         sqp_mad = (struct mlx4_mad_snd_buf *) (sqp->tx_ring[wire_tx_ix].buf.addr);
1225         if (sqp->tx_ring[wire_tx_ix].ah)
1226                 ib_destroy_ah(sqp->tx_ring[wire_tx_ix].ah);
1227         sqp->tx_ring[wire_tx_ix].ah = ah;
1228         ib_dma_sync_single_for_cpu(&dev->ib_dev,
1229                                    sqp->tx_ring[wire_tx_ix].buf.map,
1230                                    sizeof (struct mlx4_mad_snd_buf),
1231                                    DMA_TO_DEVICE);
1232
1233         memcpy(&sqp_mad->payload, mad, sizeof *mad);
1234
1235         ib_dma_sync_single_for_device(&dev->ib_dev,
1236                                       sqp->tx_ring[wire_tx_ix].buf.map,
1237                                       sizeof (struct mlx4_mad_snd_buf),
1238                                       DMA_TO_DEVICE);
1239
1240         list.addr = sqp->tx_ring[wire_tx_ix].buf.map;
1241         list.length = sizeof (struct mlx4_mad_snd_buf);
1242         list.lkey = sqp_ctx->mr->lkey;
1243
1244         wr.wr.ud.ah = ah;
1245         wr.wr.ud.port_num = port;
1246         wr.wr.ud.pkey_index = wire_pkey_ix;
1247         wr.wr.ud.remote_qkey = qkey;
1248         wr.wr.ud.remote_qpn = remote_qpn;
1249         wr.next = NULL;
1250         wr.wr_id = ((u64) wire_tx_ix) | MLX4_TUN_SET_WRID_QPN(src_qpnum);
1251         wr.sg_list = &list;
1252         wr.num_sge = 1;
1253         wr.opcode = IB_WR_SEND;
1254         wr.send_flags = IB_SEND_SIGNALED;
1255         if (s_mac)
1256                 memcpy(to_mah(ah)->av.eth.s_mac, s_mac, 6);
1257
1258
1259         ret = ib_post_send(send_qp, &wr, &bad_wr);
1260 out:
1261         if (ret)
1262                 ib_destroy_ah(ah);
1263         return ret;
1264 }
1265
1266 static int get_slave_base_gid_ix(struct mlx4_ib_dev *dev, int slave, int port)
1267 {
1268         if (rdma_port_get_link_layer(&dev->ib_dev, port) == IB_LINK_LAYER_INFINIBAND)
1269                 return slave;
1270         return mlx4_get_base_gid_ix(dev->dev, slave, port);
1271 }
1272
1273 static void fill_in_real_sgid_index(struct mlx4_ib_dev *dev, int slave, int port,
1274                                     struct ib_ah_attr *ah_attr)
1275 {
1276         if (rdma_port_get_link_layer(&dev->ib_dev, port) == IB_LINK_LAYER_INFINIBAND)
1277                 ah_attr->grh.sgid_index = slave;
1278         else
1279                 ah_attr->grh.sgid_index += get_slave_base_gid_ix(dev, slave, port);
1280 }
1281
1282 static void mlx4_ib_multiplex_mad(struct mlx4_ib_demux_pv_ctx *ctx, struct ib_wc *wc)
1283 {
1284         struct mlx4_ib_dev *dev = to_mdev(ctx->ib_dev);
1285         struct mlx4_ib_demux_pv_qp *tun_qp = &ctx->qp[MLX4_TUN_WRID_QPN(wc->wr_id)];
1286         int wr_ix = wc->wr_id & (MLX4_NUM_TUNNEL_BUFS - 1);
1287         struct mlx4_tunnel_mad *tunnel = tun_qp->ring[wr_ix].addr;
1288         struct mlx4_ib_ah ah;
1289         struct ib_ah_attr ah_attr;
1290         u8 *slave_id;
1291         int slave;
1292         int port;
1293
1294         /* Get slave that sent this packet */
1295         if (wc->src_qp < dev->dev->phys_caps.base_proxy_sqpn ||
1296             wc->src_qp >= dev->dev->phys_caps.base_proxy_sqpn + 8 * MLX4_MFUNC_MAX ||
1297             (wc->src_qp & 0x1) != ctx->port - 1 ||
1298             wc->src_qp & 0x4) {
1299                 mlx4_ib_warn(ctx->ib_dev, "can't multiplex bad sqp:%d\n", wc->src_qp);
1300                 return;
1301         }
1302         slave = ((wc->src_qp & ~0x7) - dev->dev->phys_caps.base_proxy_sqpn) / 8;
1303         if (slave != ctx->slave) {
1304                 mlx4_ib_warn(ctx->ib_dev, "can't multiplex bad sqp:%d: "
1305                              "belongs to another slave\n", wc->src_qp);
1306                 return;
1307         }
1308
1309         /* Map transaction ID */
1310         ib_dma_sync_single_for_cpu(ctx->ib_dev, tun_qp->ring[wr_ix].map,
1311                                    sizeof (struct mlx4_tunnel_mad),
1312                                    DMA_FROM_DEVICE);
1313         switch (tunnel->mad.mad_hdr.method) {
1314         case IB_MGMT_METHOD_SET:
1315         case IB_MGMT_METHOD_GET:
1316         case IB_MGMT_METHOD_REPORT:
1317         case IB_SA_METHOD_GET_TABLE:
1318         case IB_SA_METHOD_DELETE:
1319         case IB_SA_METHOD_GET_MULTI:
1320         case IB_SA_METHOD_GET_TRACE_TBL:
1321                 slave_id = (u8 *) &tunnel->mad.mad_hdr.tid;
1322                 if (*slave_id) {
1323                         mlx4_ib_warn(ctx->ib_dev, "egress mad has non-null tid msb:%d "
1324                                      "class:%d slave:%d\n", *slave_id,
1325                                      tunnel->mad.mad_hdr.mgmt_class, slave);
1326                         return;
1327                 } else
1328                         *slave_id = slave;
1329         default:
1330                 /* nothing */;
1331         }
1332
1333         /* Class-specific handling */
1334         switch (tunnel->mad.mad_hdr.mgmt_class) {
1335         case IB_MGMT_CLASS_SUBN_LID_ROUTED:
1336         case IB_MGMT_CLASS_SUBN_DIRECTED_ROUTE:
1337                 if (slave != mlx4_master_func_num(dev->dev) &&
1338                     !mlx4_vf_smi_enabled(dev->dev, slave, ctx->port))
1339                         return;
1340                 break;
1341         case IB_MGMT_CLASS_SUBN_ADM:
1342                 if (mlx4_ib_multiplex_sa_handler(ctx->ib_dev, ctx->port, slave,
1343                               (struct ib_sa_mad *) &tunnel->mad))
1344                         return;
1345                 break;
1346         case IB_MGMT_CLASS_CM:
1347                 if (mlx4_ib_multiplex_cm_handler(ctx->ib_dev, ctx->port, slave,
1348                               (struct ib_mad *) &tunnel->mad))
1349                         return;
1350                 break;
1351         case IB_MGMT_CLASS_DEVICE_MGMT:
1352                 if (tunnel->mad.mad_hdr.method != IB_MGMT_METHOD_GET &&
1353                     tunnel->mad.mad_hdr.method != IB_MGMT_METHOD_SET)
1354                         return;
1355                 break;
1356         default:
1357                 /* Drop unsupported classes for slaves in tunnel mode */
1358                 if (slave != mlx4_master_func_num(dev->dev)) {
1359                         mlx4_ib_warn(ctx->ib_dev, "dropping unsupported egress mad from class:%d "
1360                                      "for slave:%d\n", tunnel->mad.mad_hdr.mgmt_class, slave);
1361                         return;
1362                 }
1363         }
1364
1365         /* We are using standard ib_core services to send the mad, so generate a
1366          * stadard address handle by decoding the tunnelled mlx4_ah fields */
1367         memcpy(&ah.av, &tunnel->hdr.av, sizeof (struct mlx4_av));
1368         ah.ibah.device = ctx->ib_dev;
1369         mlx4_ib_query_ah(&ah.ibah, &ah_attr);
1370         if (ah_attr.ah_flags & IB_AH_GRH)
1371                 fill_in_real_sgid_index(dev, slave, ctx->port, &ah_attr);
1372
1373         port = mlx4_slave_convert_port(dev->dev, slave, ah_attr.port_num);
1374         if (port < 0)
1375                 return;
1376         ah_attr.port_num = port;
1377         memcpy(ah_attr.dmac, tunnel->hdr.mac, 6);
1378         ah_attr.vlan_id = be16_to_cpu(tunnel->hdr.vlan);
1379         /* if slave have default vlan use it */
1380         mlx4_get_slave_default_vlan(dev->dev, ctx->port, slave,
1381                                     &ah_attr.vlan_id, &ah_attr.sl);
1382
1383         mlx4_ib_send_to_wire(dev, slave, ctx->port,
1384                              is_proxy_qp0(dev, wc->src_qp, slave) ?
1385                              IB_QPT_SMI : IB_QPT_GSI,
1386                              be16_to_cpu(tunnel->hdr.pkey_index),
1387                              be32_to_cpu(tunnel->hdr.remote_qpn),
1388                              be32_to_cpu(tunnel->hdr.qkey),
1389                              &ah_attr, wc->smac, &tunnel->mad);
1390 }
1391
1392 static int mlx4_ib_alloc_pv_bufs(struct mlx4_ib_demux_pv_ctx *ctx,
1393                                  enum ib_qp_type qp_type, int is_tun)
1394 {
1395         int i;
1396         struct mlx4_ib_demux_pv_qp *tun_qp;
1397         int rx_buf_size, tx_buf_size;
1398
1399         if (qp_type > IB_QPT_GSI)
1400                 return -EINVAL;
1401
1402         tun_qp = &ctx->qp[qp_type];
1403
1404         tun_qp->ring = kzalloc(sizeof (struct mlx4_ib_buf) * MLX4_NUM_TUNNEL_BUFS,
1405                                GFP_KERNEL);
1406         if (!tun_qp->ring)
1407                 return -ENOMEM;
1408
1409         tun_qp->tx_ring = kcalloc(MLX4_NUM_TUNNEL_BUFS,
1410                                   sizeof (struct mlx4_ib_tun_tx_buf),
1411                                   GFP_KERNEL);
1412         if (!tun_qp->tx_ring) {
1413                 kfree(tun_qp->ring);
1414                 tun_qp->ring = NULL;
1415                 return -ENOMEM;
1416         }
1417
1418         if (is_tun) {
1419                 rx_buf_size = sizeof (struct mlx4_tunnel_mad);
1420                 tx_buf_size = sizeof (struct mlx4_rcv_tunnel_mad);
1421         } else {
1422                 rx_buf_size = sizeof (struct mlx4_mad_rcv_buf);
1423                 tx_buf_size = sizeof (struct mlx4_mad_snd_buf);
1424         }
1425
1426         for (i = 0; i < MLX4_NUM_TUNNEL_BUFS; i++) {
1427                 tun_qp->ring[i].addr = kmalloc(rx_buf_size, GFP_KERNEL);
1428                 if (!tun_qp->ring[i].addr)
1429                         goto err;
1430                 tun_qp->ring[i].map = ib_dma_map_single(ctx->ib_dev,
1431                                                         tun_qp->ring[i].addr,
1432                                                         rx_buf_size,
1433                                                         DMA_FROM_DEVICE);
1434                 if (ib_dma_mapping_error(ctx->ib_dev, tun_qp->ring[i].map)) {
1435                         kfree(tun_qp->ring[i].addr);
1436                         goto err;
1437                 }
1438         }
1439
1440         for (i = 0; i < MLX4_NUM_TUNNEL_BUFS; i++) {
1441                 tun_qp->tx_ring[i].buf.addr =
1442                         kmalloc(tx_buf_size, GFP_KERNEL);
1443                 if (!tun_qp->tx_ring[i].buf.addr)
1444                         goto tx_err;
1445                 tun_qp->tx_ring[i].buf.map =
1446                         ib_dma_map_single(ctx->ib_dev,
1447                                           tun_qp->tx_ring[i].buf.addr,
1448                                           tx_buf_size,
1449                                           DMA_TO_DEVICE);
1450                 if (ib_dma_mapping_error(ctx->ib_dev,
1451                                          tun_qp->tx_ring[i].buf.map)) {
1452                         kfree(tun_qp->tx_ring[i].buf.addr);
1453                         goto tx_err;
1454                 }
1455                 tun_qp->tx_ring[i].ah = NULL;
1456         }
1457         spin_lock_init(&tun_qp->tx_lock);
1458         tun_qp->tx_ix_head = 0;
1459         tun_qp->tx_ix_tail = 0;
1460         tun_qp->proxy_qpt = qp_type;
1461
1462         return 0;
1463
1464 tx_err:
1465         while (i > 0) {
1466                 --i;
1467                 ib_dma_unmap_single(ctx->ib_dev, tun_qp->tx_ring[i].buf.map,
1468                                     tx_buf_size, DMA_TO_DEVICE);
1469                 kfree(tun_qp->tx_ring[i].buf.addr);
1470         }
1471         kfree(tun_qp->tx_ring);
1472         tun_qp->tx_ring = NULL;
1473         i = MLX4_NUM_TUNNEL_BUFS;
1474 err:
1475         while (i > 0) {
1476                 --i;
1477                 ib_dma_unmap_single(ctx->ib_dev, tun_qp->ring[i].map,
1478                                     rx_buf_size, DMA_FROM_DEVICE);
1479                 kfree(tun_qp->ring[i].addr);
1480         }
1481         kfree(tun_qp->ring);
1482         tun_qp->ring = NULL;
1483         return -ENOMEM;
1484 }
1485
1486 static void mlx4_ib_free_pv_qp_bufs(struct mlx4_ib_demux_pv_ctx *ctx,
1487                                      enum ib_qp_type qp_type, int is_tun)
1488 {
1489         int i;
1490         struct mlx4_ib_demux_pv_qp *tun_qp;
1491         int rx_buf_size, tx_buf_size;
1492
1493         if (qp_type > IB_QPT_GSI)
1494                 return;
1495
1496         tun_qp = &ctx->qp[qp_type];
1497         if (is_tun) {
1498                 rx_buf_size = sizeof (struct mlx4_tunnel_mad);
1499                 tx_buf_size = sizeof (struct mlx4_rcv_tunnel_mad);
1500         } else {
1501                 rx_buf_size = sizeof (struct mlx4_mad_rcv_buf);
1502                 tx_buf_size = sizeof (struct mlx4_mad_snd_buf);
1503         }
1504
1505
1506         for (i = 0; i < MLX4_NUM_TUNNEL_BUFS; i++) {
1507                 ib_dma_unmap_single(ctx->ib_dev, tun_qp->ring[i].map,
1508                                     rx_buf_size, DMA_FROM_DEVICE);
1509                 kfree(tun_qp->ring[i].addr);
1510         }
1511
1512         for (i = 0; i < MLX4_NUM_TUNNEL_BUFS; i++) {
1513                 ib_dma_unmap_single(ctx->ib_dev, tun_qp->tx_ring[i].buf.map,
1514                                     tx_buf_size, DMA_TO_DEVICE);
1515                 kfree(tun_qp->tx_ring[i].buf.addr);
1516                 if (tun_qp->tx_ring[i].ah)
1517                         ib_destroy_ah(tun_qp->tx_ring[i].ah);
1518         }
1519         kfree(tun_qp->tx_ring);
1520         kfree(tun_qp->ring);
1521 }
1522
1523 static void mlx4_ib_tunnel_comp_worker(struct work_struct *work)
1524 {
1525         struct mlx4_ib_demux_pv_ctx *ctx;
1526         struct mlx4_ib_demux_pv_qp *tun_qp;
1527         struct ib_wc wc;
1528         int ret;
1529         ctx = container_of(work, struct mlx4_ib_demux_pv_ctx, work);
1530         ib_req_notify_cq(ctx->cq, IB_CQ_NEXT_COMP);
1531
1532         while (ib_poll_cq(ctx->cq, 1, &wc) == 1) {
1533                 tun_qp = &ctx->qp[MLX4_TUN_WRID_QPN(wc.wr_id)];
1534                 if (wc.status == IB_WC_SUCCESS) {
1535                         switch (wc.opcode) {
1536                         case IB_WC_RECV:
1537                                 mlx4_ib_multiplex_mad(ctx, &wc);
1538                                 ret = mlx4_ib_post_pv_qp_buf(ctx, tun_qp,
1539                                                              wc.wr_id &
1540                                                              (MLX4_NUM_TUNNEL_BUFS - 1));
1541                                 if (ret)
1542                                         pr_err("Failed reposting tunnel "
1543                                                "buf:%lld\n", wc.wr_id);
1544                                 break;
1545                         case IB_WC_SEND:
1546                                 pr_debug("received tunnel send completion:"
1547                                          "wrid=0x%llx, status=0x%x\n",
1548                                          wc.wr_id, wc.status);
1549                                 ib_destroy_ah(tun_qp->tx_ring[wc.wr_id &
1550                                               (MLX4_NUM_TUNNEL_BUFS - 1)].ah);
1551                                 tun_qp->tx_ring[wc.wr_id & (MLX4_NUM_TUNNEL_BUFS - 1)].ah
1552                                         = NULL;
1553                                 spin_lock(&tun_qp->tx_lock);
1554                                 tun_qp->tx_ix_tail++;
1555                                 spin_unlock(&tun_qp->tx_lock);
1556
1557                                 break;
1558                         default:
1559                                 break;
1560                         }
1561                 } else  {
1562                         pr_debug("mlx4_ib: completion error in tunnel: %d."
1563                                  " status = %d, wrid = 0x%llx\n",
1564                                  ctx->slave, wc.status, wc.wr_id);
1565                         if (!MLX4_TUN_IS_RECV(wc.wr_id)) {
1566                                 ib_destroy_ah(tun_qp->tx_ring[wc.wr_id &
1567                                               (MLX4_NUM_TUNNEL_BUFS - 1)].ah);
1568                                 tun_qp->tx_ring[wc.wr_id & (MLX4_NUM_TUNNEL_BUFS - 1)].ah
1569                                         = NULL;
1570                                 spin_lock(&tun_qp->tx_lock);
1571                                 tun_qp->tx_ix_tail++;
1572                                 spin_unlock(&tun_qp->tx_lock);
1573                         }
1574                 }
1575         }
1576 }
1577
1578 static void pv_qp_event_handler(struct ib_event *event, void *qp_context)
1579 {
1580         struct mlx4_ib_demux_pv_ctx *sqp = qp_context;
1581
1582         /* It's worse than that! He's dead, Jim! */
1583         pr_err("Fatal error (%d) on a MAD QP on port %d\n",
1584                event->event, sqp->port);
1585 }
1586
1587 static int create_pv_sqp(struct mlx4_ib_demux_pv_ctx *ctx,
1588                             enum ib_qp_type qp_type, int create_tun)
1589 {
1590         int i, ret;
1591         struct mlx4_ib_demux_pv_qp *tun_qp;
1592         struct mlx4_ib_qp_tunnel_init_attr qp_init_attr;
1593         struct ib_qp_attr attr;
1594         int qp_attr_mask_INIT;
1595
1596         if (qp_type > IB_QPT_GSI)
1597                 return -EINVAL;
1598
1599         tun_qp = &ctx->qp[qp_type];
1600
1601         memset(&qp_init_attr, 0, sizeof qp_init_attr);
1602         qp_init_attr.init_attr.send_cq = ctx->cq;
1603         qp_init_attr.init_attr.recv_cq = ctx->cq;
1604         qp_init_attr.init_attr.sq_sig_type = IB_SIGNAL_ALL_WR;
1605         qp_init_attr.init_attr.cap.max_send_wr = MLX4_NUM_TUNNEL_BUFS;
1606         qp_init_attr.init_attr.cap.max_recv_wr = MLX4_NUM_TUNNEL_BUFS;
1607         qp_init_attr.init_attr.cap.max_send_sge = 1;
1608         qp_init_attr.init_attr.cap.max_recv_sge = 1;
1609         if (create_tun) {
1610                 qp_init_attr.init_attr.qp_type = IB_QPT_UD;
1611                 qp_init_attr.init_attr.create_flags = MLX4_IB_SRIOV_TUNNEL_QP;
1612                 qp_init_attr.port = ctx->port;
1613                 qp_init_attr.slave = ctx->slave;
1614                 qp_init_attr.proxy_qp_type = qp_type;
1615                 qp_attr_mask_INIT = IB_QP_STATE | IB_QP_PKEY_INDEX |
1616                            IB_QP_QKEY | IB_QP_PORT;
1617         } else {
1618                 qp_init_attr.init_attr.qp_type = qp_type;
1619                 qp_init_attr.init_attr.create_flags = MLX4_IB_SRIOV_SQP;
1620                 qp_attr_mask_INIT = IB_QP_STATE | IB_QP_PKEY_INDEX | IB_QP_QKEY;
1621         }
1622         qp_init_attr.init_attr.port_num = ctx->port;
1623         qp_init_attr.init_attr.qp_context = ctx;
1624         qp_init_attr.init_attr.event_handler = pv_qp_event_handler;
1625         tun_qp->qp = ib_create_qp(ctx->pd, &qp_init_attr.init_attr);
1626         if (IS_ERR(tun_qp->qp)) {
1627                 ret = PTR_ERR(tun_qp->qp);
1628                 tun_qp->qp = NULL;
1629                 pr_err("Couldn't create %s QP (%d)\n",
1630                        create_tun ? "tunnel" : "special", ret);
1631                 return ret;
1632         }
1633
1634         memset(&attr, 0, sizeof attr);
1635         attr.qp_state = IB_QPS_INIT;
1636         ret = 0;
1637         if (create_tun)
1638                 ret = find_slave_port_pkey_ix(to_mdev(ctx->ib_dev), ctx->slave,
1639                                               ctx->port, IB_DEFAULT_PKEY_FULL,
1640                                               &attr.pkey_index);
1641         if (ret || !create_tun)
1642                 attr.pkey_index =
1643                         to_mdev(ctx->ib_dev)->pkeys.virt2phys_pkey[ctx->slave][ctx->port - 1][0];
1644         attr.qkey = IB_QP1_QKEY;
1645         attr.port_num = ctx->port;
1646         ret = ib_modify_qp(tun_qp->qp, &attr, qp_attr_mask_INIT);
1647         if (ret) {
1648                 pr_err("Couldn't change %s qp state to INIT (%d)\n",
1649                        create_tun ? "tunnel" : "special", ret);
1650                 goto err_qp;
1651         }
1652         attr.qp_state = IB_QPS_RTR;
1653         ret = ib_modify_qp(tun_qp->qp, &attr, IB_QP_STATE);
1654         if (ret) {
1655                 pr_err("Couldn't change %s qp state to RTR (%d)\n",
1656                        create_tun ? "tunnel" : "special", ret);
1657                 goto err_qp;
1658         }
1659         attr.qp_state = IB_QPS_RTS;
1660         attr.sq_psn = 0;
1661         ret = ib_modify_qp(tun_qp->qp, &attr, IB_QP_STATE | IB_QP_SQ_PSN);
1662         if (ret) {
1663                 pr_err("Couldn't change %s qp state to RTS (%d)\n",
1664                        create_tun ? "tunnel" : "special", ret);
1665                 goto err_qp;
1666         }
1667
1668         for (i = 0; i < MLX4_NUM_TUNNEL_BUFS; i++) {
1669                 ret = mlx4_ib_post_pv_qp_buf(ctx, tun_qp, i);
1670                 if (ret) {
1671                         pr_err(" mlx4_ib_post_pv_buf error"
1672                                " (err = %d, i = %d)\n", ret, i);
1673                         goto err_qp;
1674                 }
1675         }
1676         return 0;
1677
1678 err_qp:
1679         ib_destroy_qp(tun_qp->qp);
1680         tun_qp->qp = NULL;
1681         return ret;
1682 }
1683
1684 /*
1685  * IB MAD completion callback for real SQPs
1686  */
1687 static void mlx4_ib_sqp_comp_worker(struct work_struct *work)
1688 {
1689         struct mlx4_ib_demux_pv_ctx *ctx;
1690         struct mlx4_ib_demux_pv_qp *sqp;
1691         struct ib_wc wc;
1692         struct ib_grh *grh;
1693         struct ib_mad *mad;
1694
1695         ctx = container_of(work, struct mlx4_ib_demux_pv_ctx, work);
1696         ib_req_notify_cq(ctx->cq, IB_CQ_NEXT_COMP);
1697
1698         while (mlx4_ib_poll_cq(ctx->cq, 1, &wc) == 1) {
1699                 sqp = &ctx->qp[MLX4_TUN_WRID_QPN(wc.wr_id)];
1700                 if (wc.status == IB_WC_SUCCESS) {
1701                         switch (wc.opcode) {
1702                         case IB_WC_SEND:
1703                                 ib_destroy_ah(sqp->tx_ring[wc.wr_id &
1704                                               (MLX4_NUM_TUNNEL_BUFS - 1)].ah);
1705                                 sqp->tx_ring[wc.wr_id & (MLX4_NUM_TUNNEL_BUFS - 1)].ah
1706                                         = NULL;
1707                                 spin_lock(&sqp->tx_lock);
1708                                 sqp->tx_ix_tail++;
1709                                 spin_unlock(&sqp->tx_lock);
1710                                 break;
1711                         case IB_WC_RECV:
1712                                 mad = (struct ib_mad *) &(((struct mlx4_mad_rcv_buf *)
1713                                                 (sqp->ring[wc.wr_id &
1714                                                 (MLX4_NUM_TUNNEL_BUFS - 1)].addr))->payload);
1715                                 grh = &(((struct mlx4_mad_rcv_buf *)
1716                                                 (sqp->ring[wc.wr_id &
1717                                                 (MLX4_NUM_TUNNEL_BUFS - 1)].addr))->grh);
1718                                 mlx4_ib_demux_mad(ctx->ib_dev, ctx->port, &wc, grh, mad);
1719                                 if (mlx4_ib_post_pv_qp_buf(ctx, sqp, wc.wr_id &
1720                                                            (MLX4_NUM_TUNNEL_BUFS - 1)))
1721                                         pr_err("Failed reposting SQP "
1722                                                "buf:%lld\n", wc.wr_id);
1723                                 break;
1724                         default:
1725                                 BUG_ON(1);
1726                                 break;
1727                         }
1728                 } else  {
1729                         pr_debug("mlx4_ib: completion error in tunnel: %d."
1730                                  " status = %d, wrid = 0x%llx\n",
1731                                  ctx->slave, wc.status, wc.wr_id);
1732                         if (!MLX4_TUN_IS_RECV(wc.wr_id)) {
1733                                 ib_destroy_ah(sqp->tx_ring[wc.wr_id &
1734                                               (MLX4_NUM_TUNNEL_BUFS - 1)].ah);
1735                                 sqp->tx_ring[wc.wr_id & (MLX4_NUM_TUNNEL_BUFS - 1)].ah
1736                                         = NULL;
1737                                 spin_lock(&sqp->tx_lock);
1738                                 sqp->tx_ix_tail++;
1739                                 spin_unlock(&sqp->tx_lock);
1740                         }
1741                 }
1742         }
1743 }
1744
1745 static int alloc_pv_object(struct mlx4_ib_dev *dev, int slave, int port,
1746                                struct mlx4_ib_demux_pv_ctx **ret_ctx)
1747 {
1748         struct mlx4_ib_demux_pv_ctx *ctx;
1749
1750         *ret_ctx = NULL;
1751         ctx = kzalloc(sizeof (struct mlx4_ib_demux_pv_ctx), GFP_KERNEL);
1752         if (!ctx) {
1753                 pr_err("failed allocating pv resource context "
1754                        "for port %d, slave %d\n", port, slave);
1755                 return -ENOMEM;
1756         }
1757
1758         ctx->ib_dev = &dev->ib_dev;
1759         ctx->port = port;
1760         ctx->slave = slave;
1761         *ret_ctx = ctx;
1762         return 0;
1763 }
1764
1765 static void free_pv_object(struct mlx4_ib_dev *dev, int slave, int port)
1766 {
1767         if (dev->sriov.demux[port - 1].tun[slave]) {
1768                 kfree(dev->sriov.demux[port - 1].tun[slave]);
1769                 dev->sriov.demux[port - 1].tun[slave] = NULL;
1770         }
1771 }
1772
1773 static int create_pv_resources(struct ib_device *ibdev, int slave, int port,
1774                                int create_tun, struct mlx4_ib_demux_pv_ctx *ctx)
1775 {
1776         int ret, cq_size;
1777         struct ib_cq_init_attr cq_attr = {};
1778
1779         if (ctx->state != DEMUX_PV_STATE_DOWN)
1780                 return -EEXIST;
1781
1782         ctx->state = DEMUX_PV_STATE_STARTING;
1783         /* have QP0 only if link layer is IB */
1784         if (rdma_port_get_link_layer(ibdev, ctx->port) ==
1785             IB_LINK_LAYER_INFINIBAND)
1786                 ctx->has_smi = 1;
1787
1788         if (ctx->has_smi) {
1789                 ret = mlx4_ib_alloc_pv_bufs(ctx, IB_QPT_SMI, create_tun);
1790                 if (ret) {
1791                         pr_err("Failed allocating qp0 tunnel bufs (%d)\n", ret);
1792                         goto err_out;
1793                 }
1794         }
1795
1796         ret = mlx4_ib_alloc_pv_bufs(ctx, IB_QPT_GSI, create_tun);
1797         if (ret) {
1798                 pr_err("Failed allocating qp1 tunnel bufs (%d)\n", ret);
1799                 goto err_out_qp0;
1800         }
1801
1802         cq_size = 2 * MLX4_NUM_TUNNEL_BUFS;
1803         if (ctx->has_smi)
1804                 cq_size *= 2;
1805
1806         cq_attr.cqe = cq_size;
1807         ctx->cq = ib_create_cq(ctx->ib_dev, mlx4_ib_tunnel_comp_handler,
1808                                NULL, ctx, &cq_attr);
1809         if (IS_ERR(ctx->cq)) {
1810                 ret = PTR_ERR(ctx->cq);
1811                 pr_err("Couldn't create tunnel CQ (%d)\n", ret);
1812                 goto err_buf;
1813         }
1814
1815         ctx->pd = ib_alloc_pd(ctx->ib_dev);
1816         if (IS_ERR(ctx->pd)) {
1817                 ret = PTR_ERR(ctx->pd);
1818                 pr_err("Couldn't create tunnel PD (%d)\n", ret);
1819                 goto err_cq;
1820         }
1821
1822         ctx->mr = ib_get_dma_mr(ctx->pd, IB_ACCESS_LOCAL_WRITE);
1823         if (IS_ERR(ctx->mr)) {
1824                 ret = PTR_ERR(ctx->mr);
1825                 pr_err("Couldn't get tunnel DMA MR (%d)\n", ret);
1826                 goto err_pd;
1827         }
1828
1829         if (ctx->has_smi) {
1830                 ret = create_pv_sqp(ctx, IB_QPT_SMI, create_tun);
1831                 if (ret) {
1832                         pr_err("Couldn't create %s QP0 (%d)\n",
1833                                create_tun ? "tunnel for" : "",  ret);
1834                         goto err_mr;
1835                 }
1836         }
1837
1838         ret = create_pv_sqp(ctx, IB_QPT_GSI, create_tun);
1839         if (ret) {
1840                 pr_err("Couldn't create %s QP1 (%d)\n",
1841                        create_tun ? "tunnel for" : "",  ret);
1842                 goto err_qp0;
1843         }
1844
1845         if (create_tun)
1846                 INIT_WORK(&ctx->work, mlx4_ib_tunnel_comp_worker);
1847         else
1848                 INIT_WORK(&ctx->work, mlx4_ib_sqp_comp_worker);
1849
1850         ctx->wq = to_mdev(ibdev)->sriov.demux[port - 1].wq;
1851
1852         ret = ib_req_notify_cq(ctx->cq, IB_CQ_NEXT_COMP);
1853         if (ret) {
1854                 pr_err("Couldn't arm tunnel cq (%d)\n", ret);
1855                 goto err_wq;
1856         }
1857         ctx->state = DEMUX_PV_STATE_ACTIVE;
1858         return 0;
1859
1860 err_wq:
1861         ctx->wq = NULL;
1862         ib_destroy_qp(ctx->qp[1].qp);
1863         ctx->qp[1].qp = NULL;
1864
1865
1866 err_qp0:
1867         if (ctx->has_smi)
1868                 ib_destroy_qp(ctx->qp[0].qp);
1869         ctx->qp[0].qp = NULL;
1870
1871 err_mr:
1872         ib_dereg_mr(ctx->mr);
1873         ctx->mr = NULL;
1874
1875 err_pd:
1876         ib_dealloc_pd(ctx->pd);
1877         ctx->pd = NULL;
1878
1879 err_cq:
1880         ib_destroy_cq(ctx->cq);
1881         ctx->cq = NULL;
1882
1883 err_buf:
1884         mlx4_ib_free_pv_qp_bufs(ctx, IB_QPT_GSI, create_tun);
1885
1886 err_out_qp0:
1887         if (ctx->has_smi)
1888                 mlx4_ib_free_pv_qp_bufs(ctx, IB_QPT_SMI, create_tun);
1889 err_out:
1890         ctx->state = DEMUX_PV_STATE_DOWN;
1891         return ret;
1892 }
1893
1894 static void destroy_pv_resources(struct mlx4_ib_dev *dev, int slave, int port,
1895                                  struct mlx4_ib_demux_pv_ctx *ctx, int flush)
1896 {
1897         if (!ctx)
1898                 return;
1899         if (ctx->state > DEMUX_PV_STATE_DOWN) {
1900                 ctx->state = DEMUX_PV_STATE_DOWNING;
1901                 if (flush)
1902                         flush_workqueue(ctx->wq);
1903                 if (ctx->has_smi) {
1904                         ib_destroy_qp(ctx->qp[0].qp);
1905                         ctx->qp[0].qp = NULL;
1906                         mlx4_ib_free_pv_qp_bufs(ctx, IB_QPT_SMI, 1);
1907                 }
1908                 ib_destroy_qp(ctx->qp[1].qp);
1909                 ctx->qp[1].qp = NULL;
1910                 mlx4_ib_free_pv_qp_bufs(ctx, IB_QPT_GSI, 1);
1911                 ib_dereg_mr(ctx->mr);
1912                 ctx->mr = NULL;
1913                 ib_dealloc_pd(ctx->pd);
1914                 ctx->pd = NULL;
1915                 ib_destroy_cq(ctx->cq);
1916                 ctx->cq = NULL;
1917                 ctx->state = DEMUX_PV_STATE_DOWN;
1918         }
1919 }
1920
1921 static int mlx4_ib_tunnels_update(struct mlx4_ib_dev *dev, int slave,
1922                                   int port, int do_init)
1923 {
1924         int ret = 0;
1925
1926         if (!do_init) {
1927                 clean_vf_mcast(&dev->sriov.demux[port - 1], slave);
1928                 /* for master, destroy real sqp resources */
1929                 if (slave == mlx4_master_func_num(dev->dev))
1930                         destroy_pv_resources(dev, slave, port,
1931                                              dev->sriov.sqps[port - 1], 1);
1932                 /* destroy the tunnel qp resources */
1933                 destroy_pv_resources(dev, slave, port,
1934                                      dev->sriov.demux[port - 1].tun[slave], 1);
1935                 return 0;
1936         }
1937
1938         /* create the tunnel qp resources */
1939         ret = create_pv_resources(&dev->ib_dev, slave, port, 1,
1940                                   dev->sriov.demux[port - 1].tun[slave]);
1941
1942         /* for master, create the real sqp resources */
1943         if (!ret && slave == mlx4_master_func_num(dev->dev))
1944                 ret = create_pv_resources(&dev->ib_dev, slave, port, 0,
1945                                           dev->sriov.sqps[port - 1]);
1946         return ret;
1947 }
1948
1949 void mlx4_ib_tunnels_update_work(struct work_struct *work)
1950 {
1951         struct mlx4_ib_demux_work *dmxw;
1952
1953         dmxw = container_of(work, struct mlx4_ib_demux_work, work);
1954         mlx4_ib_tunnels_update(dmxw->dev, dmxw->slave, (int) dmxw->port,
1955                                dmxw->do_init);
1956         kfree(dmxw);
1957         return;
1958 }
1959
1960 static int mlx4_ib_alloc_demux_ctx(struct mlx4_ib_dev *dev,
1961                                        struct mlx4_ib_demux_ctx *ctx,
1962                                        int port)
1963 {
1964         char name[12];
1965         int ret = 0;
1966         int i;
1967
1968         ctx->tun = kcalloc(dev->dev->caps.sqp_demux,
1969                            sizeof (struct mlx4_ib_demux_pv_ctx *), GFP_KERNEL);
1970         if (!ctx->tun)
1971                 return -ENOMEM;
1972
1973         ctx->dev = dev;
1974         ctx->port = port;
1975         ctx->ib_dev = &dev->ib_dev;
1976
1977         for (i = 0;
1978              i < min(dev->dev->caps.sqp_demux,
1979              (u16)(dev->dev->persist->num_vfs + 1));
1980              i++) {
1981                 struct mlx4_active_ports actv_ports =
1982                         mlx4_get_active_ports(dev->dev, i);
1983
1984                 if (!test_bit(port - 1, actv_ports.ports))
1985                         continue;
1986
1987                 ret = alloc_pv_object(dev, i, port, &ctx->tun[i]);
1988                 if (ret) {
1989                         ret = -ENOMEM;
1990                         goto err_mcg;
1991                 }
1992         }
1993
1994         ret = mlx4_ib_mcg_port_init(ctx);
1995         if (ret) {
1996                 pr_err("Failed initializing mcg para-virt (%d)\n", ret);
1997                 goto err_mcg;
1998         }
1999
2000         snprintf(name, sizeof name, "mlx4_ibt%d", port);
2001         ctx->wq = create_singlethread_workqueue(name);
2002         if (!ctx->wq) {
2003                 pr_err("Failed to create tunnelling WQ for port %d\n", port);
2004                 ret = -ENOMEM;
2005                 goto err_wq;
2006         }
2007
2008         snprintf(name, sizeof name, "mlx4_ibud%d", port);
2009         ctx->ud_wq = create_singlethread_workqueue(name);
2010         if (!ctx->ud_wq) {
2011                 pr_err("Failed to create up/down WQ for port %d\n", port);
2012                 ret = -ENOMEM;
2013                 goto err_udwq;
2014         }
2015
2016         return 0;
2017
2018 err_udwq:
2019         destroy_workqueue(ctx->wq);
2020         ctx->wq = NULL;
2021
2022 err_wq:
2023         mlx4_ib_mcg_port_cleanup(ctx, 1);
2024 err_mcg:
2025         for (i = 0; i < dev->dev->caps.sqp_demux; i++)
2026                 free_pv_object(dev, i, port);
2027         kfree(ctx->tun);
2028         ctx->tun = NULL;
2029         return ret;
2030 }
2031
2032 static void mlx4_ib_free_sqp_ctx(struct mlx4_ib_demux_pv_ctx *sqp_ctx)
2033 {
2034         if (sqp_ctx->state > DEMUX_PV_STATE_DOWN) {
2035                 sqp_ctx->state = DEMUX_PV_STATE_DOWNING;
2036                 flush_workqueue(sqp_ctx->wq);
2037                 if (sqp_ctx->has_smi) {
2038                         ib_destroy_qp(sqp_ctx->qp[0].qp);
2039                         sqp_ctx->qp[0].qp = NULL;
2040                         mlx4_ib_free_pv_qp_bufs(sqp_ctx, IB_QPT_SMI, 0);
2041                 }
2042                 ib_destroy_qp(sqp_ctx->qp[1].qp);
2043                 sqp_ctx->qp[1].qp = NULL;
2044                 mlx4_ib_free_pv_qp_bufs(sqp_ctx, IB_QPT_GSI, 0);
2045                 ib_dereg_mr(sqp_ctx->mr);
2046                 sqp_ctx->mr = NULL;
2047                 ib_dealloc_pd(sqp_ctx->pd);
2048                 sqp_ctx->pd = NULL;
2049                 ib_destroy_cq(sqp_ctx->cq);
2050                 sqp_ctx->cq = NULL;
2051                 sqp_ctx->state = DEMUX_PV_STATE_DOWN;
2052         }
2053 }
2054
2055 static void mlx4_ib_free_demux_ctx(struct mlx4_ib_demux_ctx *ctx)
2056 {
2057         int i;
2058         if (ctx) {
2059                 struct mlx4_ib_dev *dev = to_mdev(ctx->ib_dev);
2060                 mlx4_ib_mcg_port_cleanup(ctx, 1);
2061                 for (i = 0; i < dev->dev->caps.sqp_demux; i++) {
2062                         if (!ctx->tun[i])
2063                                 continue;
2064                         if (ctx->tun[i]->state > DEMUX_PV_STATE_DOWN)
2065                                 ctx->tun[i]->state = DEMUX_PV_STATE_DOWNING;
2066                 }
2067                 flush_workqueue(ctx->wq);
2068                 for (i = 0; i < dev->dev->caps.sqp_demux; i++) {
2069                         destroy_pv_resources(dev, i, ctx->port, ctx->tun[i], 0);
2070                         free_pv_object(dev, i, ctx->port);
2071                 }
2072                 kfree(ctx->tun);
2073                 destroy_workqueue(ctx->ud_wq);
2074                 destroy_workqueue(ctx->wq);
2075         }
2076 }
2077
2078 static void mlx4_ib_master_tunnels(struct mlx4_ib_dev *dev, int do_init)
2079 {
2080         int i;
2081
2082         if (!mlx4_is_master(dev->dev))
2083                 return;
2084         /* initialize or tear down tunnel QPs for the master */
2085         for (i = 0; i < dev->dev->caps.num_ports; i++)
2086                 mlx4_ib_tunnels_update(dev, mlx4_master_func_num(dev->dev), i + 1, do_init);
2087         return;
2088 }
2089
2090 int mlx4_ib_init_sriov(struct mlx4_ib_dev *dev)
2091 {
2092         int i = 0;
2093         int err;
2094
2095         if (!mlx4_is_mfunc(dev->dev))
2096                 return 0;
2097
2098         dev->sriov.is_going_down = 0;
2099         spin_lock_init(&dev->sriov.going_down_lock);
2100         mlx4_ib_cm_paravirt_init(dev);
2101
2102         mlx4_ib_warn(&dev->ib_dev, "multi-function enabled\n");
2103
2104         if (mlx4_is_slave(dev->dev)) {
2105                 mlx4_ib_warn(&dev->ib_dev, "operating in qp1 tunnel mode\n");
2106                 return 0;
2107         }
2108
2109         for (i = 0; i < dev->dev->caps.sqp_demux; i++) {
2110                 if (i == mlx4_master_func_num(dev->dev))
2111                         mlx4_put_slave_node_guid(dev->dev, i, dev->ib_dev.node_guid);
2112                 else
2113                         mlx4_put_slave_node_guid(dev->dev, i, mlx4_ib_gen_node_guid());
2114         }
2115
2116         err = mlx4_ib_init_alias_guid_service(dev);
2117         if (err) {
2118                 mlx4_ib_warn(&dev->ib_dev, "Failed init alias guid process.\n");
2119                 goto paravirt_err;
2120         }
2121         err = mlx4_ib_device_register_sysfs(dev);
2122         if (err) {
2123                 mlx4_ib_warn(&dev->ib_dev, "Failed to register sysfs\n");
2124                 goto sysfs_err;
2125         }
2126
2127         mlx4_ib_warn(&dev->ib_dev, "initializing demux service for %d qp1 clients\n",
2128                      dev->dev->caps.sqp_demux);
2129         for (i = 0; i < dev->num_ports; i++) {
2130                 union ib_gid gid;
2131                 err = __mlx4_ib_query_gid(&dev->ib_dev, i + 1, 0, &gid, 1);
2132                 if (err)
2133                         goto demux_err;
2134                 dev->sriov.demux[i].guid_cache[0] = gid.global.interface_id;
2135                 err = alloc_pv_object(dev, mlx4_master_func_num(dev->dev), i + 1,
2136                                       &dev->sriov.sqps[i]);
2137                 if (err)
2138                         goto demux_err;
2139                 err = mlx4_ib_alloc_demux_ctx(dev, &dev->sriov.demux[i], i + 1);
2140                 if (err)
2141                         goto free_pv;
2142         }
2143         mlx4_ib_master_tunnels(dev, 1);
2144         return 0;
2145
2146 free_pv:
2147         free_pv_object(dev, mlx4_master_func_num(dev->dev), i + 1);
2148 demux_err:
2149         while (--i >= 0) {
2150                 free_pv_object(dev, mlx4_master_func_num(dev->dev), i + 1);
2151                 mlx4_ib_free_demux_ctx(&dev->sriov.demux[i]);
2152         }
2153         mlx4_ib_device_unregister_sysfs(dev);
2154
2155 sysfs_err:
2156         mlx4_ib_destroy_alias_guid_service(dev);
2157
2158 paravirt_err:
2159         mlx4_ib_cm_paravirt_clean(dev, -1);
2160
2161         return err;
2162 }
2163
2164 void mlx4_ib_close_sriov(struct mlx4_ib_dev *dev)
2165 {
2166         int i;
2167         unsigned long flags;
2168
2169         if (!mlx4_is_mfunc(dev->dev))
2170                 return;
2171
2172         spin_lock_irqsave(&dev->sriov.going_down_lock, flags);
2173         dev->sriov.is_going_down = 1;
2174         spin_unlock_irqrestore(&dev->sriov.going_down_lock, flags);
2175         if (mlx4_is_master(dev->dev)) {
2176                 for (i = 0; i < dev->num_ports; i++) {
2177                         flush_workqueue(dev->sriov.demux[i].ud_wq);
2178                         mlx4_ib_free_sqp_ctx(dev->sriov.sqps[i]);
2179                         kfree(dev->sriov.sqps[i]);
2180                         dev->sriov.sqps[i] = NULL;
2181                         mlx4_ib_free_demux_ctx(&dev->sriov.demux[i]);
2182                 }
2183
2184                 mlx4_ib_cm_paravirt_clean(dev, -1);
2185                 mlx4_ib_destroy_alias_guid_service(dev);
2186                 mlx4_ib_device_unregister_sysfs(dev);
2187         }
2188 }