2 * Keyboard class input driver for the NVIDIA Tegra SoC internal matrix
5 * Copyright (c) 2009-2011, NVIDIA Corporation.
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License as published by
9 * the Free Software Foundation; either version 2 of the License, or
10 * (at your option) any later version.
12 * This program is distributed in the hope that it will be useful, but WITHOUT
13 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
14 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
17 * You should have received a copy of the GNU General Public License along
18 * with this program; if not, write to the Free Software Foundation, Inc.,
19 * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA.
22 #include <linux/kernel.h>
23 #include <linux/module.h>
24 #include <linux/input.h>
25 #include <linux/platform_device.h>
26 #include <linux/delay.h>
28 #include <linux/interrupt.h>
30 #include <linux/clk.h>
31 #include <linux/slab.h>
32 #include <linux/input/matrix_keypad.h>
33 #include <linux/clk/tegra.h>
35 #define KBC_MAX_GPIO 24
36 #define KBC_MAX_KPENT 8
38 #define KBC_MAX_ROW 16
40 #define KBC_MAX_KEY (KBC_MAX_ROW * KBC_MAX_COL)
42 #define KBC_MAX_DEBOUNCE_CNT 0x3ffu
44 /* KBC row scan time and delay for beginning the row scan. */
45 #define KBC_ROW_SCAN_TIME 16
46 #define KBC_ROW_SCAN_DLY 5
48 /* KBC uses a 32KHz clock so a cycle = 1/32Khz */
49 #define KBC_CYCLE_MS 32
53 /* KBC Control Register */
54 #define KBC_CONTROL_0 0x0
55 #define KBC_FIFO_TH_CNT_SHIFT(cnt) (cnt << 14)
56 #define KBC_DEBOUNCE_CNT_SHIFT(cnt) (cnt << 4)
57 #define KBC_CONTROL_FIFO_CNT_INT_EN (1 << 3)
58 #define KBC_CONTROL_KEYPRESS_INT_EN (1 << 1)
59 #define KBC_CONTROL_KBC_EN (1 << 0)
61 /* KBC Interrupt Register */
63 #define KBC_INT_FIFO_CNT_INT_STATUS (1 << 2)
64 #define KBC_INT_KEYPRESS_INT_STATUS (1 << 0)
66 #define KBC_ROW_CFG0_0 0x8
67 #define KBC_COL_CFG0_0 0x18
68 #define KBC_TO_CNT_0 0x24
69 #define KBC_INIT_DLY_0 0x28
70 #define KBC_RPT_DLY_0 0x2c
71 #define KBC_KP_ENT0_0 0x30
72 #define KBC_KP_ENT1_0 0x34
73 #define KBC_ROW0_MASK_0 0x38
75 #define KBC_ROW_SHIFT 3
83 struct tegra_kbc_pin_cfg {
84 enum tegra_pin_type type;
90 unsigned int debounce_cnt;
91 unsigned int repeat_cnt;
92 struct tegra_kbc_pin_cfg pin_cfg[KBC_MAX_GPIO];
93 const struct matrix_keymap_data *keymap_data;
96 struct input_dev *idev;
99 unsigned int repoll_dly;
100 unsigned long cp_dly_jiffies;
101 unsigned int cp_to_wkup_dly;
103 bool use_ghost_filter;
104 bool keypress_caused_wake;
105 unsigned short keycode[KBC_MAX_KEY * 2];
106 unsigned short current_keys[KBC_MAX_KPENT];
107 unsigned int num_pressed_keys;
109 struct timer_list timer;
113 static void tegra_kbc_report_released_keys(struct input_dev *input,
114 unsigned short old_keycodes[],
115 unsigned int old_num_keys,
116 unsigned short new_keycodes[],
117 unsigned int new_num_keys)
121 for (i = 0; i < old_num_keys; i++) {
122 for (j = 0; j < new_num_keys; j++)
123 if (old_keycodes[i] == new_keycodes[j])
126 if (j == new_num_keys)
127 input_report_key(input, old_keycodes[i], 0);
131 static void tegra_kbc_report_pressed_keys(struct input_dev *input,
132 unsigned char scancodes[],
133 unsigned short keycodes[],
134 unsigned int num_pressed_keys)
138 for (i = 0; i < num_pressed_keys; i++) {
139 input_event(input, EV_MSC, MSC_SCAN, scancodes[i]);
140 input_report_key(input, keycodes[i], 1);
144 static void tegra_kbc_report_keys(struct tegra_kbc *kbc)
146 unsigned char scancodes[KBC_MAX_KPENT];
147 unsigned short keycodes[KBC_MAX_KPENT];
150 unsigned int num_down = 0;
151 bool fn_keypress = false;
152 bool key_in_same_row = false;
153 bool key_in_same_col = false;
155 for (i = 0; i < KBC_MAX_KPENT; i++) {
157 val = readl(kbc->mmio + KBC_KP_ENT0_0 + i);
160 unsigned int col = val & 0x07;
161 unsigned int row = (val >> 3) & 0x0f;
162 unsigned char scancode =
163 MATRIX_SCAN_CODE(row, col, KBC_ROW_SHIFT);
165 scancodes[num_down] = scancode;
166 keycodes[num_down] = kbc->keycode[scancode];
167 /* If driver uses Fn map, do not report the Fn key. */
168 if ((keycodes[num_down] == KEY_FN) && kbc->use_fn_map)
178 * Matrix keyboard designs are prone to keyboard ghosting.
179 * Ghosting occurs if there are 3 keys such that -
180 * any 2 of the 3 keys share a row, and any 2 of them share a column.
181 * If so ignore the key presses for this iteration.
183 if (kbc->use_ghost_filter && num_down >= 3) {
184 for (i = 0; i < num_down; i++) {
186 u8 curr_col = scancodes[i] & 0x07;
187 u8 curr_row = scancodes[i] >> KBC_ROW_SHIFT;
190 * Find 2 keys such that one key is in the same row
191 * and the other is in the same column as the i-th key.
193 for (j = i + 1; j < num_down; j++) {
194 u8 col = scancodes[j] & 0x07;
195 u8 row = scancodes[j] >> KBC_ROW_SHIFT;
198 key_in_same_col = true;
200 key_in_same_row = true;
206 * If the platform uses Fn keymaps, translate keys on a Fn keypress.
207 * Function keycodes are KBC_MAX_KEY apart from the plain keycodes.
210 for (i = 0; i < num_down; i++) {
211 scancodes[i] += KBC_MAX_KEY;
212 keycodes[i] = kbc->keycode[scancodes[i]];
216 /* Ignore the key presses for this iteration? */
217 if (key_in_same_col && key_in_same_row)
220 tegra_kbc_report_released_keys(kbc->idev,
221 kbc->current_keys, kbc->num_pressed_keys,
223 tegra_kbc_report_pressed_keys(kbc->idev, scancodes, keycodes, num_down);
224 input_sync(kbc->idev);
226 memcpy(kbc->current_keys, keycodes, sizeof(kbc->current_keys));
227 kbc->num_pressed_keys = num_down;
230 static void tegra_kbc_set_fifo_interrupt(struct tegra_kbc *kbc, bool enable)
234 val = readl(kbc->mmio + KBC_CONTROL_0);
236 val |= KBC_CONTROL_FIFO_CNT_INT_EN;
238 val &= ~KBC_CONTROL_FIFO_CNT_INT_EN;
239 writel(val, kbc->mmio + KBC_CONTROL_0);
242 static void tegra_kbc_keypress_timer(unsigned long data)
244 struct tegra_kbc *kbc = (struct tegra_kbc *)data;
249 spin_lock_irqsave(&kbc->lock, flags);
251 val = (readl(kbc->mmio + KBC_INT_0) >> 4) & 0xf;
255 tegra_kbc_report_keys(kbc);
258 * If more than one keys are pressed we need not wait
259 * for the repoll delay.
261 dly = (val == 1) ? kbc->repoll_dly : 1;
262 mod_timer(&kbc->timer, jiffies + msecs_to_jiffies(dly));
264 /* Release any pressed keys and exit the polling loop */
265 for (i = 0; i < kbc->num_pressed_keys; i++)
266 input_report_key(kbc->idev, kbc->current_keys[i], 0);
267 input_sync(kbc->idev);
269 kbc->num_pressed_keys = 0;
271 /* All keys are released so enable the keypress interrupt */
272 tegra_kbc_set_fifo_interrupt(kbc, true);
275 spin_unlock_irqrestore(&kbc->lock, flags);
278 static irqreturn_t tegra_kbc_isr(int irq, void *args)
280 struct tegra_kbc *kbc = args;
284 spin_lock_irqsave(&kbc->lock, flags);
287 * Quickly bail out & reenable interrupts if the fifo threshold
288 * count interrupt wasn't the interrupt source
290 val = readl(kbc->mmio + KBC_INT_0);
291 writel(val, kbc->mmio + KBC_INT_0);
293 if (val & KBC_INT_FIFO_CNT_INT_STATUS) {
295 * Until all keys are released, defer further processing to
296 * the polling loop in tegra_kbc_keypress_timer.
298 tegra_kbc_set_fifo_interrupt(kbc, false);
299 mod_timer(&kbc->timer, jiffies + kbc->cp_dly_jiffies);
300 } else if (val & KBC_INT_KEYPRESS_INT_STATUS) {
301 /* We can be here only through system resume path */
302 kbc->keypress_caused_wake = true;
305 spin_unlock_irqrestore(&kbc->lock, flags);
310 static void tegra_kbc_setup_wakekeys(struct tegra_kbc *kbc, bool filter)
313 unsigned int rst_val;
315 /* Either mask all keys or none. */
316 rst_val = (filter && !kbc->wakeup) ? ~0 : 0;
318 for (i = 0; i < KBC_MAX_ROW; i++)
319 writel(rst_val, kbc->mmio + KBC_ROW0_MASK_0 + i * 4);
322 static void tegra_kbc_config_pins(struct tegra_kbc *kbc)
326 for (i = 0; i < KBC_MAX_GPIO; i++) {
327 u32 r_shft = 5 * (i % 6);
328 u32 c_shft = 4 * (i % 8);
329 u32 r_mask = 0x1f << r_shft;
330 u32 c_mask = 0x0f << c_shft;
331 u32 r_offs = (i / 6) * 4 + KBC_ROW_CFG0_0;
332 u32 c_offs = (i / 8) * 4 + KBC_COL_CFG0_0;
333 u32 row_cfg = readl(kbc->mmio + r_offs);
334 u32 col_cfg = readl(kbc->mmio + c_offs);
339 switch (kbc->pin_cfg[i].type) {
341 row_cfg |= ((kbc->pin_cfg[i].num << 1) | 1) << r_shft;
345 col_cfg |= ((kbc->pin_cfg[i].num << 1) | 1) << c_shft;
352 writel(row_cfg, kbc->mmio + r_offs);
353 writel(col_cfg, kbc->mmio + c_offs);
357 static int tegra_kbc_start(struct tegra_kbc *kbc)
359 unsigned int debounce_cnt;
362 clk_prepare_enable(kbc->clk);
364 /* Reset the KBC controller to clear all previous status.*/
365 tegra_periph_reset_assert(kbc->clk);
367 tegra_periph_reset_deassert(kbc->clk);
370 tegra_kbc_config_pins(kbc);
371 tegra_kbc_setup_wakekeys(kbc, false);
373 writel(kbc->repeat_cnt, kbc->mmio + KBC_RPT_DLY_0);
375 /* Keyboard debounce count is maximum of 12 bits. */
376 debounce_cnt = min(kbc->debounce_cnt, KBC_MAX_DEBOUNCE_CNT);
377 val = KBC_DEBOUNCE_CNT_SHIFT(debounce_cnt);
378 val |= KBC_FIFO_TH_CNT_SHIFT(1); /* set fifo interrupt threshold to 1 */
379 val |= KBC_CONTROL_FIFO_CNT_INT_EN; /* interrupt on FIFO threshold */
380 val |= KBC_CONTROL_KBC_EN; /* enable */
381 writel(val, kbc->mmio + KBC_CONTROL_0);
384 * Compute the delay(ns) from interrupt mode to continuous polling
385 * mode so the timer routine is scheduled appropriately.
387 val = readl(kbc->mmio + KBC_INIT_DLY_0);
388 kbc->cp_dly_jiffies = usecs_to_jiffies((val & 0xfffff) * 32);
390 kbc->num_pressed_keys = 0;
393 * Atomically clear out any remaining entries in the key FIFO
394 * and enable keyboard interrupts.
397 val = readl(kbc->mmio + KBC_INT_0);
402 val = readl(kbc->mmio + KBC_KP_ENT0_0);
403 val = readl(kbc->mmio + KBC_KP_ENT1_0);
405 writel(0x7, kbc->mmio + KBC_INT_0);
407 enable_irq(kbc->irq);
412 static void tegra_kbc_stop(struct tegra_kbc *kbc)
417 spin_lock_irqsave(&kbc->lock, flags);
418 val = readl(kbc->mmio + KBC_CONTROL_0);
420 writel(val, kbc->mmio + KBC_CONTROL_0);
421 spin_unlock_irqrestore(&kbc->lock, flags);
423 disable_irq(kbc->irq);
424 del_timer_sync(&kbc->timer);
426 clk_disable_unprepare(kbc->clk);
429 static int tegra_kbc_open(struct input_dev *dev)
431 struct tegra_kbc *kbc = input_get_drvdata(dev);
433 return tegra_kbc_start(kbc);
436 static void tegra_kbc_close(struct input_dev *dev)
438 struct tegra_kbc *kbc = input_get_drvdata(dev);
440 return tegra_kbc_stop(kbc);
443 static bool tegra_kbc_check_pin_cfg(const struct tegra_kbc *kbc,
444 unsigned int *num_rows)
450 for (i = 0; i < KBC_MAX_GPIO; i++) {
451 const struct tegra_kbc_pin_cfg *pin_cfg = &kbc->pin_cfg[i];
453 switch (pin_cfg->type) {
455 if (pin_cfg->num >= KBC_MAX_ROW) {
457 "pin_cfg[%d]: invalid row number %d\n",
465 if (pin_cfg->num >= KBC_MAX_COL) {
467 "pin_cfg[%d]: invalid column number %d\n",
478 "pin_cfg[%d]: invalid entry type %d\n",
479 pin_cfg->type, pin_cfg->num);
487 static int tegra_kbc_parse_dt(struct tegra_kbc *kbc)
489 struct device_node *np = kbc->dev->of_node;
494 u32 cols_cfg[KBC_MAX_GPIO];
495 u32 rows_cfg[KBC_MAX_GPIO];
499 if (!of_property_read_u32(np, "nvidia,debounce-delay-ms", &prop))
500 kbc->debounce_cnt = prop;
502 if (!of_property_read_u32(np, "nvidia,repeat-delay-ms", &prop))
503 kbc->repeat_cnt = prop;
505 if (of_find_property(np, "nvidia,needs-ghost-filter", NULL))
506 kbc->use_ghost_filter = true;
508 if (of_find_property(np, "nvidia,wakeup-source", NULL))
511 if (!of_get_property(np, "nvidia,kbc-row-pins", &proplen)) {
512 dev_err(kbc->dev, "property nvidia,kbc-row-pins not found\n");
515 num_rows = proplen / sizeof(u32);
517 if (!of_get_property(np, "nvidia,kbc-col-pins", &proplen)) {
518 dev_err(kbc->dev, "property nvidia,kbc-col-pins not found\n");
521 num_cols = proplen / sizeof(u32);
523 if (!of_get_property(np, "linux,keymap", &proplen)) {
524 dev_err(kbc->dev, "property linux,keymap not found\n");
528 if (!num_rows || !num_cols || ((num_rows + num_cols) > KBC_MAX_GPIO)) {
530 "keypad rows/columns not porperly specified\n");
534 /* Set all pins as non-configured */
535 for (i = 0; i < KBC_MAX_GPIO; i++)
536 kbc->pin_cfg[i].type = PIN_CFG_IGNORE;
538 ret = of_property_read_u32_array(np, "nvidia,kbc-row-pins",
541 dev_err(kbc->dev, "Rows configurations are not proper\n");
545 ret = of_property_read_u32_array(np, "nvidia,kbc-col-pins",
548 dev_err(kbc->dev, "Cols configurations are not proper\n");
552 for (i = 0; i < num_rows; i++) {
553 kbc->pin_cfg[rows_cfg[i]].type = PIN_CFG_ROW;
554 kbc->pin_cfg[rows_cfg[i]].num = i;
557 for (i = 0; i < num_cols; i++) {
558 kbc->pin_cfg[cols_cfg[i]].type = PIN_CFG_COL;
559 kbc->pin_cfg[cols_cfg[i]].num = i;
565 static int tegra_kbc_probe(struct platform_device *pdev)
567 struct tegra_kbc *kbc;
568 struct resource *res;
571 unsigned int debounce_cnt;
572 unsigned int scan_time_rows;
573 unsigned int keymap_rows = KBC_MAX_KEY;
575 kbc = devm_kzalloc(&pdev->dev, sizeof(*kbc), GFP_KERNEL);
577 dev_err(&pdev->dev, "failed to alloc memory for kbc\n");
581 kbc->dev = &pdev->dev;
582 spin_lock_init(&kbc->lock);
584 err = tegra_kbc_parse_dt(kbc);
588 if (!tegra_kbc_check_pin_cfg(kbc, &num_rows))
591 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
593 dev_err(&pdev->dev, "failed to get I/O memory\n");
597 kbc->irq = platform_get_irq(pdev, 0);
599 dev_err(&pdev->dev, "failed to get keyboard IRQ\n");
603 kbc->idev = devm_input_allocate_device(&pdev->dev);
605 dev_err(&pdev->dev, "failed to allocate input device\n");
609 setup_timer(&kbc->timer, tegra_kbc_keypress_timer, (unsigned long)kbc);
611 kbc->mmio = devm_request_and_ioremap(&pdev->dev, res);
613 dev_err(&pdev->dev, "Cannot request memregion/iomap address\n");
617 kbc->clk = devm_clk_get(&pdev->dev, NULL);
618 if (IS_ERR(kbc->clk)) {
619 dev_err(&pdev->dev, "failed to get keyboard clock\n");
620 return PTR_ERR(kbc->clk);
624 * The time delay between two consecutive reads of the FIFO is
625 * the sum of the repeat time and the time taken for scanning
626 * the rows. There is an additional delay before the row scanning
627 * starts. The repoll delay is computed in milliseconds.
629 debounce_cnt = min(kbc->debounce_cnt, KBC_MAX_DEBOUNCE_CNT);
630 scan_time_rows = (KBC_ROW_SCAN_TIME + debounce_cnt) * num_rows;
631 kbc->repoll_dly = KBC_ROW_SCAN_DLY + scan_time_rows + kbc->repeat_cnt;
632 kbc->repoll_dly = DIV_ROUND_UP(kbc->repoll_dly, KBC_CYCLE_MS);
634 kbc->idev->name = pdev->name;
635 kbc->idev->id.bustype = BUS_HOST;
636 kbc->idev->dev.parent = &pdev->dev;
637 kbc->idev->open = tegra_kbc_open;
638 kbc->idev->close = tegra_kbc_close;
640 if (kbc->keymap_data && kbc->use_fn_map)
643 err = matrix_keypad_build_keymap(kbc->keymap_data, NULL,
644 keymap_rows, KBC_MAX_COL,
645 kbc->keycode, kbc->idev);
647 dev_err(&pdev->dev, "failed to setup keymap\n");
651 __set_bit(EV_REP, kbc->idev->evbit);
652 input_set_capability(kbc->idev, EV_MSC, MSC_SCAN);
654 input_set_drvdata(kbc->idev, kbc);
656 err = devm_request_irq(&pdev->dev, kbc->irq, tegra_kbc_isr,
657 IRQF_NO_SUSPEND | IRQF_TRIGGER_HIGH, pdev->name, kbc);
659 dev_err(&pdev->dev, "failed to request keyboard IRQ\n");
663 disable_irq(kbc->irq);
665 err = input_register_device(kbc->idev);
667 dev_err(&pdev->dev, "failed to register input device\n");
671 platform_set_drvdata(pdev, kbc);
672 device_init_wakeup(&pdev->dev, kbc->wakeup);
677 #ifdef CONFIG_PM_SLEEP
678 static void tegra_kbc_set_keypress_interrupt(struct tegra_kbc *kbc, bool enable)
682 val = readl(kbc->mmio + KBC_CONTROL_0);
684 val |= KBC_CONTROL_KEYPRESS_INT_EN;
686 val &= ~KBC_CONTROL_KEYPRESS_INT_EN;
687 writel(val, kbc->mmio + KBC_CONTROL_0);
690 static int tegra_kbc_suspend(struct device *dev)
692 struct platform_device *pdev = to_platform_device(dev);
693 struct tegra_kbc *kbc = platform_get_drvdata(pdev);
695 mutex_lock(&kbc->idev->mutex);
696 if (device_may_wakeup(&pdev->dev)) {
697 disable_irq(kbc->irq);
698 del_timer_sync(&kbc->timer);
699 tegra_kbc_set_fifo_interrupt(kbc, false);
701 /* Forcefully clear the interrupt status */
702 writel(0x7, kbc->mmio + KBC_INT_0);
704 * Store the previous resident time of continuous polling mode.
705 * Force the keyboard into interrupt mode.
707 kbc->cp_to_wkup_dly = readl(kbc->mmio + KBC_TO_CNT_0);
708 writel(0, kbc->mmio + KBC_TO_CNT_0);
710 tegra_kbc_setup_wakekeys(kbc, true);
713 kbc->keypress_caused_wake = false;
714 /* Enable keypress interrupt before going into suspend. */
715 tegra_kbc_set_keypress_interrupt(kbc, true);
716 enable_irq(kbc->irq);
717 enable_irq_wake(kbc->irq);
719 if (kbc->idev->users)
722 mutex_unlock(&kbc->idev->mutex);
727 static int tegra_kbc_resume(struct device *dev)
729 struct platform_device *pdev = to_platform_device(dev);
730 struct tegra_kbc *kbc = platform_get_drvdata(pdev);
733 mutex_lock(&kbc->idev->mutex);
734 if (device_may_wakeup(&pdev->dev)) {
735 disable_irq_wake(kbc->irq);
736 tegra_kbc_setup_wakekeys(kbc, false);
737 /* We will use fifo interrupts for key detection. */
738 tegra_kbc_set_keypress_interrupt(kbc, false);
740 /* Restore the resident time of continuous polling mode. */
741 writel(kbc->cp_to_wkup_dly, kbc->mmio + KBC_TO_CNT_0);
743 tegra_kbc_set_fifo_interrupt(kbc, true);
745 if (kbc->keypress_caused_wake && kbc->wakeup_key) {
747 * We can't report events directly from the ISR
748 * because timekeeping is stopped when processing
749 * wakeup request and we get a nasty warning when
750 * we try to call do_gettimeofday() in evdev
753 input_report_key(kbc->idev, kbc->wakeup_key, 1);
754 input_sync(kbc->idev);
755 input_report_key(kbc->idev, kbc->wakeup_key, 0);
756 input_sync(kbc->idev);
759 if (kbc->idev->users)
760 err = tegra_kbc_start(kbc);
762 mutex_unlock(&kbc->idev->mutex);
768 static SIMPLE_DEV_PM_OPS(tegra_kbc_pm_ops, tegra_kbc_suspend, tegra_kbc_resume);
770 static const struct of_device_id tegra_kbc_of_match[] = {
771 { .compatible = "nvidia,tegra20-kbc", },
774 MODULE_DEVICE_TABLE(of, tegra_kbc_of_match);
776 static struct platform_driver tegra_kbc_driver = {
777 .probe = tegra_kbc_probe,
780 .owner = THIS_MODULE,
781 .pm = &tegra_kbc_pm_ops,
782 .of_match_table = tegra_kbc_of_match,
785 module_platform_driver(tegra_kbc_driver);
787 MODULE_LICENSE("GPL");
788 MODULE_AUTHOR("Rakesh Iyer <riyer@nvidia.com>");
789 MODULE_DESCRIPTION("Tegra matrix keyboard controller driver");
790 MODULE_ALIAS("platform:tegra-kbc");