drivers/input/remotectl/rockchip_pwm_remotectl.h

   1 \r
   2 #ifndef __RKXX_PWM_REMOTECTL_H__\r
   3 #define __RKXX_PWM_REMOTECTL_H__\r
   4 #include <linux/input.h>\r
   5 \r
   6 /* PWM0 registers  */\r
   7 #define PWM_REG_CNTR                    0x00  /* Counter Register */\r
   8 #define PWM_REG_HPR                               0x04  /* Period Register */\r
   9 #define PWM_REG_LPR                     0x08  /* Duty Cycle Register */\r
  10 #define PWM_REG_CTRL                    0x0c  /* Control Register */\r
  11 #define PWM_REG_INTSTS                  0x10  /* Interrupt Status Refister */\r
  12 #define PWM_REG_INT_EN                  0x14  /* Interrupt Enable Refister */\r
  13 \r
  14 \r
  15 /*REG_CTRL bits definitions*/\r
  16 #define PWM_ENABLE                                  (1 << 0)\r
  17 #define PWM_DISABLE                                 (0 << 0)\r
  18 \r
  19 /*operation mode*/\r
  20 #define PWM_MODE_ONESHOT                             (0x00 << 1)\r
  21 #define PWM_MODE_CONTINUMOUS         (0x01 << 1)\r
  22 #define PWM_MODE_CAPTURE                        (0x02 << 1)\r
  23 \r
  24 /*duty cycle output polarity*/\r
  25 #define PWM_DUTY_POSTIVE                    (0x01 << 3)\r
  26 #define PWM_DUTY_NEGATIVE                   (0x00 << 3)\r
  27 \r
  28 /*incative state output polarity*/\r
  29 #define PWM_INACTIVE_POSTIVE                (0x01 << 4)\r
  30 #define PWM_INACTIVE_NEGATIVE               (0x00 << 4)\r
  31 \r
  32 /*clock source select*/\r
  33 #define PWM_CLK_SCALE                       (1 << 9)\r
  34 #define PWM_CLK_NON_SCALE                   (0 << 9)\r
  35 \r
  36 #define PWM_CH0_INT                     (1 << 0)\r
  37 #define PWM_CH1_INT                     (1 << 1)\r
  38 #define PWM_CH2_INT                     (1 << 2)\r
  39 #define PWM_CH3_INT                     (1 << 3)\r
  40 \r
  41 #define PWM_CH0_POL                     (1 << 8)\r
  42 #define PWM_CH1_POL                     (1 << 9)\r
  43 #define PWM_CH2_POL                     (1 << 10)\r
  44 #define PWM_CH3_POL                     (1 << 11)\r
  45 \r
  46 #define PWM_CH0_INT_ENABLE              (1 << 0)\r
  47 #define PWM_CH0_INT_DISABLE             (0 << 0)\r
  48 \r
  49 #define PWM_CH1_INT_ENABLE              (1 << 0)\r
  50 #define PWM_CH1_INT_DISABLE             (0 << 1)\r
  51 \r
  52 #define PWM_CH2_INT_ENABLE              (1 << 2)\r
  53 #define PWM_CH2_INT_DISABLE             (0 << 2)\r
  54 \r
  55 #define PWM_CH3_INT_ENABLE              (1 << 3)\r
  56 #define PWM_CH3_INT_DISABLE             (0 << 3)\r
  57 \r
  58 /*prescale factor*/\r
  59 #define PWMCR_MIN_PRESCALE                  0x00\r
  60 #define PWMCR_MAX_PRESCALE                  0x07\r
  61 \r
  62 #define PWMDCR_MIN_DUTY                 0x0001\r
  63 #define PWMDCR_MAX_DUTY                     0xFFFF\r
  64 \r
  65 #define PWMPCR_MIN_PERIOD                       0x0001\r
  66 #define PWMPCR_MAX_PERIOD                       0xFFFF\r
  67 \r
  68 #define PWMPCR_MIN_PERIOD                       0x0001\r
  69 #define PWMPCR_MAX_PERIOD                       0xFFFF\r
  70 \r
  71 enum pwm_div {\r
  72         PWM_DIV1                 = (0x0 << 12),\r
  73         PWM_DIV2                 = (0x1 << 12),\r
  74         PWM_DIV4                 = (0x2 << 12),\r
  75         PWM_DIV8                 = (0x3 << 12),\r
  76         PWM_DIV16                = (0x4 << 12),\r
  77         PWM_DIV32                = (0x5 << 12),\r
  78         PWM_DIV64                = (0x6 << 12),\r
  79         PWM_DIV128               = (0x7 << 12),\r
  80 }; \r
  81 \r
  82 \r
  83 \r
  84 \r
  85 /********************************************************************\r
  86 **                            ºê¶¨Òå                                *\r
  87 ********************************************************************/\r
  88 #define RK_PWM_TIME_PRE_MIN      19   /*4500*/\r
  89 #define RK_PWM_TIME_PRE_MAX      30   /*5500*/           /*PreLoad 4.5+0.56 = 5.06ms*/\r
  90 \r
  91 #define RK_PWM_TIME_BIT0_MIN     1  /*Bit0  1.125ms*/\r
  92 #define RK_PWM_TIME_BIT0_MAX     5\r
  93 \r
  94 #define RK_PWM_TIME_BIT1_MIN     7  /*Bit1  2.25ms*/\r
  95 #define RK_PWM_TIME_BIT1_MAX     15\r
  96 \r
  97 #define RK_PWM_TIME_RPT_MIN      0x215   /*101000*/\r
  98 #define RK_PWM_TIME_RPT_MAX      0x235   /*103000*/         /*Repeat  105-2.81=102.19ms*/  //110-9-2.25-0.56=98.19ms\r
  99 \r
 100 #define RK_PWM_TIME_SEQ1_MIN     2   /*2650*/\r
 101 #define RK_PWM_TIME_SEQ1_MAX     0x20   /*3000*/           /*sequence  2.25+0.56=2.81ms*/ //11.25ms\r
 102 \r
 103 #define RK_PWM_TIME_SEQ2_MIN     0xDE   /*101000*/\r
 104 #define RK_PWM_TIME_SEQ2_MAX     0x120   /*103000*/         /*Repeat  105-2.81=102.19ms*/  //110-9-2.25-0.56=98.19ms\r
 105 \r
 106 /********************************************************************\r
 107 **                          ½á¹¹¶¨Òå                                *\r
 108 ********************************************************************/\r
 109 typedef enum _RMC_STATE\r
 110 {\r
 111     RMC_IDLE,\r
 112     RMC_PRELOAD,\r
 113     RMC_USERCODE,\r
 114     RMC_GETDATA,\r
 115     RMC_SEQUENCE\r
 116 }eRMC_STATE;\r
 117 \r
 118 \r
 119 struct RKxx_remotectl_platform_data {\r
 120         //struct rkxx_remotectl_button *buttons;\r
 121         int nbuttons;\r
 122         int rep;\r
 123         int timer;\r
 124         int wakeup;\r
 125 };\r
 126 \r
 127 #endif\r
 128 \r