2 * i8042 keyboard and mouse controller driver for Linux
4 * Copyright (c) 1999-2004 Vojtech Pavlik
8 * This program is free software; you can redistribute it and/or modify it
9 * under the terms of the GNU General Public License version 2 as published by
10 * the Free Software Foundation.
13 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
15 #include <linux/types.h>
16 #include <linux/delay.h>
17 #include <linux/module.h>
18 #include <linux/interrupt.h>
19 #include <linux/ioport.h>
20 #include <linux/init.h>
21 #include <linux/serio.h>
22 #include <linux/err.h>
23 #include <linux/rcupdate.h>
24 #include <linux/platform_device.h>
25 #include <linux/i8042.h>
26 #include <linux/slab.h>
30 MODULE_AUTHOR("Vojtech Pavlik <vojtech@suse.cz>");
31 MODULE_DESCRIPTION("i8042 keyboard and mouse controller driver");
32 MODULE_LICENSE("GPL");
34 static bool i8042_nokbd;
35 module_param_named(nokbd, i8042_nokbd, bool, 0);
36 MODULE_PARM_DESC(nokbd, "Do not probe or use KBD port.");
38 static bool i8042_noaux;
39 module_param_named(noaux, i8042_noaux, bool, 0);
40 MODULE_PARM_DESC(noaux, "Do not probe or use AUX (mouse) port.");
42 static bool i8042_nomux;
43 module_param_named(nomux, i8042_nomux, bool, 0);
44 MODULE_PARM_DESC(nomux, "Do not check whether an active multiplexing controller is present.");
46 static bool i8042_unlock;
47 module_param_named(unlock, i8042_unlock, bool, 0);
48 MODULE_PARM_DESC(unlock, "Ignore keyboard lock.");
50 static bool i8042_reset;
51 module_param_named(reset, i8042_reset, bool, 0);
52 MODULE_PARM_DESC(reset, "Reset controller during init and cleanup.");
54 static bool i8042_direct;
55 module_param_named(direct, i8042_direct, bool, 0);
56 MODULE_PARM_DESC(direct, "Put keyboard port into non-translated mode.");
58 static bool i8042_dumbkbd;
59 module_param_named(dumbkbd, i8042_dumbkbd, bool, 0);
60 MODULE_PARM_DESC(dumbkbd, "Pretend that controller can only read data from keyboard");
62 static bool i8042_noloop;
63 module_param_named(noloop, i8042_noloop, bool, 0);
64 MODULE_PARM_DESC(noloop, "Disable the AUX Loopback command while probing for the AUX port");
66 static bool i8042_notimeout;
67 module_param_named(notimeout, i8042_notimeout, bool, 0);
68 MODULE_PARM_DESC(notimeout, "Ignore timeouts signalled by i8042");
70 static bool i8042_kbdreset;
71 module_param_named(kbdreset, i8042_kbdreset, bool, 0);
72 MODULE_PARM_DESC(kbdreset, "Reset device connected to KBD port");
75 static bool i8042_dritek;
76 module_param_named(dritek, i8042_dritek, bool, 0);
77 MODULE_PARM_DESC(dritek, "Force enable the Dritek keyboard extension");
81 static bool i8042_nopnp;
82 module_param_named(nopnp, i8042_nopnp, bool, 0);
83 MODULE_PARM_DESC(nopnp, "Do not use PNP to detect controller settings");
88 static bool i8042_debug;
89 module_param_named(debug, i8042_debug, bool, 0600);
90 MODULE_PARM_DESC(debug, "Turn i8042 debugging mode on and off");
92 static bool i8042_unmask_kbd_data;
93 module_param_named(unmask_kbd_data, i8042_unmask_kbd_data, bool, 0600);
94 MODULE_PARM_DESC(unmask_kbd_data, "Unconditional enable (may reveal sensitive data) of normally sanitize-filtered kbd data traffic debug log [pre-condition: i8042.debug=1 enabled]");
97 static bool i8042_bypass_aux_irq_test;
98 static char i8042_kbd_firmware_id[128];
99 static char i8042_aux_firmware_id[128];
104 * i8042_lock protects serialization between i8042_command and
105 * the interrupt handler.
107 static DEFINE_SPINLOCK(i8042_lock);
110 * Writers to AUX and KBD ports as well as users issuing i8042_command
111 * directly should acquire i8042_mutex (by means of calling
112 * i8042_lock_chip() and i8042_unlock_ship() helpers) to ensure that
113 * they do not disturb each other (unfortunately in many i8042
114 * implementations write to one of the ports will immediately abort
115 * command that is being processed by another port).
117 static DEFINE_MUTEX(i8042_mutex);
127 #define I8042_KBD_PORT_NO 0
128 #define I8042_AUX_PORT_NO 1
129 #define I8042_MUX_PORT_NO 2
130 #define I8042_NUM_PORTS (I8042_NUM_MUX_PORTS + 2)
132 static struct i8042_port i8042_ports[I8042_NUM_PORTS];
134 static unsigned char i8042_initial_ctr;
135 static unsigned char i8042_ctr;
136 static bool i8042_mux_present;
137 static bool i8042_kbd_irq_registered;
138 static bool i8042_aux_irq_registered;
139 static unsigned char i8042_suppress_kbd_ack;
140 static struct platform_device *i8042_platform_device;
141 static struct notifier_block i8042_kbd_bind_notifier_block;
143 static irqreturn_t i8042_interrupt(int irq, void *dev_id);
144 static bool (*i8042_platform_filter)(unsigned char data, unsigned char str,
145 struct serio *serio);
147 void i8042_lock_chip(void)
149 mutex_lock(&i8042_mutex);
151 EXPORT_SYMBOL(i8042_lock_chip);
153 void i8042_unlock_chip(void)
155 mutex_unlock(&i8042_mutex);
157 EXPORT_SYMBOL(i8042_unlock_chip);
159 int i8042_install_filter(bool (*filter)(unsigned char data, unsigned char str,
160 struct serio *serio))
165 spin_lock_irqsave(&i8042_lock, flags);
167 if (i8042_platform_filter) {
172 i8042_platform_filter = filter;
175 spin_unlock_irqrestore(&i8042_lock, flags);
178 EXPORT_SYMBOL(i8042_install_filter);
180 int i8042_remove_filter(bool (*filter)(unsigned char data, unsigned char str,
186 spin_lock_irqsave(&i8042_lock, flags);
188 if (i8042_platform_filter != filter) {
193 i8042_platform_filter = NULL;
196 spin_unlock_irqrestore(&i8042_lock, flags);
199 EXPORT_SYMBOL(i8042_remove_filter);
202 * The i8042_wait_read() and i8042_wait_write functions wait for the i8042 to
203 * be ready for reading values from it / writing values to it.
204 * Called always with i8042_lock held.
207 static int i8042_wait_read(void)
211 while ((~i8042_read_status() & I8042_STR_OBF) && (i < I8042_CTL_TIMEOUT)) {
215 return -(i == I8042_CTL_TIMEOUT);
218 static int i8042_wait_write(void)
222 while ((i8042_read_status() & I8042_STR_IBF) && (i < I8042_CTL_TIMEOUT)) {
226 return -(i == I8042_CTL_TIMEOUT);
230 * i8042_flush() flushes all data that may be in the keyboard and mouse buffers
231 * of the i8042 down the toilet.
234 static int i8042_flush(void)
237 unsigned char data, str;
241 spin_lock_irqsave(&i8042_lock, flags);
243 while ((str = i8042_read_status()) & I8042_STR_OBF) {
244 if (count++ < I8042_BUFFER_SIZE) {
246 data = i8042_read_data();
247 dbg("%02x <- i8042 (flush, %s)\n",
248 data, str & I8042_STR_AUXDATA ? "aux" : "kbd");
255 spin_unlock_irqrestore(&i8042_lock, flags);
261 * i8042_command() executes a command on the i8042. It also sends the input
262 * parameter(s) of the commands to it, and receives the output value(s). The
263 * parameters are to be stored in the param array, and the output is placed
264 * into the same array. The number of the parameters and output values is
265 * encoded in bits 8-11 of the command number.
268 static int __i8042_command(unsigned char *param, int command)
272 if (i8042_noloop && command == I8042_CMD_AUX_LOOP)
275 error = i8042_wait_write();
279 dbg("%02x -> i8042 (command)\n", command & 0xff);
280 i8042_write_command(command & 0xff);
282 for (i = 0; i < ((command >> 12) & 0xf); i++) {
283 error = i8042_wait_write();
286 dbg("%02x -> i8042 (parameter)\n", param[i]);
287 i8042_write_data(param[i]);
290 for (i = 0; i < ((command >> 8) & 0xf); i++) {
291 error = i8042_wait_read();
293 dbg(" -- i8042 (timeout)\n");
297 if (command == I8042_CMD_AUX_LOOP &&
298 !(i8042_read_status() & I8042_STR_AUXDATA)) {
299 dbg(" -- i8042 (auxerr)\n");
303 param[i] = i8042_read_data();
304 dbg("%02x <- i8042 (return)\n", param[i]);
310 int i8042_command(unsigned char *param, int command)
315 spin_lock_irqsave(&i8042_lock, flags);
316 retval = __i8042_command(param, command);
317 spin_unlock_irqrestore(&i8042_lock, flags);
321 EXPORT_SYMBOL(i8042_command);
324 * i8042_kbd_write() sends a byte out through the keyboard interface.
327 static int i8042_kbd_write(struct serio *port, unsigned char c)
332 spin_lock_irqsave(&i8042_lock, flags);
334 if (!(retval = i8042_wait_write())) {
335 dbg("%02x -> i8042 (kbd-data)\n", c);
339 spin_unlock_irqrestore(&i8042_lock, flags);
345 * i8042_aux_write() sends a byte out through the aux interface.
348 static int i8042_aux_write(struct serio *serio, unsigned char c)
350 struct i8042_port *port = serio->port_data;
352 return i8042_command(&c, port->mux == -1 ?
354 I8042_CMD_MUX_SEND + port->mux);
359 * i8042_aux_close attempts to clear AUX or KBD port state by disabling
360 * and then re-enabling it.
363 static void i8042_port_close(struct serio *serio)
367 const char *port_name;
369 if (serio == i8042_ports[I8042_AUX_PORT_NO].serio) {
370 irq_bit = I8042_CTR_AUXINT;
371 disable_bit = I8042_CTR_AUXDIS;
374 irq_bit = I8042_CTR_KBDINT;
375 disable_bit = I8042_CTR_KBDDIS;
379 i8042_ctr &= ~irq_bit;
380 if (i8042_command(&i8042_ctr, I8042_CMD_CTL_WCTR))
381 pr_warn("Can't write CTR while closing %s port\n", port_name);
385 i8042_ctr &= ~disable_bit;
386 i8042_ctr |= irq_bit;
387 if (i8042_command(&i8042_ctr, I8042_CMD_CTL_WCTR))
388 pr_err("Can't reactivate %s port\n", port_name);
391 * See if there is any data appeared while we were messing with
394 i8042_interrupt(0, NULL);
398 * i8042_start() is called by serio core when port is about to finish
399 * registering. It will mark port as existing so i8042_interrupt can
400 * start sending data through it.
402 static int i8042_start(struct serio *serio)
404 struct i8042_port *port = serio->port_data;
412 * i8042_stop() marks serio port as non-existing so i8042_interrupt
413 * will not try to send data to the port that is about to go away.
414 * The function is called by serio core as part of unregister procedure.
416 static void i8042_stop(struct serio *serio)
418 struct i8042_port *port = serio->port_data;
420 port->exists = false;
423 * We synchronize with both AUX and KBD IRQs because there is
424 * a (very unlikely) chance that AUX IRQ is raised for KBD port
427 synchronize_irq(I8042_AUX_IRQ);
428 synchronize_irq(I8042_KBD_IRQ);
433 * i8042_filter() filters out unwanted bytes from the input data stream.
434 * It is called from i8042_interrupt and thus is running with interrupts
435 * off and i8042_lock held.
437 static bool i8042_filter(unsigned char data, unsigned char str,
440 if (unlikely(i8042_suppress_kbd_ack)) {
441 if ((~str & I8042_STR_AUXDATA) &&
442 (data == 0xfa || data == 0xfe)) {
443 i8042_suppress_kbd_ack--;
444 dbg("Extra keyboard ACK - filtered out\n");
449 if (i8042_platform_filter && i8042_platform_filter(data, str, serio)) {
450 dbg("Filtered out by platform filter\n");
458 * i8042_interrupt() is the most important function in this driver -
459 * it handles the interrupts from the i8042, and sends incoming bytes
460 * to the upper layers.
463 static irqreturn_t i8042_interrupt(int irq, void *dev_id)
465 struct i8042_port *port;
468 unsigned char str, data;
470 unsigned int port_no;
474 spin_lock_irqsave(&i8042_lock, flags);
476 str = i8042_read_status();
477 if (unlikely(~str & I8042_STR_OBF)) {
478 spin_unlock_irqrestore(&i8042_lock, flags);
480 dbg("Interrupt %d, without any data\n", irq);
485 data = i8042_read_data();
487 if (i8042_mux_present && (str & I8042_STR_AUXDATA)) {
488 static unsigned long last_transmit;
489 static unsigned char last_str;
492 if (str & I8042_STR_MUXERR) {
493 dbg("MUX error, status is %02x, data is %02x\n",
496 * When MUXERR condition is signalled the data register can only contain
497 * 0xfd, 0xfe or 0xff if implementation follows the spec. Unfortunately
498 * it is not always the case. Some KBCs also report 0xfc when there is
499 * nothing connected to the port while others sometimes get confused which
500 * port the data came from and signal error leaving the data intact. They
501 * _do not_ revert to legacy mode (actually I've never seen KBC reverting
502 * to legacy mode yet, when we see one we'll add proper handling).
503 * Anyway, we process 0xfc, 0xfd, 0xfe and 0xff as timeouts, and for the
504 * rest assume that the data came from the same serio last byte
505 * was transmitted (if transmission happened not too long ago).
510 if (time_before(jiffies, last_transmit + HZ/10)) {
514 /* fall through - report timeout */
517 case 0xfe: dfl = SERIO_TIMEOUT; data = 0xfe; break;
518 case 0xff: dfl = SERIO_PARITY; data = 0xfe; break;
522 port_no = I8042_MUX_PORT_NO + ((str >> 6) & 3);
524 last_transmit = jiffies;
527 dfl = ((str & I8042_STR_PARITY) ? SERIO_PARITY : 0) |
528 ((str & I8042_STR_TIMEOUT && !i8042_notimeout) ? SERIO_TIMEOUT : 0);
530 port_no = (str & I8042_STR_AUXDATA) ?
531 I8042_AUX_PORT_NO : I8042_KBD_PORT_NO;
534 port = &i8042_ports[port_no];
535 serio = port->exists ? port->serio : NULL;
537 filter_dbg(port->driver_bound, data, "<- i8042 (interrupt, %d, %d%s%s)\n",
539 dfl & SERIO_PARITY ? ", bad parity" : "",
540 dfl & SERIO_TIMEOUT ? ", timeout" : "");
542 filtered = i8042_filter(data, str, serio);
544 spin_unlock_irqrestore(&i8042_lock, flags);
546 if (likely(port->exists && !filtered))
547 serio_interrupt(serio, data, dfl);
550 return IRQ_RETVAL(ret);
554 * i8042_enable_kbd_port enables keyboard port on chip
557 static int i8042_enable_kbd_port(void)
559 i8042_ctr &= ~I8042_CTR_KBDDIS;
560 i8042_ctr |= I8042_CTR_KBDINT;
562 if (i8042_command(&i8042_ctr, I8042_CMD_CTL_WCTR)) {
563 i8042_ctr &= ~I8042_CTR_KBDINT;
564 i8042_ctr |= I8042_CTR_KBDDIS;
565 pr_err("Failed to enable KBD port\n");
573 * i8042_enable_aux_port enables AUX (mouse) port on chip
576 static int i8042_enable_aux_port(void)
578 i8042_ctr &= ~I8042_CTR_AUXDIS;
579 i8042_ctr |= I8042_CTR_AUXINT;
581 if (i8042_command(&i8042_ctr, I8042_CMD_CTL_WCTR)) {
582 i8042_ctr &= ~I8042_CTR_AUXINT;
583 i8042_ctr |= I8042_CTR_AUXDIS;
584 pr_err("Failed to enable AUX port\n");
592 * i8042_enable_mux_ports enables 4 individual AUX ports after
593 * the controller has been switched into Multiplexed mode
596 static int i8042_enable_mux_ports(void)
601 for (i = 0; i < I8042_NUM_MUX_PORTS; i++) {
602 i8042_command(¶m, I8042_CMD_MUX_PFX + i);
603 i8042_command(¶m, I8042_CMD_AUX_ENABLE);
606 return i8042_enable_aux_port();
610 * i8042_set_mux_mode checks whether the controller has an
611 * active multiplexor and puts the chip into Multiplexed (true)
612 * or Legacy (false) mode.
615 static int i8042_set_mux_mode(bool multiplex, unsigned char *mux_version)
618 unsigned char param, val;
620 * Get rid of bytes in the queue.
626 * Internal loopback test - send three bytes, they should come back from the
627 * mouse interface, the last should be version.
631 if (i8042_command(¶m, I8042_CMD_AUX_LOOP) || param != val)
633 param = val = multiplex ? 0x56 : 0xf6;
634 if (i8042_command(¶m, I8042_CMD_AUX_LOOP) || param != val)
636 param = val = multiplex ? 0xa4 : 0xa5;
637 if (i8042_command(¶m, I8042_CMD_AUX_LOOP) || param == val)
641 * Workaround for interference with USB Legacy emulation
642 * that causes a v10.12 MUX to be found.
648 *mux_version = param;
654 * i8042_check_mux() checks whether the controller supports the PS/2 Active
655 * Multiplexing specification by Synaptics, Phoenix, Insyde and
659 static int __init i8042_check_mux(void)
661 unsigned char mux_version;
663 if (i8042_set_mux_mode(true, &mux_version))
666 pr_info("Detected active multiplexing controller, rev %d.%d\n",
667 (mux_version >> 4) & 0xf, mux_version & 0xf);
670 * Disable all muxed ports by disabling AUX.
672 i8042_ctr |= I8042_CTR_AUXDIS;
673 i8042_ctr &= ~I8042_CTR_AUXINT;
675 if (i8042_command(&i8042_ctr, I8042_CMD_CTL_WCTR)) {
676 pr_err("Failed to disable AUX port, can't use MUX\n");
680 i8042_mux_present = true;
686 * The following is used to test AUX IRQ delivery.
688 static struct completion i8042_aux_irq_delivered __initdata;
689 static bool i8042_irq_being_tested __initdata;
691 static irqreturn_t __init i8042_aux_test_irq(int irq, void *dev_id)
694 unsigned char str, data;
697 spin_lock_irqsave(&i8042_lock, flags);
698 str = i8042_read_status();
699 if (str & I8042_STR_OBF) {
700 data = i8042_read_data();
701 dbg("%02x <- i8042 (aux_test_irq, %s)\n",
702 data, str & I8042_STR_AUXDATA ? "aux" : "kbd");
703 if (i8042_irq_being_tested &&
704 data == 0xa5 && (str & I8042_STR_AUXDATA))
705 complete(&i8042_aux_irq_delivered);
708 spin_unlock_irqrestore(&i8042_lock, flags);
710 return IRQ_RETVAL(ret);
714 * i8042_toggle_aux - enables or disables AUX port on i8042 via command and
715 * verifies success by readinng CTR. Used when testing for presence of AUX
718 static int __init i8042_toggle_aux(bool on)
723 if (i8042_command(¶m,
724 on ? I8042_CMD_AUX_ENABLE : I8042_CMD_AUX_DISABLE))
727 /* some chips need some time to set the I8042_CTR_AUXDIS bit */
728 for (i = 0; i < 100; i++) {
731 if (i8042_command(¶m, I8042_CMD_CTL_RCTR))
734 if (!(param & I8042_CTR_AUXDIS) == on)
742 * i8042_check_aux() applies as much paranoia as it can at detecting
743 * the presence of an AUX interface.
746 static int __init i8042_check_aux(void)
749 bool irq_registered = false;
750 bool aux_loop_broken = false;
755 * Get rid of bytes in the queue.
761 * Internal loopback test - filters out AT-type i8042's. Unfortunately
762 * SiS screwed up and their 5597 doesn't support the LOOP command even
763 * though it has an AUX port.
767 retval = i8042_command(¶m, I8042_CMD_AUX_LOOP);
768 if (retval || param != 0x5a) {
771 * External connection test - filters out AT-soldered PS/2 i8042's
772 * 0x00 - no error, 0x01-0x03 - clock/data stuck, 0xff - general error
773 * 0xfa - no error on some notebooks which ignore the spec
774 * Because it's common for chipsets to return error on perfectly functioning
775 * AUX ports, we test for this only when the LOOP command failed.
778 if (i8042_command(¶m, I8042_CMD_AUX_TEST) ||
779 (param && param != 0xfa && param != 0xff))
783 * If AUX_LOOP completed without error but returned unexpected data
787 aux_loop_broken = true;
791 * Bit assignment test - filters out PS/2 i8042's in AT mode
794 if (i8042_toggle_aux(false)) {
795 pr_warn("Failed to disable AUX port, but continuing anyway... Is this a SiS?\n");
796 pr_warn("If AUX port is really absent please use the 'i8042.noaux' option\n");
799 if (i8042_toggle_aux(true))
803 * Reset keyboard (needed on some laptops to successfully detect
804 * touchpad, e.g., some Gigabyte laptop models with Elantech
807 if (i8042_kbdreset) {
808 pr_warn("Attempting to reset device connected to KBD port\n");
809 i8042_kbd_write(NULL, (unsigned char) 0xff);
813 * Test AUX IRQ delivery to make sure BIOS did not grab the IRQ and
814 * used it for a PCI card or somethig else.
817 if (i8042_noloop || i8042_bypass_aux_irq_test || aux_loop_broken) {
819 * Without LOOP command we can't test AUX IRQ delivery. Assume the port
820 * is working and hope we are right.
826 if (request_irq(I8042_AUX_IRQ, i8042_aux_test_irq, IRQF_SHARED,
827 "i8042", i8042_platform_device))
830 irq_registered = true;
832 if (i8042_enable_aux_port())
835 spin_lock_irqsave(&i8042_lock, flags);
837 init_completion(&i8042_aux_irq_delivered);
838 i8042_irq_being_tested = true;
841 retval = __i8042_command(¶m, I8042_CMD_AUX_LOOP & 0xf0ff);
843 spin_unlock_irqrestore(&i8042_lock, flags);
848 if (wait_for_completion_timeout(&i8042_aux_irq_delivered,
849 msecs_to_jiffies(250)) == 0) {
851 * AUX IRQ was never delivered so we need to flush the controller to
852 * get rid of the byte we put there; otherwise keyboard may not work.
854 dbg(" -- i8042 (aux irq test timeout)\n");
862 * Disable the interface.
865 i8042_ctr |= I8042_CTR_AUXDIS;
866 i8042_ctr &= ~I8042_CTR_AUXINT;
868 if (i8042_command(&i8042_ctr, I8042_CMD_CTL_WCTR))
872 free_irq(I8042_AUX_IRQ, i8042_platform_device);
877 static int i8042_controller_check(void)
880 pr_info("No controller found\n");
887 static int i8042_controller_selftest(void)
893 * We try this 5 times; on some really fragile systems this does not
894 * take the first time...
898 if (i8042_command(¶m, I8042_CMD_CTL_TEST)) {
899 pr_err("i8042 controller selftest timeout\n");
903 if (param == I8042_RET_CTL_TEST)
906 dbg("i8042 controller selftest: %#x != %#x\n",
907 param, I8042_RET_CTL_TEST);
913 * On x86, we don't fail entire i8042 initialization if controller
914 * reset fails in hopes that keyboard port will still be functional
915 * and user will still get a working keyboard. This is especially
916 * important on netbooks. On other arches we trust hardware more.
918 pr_info("giving up on controller selftest, continuing anyway...\n");
921 pr_err("i8042 controller selftest failed\n");
927 * i8042_controller init initializes the i8042 controller, and,
928 * most importantly, sets it into non-xlated mode if that's
932 static int i8042_controller_init(void)
936 unsigned char ctr[2];
939 * Save the CTR for restore on unload / reboot.
944 pr_err("Unable to get stable CTR read\n");
951 if (i8042_command(&ctr[n++ % 2], I8042_CMD_CTL_RCTR)) {
952 pr_err("Can't read CTR while initializing i8042\n");
956 } while (n < 2 || ctr[0] != ctr[1]);
958 i8042_initial_ctr = i8042_ctr = ctr[0];
961 * Disable the keyboard interface and interrupt.
964 i8042_ctr |= I8042_CTR_KBDDIS;
965 i8042_ctr &= ~I8042_CTR_KBDINT;
971 spin_lock_irqsave(&i8042_lock, flags);
972 if (~i8042_read_status() & I8042_STR_KEYLOCK) {
974 i8042_ctr |= I8042_CTR_IGNKEYLOCK;
976 pr_warn("Warning: Keylock active\n");
978 spin_unlock_irqrestore(&i8042_lock, flags);
981 * If the chip is configured into nontranslated mode by the BIOS, don't
982 * bother enabling translating and be happy.
985 if (~i8042_ctr & I8042_CTR_XLATE)
989 * Set nontranslated mode for the kbd interface if requested by an option.
990 * After this the kbd interface becomes a simple serial in/out, like the aux
991 * interface is. We don't do this by default, since it can confuse notebook
996 i8042_ctr &= ~I8042_CTR_XLATE;
1002 if (i8042_command(&i8042_ctr, I8042_CMD_CTL_WCTR)) {
1003 pr_err("Can't write CTR while initializing i8042\n");
1008 * Flush whatever accumulated while we were disabling keyboard port.
1018 * Reset the controller and reset CRT to the original value set by BIOS.
1021 static void i8042_controller_reset(bool force_reset)
1026 * Disable both KBD and AUX interfaces so they don't get in the way
1029 i8042_ctr |= I8042_CTR_KBDDIS | I8042_CTR_AUXDIS;
1030 i8042_ctr &= ~(I8042_CTR_KBDINT | I8042_CTR_AUXINT);
1032 if (i8042_command(&i8042_ctr, I8042_CMD_CTL_WCTR))
1033 pr_warn("Can't write CTR while resetting\n");
1036 * Disable MUX mode if present.
1039 if (i8042_mux_present)
1040 i8042_set_mux_mode(false, NULL);
1043 * Reset the controller if requested.
1046 if (i8042_reset || force_reset)
1047 i8042_controller_selftest();
1050 * Restore the original control register setting.
1053 if (i8042_command(&i8042_initial_ctr, I8042_CMD_CTL_WCTR))
1054 pr_warn("Can't restore CTR\n");
1059 * i8042_panic_blink() will turn the keyboard LEDs on or off and is called
1060 * when kernel panics. Flashing LEDs is useful for users running X who may
1061 * not see the console and will help distinguishing panics from "real"
1064 * Note that DELAY has a limit of 10ms so we will not get stuck here
1065 * waiting for KBC to free up even if KBD interrupt is off
1068 #define DELAY do { mdelay(1); if (++delay > 10) return delay; } while(0)
1070 static long i8042_panic_blink(int state)
1075 led = (state) ? 0x01 | 0x04 : 0;
1076 while (i8042_read_status() & I8042_STR_IBF)
1078 dbg("%02x -> i8042 (panic blink)\n", 0xed);
1079 i8042_suppress_kbd_ack = 2;
1080 i8042_write_data(0xed); /* set leds */
1082 while (i8042_read_status() & I8042_STR_IBF)
1085 dbg("%02x -> i8042 (panic blink)\n", led);
1086 i8042_write_data(led);
1094 static void i8042_dritek_enable(void)
1096 unsigned char param = 0x90;
1099 error = i8042_command(¶m, 0x1059);
1101 pr_warn("Failed to enable DRITEK extension: %d\n", error);
1108 * Here we try to reset everything back to a state we had
1109 * before suspending.
1112 static int i8042_controller_resume(bool force_reset)
1116 error = i8042_controller_check();
1120 if (i8042_reset || force_reset) {
1121 error = i8042_controller_selftest();
1127 * Restore original CTR value and disable all ports
1130 i8042_ctr = i8042_initial_ctr;
1132 i8042_ctr &= ~I8042_CTR_XLATE;
1133 i8042_ctr |= I8042_CTR_AUXDIS | I8042_CTR_KBDDIS;
1134 i8042_ctr &= ~(I8042_CTR_AUXINT | I8042_CTR_KBDINT);
1135 if (i8042_command(&i8042_ctr, I8042_CMD_CTL_WCTR)) {
1136 pr_warn("Can't write CTR to resume, retrying...\n");
1138 if (i8042_command(&i8042_ctr, I8042_CMD_CTL_WCTR)) {
1139 pr_err("CTR write retry failed\n");
1147 i8042_dritek_enable();
1150 if (i8042_mux_present) {
1151 if (i8042_set_mux_mode(true, NULL) || i8042_enable_mux_ports())
1152 pr_warn("failed to resume active multiplexor, mouse won't work\n");
1153 } else if (i8042_ports[I8042_AUX_PORT_NO].serio)
1154 i8042_enable_aux_port();
1156 if (i8042_ports[I8042_KBD_PORT_NO].serio)
1157 i8042_enable_kbd_port();
1159 i8042_interrupt(0, NULL);
1165 * Here we try to restore the original BIOS settings to avoid
1169 static int i8042_pm_suspend(struct device *dev)
1173 i8042_controller_reset(true);
1175 /* Set up serio interrupts for system wakeup. */
1176 for (i = 0; i < I8042_NUM_PORTS; i++) {
1177 struct serio *serio = i8042_ports[i].serio;
1179 if (serio && device_may_wakeup(&serio->dev))
1180 enable_irq_wake(i8042_ports[i].irq);
1186 static int i8042_pm_resume(struct device *dev)
1190 for (i = 0; i < I8042_NUM_PORTS; i++) {
1191 struct serio *serio = i8042_ports[i].serio;
1193 if (serio && device_may_wakeup(&serio->dev))
1194 disable_irq_wake(i8042_ports[i].irq);
1198 * On resume from S2R we always try to reset the controller
1199 * to bring it in a sane state. (In case of S2D we expect
1200 * BIOS to reset the controller for us.)
1202 return i8042_controller_resume(true);
1205 static int i8042_pm_thaw(struct device *dev)
1207 i8042_interrupt(0, NULL);
1212 static int i8042_pm_reset(struct device *dev)
1214 i8042_controller_reset(false);
1219 static int i8042_pm_restore(struct device *dev)
1221 return i8042_controller_resume(false);
1224 static const struct dev_pm_ops i8042_pm_ops = {
1225 .suspend = i8042_pm_suspend,
1226 .resume = i8042_pm_resume,
1227 .thaw = i8042_pm_thaw,
1228 .poweroff = i8042_pm_reset,
1229 .restore = i8042_pm_restore,
1232 #endif /* CONFIG_PM */
1235 * We need to reset the 8042 back to original mode on system shutdown,
1236 * because otherwise BIOSes will be confused.
1239 static void i8042_shutdown(struct platform_device *dev)
1241 i8042_controller_reset(false);
1244 static int __init i8042_create_kbd_port(void)
1246 struct serio *serio;
1247 struct i8042_port *port = &i8042_ports[I8042_KBD_PORT_NO];
1249 serio = kzalloc(sizeof(struct serio), GFP_KERNEL);
1253 serio->id.type = i8042_direct ? SERIO_8042 : SERIO_8042_XL;
1254 serio->write = i8042_dumbkbd ? NULL : i8042_kbd_write;
1255 serio->start = i8042_start;
1256 serio->stop = i8042_stop;
1257 serio->close = i8042_port_close;
1258 serio->port_data = port;
1259 serio->dev.parent = &i8042_platform_device->dev;
1260 strlcpy(serio->name, "i8042 KBD port", sizeof(serio->name));
1261 strlcpy(serio->phys, I8042_KBD_PHYS_DESC, sizeof(serio->phys));
1262 strlcpy(serio->firmware_id, i8042_kbd_firmware_id,
1263 sizeof(serio->firmware_id));
1265 port->serio = serio;
1266 port->irq = I8042_KBD_IRQ;
1271 static int __init i8042_create_aux_port(int idx)
1273 struct serio *serio;
1274 int port_no = idx < 0 ? I8042_AUX_PORT_NO : I8042_MUX_PORT_NO + idx;
1275 struct i8042_port *port = &i8042_ports[port_no];
1277 serio = kzalloc(sizeof(struct serio), GFP_KERNEL);
1281 serio->id.type = SERIO_8042;
1282 serio->write = i8042_aux_write;
1283 serio->start = i8042_start;
1284 serio->stop = i8042_stop;
1285 serio->port_data = port;
1286 serio->dev.parent = &i8042_platform_device->dev;
1288 strlcpy(serio->name, "i8042 AUX port", sizeof(serio->name));
1289 strlcpy(serio->phys, I8042_AUX_PHYS_DESC, sizeof(serio->phys));
1290 strlcpy(serio->firmware_id, i8042_aux_firmware_id,
1291 sizeof(serio->firmware_id));
1292 serio->close = i8042_port_close;
1294 snprintf(serio->name, sizeof(serio->name), "i8042 AUX%d port", idx);
1295 snprintf(serio->phys, sizeof(serio->phys), I8042_MUX_PHYS_DESC, idx + 1);
1296 strlcpy(serio->firmware_id, i8042_aux_firmware_id,
1297 sizeof(serio->firmware_id));
1300 port->serio = serio;
1302 port->irq = I8042_AUX_IRQ;
1307 static void __init i8042_free_kbd_port(void)
1309 kfree(i8042_ports[I8042_KBD_PORT_NO].serio);
1310 i8042_ports[I8042_KBD_PORT_NO].serio = NULL;
1313 static void __init i8042_free_aux_ports(void)
1317 for (i = I8042_AUX_PORT_NO; i < I8042_NUM_PORTS; i++) {
1318 kfree(i8042_ports[i].serio);
1319 i8042_ports[i].serio = NULL;
1323 static void __init i8042_register_ports(void)
1327 for (i = 0; i < I8042_NUM_PORTS; i++) {
1328 struct serio *serio = i8042_ports[i].serio;
1331 printk(KERN_INFO "serio: %s at %#lx,%#lx irq %d\n",
1333 (unsigned long) I8042_DATA_REG,
1334 (unsigned long) I8042_COMMAND_REG,
1335 i8042_ports[i].irq);
1336 serio_register_port(serio);
1337 device_set_wakeup_capable(&serio->dev, true);
1342 static void i8042_unregister_ports(void)
1346 for (i = 0; i < I8042_NUM_PORTS; i++) {
1347 if (i8042_ports[i].serio) {
1348 serio_unregister_port(i8042_ports[i].serio);
1349 i8042_ports[i].serio = NULL;
1355 * Checks whether port belongs to i8042 controller.
1357 bool i8042_check_port_owner(const struct serio *port)
1361 for (i = 0; i < I8042_NUM_PORTS; i++)
1362 if (i8042_ports[i].serio == port)
1367 EXPORT_SYMBOL(i8042_check_port_owner);
1369 static void i8042_free_irqs(void)
1371 if (i8042_aux_irq_registered)
1372 free_irq(I8042_AUX_IRQ, i8042_platform_device);
1373 if (i8042_kbd_irq_registered)
1374 free_irq(I8042_KBD_IRQ, i8042_platform_device);
1376 i8042_aux_irq_registered = i8042_kbd_irq_registered = false;
1379 static int __init i8042_setup_aux(void)
1381 int (*aux_enable)(void);
1385 if (i8042_check_aux())
1388 if (i8042_nomux || i8042_check_mux()) {
1389 error = i8042_create_aux_port(-1);
1391 goto err_free_ports;
1392 aux_enable = i8042_enable_aux_port;
1394 for (i = 0; i < I8042_NUM_MUX_PORTS; i++) {
1395 error = i8042_create_aux_port(i);
1397 goto err_free_ports;
1399 aux_enable = i8042_enable_mux_ports;
1402 error = request_irq(I8042_AUX_IRQ, i8042_interrupt, IRQF_SHARED,
1403 "i8042", i8042_platform_device);
1405 goto err_free_ports;
1410 i8042_aux_irq_registered = true;
1414 free_irq(I8042_AUX_IRQ, i8042_platform_device);
1416 i8042_free_aux_ports();
1420 static int __init i8042_setup_kbd(void)
1424 error = i8042_create_kbd_port();
1428 error = request_irq(I8042_KBD_IRQ, i8042_interrupt, IRQF_SHARED,
1429 "i8042", i8042_platform_device);
1433 error = i8042_enable_kbd_port();
1437 i8042_kbd_irq_registered = true;
1441 free_irq(I8042_KBD_IRQ, i8042_platform_device);
1443 i8042_free_kbd_port();
1447 static int i8042_kbd_bind_notifier(struct notifier_block *nb,
1448 unsigned long action, void *data)
1450 struct device *dev = data;
1451 struct serio *serio = to_serio_port(dev);
1452 struct i8042_port *port = serio->port_data;
1454 if (serio != i8042_ports[I8042_KBD_PORT_NO].serio)
1458 case BUS_NOTIFY_BOUND_DRIVER:
1459 port->driver_bound = true;
1462 case BUS_NOTIFY_UNBIND_DRIVER:
1463 port->driver_bound = false;
1470 static int __init i8042_probe(struct platform_device *dev)
1474 i8042_platform_device = dev;
1477 error = i8042_controller_selftest();
1482 error = i8042_controller_init();
1488 i8042_dritek_enable();
1492 error = i8042_setup_aux();
1493 if (error && error != -ENODEV && error != -EBUSY)
1498 error = i8042_setup_kbd();
1503 * Ok, everything is ready, let's register all serio ports
1505 i8042_register_ports();
1510 i8042_free_aux_ports(); /* in case KBD failed but AUX not */
1512 i8042_controller_reset(false);
1513 i8042_platform_device = NULL;
1518 static int i8042_remove(struct platform_device *dev)
1520 i8042_unregister_ports();
1522 i8042_controller_reset(false);
1523 i8042_platform_device = NULL;
1528 static struct platform_driver i8042_driver = {
1532 .pm = &i8042_pm_ops,
1535 .remove = i8042_remove,
1536 .shutdown = i8042_shutdown,
1539 static struct notifier_block i8042_kbd_bind_notifier_block = {
1540 .notifier_call = i8042_kbd_bind_notifier,
1543 static int __init i8042_init(void)
1545 struct platform_device *pdev;
1550 err = i8042_platform_init();
1554 err = i8042_controller_check();
1556 goto err_platform_exit;
1558 pdev = platform_create_bundle(&i8042_driver, i8042_probe, NULL, 0, NULL, 0);
1560 err = PTR_ERR(pdev);
1561 goto err_platform_exit;
1564 bus_register_notifier(&serio_bus, &i8042_kbd_bind_notifier_block);
1565 panic_blink = i8042_panic_blink;
1570 i8042_platform_exit();
1574 static void __exit i8042_exit(void)
1576 platform_device_unregister(i8042_platform_device);
1577 platform_driver_unregister(&i8042_driver);
1578 i8042_platform_exit();
1580 bus_unregister_notifier(&serio_bus, &i8042_kbd_bind_notifier_block);
1584 module_init(i8042_init);
1585 module_exit(i8042_exit);