2 * This program is free software; you can redistribute it and/or modify
3 * it under the terms of the GNU General Public License, version 2, as
4 * published by the Free Software Foundation.
6 * This program is distributed in the hope that it will be useful,
7 * but WITHOUT ANY WARRANTY; without even the implied warranty of
8 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
9 * GNU General Public License for more details.
11 * You should have received a copy of the GNU General Public License
12 * along with this program; if not, write to the Free Software
13 * Foundation, 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA.
15 * Copyright (C) 2013 Freescale Semiconductor, Inc.
16 * Author: Varun Sethi <varun.sethi@freescale.com>
20 #define pr_fmt(fmt) "fsl-pamu-domain: %s: " fmt, __func__
22 #include <linux/init.h>
23 #include <linux/iommu.h>
24 #include <linux/notifier.h>
25 #include <linux/slab.h>
26 #include <linux/module.h>
27 #include <linux/types.h>
29 #include <linux/interrupt.h>
30 #include <linux/device.h>
31 #include <linux/of_platform.h>
32 #include <linux/bootmem.h>
33 #include <linux/err.h>
35 #include <asm/bitops.h>
37 #include <asm/pci-bridge.h>
38 #include <sysdev/fsl_pci.h>
40 #include "fsl_pamu_domain.h"
43 * Global spinlock that needs to be held while
46 static DEFINE_SPINLOCK(iommu_lock);
48 static struct kmem_cache *fsl_pamu_domain_cache;
49 static struct kmem_cache *iommu_devinfo_cache;
50 static DEFINE_SPINLOCK(device_domain_lock);
52 static int __init iommu_init_mempool(void)
55 fsl_pamu_domain_cache = kmem_cache_create("fsl_pamu_domain",
56 sizeof(struct fsl_dma_domain),
61 if (!fsl_pamu_domain_cache) {
62 pr_debug("Couldn't create fsl iommu_domain cache\n");
66 iommu_devinfo_cache = kmem_cache_create("iommu_devinfo",
67 sizeof(struct device_domain_info),
71 if (!iommu_devinfo_cache) {
72 pr_debug("Couldn't create devinfo cache\n");
73 kmem_cache_destroy(fsl_pamu_domain_cache);
80 static phys_addr_t get_phys_addr(struct fsl_dma_domain *dma_domain, dma_addr_t iova)
82 u32 win_cnt = dma_domain->win_cnt;
83 struct dma_window *win_ptr =
84 &dma_domain->win_arr[0];
85 struct iommu_domain_geometry *geom;
87 geom = &dma_domain->iommu_domain->geometry;
89 if (!win_cnt || !dma_domain->geom_size) {
90 pr_debug("Number of windows/geometry not configured for the domain\n");
96 dma_addr_t subwin_iova;
99 subwin_size = dma_domain->geom_size >> ilog2(win_cnt);
100 subwin_iova = iova & ~(subwin_size - 1);
101 wnd = (subwin_iova - geom->aperture_start) >> ilog2(subwin_size);
102 win_ptr = &dma_domain->win_arr[wnd];
106 return (win_ptr->paddr + (iova & (win_ptr->size - 1)));
111 static int map_subwins(int liodn, struct fsl_dma_domain *dma_domain)
113 struct dma_window *sub_win_ptr =
114 &dma_domain->win_arr[0];
116 unsigned long rpn, flags;
118 for (i = 0; i < dma_domain->win_cnt; i++) {
119 if (sub_win_ptr[i].valid) {
120 rpn = sub_win_ptr[i].paddr >>
122 spin_lock_irqsave(&iommu_lock, flags);
123 ret = pamu_config_spaace(liodn, dma_domain->win_cnt, i,
127 dma_domain->snoop_id,
128 dma_domain->stash_id,
130 sub_win_ptr[i].prot);
131 spin_unlock_irqrestore(&iommu_lock, flags);
133 pr_debug("PAMU SPAACE configuration failed for liodn %d\n",
143 static int map_win(int liodn, struct fsl_dma_domain *dma_domain)
146 struct dma_window *wnd = &dma_domain->win_arr[0];
147 phys_addr_t wnd_addr = dma_domain->iommu_domain->geometry.aperture_start;
150 spin_lock_irqsave(&iommu_lock, flags);
151 ret = pamu_config_ppaace(liodn, wnd_addr,
154 wnd->paddr >> PAMU_PAGE_SHIFT,
155 dma_domain->snoop_id, dma_domain->stash_id,
157 spin_unlock_irqrestore(&iommu_lock, flags);
159 pr_debug("PAMU PAACE configuration failed for liodn %d\n",
165 /* Map the DMA window corresponding to the LIODN */
166 static int map_liodn(int liodn, struct fsl_dma_domain *dma_domain)
168 if (dma_domain->win_cnt > 1)
169 return map_subwins(liodn, dma_domain);
171 return map_win(liodn, dma_domain);
175 /* Update window/subwindow mapping for the LIODN */
176 static int update_liodn(int liodn, struct fsl_dma_domain *dma_domain, u32 wnd_nr)
179 struct dma_window *wnd = &dma_domain->win_arr[wnd_nr];
182 spin_lock_irqsave(&iommu_lock, flags);
183 if (dma_domain->win_cnt > 1) {
184 ret = pamu_config_spaace(liodn, dma_domain->win_cnt, wnd_nr,
187 wnd->paddr >> PAMU_PAGE_SHIFT,
188 dma_domain->snoop_id,
189 dma_domain->stash_id,
190 (wnd_nr > 0) ? 1 : 0,
193 pr_debug("Subwindow reconfiguration failed for liodn %d\n", liodn);
195 phys_addr_t wnd_addr;
197 wnd_addr = dma_domain->iommu_domain->geometry.aperture_start;
199 ret = pamu_config_ppaace(liodn, wnd_addr,
202 wnd->paddr >> PAMU_PAGE_SHIFT,
203 dma_domain->snoop_id, dma_domain->stash_id,
206 pr_debug("Window reconfiguration failed for liodn %d\n", liodn);
209 spin_unlock_irqrestore(&iommu_lock, flags);
214 static int update_liodn_stash(int liodn, struct fsl_dma_domain *dma_domain,
220 spin_lock_irqsave(&iommu_lock, flags);
221 if (!dma_domain->win_arr) {
222 pr_debug("Windows not configured, stash destination update failed for liodn %d\n", liodn);
223 spin_unlock_irqrestore(&iommu_lock, flags);
227 for (i = 0; i < dma_domain->win_cnt; i++) {
228 ret = pamu_update_paace_stash(liodn, i, val);
230 pr_debug("Failed to update SPAACE %d field for liodn %d\n ", i, liodn);
231 spin_unlock_irqrestore(&iommu_lock, flags);
236 spin_unlock_irqrestore(&iommu_lock, flags);
241 /* Set the geometry parameters for a LIODN */
242 static int pamu_set_liodn(int liodn, struct device *dev,
243 struct fsl_dma_domain *dma_domain,
244 struct iommu_domain_geometry *geom_attr,
247 phys_addr_t window_addr, window_size;
248 phys_addr_t subwin_size;
250 u32 omi_index = ~(u32)0;
254 * Configure the omi_index at the geometry setup time.
255 * This is a static value which depends on the type of
256 * device and would not change thereafter.
258 get_ome_index(&omi_index, dev);
260 window_addr = geom_attr->aperture_start;
261 window_size = dma_domain->geom_size;
263 spin_lock_irqsave(&iommu_lock, flags);
264 ret = pamu_disable_liodn(liodn);
266 ret = pamu_config_ppaace(liodn, window_addr, window_size, omi_index,
267 0, dma_domain->snoop_id,
268 dma_domain->stash_id, win_cnt, 0);
269 spin_unlock_irqrestore(&iommu_lock, flags);
271 pr_debug("PAMU PAACE configuration failed for liodn %d, win_cnt =%d\n", liodn, win_cnt);
276 subwin_size = window_size >> ilog2(win_cnt);
277 for (i = 0; i < win_cnt; i++) {
278 spin_lock_irqsave(&iommu_lock, flags);
279 ret = pamu_disable_spaace(liodn, i);
281 ret = pamu_config_spaace(liodn, win_cnt, i,
282 subwin_size, omi_index,
283 0, dma_domain->snoop_id,
284 dma_domain->stash_id,
286 spin_unlock_irqrestore(&iommu_lock, flags);
288 pr_debug("PAMU SPAACE configuration failed for liodn %d\n", liodn);
297 static int check_size(u64 size, dma_addr_t iova)
300 * Size must be a power of two and at least be equal
303 if ((size & (size - 1)) || size < PAMU_PAGE_SIZE) {
304 pr_debug("%s: size too small or not a power of two\n", __func__);
308 /* iova must be page size aligned*/
309 if (iova & (size - 1)) {
310 pr_debug("%s: address is not aligned with window size\n", __func__);
317 static struct fsl_dma_domain *iommu_alloc_dma_domain(void)
319 struct fsl_dma_domain *domain;
321 domain = kmem_cache_zalloc(fsl_pamu_domain_cache, GFP_KERNEL);
325 domain->stash_id = ~(u32)0;
326 domain->snoop_id = ~(u32)0;
327 domain->win_cnt = pamu_get_max_subwin_cnt();
328 domain->geom_size = 0;
330 INIT_LIST_HEAD(&domain->devices);
332 spin_lock_init(&domain->domain_lock);
337 static void remove_device_ref(struct device_domain_info *info, u32 win_cnt)
341 list_del(&info->link);
342 spin_lock_irqsave(&iommu_lock, flags);
344 pamu_free_subwins(info->liodn);
345 pamu_disable_liodn(info->liodn);
346 spin_unlock_irqrestore(&iommu_lock, flags);
347 spin_lock_irqsave(&device_domain_lock, flags);
348 info->dev->archdata.iommu_domain = NULL;
349 kmem_cache_free(iommu_devinfo_cache, info);
350 spin_unlock_irqrestore(&device_domain_lock, flags);
353 static void detach_device(struct device *dev, struct fsl_dma_domain *dma_domain)
355 struct device_domain_info *info, *tmp;
358 spin_lock_irqsave(&dma_domain->domain_lock, flags);
359 /* Remove the device from the domain device list */
360 list_for_each_entry_safe(info, tmp, &dma_domain->devices, link) {
361 if (!dev || (info->dev == dev))
362 remove_device_ref(info, dma_domain->win_cnt);
364 spin_unlock_irqrestore(&dma_domain->domain_lock, flags);
367 static void attach_device(struct fsl_dma_domain *dma_domain, int liodn, struct device *dev)
369 struct device_domain_info *info, *old_domain_info;
372 spin_lock_irqsave(&device_domain_lock, flags);
374 * Check here if the device is already attached to domain or not.
375 * If the device is already attached to a domain detach it.
377 old_domain_info = dev->archdata.iommu_domain;
378 if (old_domain_info && old_domain_info->domain != dma_domain) {
379 spin_unlock_irqrestore(&device_domain_lock, flags);
380 detach_device(dev, old_domain_info->domain);
381 spin_lock_irqsave(&device_domain_lock, flags);
384 info = kmem_cache_zalloc(iommu_devinfo_cache, GFP_ATOMIC);
388 info->domain = dma_domain;
390 list_add(&info->link, &dma_domain->devices);
392 * In case of devices with multiple LIODNs just store
393 * the info for the first LIODN as all
394 * LIODNs share the same domain
396 if (!dev->archdata.iommu_domain)
397 dev->archdata.iommu_domain = info;
398 spin_unlock_irqrestore(&device_domain_lock, flags);
402 static phys_addr_t fsl_pamu_iova_to_phys(struct iommu_domain *domain,
405 struct fsl_dma_domain *dma_domain = domain->priv;
407 if ((iova < domain->geometry.aperture_start) ||
408 iova > (domain->geometry.aperture_end))
411 return get_phys_addr(dma_domain, iova);
414 static bool fsl_pamu_capable(enum iommu_cap cap)
416 return cap == IOMMU_CAP_CACHE_COHERENCY;
419 static void fsl_pamu_domain_destroy(struct iommu_domain *domain)
421 struct fsl_dma_domain *dma_domain = domain->priv;
425 /* remove all the devices from the device list */
426 detach_device(NULL, dma_domain);
428 dma_domain->enabled = 0;
429 dma_domain->mapped = 0;
431 kmem_cache_free(fsl_pamu_domain_cache, dma_domain);
434 static int fsl_pamu_domain_init(struct iommu_domain *domain)
436 struct fsl_dma_domain *dma_domain;
438 dma_domain = iommu_alloc_dma_domain();
440 pr_debug("dma_domain allocation failed\n");
443 domain->priv = dma_domain;
444 dma_domain->iommu_domain = domain;
445 /* defaul geometry 64 GB i.e. maximum system address */
446 domain->geometry.aperture_start = 0;
447 domain->geometry.aperture_end = (1ULL << 36) - 1;
448 domain->geometry.force_aperture = true;
453 /* Configure geometry settings for all LIODNs associated with domain */
454 static int pamu_set_domain_geometry(struct fsl_dma_domain *dma_domain,
455 struct iommu_domain_geometry *geom_attr,
458 struct device_domain_info *info;
461 list_for_each_entry(info, &dma_domain->devices, link) {
462 ret = pamu_set_liodn(info->liodn, info->dev, dma_domain,
471 /* Update stash destination for all LIODNs associated with the domain */
472 static int update_domain_stash(struct fsl_dma_domain *dma_domain, u32 val)
474 struct device_domain_info *info;
477 list_for_each_entry(info, &dma_domain->devices, link) {
478 ret = update_liodn_stash(info->liodn, dma_domain, val);
486 /* Update domain mappings for all LIODNs associated with the domain */
487 static int update_domain_mapping(struct fsl_dma_domain *dma_domain, u32 wnd_nr)
489 struct device_domain_info *info;
492 list_for_each_entry(info, &dma_domain->devices, link) {
493 ret = update_liodn(info->liodn, dma_domain, wnd_nr);
500 static int disable_domain_win(struct fsl_dma_domain *dma_domain, u32 wnd_nr)
502 struct device_domain_info *info;
505 list_for_each_entry(info, &dma_domain->devices, link) {
506 if (dma_domain->win_cnt == 1 && dma_domain->enabled) {
507 ret = pamu_disable_liodn(info->liodn);
509 dma_domain->enabled = 0;
511 ret = pamu_disable_spaace(info->liodn, wnd_nr);
518 static void fsl_pamu_window_disable(struct iommu_domain *domain, u32 wnd_nr)
520 struct fsl_dma_domain *dma_domain = domain->priv;
524 spin_lock_irqsave(&dma_domain->domain_lock, flags);
525 if (!dma_domain->win_arr) {
526 pr_debug("Number of windows not configured\n");
527 spin_unlock_irqrestore(&dma_domain->domain_lock, flags);
531 if (wnd_nr >= dma_domain->win_cnt) {
532 pr_debug("Invalid window index\n");
533 spin_unlock_irqrestore(&dma_domain->domain_lock, flags);
537 if (dma_domain->win_arr[wnd_nr].valid) {
538 ret = disable_domain_win(dma_domain, wnd_nr);
540 dma_domain->win_arr[wnd_nr].valid = 0;
541 dma_domain->mapped--;
545 spin_unlock_irqrestore(&dma_domain->domain_lock, flags);
549 static int fsl_pamu_window_enable(struct iommu_domain *domain, u32 wnd_nr,
550 phys_addr_t paddr, u64 size, int prot)
552 struct fsl_dma_domain *dma_domain = domain->priv;
553 struct dma_window *wnd;
559 if (prot & IOMMU_READ)
560 pamu_prot |= PAACE_AP_PERMS_QUERY;
561 if (prot & IOMMU_WRITE)
562 pamu_prot |= PAACE_AP_PERMS_UPDATE;
564 spin_lock_irqsave(&dma_domain->domain_lock, flags);
565 if (!dma_domain->win_arr) {
566 pr_debug("Number of windows not configured\n");
567 spin_unlock_irqrestore(&dma_domain->domain_lock, flags);
571 if (wnd_nr >= dma_domain->win_cnt) {
572 pr_debug("Invalid window index\n");
573 spin_unlock_irqrestore(&dma_domain->domain_lock, flags);
577 win_size = dma_domain->geom_size >> ilog2(dma_domain->win_cnt);
578 if (size > win_size) {
579 pr_debug("Invalid window size \n");
580 spin_unlock_irqrestore(&dma_domain->domain_lock, flags);
584 if (dma_domain->win_cnt == 1) {
585 if (dma_domain->enabled) {
586 pr_debug("Disable the window before updating the mapping\n");
587 spin_unlock_irqrestore(&dma_domain->domain_lock, flags);
591 ret = check_size(size, domain->geometry.aperture_start);
593 pr_debug("Aperture start not aligned to the size\n");
594 spin_unlock_irqrestore(&dma_domain->domain_lock, flags);
599 wnd = &dma_domain->win_arr[wnd_nr];
603 wnd->prot = pamu_prot;
605 ret = update_domain_mapping(dma_domain, wnd_nr);
608 dma_domain->mapped++;
611 pr_debug("Disable the window before updating the mapping\n");
615 spin_unlock_irqrestore(&dma_domain->domain_lock, flags);
621 * Attach the LIODN to the DMA domain and configure the geometry
622 * and window mappings.
624 static int handle_attach_device(struct fsl_dma_domain *dma_domain,
625 struct device *dev, const u32 *liodn,
629 struct iommu_domain *domain = dma_domain->iommu_domain;
633 spin_lock_irqsave(&dma_domain->domain_lock, flags);
634 for (i = 0; i < num; i++) {
636 /* Ensure that LIODN value is valid */
637 if (liodn[i] >= PAACE_NUMBER_ENTRIES) {
638 pr_debug("Invalid liodn %d, attach device failed for %s\n",
639 liodn[i], dev->of_node->full_name);
644 attach_device(dma_domain, liodn[i], dev);
646 * Check if geometry has already been configured
647 * for the domain. If yes, set the geometry for
650 if (dma_domain->win_arr) {
651 u32 win_cnt = dma_domain->win_cnt > 1 ? dma_domain->win_cnt : 0;
652 ret = pamu_set_liodn(liodn[i], dev, dma_domain,
657 if (dma_domain->mapped) {
659 * Create window/subwindow mapping for
662 ret = map_liodn(liodn[i], dma_domain);
668 spin_unlock_irqrestore(&dma_domain->domain_lock, flags);
673 static int fsl_pamu_attach_device(struct iommu_domain *domain,
676 struct fsl_dma_domain *dma_domain = domain->priv;
680 struct pci_dev *pdev = NULL;
681 struct pci_controller *pci_ctl;
684 * Use LIODN of the PCI controller while attaching a
687 if (dev_is_pci(dev)) {
688 pdev = to_pci_dev(dev);
689 pci_ctl = pci_bus_to_host(pdev->bus);
691 * make dev point to pci controller device
692 * so we can get the LIODN programmed by
695 dev = pci_ctl->parent;
698 liodn = of_get_property(dev->of_node, "fsl,liodn", &len);
700 liodn_cnt = len / sizeof(u32);
701 ret = handle_attach_device(dma_domain, dev,
704 pr_debug("missing fsl,liodn property at %s\n",
705 dev->of_node->full_name);
712 static void fsl_pamu_detach_device(struct iommu_domain *domain,
715 struct fsl_dma_domain *dma_domain = domain->priv;
718 struct pci_dev *pdev = NULL;
719 struct pci_controller *pci_ctl;
722 * Use LIODN of the PCI controller while detaching a
725 if (dev_is_pci(dev)) {
726 pdev = to_pci_dev(dev);
727 pci_ctl = pci_bus_to_host(pdev->bus);
729 * make dev point to pci controller device
730 * so we can get the LIODN programmed by
733 dev = pci_ctl->parent;
736 prop = of_get_property(dev->of_node, "fsl,liodn", &len);
738 detach_device(dev, dma_domain);
740 pr_debug("missing fsl,liodn property at %s\n",
741 dev->of_node->full_name);
744 static int configure_domain_geometry(struct iommu_domain *domain, void *data)
746 struct iommu_domain_geometry *geom_attr = data;
747 struct fsl_dma_domain *dma_domain = domain->priv;
748 dma_addr_t geom_size;
751 geom_size = geom_attr->aperture_end - geom_attr->aperture_start + 1;
753 * Sanity check the geometry size. Also, we do not support
754 * DMA outside of the geometry.
756 if (check_size(geom_size, geom_attr->aperture_start) ||
757 !geom_attr->force_aperture) {
758 pr_debug("Invalid PAMU geometry attributes\n");
762 spin_lock_irqsave(&dma_domain->domain_lock, flags);
763 if (dma_domain->enabled) {
764 pr_debug("Can't set geometry attributes as domain is active\n");
765 spin_unlock_irqrestore(&dma_domain->domain_lock, flags);
769 /* Copy the domain geometry information */
770 memcpy(&domain->geometry, geom_attr,
771 sizeof(struct iommu_domain_geometry));
772 dma_domain->geom_size = geom_size;
774 spin_unlock_irqrestore(&dma_domain->domain_lock, flags);
779 /* Set the domain stash attribute */
780 static int configure_domain_stash(struct fsl_dma_domain *dma_domain, void *data)
782 struct pamu_stash_attribute *stash_attr = data;
786 spin_lock_irqsave(&dma_domain->domain_lock, flags);
788 memcpy(&dma_domain->dma_stash, stash_attr,
789 sizeof(struct pamu_stash_attribute));
791 dma_domain->stash_id = get_stash_id(stash_attr->cache,
793 if (dma_domain->stash_id == ~(u32)0) {
794 pr_debug("Invalid stash attributes\n");
795 spin_unlock_irqrestore(&dma_domain->domain_lock, flags);
799 ret = update_domain_stash(dma_domain, dma_domain->stash_id);
801 spin_unlock_irqrestore(&dma_domain->domain_lock, flags);
806 /* Configure domain dma state i.e. enable/disable DMA*/
807 static int configure_domain_dma_state(struct fsl_dma_domain *dma_domain, bool enable)
809 struct device_domain_info *info;
813 spin_lock_irqsave(&dma_domain->domain_lock, flags);
815 if (enable && !dma_domain->mapped) {
816 pr_debug("Can't enable DMA domain without valid mapping\n");
817 spin_unlock_irqrestore(&dma_domain->domain_lock, flags);
821 dma_domain->enabled = enable;
822 list_for_each_entry(info, &dma_domain->devices,
824 ret = (enable) ? pamu_enable_liodn(info->liodn) :
825 pamu_disable_liodn(info->liodn);
827 pr_debug("Unable to set dma state for liodn %d",
830 spin_unlock_irqrestore(&dma_domain->domain_lock, flags);
835 static int fsl_pamu_set_domain_attr(struct iommu_domain *domain,
836 enum iommu_attr attr_type, void *data)
838 struct fsl_dma_domain *dma_domain = domain->priv;
843 case DOMAIN_ATTR_GEOMETRY:
844 ret = configure_domain_geometry(domain, data);
846 case DOMAIN_ATTR_FSL_PAMU_STASH:
847 ret = configure_domain_stash(dma_domain, data);
849 case DOMAIN_ATTR_FSL_PAMU_ENABLE:
850 ret = configure_domain_dma_state(dma_domain, *(int *)data);
853 pr_debug("Unsupported attribute type\n");
861 static int fsl_pamu_get_domain_attr(struct iommu_domain *domain,
862 enum iommu_attr attr_type, void *data)
864 struct fsl_dma_domain *dma_domain = domain->priv;
869 case DOMAIN_ATTR_FSL_PAMU_STASH:
870 memcpy((struct pamu_stash_attribute *) data, &dma_domain->dma_stash,
871 sizeof(struct pamu_stash_attribute));
873 case DOMAIN_ATTR_FSL_PAMU_ENABLE:
874 *(int *)data = dma_domain->enabled;
876 case DOMAIN_ATTR_FSL_PAMUV1:
877 *(int *)data = DOMAIN_ATTR_FSL_PAMUV1;
880 pr_debug("Unsupported attribute type\n");
888 static struct iommu_group *get_device_iommu_group(struct device *dev)
890 struct iommu_group *group;
892 group = iommu_group_get(dev);
894 group = iommu_group_alloc();
899 static bool check_pci_ctl_endpt_part(struct pci_controller *pci_ctl)
903 /* Check the PCI controller version number by readding BRR1 register */
904 version = in_be32(pci_ctl->cfg_addr + (PCI_FSL_BRR1 >> 2));
905 version &= PCI_FSL_BRR1_VER;
906 /* If PCI controller version is >= 0x204 we can partition endpoints*/
907 if (version >= 0x204)
913 /* Get iommu group information from peer devices or devices on the parent bus */
914 static struct iommu_group *get_shared_pci_device_group(struct pci_dev *pdev)
917 struct iommu_group *group;
918 struct pci_bus *bus = pdev->bus;
921 * Traverese the pci bus device list to get
922 * the shared iommu group.
925 list_for_each_entry(tmp, &bus->devices, bus_list) {
928 group = iommu_group_get(&tmp->dev);
939 static struct iommu_group *get_pci_device_group(struct pci_dev *pdev)
941 struct pci_controller *pci_ctl;
942 bool pci_endpt_partioning;
943 struct iommu_group *group = NULL;
945 pci_ctl = pci_bus_to_host(pdev->bus);
946 pci_endpt_partioning = check_pci_ctl_endpt_part(pci_ctl);
947 /* We can partition PCIe devices so assign device group to the device */
948 if (pci_endpt_partioning) {
949 group = iommu_group_get_for_dev(&pdev->dev);
952 * PCIe controller is not a paritionable entity
953 * free the controller device iommu_group.
955 if (pci_ctl->parent->iommu_group)
956 iommu_group_remove_device(pci_ctl->parent);
959 * All devices connected to the controller will share the
960 * PCI controllers device group. If this is the first
961 * device to be probed for the pci controller, copy the
962 * device group information from the PCI controller device
963 * node and remove the PCI controller iommu group.
964 * For subsequent devices, the iommu group information can
965 * be obtained from sibling devices (i.e. from the bus_devices
968 if (pci_ctl->parent->iommu_group) {
969 group = get_device_iommu_group(pci_ctl->parent);
970 iommu_group_remove_device(pci_ctl->parent);
972 group = get_shared_pci_device_group(pdev);
976 group = ERR_PTR(-ENODEV);
981 static int fsl_pamu_add_device(struct device *dev)
983 struct iommu_group *group = ERR_PTR(-ENODEV);
984 struct pci_dev *pdev;
989 * For platform devices we allocate a separate group for
990 * each of the devices.
992 if (dev_is_pci(dev)) {
993 pdev = to_pci_dev(dev);
994 /* Don't create device groups for virtual PCI bridges */
995 if (pdev->subordinate)
998 group = get_pci_device_group(pdev);
1001 prop = of_get_property(dev->of_node, "fsl,liodn", &len);
1003 group = get_device_iommu_group(dev);
1007 return PTR_ERR(group);
1010 * Check if device has already been added to an iommu group.
1011 * Group could have already been created for a PCI device in
1012 * the iommu_group_get_for_dev path.
1014 if (!dev->iommu_group)
1015 ret = iommu_group_add_device(group, dev);
1017 iommu_group_put(group);
1021 static void fsl_pamu_remove_device(struct device *dev)
1023 iommu_group_remove_device(dev);
1026 static int fsl_pamu_set_windows(struct iommu_domain *domain, u32 w_count)
1028 struct fsl_dma_domain *dma_domain = domain->priv;
1029 unsigned long flags;
1032 spin_lock_irqsave(&dma_domain->domain_lock, flags);
1033 /* Ensure domain is inactive i.e. DMA should be disabled for the domain */
1034 if (dma_domain->enabled) {
1035 pr_debug("Can't set geometry attributes as domain is active\n");
1036 spin_unlock_irqrestore(&dma_domain->domain_lock, flags);
1040 /* Ensure that the geometry has been set for the domain */
1041 if (!dma_domain->geom_size) {
1042 pr_debug("Please configure geometry before setting the number of windows\n");
1043 spin_unlock_irqrestore(&dma_domain->domain_lock, flags);
1048 * Ensure we have valid window count i.e. it should be less than
1049 * maximum permissible limit and should be a power of two.
1051 if (w_count > pamu_get_max_subwin_cnt() || !is_power_of_2(w_count)) {
1052 pr_debug("Invalid window count\n");
1053 spin_unlock_irqrestore(&dma_domain->domain_lock, flags);
1057 ret = pamu_set_domain_geometry(dma_domain, &domain->geometry,
1058 ((w_count > 1) ? w_count : 0));
1060 kfree(dma_domain->win_arr);
1061 dma_domain->win_arr = kzalloc(sizeof(struct dma_window) *
1062 w_count, GFP_ATOMIC);
1063 if (!dma_domain->win_arr) {
1064 spin_unlock_irqrestore(&dma_domain->domain_lock, flags);
1067 dma_domain->win_cnt = w_count;
1069 spin_unlock_irqrestore(&dma_domain->domain_lock, flags);
1074 static u32 fsl_pamu_get_windows(struct iommu_domain *domain)
1076 struct fsl_dma_domain *dma_domain = domain->priv;
1078 return dma_domain->win_cnt;
1081 static const struct iommu_ops fsl_pamu_ops = {
1082 .capable = fsl_pamu_capable,
1083 .domain_init = fsl_pamu_domain_init,
1084 .domain_destroy = fsl_pamu_domain_destroy,
1085 .attach_dev = fsl_pamu_attach_device,
1086 .detach_dev = fsl_pamu_detach_device,
1087 .domain_window_enable = fsl_pamu_window_enable,
1088 .domain_window_disable = fsl_pamu_window_disable,
1089 .domain_get_windows = fsl_pamu_get_windows,
1090 .domain_set_windows = fsl_pamu_set_windows,
1091 .iova_to_phys = fsl_pamu_iova_to_phys,
1092 .domain_set_attr = fsl_pamu_set_domain_attr,
1093 .domain_get_attr = fsl_pamu_get_domain_attr,
1094 .add_device = fsl_pamu_add_device,
1095 .remove_device = fsl_pamu_remove_device,
1098 int pamu_domain_init(void)
1102 ret = iommu_init_mempool();
1106 bus_set_iommu(&platform_bus_type, &fsl_pamu_ops);
1107 bus_set_iommu(&pci_bus_type, &fsl_pamu_ops);