2 * omap iommu: tlb and pagetable primitives
4 * Copyright (C) 2008-2010 Nokia Corporation
6 * Written by Hiroshi DOYU <Hiroshi.DOYU@nokia.com>,
7 * Paul Mundt and Toshihiro Kobayashi
9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License version 2 as
11 * published by the Free Software Foundation.
14 #include <linux/err.h>
15 #include <linux/module.h>
16 #include <linux/slab.h>
17 #include <linux/interrupt.h>
18 #include <linux/ioport.h>
19 #include <linux/platform_device.h>
20 #include <linux/iommu.h>
21 #include <linux/omap-iommu.h>
22 #include <linux/mutex.h>
23 #include <linux/spinlock.h>
25 #include <linux/pm_runtime.h>
27 #include <linux/of_iommu.h>
28 #include <linux/of_irq.h>
30 #include <asm/cacheflush.h>
32 #include <linux/platform_data/iommu-omap.h>
34 #include "omap-iopgtable.h"
35 #include "omap-iommu.h"
37 #define to_iommu(dev) \
38 ((struct omap_iommu *)platform_get_drvdata(to_platform_device(dev)))
40 #define for_each_iotlb_cr(obj, n, __i, cr) \
42 (__i < (n)) && (cr = __iotlb_read_cr((obj), __i), true); \
45 /* bitmap of the page sizes currently supported */
46 #define OMAP_IOMMU_PGSIZES (SZ_4K | SZ_64K | SZ_1M | SZ_16M)
49 * struct omap_iommu_domain - omap iommu domain
50 * @pgtable: the page table
51 * @iommu_dev: an omap iommu device attached to this domain. only a single
52 * iommu device can be attached for now.
53 * @dev: Device using this domain.
54 * @lock: domain lock, should be taken when attaching/detaching
56 struct omap_iommu_domain {
58 struct omap_iommu *iommu_dev;
63 #define MMU_LOCK_BASE_SHIFT 10
64 #define MMU_LOCK_BASE_MASK (0x1f << MMU_LOCK_BASE_SHIFT)
65 #define MMU_LOCK_BASE(x) \
66 ((x & MMU_LOCK_BASE_MASK) >> MMU_LOCK_BASE_SHIFT)
68 #define MMU_LOCK_VICT_SHIFT 4
69 #define MMU_LOCK_VICT_MASK (0x1f << MMU_LOCK_VICT_SHIFT)
70 #define MMU_LOCK_VICT(x) \
71 ((x & MMU_LOCK_VICT_MASK) >> MMU_LOCK_VICT_SHIFT)
78 /* accommodate the difference between omap1 and omap2/3 */
79 static const struct iommu_functions *arch_iommu;
81 static struct platform_driver omap_iommu_driver;
82 static struct kmem_cache *iopte_cachep;
85 * omap_install_iommu_arch - Install archtecure specific iommu functions
86 * @ops: a pointer to architecture specific iommu functions
88 * There are several kind of iommu algorithm(tlb, pagetable) among
89 * omap series. This interface installs such an iommu algorighm.
91 int omap_install_iommu_arch(const struct iommu_functions *ops)
99 EXPORT_SYMBOL_GPL(omap_install_iommu_arch);
102 * omap_uninstall_iommu_arch - Uninstall archtecure specific iommu functions
103 * @ops: a pointer to architecture specific iommu functions
105 * This interface uninstalls the iommu algorighm installed previously.
107 void omap_uninstall_iommu_arch(const struct iommu_functions *ops)
109 if (arch_iommu != ops)
110 pr_err("%s: not your arch\n", __func__);
114 EXPORT_SYMBOL_GPL(omap_uninstall_iommu_arch);
117 * omap_iommu_save_ctx - Save registers for pm off-mode support
118 * @dev: client device
120 void omap_iommu_save_ctx(struct device *dev)
122 struct omap_iommu *obj = dev_to_omap_iommu(dev);
124 arch_iommu->save_ctx(obj);
126 EXPORT_SYMBOL_GPL(omap_iommu_save_ctx);
129 * omap_iommu_restore_ctx - Restore registers for pm off-mode support
130 * @dev: client device
132 void omap_iommu_restore_ctx(struct device *dev)
134 struct omap_iommu *obj = dev_to_omap_iommu(dev);
136 arch_iommu->restore_ctx(obj);
138 EXPORT_SYMBOL_GPL(omap_iommu_restore_ctx);
141 * omap_iommu_arch_version - Return running iommu arch version
143 u32 omap_iommu_arch_version(void)
145 return arch_iommu->version;
147 EXPORT_SYMBOL_GPL(omap_iommu_arch_version);
149 static int iommu_enable(struct omap_iommu *obj)
152 struct platform_device *pdev = to_platform_device(obj->dev);
153 struct iommu_platform_data *pdata = pdev->dev.platform_data;
158 if (pdata && pdata->deassert_reset) {
159 err = pdata->deassert_reset(pdev, pdata->reset_name);
161 dev_err(obj->dev, "deassert_reset failed: %d\n", err);
166 pm_runtime_get_sync(obj->dev);
168 err = arch_iommu->enable(obj);
173 static void iommu_disable(struct omap_iommu *obj)
175 struct platform_device *pdev = to_platform_device(obj->dev);
176 struct iommu_platform_data *pdata = pdev->dev.platform_data;
178 arch_iommu->disable(obj);
180 pm_runtime_put_sync(obj->dev);
182 if (pdata && pdata->assert_reset)
183 pdata->assert_reset(pdev, pdata->reset_name);
189 void omap_iotlb_cr_to_e(struct cr_regs *cr, struct iotlb_entry *e)
193 arch_iommu->cr_to_e(cr, e);
195 EXPORT_SYMBOL_GPL(omap_iotlb_cr_to_e);
197 static inline int iotlb_cr_valid(struct cr_regs *cr)
202 return arch_iommu->cr_valid(cr);
205 static inline struct cr_regs *iotlb_alloc_cr(struct omap_iommu *obj,
206 struct iotlb_entry *e)
211 return arch_iommu->alloc_cr(obj, e);
214 static u32 iotlb_cr_to_virt(struct cr_regs *cr)
216 return arch_iommu->cr_to_virt(cr);
219 static u32 get_iopte_attr(struct iotlb_entry *e)
221 return arch_iommu->get_pte_attr(e);
224 static u32 iommu_report_fault(struct omap_iommu *obj, u32 *da)
226 return arch_iommu->fault_isr(obj, da);
229 static void iotlb_lock_get(struct omap_iommu *obj, struct iotlb_lock *l)
233 val = iommu_read_reg(obj, MMU_LOCK);
235 l->base = MMU_LOCK_BASE(val);
236 l->vict = MMU_LOCK_VICT(val);
240 static void iotlb_lock_set(struct omap_iommu *obj, struct iotlb_lock *l)
244 val = (l->base << MMU_LOCK_BASE_SHIFT);
245 val |= (l->vict << MMU_LOCK_VICT_SHIFT);
247 iommu_write_reg(obj, val, MMU_LOCK);
250 static void iotlb_read_cr(struct omap_iommu *obj, struct cr_regs *cr)
252 arch_iommu->tlb_read_cr(obj, cr);
255 static void iotlb_load_cr(struct omap_iommu *obj, struct cr_regs *cr)
257 arch_iommu->tlb_load_cr(obj, cr);
259 iommu_write_reg(obj, 1, MMU_FLUSH_ENTRY);
260 iommu_write_reg(obj, 1, MMU_LD_TLB);
264 * iotlb_dump_cr - Dump an iommu tlb entry into buf
266 * @cr: contents of cam and ram register
267 * @buf: output buffer
269 static inline ssize_t iotlb_dump_cr(struct omap_iommu *obj, struct cr_regs *cr,
274 return arch_iommu->dump_cr(obj, cr, buf);
277 /* only used in iotlb iteration for-loop */
278 static struct cr_regs __iotlb_read_cr(struct omap_iommu *obj, int n)
283 iotlb_lock_get(obj, &l);
285 iotlb_lock_set(obj, &l);
286 iotlb_read_cr(obj, &cr);
292 * load_iotlb_entry - Set an iommu tlb entry
294 * @e: an iommu tlb entry info
296 #ifdef PREFETCH_IOTLB
297 static int load_iotlb_entry(struct omap_iommu *obj, struct iotlb_entry *e)
303 if (!obj || !obj->nr_tlb_entries || !e)
306 pm_runtime_get_sync(obj->dev);
308 iotlb_lock_get(obj, &l);
309 if (l.base == obj->nr_tlb_entries) {
310 dev_warn(obj->dev, "%s: preserve entries full\n", __func__);
318 for_each_iotlb_cr(obj, obj->nr_tlb_entries, i, tmp)
319 if (!iotlb_cr_valid(&tmp))
322 if (i == obj->nr_tlb_entries) {
323 dev_dbg(obj->dev, "%s: full: no entry\n", __func__);
328 iotlb_lock_get(obj, &l);
331 iotlb_lock_set(obj, &l);
334 cr = iotlb_alloc_cr(obj, e);
336 pm_runtime_put_sync(obj->dev);
340 iotlb_load_cr(obj, cr);
345 /* increment victim for next tlb load */
346 if (++l.vict == obj->nr_tlb_entries)
348 iotlb_lock_set(obj, &l);
350 pm_runtime_put_sync(obj->dev);
354 #else /* !PREFETCH_IOTLB */
356 static int load_iotlb_entry(struct omap_iommu *obj, struct iotlb_entry *e)
361 #endif /* !PREFETCH_IOTLB */
363 static int prefetch_iotlb_entry(struct omap_iommu *obj, struct iotlb_entry *e)
365 return load_iotlb_entry(obj, e);
369 * flush_iotlb_page - Clear an iommu tlb entry
371 * @da: iommu device virtual address
373 * Clear an iommu tlb entry which includes 'da' address.
375 static void flush_iotlb_page(struct omap_iommu *obj, u32 da)
380 pm_runtime_get_sync(obj->dev);
382 for_each_iotlb_cr(obj, obj->nr_tlb_entries, i, cr) {
386 if (!iotlb_cr_valid(&cr))
389 start = iotlb_cr_to_virt(&cr);
390 bytes = iopgsz_to_bytes(cr.cam & 3);
392 if ((start <= da) && (da < start + bytes)) {
393 dev_dbg(obj->dev, "%s: %08x<=%08x(%x)\n",
394 __func__, start, da, bytes);
395 iotlb_load_cr(obj, &cr);
396 iommu_write_reg(obj, 1, MMU_FLUSH_ENTRY);
400 pm_runtime_put_sync(obj->dev);
402 if (i == obj->nr_tlb_entries)
403 dev_dbg(obj->dev, "%s: no page for %08x\n", __func__, da);
407 * flush_iotlb_all - Clear all iommu tlb entries
410 static void flush_iotlb_all(struct omap_iommu *obj)
414 pm_runtime_get_sync(obj->dev);
418 iotlb_lock_set(obj, &l);
420 iommu_write_reg(obj, 1, MMU_GFLUSH);
422 pm_runtime_put_sync(obj->dev);
425 #if defined(CONFIG_OMAP_IOMMU_DEBUG) || defined(CONFIG_OMAP_IOMMU_DEBUG_MODULE)
427 ssize_t omap_iommu_dump_ctx(struct omap_iommu *obj, char *buf, ssize_t bytes)
432 pm_runtime_get_sync(obj->dev);
434 bytes = arch_iommu->dump_ctx(obj, buf, bytes);
436 pm_runtime_put_sync(obj->dev);
440 EXPORT_SYMBOL_GPL(omap_iommu_dump_ctx);
443 __dump_tlb_entries(struct omap_iommu *obj, struct cr_regs *crs, int num)
446 struct iotlb_lock saved;
448 struct cr_regs *p = crs;
450 pm_runtime_get_sync(obj->dev);
451 iotlb_lock_get(obj, &saved);
453 for_each_iotlb_cr(obj, num, i, tmp) {
454 if (!iotlb_cr_valid(&tmp))
459 iotlb_lock_set(obj, &saved);
460 pm_runtime_put_sync(obj->dev);
466 * omap_dump_tlb_entries - dump cr arrays to given buffer
468 * @buf: output buffer
470 size_t omap_dump_tlb_entries(struct omap_iommu *obj, char *buf, ssize_t bytes)
476 num = bytes / sizeof(*cr);
477 num = min(obj->nr_tlb_entries, num);
479 cr = kcalloc(num, sizeof(*cr), GFP_KERNEL);
483 num = __dump_tlb_entries(obj, cr, num);
484 for (i = 0; i < num; i++)
485 p += iotlb_dump_cr(obj, cr + i, p);
490 EXPORT_SYMBOL_GPL(omap_dump_tlb_entries);
492 int omap_foreach_iommu_device(void *data, int (*fn)(struct device *, void *))
494 return driver_for_each_device(&omap_iommu_driver.driver,
497 EXPORT_SYMBOL_GPL(omap_foreach_iommu_device);
499 #endif /* CONFIG_OMAP_IOMMU_DEBUG_MODULE */
502 * H/W pagetable operations
504 static void flush_iopgd_range(u32 *first, u32 *last)
506 /* FIXME: L2 cache should be taken care of if it exists */
508 asm("mcr p15, 0, %0, c7, c10, 1 @ flush_pgd"
510 first += L1_CACHE_BYTES / sizeof(*first);
511 } while (first <= last);
514 static void flush_iopte_range(u32 *first, u32 *last)
516 /* FIXME: L2 cache should be taken care of if it exists */
518 asm("mcr p15, 0, %0, c7, c10, 1 @ flush_pte"
520 first += L1_CACHE_BYTES / sizeof(*first);
521 } while (first <= last);
524 static void iopte_free(u32 *iopte)
526 /* Note: freed iopte's must be clean ready for re-use */
528 kmem_cache_free(iopte_cachep, iopte);
531 static u32 *iopte_alloc(struct omap_iommu *obj, u32 *iopgd, u32 da)
535 /* a table has already existed */
540 * do the allocation outside the page table lock
542 spin_unlock(&obj->page_table_lock);
543 iopte = kmem_cache_zalloc(iopte_cachep, GFP_KERNEL);
544 spin_lock(&obj->page_table_lock);
548 return ERR_PTR(-ENOMEM);
550 *iopgd = virt_to_phys(iopte) | IOPGD_TABLE;
551 flush_iopgd_range(iopgd, iopgd);
553 dev_vdbg(obj->dev, "%s: a new pte:%p\n", __func__, iopte);
555 /* We raced, free the reduniovant table */
560 iopte = iopte_offset(iopgd, da);
563 "%s: da:%08x pgd:%p *pgd:%08x pte:%p *pte:%08x\n",
564 __func__, da, iopgd, *iopgd, iopte, *iopte);
569 static int iopgd_alloc_section(struct omap_iommu *obj, u32 da, u32 pa, u32 prot)
571 u32 *iopgd = iopgd_offset(obj, da);
573 if ((da | pa) & ~IOSECTION_MASK) {
574 dev_err(obj->dev, "%s: %08x:%08x should aligned on %08lx\n",
575 __func__, da, pa, IOSECTION_SIZE);
579 *iopgd = (pa & IOSECTION_MASK) | prot | IOPGD_SECTION;
580 flush_iopgd_range(iopgd, iopgd);
584 static int iopgd_alloc_super(struct omap_iommu *obj, u32 da, u32 pa, u32 prot)
586 u32 *iopgd = iopgd_offset(obj, da);
589 if ((da | pa) & ~IOSUPER_MASK) {
590 dev_err(obj->dev, "%s: %08x:%08x should aligned on %08lx\n",
591 __func__, da, pa, IOSUPER_SIZE);
595 for (i = 0; i < 16; i++)
596 *(iopgd + i) = (pa & IOSUPER_MASK) | prot | IOPGD_SUPER;
597 flush_iopgd_range(iopgd, iopgd + 15);
601 static int iopte_alloc_page(struct omap_iommu *obj, u32 da, u32 pa, u32 prot)
603 u32 *iopgd = iopgd_offset(obj, da);
604 u32 *iopte = iopte_alloc(obj, iopgd, da);
607 return PTR_ERR(iopte);
609 *iopte = (pa & IOPAGE_MASK) | prot | IOPTE_SMALL;
610 flush_iopte_range(iopte, iopte);
612 dev_vdbg(obj->dev, "%s: da:%08x pa:%08x pte:%p *pte:%08x\n",
613 __func__, da, pa, iopte, *iopte);
618 static int iopte_alloc_large(struct omap_iommu *obj, u32 da, u32 pa, u32 prot)
620 u32 *iopgd = iopgd_offset(obj, da);
621 u32 *iopte = iopte_alloc(obj, iopgd, da);
624 if ((da | pa) & ~IOLARGE_MASK) {
625 dev_err(obj->dev, "%s: %08x:%08x should aligned on %08lx\n",
626 __func__, da, pa, IOLARGE_SIZE);
631 return PTR_ERR(iopte);
633 for (i = 0; i < 16; i++)
634 *(iopte + i) = (pa & IOLARGE_MASK) | prot | IOPTE_LARGE;
635 flush_iopte_range(iopte, iopte + 15);
640 iopgtable_store_entry_core(struct omap_iommu *obj, struct iotlb_entry *e)
642 int (*fn)(struct omap_iommu *, u32, u32, u32);
650 case MMU_CAM_PGSZ_16M:
651 fn = iopgd_alloc_super;
653 case MMU_CAM_PGSZ_1M:
654 fn = iopgd_alloc_section;
656 case MMU_CAM_PGSZ_64K:
657 fn = iopte_alloc_large;
659 case MMU_CAM_PGSZ_4K:
660 fn = iopte_alloc_page;
668 prot = get_iopte_attr(e);
670 spin_lock(&obj->page_table_lock);
671 err = fn(obj, e->da, e->pa, prot);
672 spin_unlock(&obj->page_table_lock);
678 * omap_iopgtable_store_entry - Make an iommu pte entry
680 * @e: an iommu tlb entry info
682 int omap_iopgtable_store_entry(struct omap_iommu *obj, struct iotlb_entry *e)
686 flush_iotlb_page(obj, e->da);
687 err = iopgtable_store_entry_core(obj, e);
689 prefetch_iotlb_entry(obj, e);
692 EXPORT_SYMBOL_GPL(omap_iopgtable_store_entry);
695 * iopgtable_lookup_entry - Lookup an iommu pte entry
697 * @da: iommu device virtual address
698 * @ppgd: iommu pgd entry pointer to be returned
699 * @ppte: iommu pte entry pointer to be returned
702 iopgtable_lookup_entry(struct omap_iommu *obj, u32 da, u32 **ppgd, u32 **ppte)
704 u32 *iopgd, *iopte = NULL;
706 iopgd = iopgd_offset(obj, da);
710 if (iopgd_is_table(*iopgd))
711 iopte = iopte_offset(iopgd, da);
717 static size_t iopgtable_clear_entry_core(struct omap_iommu *obj, u32 da)
720 u32 *iopgd = iopgd_offset(obj, da);
726 if (iopgd_is_table(*iopgd)) {
728 u32 *iopte = iopte_offset(iopgd, da);
731 if (*iopte & IOPTE_LARGE) {
733 /* rewind to the 1st entry */
734 iopte = iopte_offset(iopgd, (da & IOLARGE_MASK));
737 memset(iopte, 0, nent * sizeof(*iopte));
738 flush_iopte_range(iopte, iopte + (nent - 1) * sizeof(*iopte));
741 * do table walk to check if this table is necessary or not
743 iopte = iopte_offset(iopgd, 0);
744 for (i = 0; i < PTRS_PER_IOPTE; i++)
749 nent = 1; /* for the next L1 entry */
752 if ((*iopgd & IOPGD_SUPER) == IOPGD_SUPER) {
754 /* rewind to the 1st entry */
755 iopgd = iopgd_offset(obj, (da & IOSUPER_MASK));
759 memset(iopgd, 0, nent * sizeof(*iopgd));
760 flush_iopgd_range(iopgd, iopgd + (nent - 1) * sizeof(*iopgd));
766 * iopgtable_clear_entry - Remove an iommu pte entry
768 * @da: iommu device virtual address
770 static size_t iopgtable_clear_entry(struct omap_iommu *obj, u32 da)
774 spin_lock(&obj->page_table_lock);
776 bytes = iopgtable_clear_entry_core(obj, da);
777 flush_iotlb_page(obj, da);
779 spin_unlock(&obj->page_table_lock);
784 static void iopgtable_clear_entry_all(struct omap_iommu *obj)
788 spin_lock(&obj->page_table_lock);
790 for (i = 0; i < PTRS_PER_IOPGD; i++) {
794 da = i << IOPGD_SHIFT;
795 iopgd = iopgd_offset(obj, da);
800 if (iopgd_is_table(*iopgd))
801 iopte_free(iopte_offset(iopgd, 0));
804 flush_iopgd_range(iopgd, iopgd);
807 flush_iotlb_all(obj);
809 spin_unlock(&obj->page_table_lock);
813 * Device IOMMU generic operations
815 static irqreturn_t iommu_fault_handler(int irq, void *data)
819 struct omap_iommu *obj = data;
820 struct iommu_domain *domain = obj->domain;
825 errs = iommu_report_fault(obj, &da);
829 /* Fault callback or TLB/PTE Dynamic loading */
830 if (!report_iommu_fault(domain, obj->dev, da, 0))
835 iopgd = iopgd_offset(obj, da);
837 if (!iopgd_is_table(*iopgd)) {
838 dev_err(obj->dev, "%s: errs:0x%08x da:0x%08x pgd:0x%p *pgd:px%08x\n",
839 obj->name, errs, da, iopgd, *iopgd);
843 iopte = iopte_offset(iopgd, da);
845 dev_err(obj->dev, "%s: errs:0x%08x da:0x%08x pgd:0x%p *pgd:0x%08x pte:0x%p *pte:0x%08x\n",
846 obj->name, errs, da, iopgd, *iopgd, iopte, *iopte);
851 static int device_match_by_alias(struct device *dev, void *data)
853 struct omap_iommu *obj = to_iommu(dev);
854 const char *name = data;
856 pr_debug("%s: %s %s\n", __func__, obj->name, name);
858 return strcmp(obj->name, name) == 0;
862 * omap_iommu_attach() - attach iommu device to an iommu domain
863 * @name: name of target omap iommu device
866 static struct omap_iommu *omap_iommu_attach(const char *name, u32 *iopgd)
870 struct omap_iommu *obj;
872 dev = driver_find_device(&omap_iommu_driver.driver, NULL,
874 device_match_by_alias);
876 return ERR_PTR(-ENODEV);
880 spin_lock(&obj->iommu_lock);
882 /* an iommu device can only be attached once */
883 if (++obj->refcount > 1) {
884 dev_err(dev, "%s: already attached!\n", obj->name);
890 err = iommu_enable(obj);
893 flush_iotlb_all(obj);
895 if (!try_module_get(obj->owner)) {
900 spin_unlock(&obj->iommu_lock);
902 dev_dbg(obj->dev, "%s: %s\n", __func__, obj->name);
906 if (obj->refcount == 1)
910 spin_unlock(&obj->iommu_lock);
915 * omap_iommu_detach - release iommu device
918 static void omap_iommu_detach(struct omap_iommu *obj)
920 if (!obj || IS_ERR(obj))
923 spin_lock(&obj->iommu_lock);
925 if (--obj->refcount == 0)
928 module_put(obj->owner);
932 spin_unlock(&obj->iommu_lock);
934 dev_dbg(obj->dev, "%s: %s\n", __func__, obj->name);
938 * OMAP Device MMU(IOMMU) detection
940 static int omap_iommu_probe(struct platform_device *pdev)
944 struct omap_iommu *obj;
945 struct resource *res;
946 struct iommu_platform_data *pdata = pdev->dev.platform_data;
947 struct device_node *of = pdev->dev.of_node;
949 obj = devm_kzalloc(&pdev->dev, sizeof(*obj) + MMU_REG_SIZE, GFP_KERNEL);
954 obj->name = dev_name(&pdev->dev);
955 obj->nr_tlb_entries = 32;
956 err = of_property_read_u32(of, "ti,#tlb-entries",
957 &obj->nr_tlb_entries);
958 if (err && err != -EINVAL)
960 if (obj->nr_tlb_entries != 32 && obj->nr_tlb_entries != 8)
963 * da_start and da_end are needed for omap-iovmm, so hardcode
964 * these values as used by OMAP3 ISP - the only user for
968 obj->da_end = 0xfffff000;
969 if (of_find_property(of, "ti,iommu-bus-err-back", NULL))
970 obj->has_bus_err_back = MMU_GP_REG_BUS_ERR_BACK_EN;
972 obj->nr_tlb_entries = pdata->nr_tlb_entries;
973 obj->name = pdata->name;
974 obj->da_start = pdata->da_start;
975 obj->da_end = pdata->da_end;
977 if (obj->da_end <= obj->da_start)
980 obj->dev = &pdev->dev;
981 obj->ctx = (void *)obj + sizeof(*obj);
983 spin_lock_init(&obj->iommu_lock);
984 mutex_init(&obj->mmap_lock);
985 spin_lock_init(&obj->page_table_lock);
986 INIT_LIST_HEAD(&obj->mmap);
988 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
989 obj->regbase = devm_ioremap_resource(obj->dev, res);
990 if (IS_ERR(obj->regbase))
991 return PTR_ERR(obj->regbase);
993 irq = platform_get_irq(pdev, 0);
997 err = devm_request_irq(obj->dev, irq, iommu_fault_handler, IRQF_SHARED,
998 dev_name(obj->dev), obj);
1001 platform_set_drvdata(pdev, obj);
1003 pm_runtime_irq_safe(obj->dev);
1004 pm_runtime_enable(obj->dev);
1006 dev_info(&pdev->dev, "%s registered\n", obj->name);
1010 static int omap_iommu_remove(struct platform_device *pdev)
1012 struct omap_iommu *obj = platform_get_drvdata(pdev);
1014 iopgtable_clear_entry_all(obj);
1016 pm_runtime_disable(obj->dev);
1018 dev_info(&pdev->dev, "%s removed\n", obj->name);
1022 static struct of_device_id omap_iommu_of_match[] = {
1023 { .compatible = "ti,omap2-iommu" },
1024 { .compatible = "ti,omap4-iommu" },
1025 { .compatible = "ti,dra7-iommu" },
1028 MODULE_DEVICE_TABLE(of, omap_iommu_of_match);
1030 static struct platform_driver omap_iommu_driver = {
1031 .probe = omap_iommu_probe,
1032 .remove = omap_iommu_remove,
1034 .name = "omap-iommu",
1035 .of_match_table = of_match_ptr(omap_iommu_of_match),
1039 static void iopte_cachep_ctor(void *iopte)
1041 clean_dcache_area(iopte, IOPTE_TABLE_SIZE);
1044 static u32 iotlb_init_entry(struct iotlb_entry *e, u32 da, u32 pa, int pgsz)
1046 memset(e, 0, sizeof(*e));
1050 e->valid = MMU_CAM_V;
1051 /* FIXME: add OMAP1 support */
1053 e->endian = MMU_RAM_ENDIAN_LITTLE;
1054 e->elsz = MMU_RAM_ELSZ_8;
1057 return iopgsz_to_bytes(e->pgsz);
1060 static int omap_iommu_map(struct iommu_domain *domain, unsigned long da,
1061 phys_addr_t pa, size_t bytes, int prot)
1063 struct omap_iommu_domain *omap_domain = domain->priv;
1064 struct omap_iommu *oiommu = omap_domain->iommu_dev;
1065 struct device *dev = oiommu->dev;
1066 struct iotlb_entry e;
1070 omap_pgsz = bytes_to_iopgsz(bytes);
1071 if (omap_pgsz < 0) {
1072 dev_err(dev, "invalid size to map: %d\n", bytes);
1076 dev_dbg(dev, "mapping da 0x%lx to pa 0x%x size 0x%x\n", da, pa, bytes);
1078 iotlb_init_entry(&e, da, pa, omap_pgsz);
1080 ret = omap_iopgtable_store_entry(oiommu, &e);
1082 dev_err(dev, "omap_iopgtable_store_entry failed: %d\n", ret);
1087 static size_t omap_iommu_unmap(struct iommu_domain *domain, unsigned long da,
1090 struct omap_iommu_domain *omap_domain = domain->priv;
1091 struct omap_iommu *oiommu = omap_domain->iommu_dev;
1092 struct device *dev = oiommu->dev;
1094 dev_dbg(dev, "unmapping da 0x%lx size %u\n", da, size);
1096 return iopgtable_clear_entry(oiommu, da);
1100 omap_iommu_attach_dev(struct iommu_domain *domain, struct device *dev)
1102 struct omap_iommu_domain *omap_domain = domain->priv;
1103 struct omap_iommu *oiommu;
1104 struct omap_iommu_arch_data *arch_data = dev->archdata.iommu;
1107 spin_lock(&omap_domain->lock);
1109 /* only a single device is supported per domain for now */
1110 if (omap_domain->iommu_dev) {
1111 dev_err(dev, "iommu domain is already attached\n");
1116 /* get a handle to and enable the omap iommu */
1117 oiommu = omap_iommu_attach(arch_data->name, omap_domain->pgtable);
1118 if (IS_ERR(oiommu)) {
1119 ret = PTR_ERR(oiommu);
1120 dev_err(dev, "can't get omap iommu: %d\n", ret);
1124 omap_domain->iommu_dev = arch_data->iommu_dev = oiommu;
1125 omap_domain->dev = dev;
1126 oiommu->domain = domain;
1129 spin_unlock(&omap_domain->lock);
1133 static void _omap_iommu_detach_dev(struct omap_iommu_domain *omap_domain,
1136 struct omap_iommu *oiommu = dev_to_omap_iommu(dev);
1137 struct omap_iommu_arch_data *arch_data = dev->archdata.iommu;
1139 /* only a single device is supported per domain for now */
1140 if (omap_domain->iommu_dev != oiommu) {
1141 dev_err(dev, "invalid iommu device\n");
1145 iopgtable_clear_entry_all(oiommu);
1147 omap_iommu_detach(oiommu);
1149 omap_domain->iommu_dev = arch_data->iommu_dev = NULL;
1150 omap_domain->dev = NULL;
1153 static void omap_iommu_detach_dev(struct iommu_domain *domain,
1156 struct omap_iommu_domain *omap_domain = domain->priv;
1158 spin_lock(&omap_domain->lock);
1159 _omap_iommu_detach_dev(omap_domain, dev);
1160 spin_unlock(&omap_domain->lock);
1163 static int omap_iommu_domain_init(struct iommu_domain *domain)
1165 struct omap_iommu_domain *omap_domain;
1167 omap_domain = kzalloc(sizeof(*omap_domain), GFP_KERNEL);
1169 pr_err("kzalloc failed\n");
1173 omap_domain->pgtable = kzalloc(IOPGD_TABLE_SIZE, GFP_KERNEL);
1174 if (!omap_domain->pgtable) {
1175 pr_err("kzalloc failed\n");
1180 * should never fail, but please keep this around to ensure
1181 * we keep the hardware happy
1183 BUG_ON(!IS_ALIGNED((long)omap_domain->pgtable, IOPGD_TABLE_SIZE));
1185 clean_dcache_area(omap_domain->pgtable, IOPGD_TABLE_SIZE);
1186 spin_lock_init(&omap_domain->lock);
1188 domain->priv = omap_domain;
1190 domain->geometry.aperture_start = 0;
1191 domain->geometry.aperture_end = (1ULL << 32) - 1;
1192 domain->geometry.force_aperture = true;
1202 static void omap_iommu_domain_destroy(struct iommu_domain *domain)
1204 struct omap_iommu_domain *omap_domain = domain->priv;
1206 domain->priv = NULL;
1209 * An iommu device is still attached
1210 * (currently, only one device can be attached) ?
1212 if (omap_domain->iommu_dev)
1213 _omap_iommu_detach_dev(omap_domain, omap_domain->dev);
1215 kfree(omap_domain->pgtable);
1219 static phys_addr_t omap_iommu_iova_to_phys(struct iommu_domain *domain,
1222 struct omap_iommu_domain *omap_domain = domain->priv;
1223 struct omap_iommu *oiommu = omap_domain->iommu_dev;
1224 struct device *dev = oiommu->dev;
1226 phys_addr_t ret = 0;
1228 iopgtable_lookup_entry(oiommu, da, &pgd, &pte);
1231 if (iopte_is_small(*pte))
1232 ret = omap_iommu_translate(*pte, da, IOPTE_MASK);
1233 else if (iopte_is_large(*pte))
1234 ret = omap_iommu_translate(*pte, da, IOLARGE_MASK);
1236 dev_err(dev, "bogus pte 0x%x, da 0x%llx", *pte,
1237 (unsigned long long)da);
1239 if (iopgd_is_section(*pgd))
1240 ret = omap_iommu_translate(*pgd, da, IOSECTION_MASK);
1241 else if (iopgd_is_super(*pgd))
1242 ret = omap_iommu_translate(*pgd, da, IOSUPER_MASK);
1244 dev_err(dev, "bogus pgd 0x%x, da 0x%llx", *pgd,
1245 (unsigned long long)da);
1251 static int omap_iommu_add_device(struct device *dev)
1253 struct omap_iommu_arch_data *arch_data;
1254 struct device_node *np;
1257 * Allocate the archdata iommu structure for DT-based devices.
1259 * TODO: Simplify this when removing non-DT support completely from the
1265 np = of_parse_phandle(dev->of_node, "iommus", 0);
1269 arch_data = kzalloc(sizeof(*arch_data), GFP_KERNEL);
1275 arch_data->name = kstrdup(dev_name(dev), GFP_KERNEL);
1276 dev->archdata.iommu = arch_data;
1283 static void omap_iommu_remove_device(struct device *dev)
1285 struct omap_iommu_arch_data *arch_data = dev->archdata.iommu;
1287 if (!dev->of_node || !arch_data)
1290 kfree(arch_data->name);
1294 static struct iommu_ops omap_iommu_ops = {
1295 .domain_init = omap_iommu_domain_init,
1296 .domain_destroy = omap_iommu_domain_destroy,
1297 .attach_dev = omap_iommu_attach_dev,
1298 .detach_dev = omap_iommu_detach_dev,
1299 .map = omap_iommu_map,
1300 .unmap = omap_iommu_unmap,
1301 .iova_to_phys = omap_iommu_iova_to_phys,
1302 .add_device = omap_iommu_add_device,
1303 .remove_device = omap_iommu_remove_device,
1304 .pgsize_bitmap = OMAP_IOMMU_PGSIZES,
1307 static int __init omap_iommu_init(void)
1309 struct kmem_cache *p;
1310 const unsigned long flags = SLAB_HWCACHE_ALIGN;
1311 size_t align = 1 << 10; /* L2 pagetable alignement */
1313 p = kmem_cache_create("iopte_cache", IOPTE_TABLE_SIZE, align, flags,
1319 bus_set_iommu(&platform_bus_type, &omap_iommu_ops);
1321 return platform_driver_register(&omap_iommu_driver);
1323 /* must be ready before omap3isp is probed */
1324 subsys_initcall(omap_iommu_init);
1326 static void __exit omap_iommu_exit(void)
1328 kmem_cache_destroy(iopte_cachep);
1330 platform_driver_unregister(&omap_iommu_driver);
1332 module_exit(omap_iommu_exit);
1334 MODULE_DESCRIPTION("omap iommu: tlb and pagetable primitives");
1335 MODULE_ALIAS("platform:omap-iommu");
1336 MODULE_AUTHOR("Hiroshi DOYU, Paul Mundt and Toshihiro Kobayashi");
1337 MODULE_LICENSE("GPL v2");