8 select MULTI_IRQ_HANDLER
16 select MULTI_IRQ_HANDLER
21 select GENERIC_IRQ_CHIP
26 select MULTI_IRQ_HANDLER
30 default 4 if ARCH_S5PV210
34 The maximum number of VICs available in the system, for
39 select GENERIC_IRQ_CHIP
41 select MULTI_IRQ_HANDLER
46 select GENERIC_IRQ_CHIP
48 select MULTI_IRQ_HANDLER
54 select GENERIC_IRQ_CHIP
63 select GENERIC_IRQ_CHIP
66 config CLPS711X_IRQCHIP
68 depends on ARCH_CLPS711X
70 select MULTI_IRQ_HANDLER
81 select MULTI_IRQ_HANDLER
83 config RENESAS_INTC_IRQPIN
94 select GENERIC_IRQ_CHIP
96 config VERSATILE_FPGA_IRQ
100 config VERSATILE_FPGA_IRQ_NR
103 depends on VERSATILE_FPGA_IRQ
112 Support for a CROSSBAR ip that preceeds the main interrupt controller.
113 The primary irqchip invokes the crossbar's callback which inturn allocates
114 a free irq and configures the IP. Thus the peripheral interrupts are
115 routed to one of the free irqchip interrupt lines.