8 select MULTI_IRQ_HANDLER
16 select MULTI_IRQ_HANDLER
21 select GENERIC_IRQ_CHIP
26 select MULTI_IRQ_HANDLER
30 default 4 if ARCH_S5PV210
31 default 3 if ARCH_S5PC100
35 The maximum number of VICs available in the system, for
40 select GENERIC_IRQ_CHIP
42 select MULTI_IRQ_HANDLER
47 select GENERIC_IRQ_CHIP
49 select MULTI_IRQ_HANDLER
55 select GENERIC_IRQ_CHIP
64 select GENERIC_IRQ_CHIP
67 config CLPS711X_IRQCHIP
69 depends on ARCH_CLPS711X
71 select MULTI_IRQ_HANDLER
82 select MULTI_IRQ_HANDLER
84 config RENESAS_INTC_IRQPIN
95 select GENERIC_IRQ_CHIP
97 config VERSATILE_FPGA_IRQ
101 config VERSATILE_FPGA_IRQ_NR
104 depends on VERSATILE_FPGA_IRQ
113 Support for a CROSSBAR ip that preceeds the main interrupt controller.
114 The primary irqchip invokes the crossbar's callback which inturn allocates
115 a free irq and configures the IP. Thus the peripheral interrupts are
116 routed to one of the free irqchip interrupt lines.