8 select IRQ_DOMAIN_HIERARCHY
9 select MULTI_IRQ_HANDLER
14 depends on PCI && PCI_MSI
15 select PCI_MSI_IRQ_DOMAIN
23 select MULTI_IRQ_HANDLER
24 select IRQ_DOMAIN_HIERARCHY
28 select PCI_MSI_IRQ_DOMAIN
33 select IRQ_DOMAIN_HIERARCHY
34 select GENERIC_IRQ_CHIP
39 select MULTI_IRQ_HANDLER
43 default 4 if ARCH_S5PV210
47 The maximum number of VICs available in the system, for
52 select GENERIC_IRQ_CHIP
54 select MULTI_IRQ_HANDLER
59 select GENERIC_IRQ_CHIP
61 select MULTI_IRQ_HANDLER
66 select GENERIC_IRQ_CHIP
71 select GENERIC_IRQ_CHIP
76 select GENERIC_IRQ_CHIP
81 select GENERIC_IRQ_CHIP
86 select GENERIC_IRQ_CHIP
91 select GENERIC_IRQ_CHIP
94 config CLPS711X_IRQCHIP
96 depends on ARCH_CLPS711X
98 select MULTI_IRQ_HANDLER
108 select GENERIC_IRQ_CHIP
114 select MULTI_IRQ_HANDLER
116 config RENESAS_INTC_IRQPIN
129 Enables SysCfg Controlled IRQs on STi based platforms.
134 select GENERIC_IRQ_CHIP
136 config VERSATILE_FPGA_IRQ
140 config VERSATILE_FPGA_IRQ_NR
143 depends on VERSATILE_FPGA_IRQ
152 Support for a CROSSBAR ip that precedes the main interrupt controller.
153 The primary irqchip invokes the crossbar's callback which inturn allocates
154 a free irq and configures the IP. Thus the peripheral interrupts are
155 routed to one of the free irqchip interrupt lines.
158 tristate "Keystone 2 IRQ controller IP"
159 depends on ARCH_KEYSTONE
161 Support for Texas Instruments Keystone 2 IRQ controller IP which
162 is part of the Keystone 2 IPC mechanism
170 depends on MACH_INGENIC
173 config RENESAS_H8300H_INTC
177 config RENESAS_H8S_INTC