2 * avm_fritz.c low level stuff for AVM FRITZ!CARD PCI ISDN cards
3 * Thanks to AVM, Berlin for informations
5 * Author Karsten Keil <keil@isdn4linux.de>
7 * Copyright 2009 by Karsten Keil <keil@isdn4linux.de>
9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License version 2 as
11 * published by the Free Software Foundation.
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software
20 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
23 #include <linux/interrupt.h>
24 #include <linux/module.h>
25 #include <linux/pci.h>
26 #include <linux/delay.h>
27 #include <linux/mISDNhw.h>
28 #include <linux/slab.h>
29 #include <asm/unaligned.h>
33 #define AVMFRITZ_REV "2.3"
44 #define HDLC_STATUS 0x4
45 #define CHIP_WINDOW 0x10
47 #define CHIP_INDEX 0x4
48 #define AVM_HDLC_1 0x00
49 #define AVM_HDLC_2 0x01
50 #define AVM_ISAC_FIFO 0x02
51 #define AVM_ISAC_REG_LOW 0x04
52 #define AVM_ISAC_REG_HIGH 0x06
54 #define AVM_STATUS0_IRQ_ISAC 0x01
55 #define AVM_STATUS0_IRQ_HDLC 0x02
56 #define AVM_STATUS0_IRQ_TIMER 0x04
57 #define AVM_STATUS0_IRQ_MASK 0x07
59 #define AVM_STATUS0_RESET 0x01
60 #define AVM_STATUS0_DIS_TIMER 0x02
61 #define AVM_STATUS0_RES_TIMER 0x04
62 #define AVM_STATUS0_ENA_IRQ 0x08
63 #define AVM_STATUS0_TESTBIT 0x10
65 #define AVM_STATUS1_INT_SEL 0x0f
66 #define AVM_STATUS1_ENA_IOM 0x80
68 #define HDLC_MODE_ITF_FLG 0x01
69 #define HDLC_MODE_TRANS 0x02
70 #define HDLC_MODE_CCR_7 0x04
71 #define HDLC_MODE_CCR_16 0x08
72 #define HDLC_FIFO_SIZE_128 0x20
73 #define HDLC_MODE_TESTLOOP 0x80
75 #define HDLC_INT_XPR 0x80
76 #define HDLC_INT_XDU 0x40
77 #define HDLC_INT_RPR 0x20
78 #define HDLC_INT_MASK 0xE0
80 #define HDLC_STAT_RME 0x01
81 #define HDLC_STAT_RDO 0x10
82 #define HDLC_STAT_CRCVFRRAB 0x0E
83 #define HDLC_STAT_CRCVFR 0x06
84 #define HDLC_STAT_RML_MASK_V1 0x3f00
85 #define HDLC_STAT_RML_MASK_V2 0x7f00
87 #define HDLC_CMD_XRS 0x80
88 #define HDLC_CMD_XME 0x01
89 #define HDLC_CMD_RRS 0x20
90 #define HDLC_CMD_XML_MASK 0x3f00
92 #define HDLC_FIFO_SIZE_V1 32
93 #define HDLC_FIFO_SIZE_V2 128
97 #define AVM_HDLC_FIFO_1 0x10
98 #define AVM_HDLC_FIFO_2 0x18
100 #define AVM_HDLC_STATUS_1 0x14
101 #define AVM_HDLC_STATUS_2 0x1c
103 #define AVM_ISACX_INDEX 0x04
104 #define AVM_ISACX_DATA 0x08
109 struct hdlc_stat_reg {
121 } __attribute__((packed));
126 struct hdlc_stat_reg sr;
132 struct list_head list;
133 struct pci_dev *pdev;
134 char name[MISDN_MAX_IDLEN];
140 spinlock_t lock; /* hw lock */
142 struct hdlc_hw hdlc[2];
143 struct bchannel bch[2];
144 char log[LOG_SIZE + 1];
147 static LIST_HEAD(Cards);
148 static DEFINE_RWLOCK(card_lock); /* protect Cards */
151 _set_debug(struct fritzcard *card)
153 card->isac.dch.debug = debug;
154 card->bch[0].debug = debug;
155 card->bch[1].debug = debug;
159 set_debug(const char *val, struct kernel_param *kp)
162 struct fritzcard *card;
164 ret = param_set_uint(val, kp);
166 read_lock(&card_lock);
167 list_for_each_entry(card, &Cards, list)
169 read_unlock(&card_lock);
174 MODULE_AUTHOR("Karsten Keil");
175 MODULE_LICENSE("GPL v2");
176 MODULE_VERSION(AVMFRITZ_REV);
177 module_param_call(debug, set_debug, param_get_uint, &debug, S_IRUGO | S_IWUSR);
178 MODULE_PARM_DESC(debug, "avmfritz debug mask");
180 /* Interface functions */
183 ReadISAC_V1(void *p, u8 offset)
185 struct fritzcard *fc = p;
186 u8 idx = (offset > 0x2f) ? AVM_ISAC_REG_HIGH : AVM_ISAC_REG_LOW;
188 outb(idx, fc->addr + CHIP_INDEX);
189 return inb(fc->addr + CHIP_WINDOW + (offset & 0xf));
193 WriteISAC_V1(void *p, u8 offset, u8 value)
195 struct fritzcard *fc = p;
196 u8 idx = (offset > 0x2f) ? AVM_ISAC_REG_HIGH : AVM_ISAC_REG_LOW;
198 outb(idx, fc->addr + CHIP_INDEX);
199 outb(value, fc->addr + CHIP_WINDOW + (offset & 0xf));
203 ReadFiFoISAC_V1(void *p, u8 off, u8 *data, int size)
205 struct fritzcard *fc = p;
207 outb(AVM_ISAC_FIFO, fc->addr + CHIP_INDEX);
208 insb(fc->addr + CHIP_WINDOW, data, size);
212 WriteFiFoISAC_V1(void *p, u8 off, u8 *data, int size)
214 struct fritzcard *fc = p;
216 outb(AVM_ISAC_FIFO, fc->addr + CHIP_INDEX);
217 outsb(fc->addr + CHIP_WINDOW, data, size);
221 ReadISAC_V2(void *p, u8 offset)
223 struct fritzcard *fc = p;
225 outl(offset, fc->addr + AVM_ISACX_INDEX);
226 return 0xff & inl(fc->addr + AVM_ISACX_DATA);
230 WriteISAC_V2(void *p, u8 offset, u8 value)
232 struct fritzcard *fc = p;
234 outl(offset, fc->addr + AVM_ISACX_INDEX);
235 outl(value, fc->addr + AVM_ISACX_DATA);
239 ReadFiFoISAC_V2(void *p, u8 off, u8 *data, int size)
241 struct fritzcard *fc = p;
244 outl(off, fc->addr + AVM_ISACX_INDEX);
245 for (i = 0; i < size; i++)
246 data[i] = 0xff & inl(fc->addr + AVM_ISACX_DATA);
250 WriteFiFoISAC_V2(void *p, u8 off, u8 *data, int size)
252 struct fritzcard *fc = p;
255 outl(off, fc->addr + AVM_ISACX_INDEX);
256 for (i = 0; i < size; i++)
257 outl(data[i], fc->addr + AVM_ISACX_DATA);
260 static struct bchannel *
261 Sel_BCS(struct fritzcard *fc, u32 channel)
263 if (test_bit(FLG_ACTIVE, &fc->bch[0].Flags) &&
264 (fc->bch[0].nr & channel))
266 else if (test_bit(FLG_ACTIVE, &fc->bch[1].Flags) &&
267 (fc->bch[1].nr & channel))
274 __write_ctrl_pci(struct fritzcard *fc, struct hdlc_hw *hdlc, u32 channel) {
275 u32 idx = channel == 2 ? AVM_HDLC_2 : AVM_HDLC_1;
277 outl(idx, fc->addr + CHIP_INDEX);
278 outl(hdlc->ctrl.ctrl, fc->addr + CHIP_WINDOW + HDLC_STATUS);
282 __write_ctrl_pciv2(struct fritzcard *fc, struct hdlc_hw *hdlc, u32 channel) {
283 outl(hdlc->ctrl.ctrl, fc->addr + (channel == 2 ? AVM_HDLC_STATUS_2 :
288 write_ctrl(struct bchannel *bch, int which) {
289 struct fritzcard *fc = bch->hw;
290 struct hdlc_hw *hdlc;
292 hdlc = &fc->hdlc[(bch->nr - 1) & 1];
293 pr_debug("%s: hdlc %c wr%x ctrl %x\n", fc->name, '@' + bch->nr,
294 which, hdlc->ctrl.ctrl);
296 case AVM_FRITZ_PCIV2:
297 __write_ctrl_pciv2(fc, hdlc, bch->nr);
300 __write_ctrl_pci(fc, hdlc, bch->nr);
307 __read_status_pci(u_long addr, u32 channel)
309 outl(channel == 2 ? AVM_HDLC_2 : AVM_HDLC_1, addr + CHIP_INDEX);
310 return inl(addr + CHIP_WINDOW + HDLC_STATUS);
314 __read_status_pciv2(u_long addr, u32 channel)
316 return inl(addr + (channel == 2 ? AVM_HDLC_STATUS_2 :
322 read_status(struct fritzcard *fc, u32 channel)
325 case AVM_FRITZ_PCIV2:
326 return __read_status_pciv2(fc->addr, channel);
328 return __read_status_pci(fc->addr, channel);
335 enable_hwirq(struct fritzcard *fc)
337 fc->ctrlreg |= AVM_STATUS0_ENA_IRQ;
338 outb(fc->ctrlreg, fc->addr + 2);
342 disable_hwirq(struct fritzcard *fc)
344 fc->ctrlreg &= ~AVM_STATUS0_ENA_IRQ;
345 outb(fc->ctrlreg, fc->addr + 2);
349 modehdlc(struct bchannel *bch, int protocol)
351 struct fritzcard *fc = bch->hw;
352 struct hdlc_hw *hdlc;
355 hdlc = &fc->hdlc[(bch->nr - 1) & 1];
356 pr_debug("%s: hdlc %c protocol %x-->%x ch %d\n", fc->name,
357 '@' + bch->nr, bch->state, protocol, bch->nr);
359 mode = (fc->type == AVM_FRITZ_PCIV2) ? HDLC_FIFO_SIZE_128 : 0;
362 case -1: /* used for init */
365 if (bch->state == ISDN_P_NONE)
367 hdlc->ctrl.sr.cmd = HDLC_CMD_XRS | HDLC_CMD_RRS;
368 hdlc->ctrl.sr.mode = mode | HDLC_MODE_TRANS;
370 bch->state = ISDN_P_NONE;
371 test_and_clear_bit(FLG_HDLC, &bch->Flags);
372 test_and_clear_bit(FLG_TRANSPARENT, &bch->Flags);
375 bch->state = protocol;
376 hdlc->ctrl.sr.cmd = HDLC_CMD_XRS | HDLC_CMD_RRS;
377 hdlc->ctrl.sr.mode = mode | HDLC_MODE_TRANS;
379 hdlc->ctrl.sr.cmd = HDLC_CMD_XRS;
381 hdlc->ctrl.sr.cmd = 0;
382 test_and_set_bit(FLG_TRANSPARENT, &bch->Flags);
385 bch->state = protocol;
386 hdlc->ctrl.sr.cmd = HDLC_CMD_XRS | HDLC_CMD_RRS;
387 hdlc->ctrl.sr.mode = mode | HDLC_MODE_ITF_FLG;
389 hdlc->ctrl.sr.cmd = HDLC_CMD_XRS;
391 hdlc->ctrl.sr.cmd = 0;
392 test_and_set_bit(FLG_HDLC, &bch->Flags);
395 pr_info("%s: protocol not known %x\n", fc->name, protocol);
402 hdlc_empty_fifo(struct bchannel *bch, int count)
408 struct fritzcard *fc = bch->hw;
410 pr_debug("%s: %s %d\n", fc->name, __func__, count);
411 if (test_bit(FLG_RX_OFF, &bch->Flags)) {
413 bch->dropcnt += count;
415 cnt = bchannel_get_rxbuf(bch, count);
417 pr_warning("%s.B%d: No bufferspace for %d bytes\n",
418 fc->name, bch->nr, count);
421 p = skb_put(bch->rx_skb, count);
424 if (fc->type == AVM_FRITZ_PCIV2)
425 addr = fc->addr + (bch->nr == 2 ?
426 AVM_HDLC_FIFO_2 : AVM_HDLC_FIFO_1);
428 addr = fc->addr + CHIP_WINDOW;
429 outl(bch->nr == 2 ? AVM_HDLC_2 : AVM_HDLC_1, fc->addr);
432 while (cnt < count) {
433 val = le32_to_cpu(inl(addr));
435 put_unaligned(val, ptr);
440 if (p && (debug & DEBUG_HW_BFIFO)) {
441 snprintf(fc->log, LOG_SIZE, "B%1d-recv %s %d ",
442 bch->nr, fc->name, count);
443 print_hex_dump_bytes(fc->log, DUMP_PREFIX_OFFSET, p, count);
448 hdlc_fill_fifo(struct bchannel *bch)
450 struct fritzcard *fc = bch->hw;
451 struct hdlc_hw *hdlc;
452 int count, fs, cnt = 0, idx;
453 bool fillempty = false;
457 idx = (bch->nr - 1) & 1;
458 hdlc = &fc->hdlc[idx];
459 fs = (fc->type == AVM_FRITZ_PCIV2) ?
460 HDLC_FIFO_SIZE_V2 : HDLC_FIFO_SIZE_V1;
462 if (!test_bit(FLG_TX_EMPTY, &bch->Flags))
468 count = bch->tx_skb->len - bch->tx_idx;
471 p = bch->tx_skb->data + bch->tx_idx;
473 hdlc->ctrl.sr.cmd &= ~HDLC_CMD_XME;
477 if (test_bit(FLG_HDLC, &bch->Flags))
478 hdlc->ctrl.sr.cmd |= HDLC_CMD_XME;
482 pr_debug("%s.B%d: %d/%d/%d", fc->name, bch->nr, count,
483 bch->tx_idx, bch->tx_skb->len);
484 bch->tx_idx += count;
486 pr_debug("%s.B%d: fillempty %d\n", fc->name, bch->nr, count);
488 hdlc->ctrl.sr.xml = ((count == fs) ? 0 : count);
489 if (fc->type == AVM_FRITZ_PCIV2) {
490 __write_ctrl_pciv2(fc, hdlc, bch->nr);
491 addr = fc->addr + (bch->nr == 2 ?
492 AVM_HDLC_FIFO_2 : AVM_HDLC_FIFO_1);
494 __write_ctrl_pci(fc, hdlc, bch->nr);
495 addr = fc->addr + CHIP_WINDOW;
498 while (cnt < count) {
499 /* all bytes the same - no worry about endian */
504 while (cnt < count) {
505 val = get_unaligned(ptr);
506 outl(cpu_to_le32(val), addr);
511 if ((debug & DEBUG_HW_BFIFO) && !fillempty) {
512 snprintf(fc->log, LOG_SIZE, "B%1d-send %s %d ",
513 bch->nr, fc->name, count);
514 print_hex_dump_bytes(fc->log, DUMP_PREFIX_OFFSET, p, count);
519 HDLC_irq_xpr(struct bchannel *bch)
521 if (bch->tx_skb && bch->tx_idx < bch->tx_skb->len) {
525 dev_kfree_skb(bch->tx_skb);
526 if (get_next_bframe(bch)) {
528 test_and_clear_bit(FLG_TX_EMPTY, &bch->Flags);
529 } else if (test_bit(FLG_TX_EMPTY, &bch->Flags)) {
536 HDLC_irq(struct bchannel *bch, u32 stat)
538 struct fritzcard *fc = bch->hw;
541 struct hdlc_hw *hdlc;
543 hdlc = &fc->hdlc[(bch->nr - 1) & 1];
544 pr_debug("%s: ch%d stat %#x\n", fc->name, bch->nr, stat);
545 if (fc->type == AVM_FRITZ_PCIV2) {
546 rmlMask = HDLC_STAT_RML_MASK_V2;
547 fs = HDLC_FIFO_SIZE_V2;
549 rmlMask = HDLC_STAT_RML_MASK_V1;
550 fs = HDLC_FIFO_SIZE_V1;
552 if (stat & HDLC_INT_RPR) {
553 if (stat & HDLC_STAT_RDO) {
554 pr_warning("%s: ch%d stat %x RDO\n",
555 fc->name, bch->nr, stat);
556 hdlc->ctrl.sr.xml = 0;
557 hdlc->ctrl.sr.cmd |= HDLC_CMD_RRS;
559 hdlc->ctrl.sr.cmd &= ~HDLC_CMD_RRS;
562 skb_trim(bch->rx_skb, 0);
564 len = (stat & rmlMask) >> 8;
567 hdlc_empty_fifo(bch, len);
570 if (test_bit(FLG_TRANSPARENT, &bch->Flags)) {
571 recv_Bchannel(bch, 0, false);
572 } else if (stat & HDLC_STAT_RME) {
573 if ((stat & HDLC_STAT_CRCVFRRAB) ==
575 recv_Bchannel(bch, 0, false);
577 pr_warning("%s: got invalid frame\n",
579 skb_trim(bch->rx_skb, 0);
585 if (stat & HDLC_INT_XDU) {
586 /* Here we lost an TX interrupt, so
587 * restart transmitting the whole frame on HDLC
588 * in transparent mode we send the next data
590 pr_warning("%s: ch%d stat %x XDU %s\n", fc->name, bch->nr,
591 stat, bch->tx_skb ? "tx_skb" : "no tx_skb");
592 if (bch->tx_skb && bch->tx_skb->len) {
593 if (!test_bit(FLG_TRANSPARENT, &bch->Flags))
595 } else if (test_bit(FLG_FILLEMPTY, &bch->Flags)) {
596 test_and_set_bit(FLG_TX_EMPTY, &bch->Flags);
598 hdlc->ctrl.sr.xml = 0;
599 hdlc->ctrl.sr.cmd |= HDLC_CMD_XRS;
601 hdlc->ctrl.sr.cmd &= ~HDLC_CMD_XRS;
604 } else if (stat & HDLC_INT_XPR)
609 HDLC_irq_main(struct fritzcard *fc)
612 struct bchannel *bch;
614 stat = read_status(fc, 1);
615 if (stat & HDLC_INT_MASK) {
616 bch = Sel_BCS(fc, 1);
620 pr_debug("%s: spurious ch1 IRQ\n", fc->name);
622 stat = read_status(fc, 2);
623 if (stat & HDLC_INT_MASK) {
624 bch = Sel_BCS(fc, 2);
628 pr_debug("%s: spurious ch2 IRQ\n", fc->name);
633 avm_fritz_interrupt(int intno, void *dev_id)
635 struct fritzcard *fc = dev_id;
639 spin_lock(&fc->lock);
640 sval = inb(fc->addr + 2);
641 pr_debug("%s: irq stat0 %x\n", fc->name, sval);
642 if ((sval & AVM_STATUS0_IRQ_MASK) == AVM_STATUS0_IRQ_MASK) {
643 /* shared IRQ from other HW */
644 spin_unlock(&fc->lock);
649 if (!(sval & AVM_STATUS0_IRQ_ISAC)) {
650 val = ReadISAC_V1(fc, ISAC_ISTA);
651 mISDNisac_irq(&fc->isac, val);
653 if (!(sval & AVM_STATUS0_IRQ_HDLC))
655 spin_unlock(&fc->lock);
660 avm_fritzv2_interrupt(int intno, void *dev_id)
662 struct fritzcard *fc = dev_id;
666 spin_lock(&fc->lock);
667 sval = inb(fc->addr + 2);
668 pr_debug("%s: irq stat0 %x\n", fc->name, sval);
669 if (!(sval & AVM_STATUS0_IRQ_MASK)) {
670 /* shared IRQ from other HW */
671 spin_unlock(&fc->lock);
676 if (sval & AVM_STATUS0_IRQ_HDLC)
678 if (sval & AVM_STATUS0_IRQ_ISAC) {
679 val = ReadISAC_V2(fc, ISACX_ISTA);
680 mISDNisac_irq(&fc->isac, val);
682 if (sval & AVM_STATUS0_IRQ_TIMER) {
683 pr_debug("%s: timer irq\n", fc->name);
684 outb(fc->ctrlreg | AVM_STATUS0_RES_TIMER, fc->addr + 2);
686 outb(fc->ctrlreg, fc->addr + 2);
688 spin_unlock(&fc->lock);
693 avm_l2l1B(struct mISDNchannel *ch, struct sk_buff *skb)
695 struct bchannel *bch = container_of(ch, struct bchannel, ch);
696 struct fritzcard *fc = bch->hw;
698 struct mISDNhead *hh = mISDN_HEAD_P(skb);
703 spin_lock_irqsave(&fc->lock, flags);
704 ret = bchannel_senddata(bch, skb);
705 if (ret > 0) { /* direct TX */
709 spin_unlock_irqrestore(&fc->lock, flags);
711 case PH_ACTIVATE_REQ:
712 spin_lock_irqsave(&fc->lock, flags);
713 if (!test_and_set_bit(FLG_ACTIVE, &bch->Flags))
714 ret = modehdlc(bch, ch->protocol);
717 spin_unlock_irqrestore(&fc->lock, flags);
719 _queue_data(ch, PH_ACTIVATE_IND, MISDN_ID_ANY, 0,
722 case PH_DEACTIVATE_REQ:
723 spin_lock_irqsave(&fc->lock, flags);
724 mISDN_clear_bchannel(bch);
725 modehdlc(bch, ISDN_P_NONE);
726 spin_unlock_irqrestore(&fc->lock, flags);
727 _queue_data(ch, PH_DEACTIVATE_IND, MISDN_ID_ANY, 0,
738 inithdlc(struct fritzcard *fc)
740 modehdlc(&fc->bch[0], -1);
741 modehdlc(&fc->bch[1], -1);
745 clear_pending_hdlc_ints(struct fritzcard *fc)
749 val = read_status(fc, 1);
750 pr_debug("%s: HDLC 1 STA %x\n", fc->name, val);
751 val = read_status(fc, 2);
752 pr_debug("%s: HDLC 2 STA %x\n", fc->name, val);
756 reset_avm(struct fritzcard *fc)
760 fc->ctrlreg = AVM_STATUS0_RESET | AVM_STATUS0_DIS_TIMER;
762 case AVM_FRITZ_PCIV2:
763 fc->ctrlreg = AVM_STATUS0_RESET;
766 if (debug & DEBUG_HW)
767 pr_notice("%s: reset\n", fc->name);
772 fc->ctrlreg = AVM_STATUS0_DIS_TIMER | AVM_STATUS0_RES_TIMER;
774 outb(AVM_STATUS1_ENA_IOM, fc->addr + 3);
776 case AVM_FRITZ_PCIV2:
782 if (debug & DEBUG_HW)
783 pr_notice("%s: S0/S1 %x/%x\n", fc->name,
784 inb(fc->addr + 2), inb(fc->addr + 3));
788 init_card(struct fritzcard *fc)
793 reset_avm(fc); /* disable IRQ */
794 if (fc->type == AVM_FRITZ_PCIV2)
795 ret = request_irq(fc->irq, avm_fritzv2_interrupt,
796 IRQF_SHARED, fc->name, fc);
798 ret = request_irq(fc->irq, avm_fritz_interrupt,
799 IRQF_SHARED, fc->name, fc);
801 pr_info("%s: couldn't get interrupt %d\n",
806 spin_lock_irqsave(&fc->lock, flags);
807 ret = fc->isac.init(&fc->isac);
809 spin_unlock_irqrestore(&fc->lock, flags);
810 pr_info("%s: ISAC init failed with %d\n",
814 clear_pending_hdlc_ints(fc);
817 /* RESET Receiver and Transmitter */
818 if (fc->type == AVM_FRITZ_PCIV2) {
819 WriteISAC_V2(fc, ISACX_MASK, 0);
820 WriteISAC_V2(fc, ISACX_CMDRD, 0x41);
822 WriteISAC_V1(fc, ISAC_MASK, 0);
823 WriteISAC_V1(fc, ISAC_CMDR, 0x41);
825 spin_unlock_irqrestore(&fc->lock, flags);
827 msleep_interruptible(10);
828 if (debug & DEBUG_HW)
829 pr_notice("%s: IRQ %d count %d\n", fc->name,
830 fc->irq, fc->irqcnt);
832 pr_info("%s: IRQ(%d) getting no IRQs during init %d\n",
833 fc->name, fc->irq, 3 - cnt);
838 free_irq(fc->irq, fc);
843 channel_bctrl(struct bchannel *bch, struct mISDN_ctrl_req *cq)
845 return mISDN_ctrl_bchannel(bch, cq);
849 avm_bctrl(struct mISDNchannel *ch, u32 cmd, void *arg)
851 struct bchannel *bch = container_of(ch, struct bchannel, ch);
852 struct fritzcard *fc = bch->hw;
856 pr_debug("%s: %s cmd:%x %p\n", fc->name, __func__, cmd, arg);
859 test_and_clear_bit(FLG_OPEN, &bch->Flags);
860 cancel_work_sync(&bch->workq);
861 spin_lock_irqsave(&fc->lock, flags);
862 mISDN_clear_bchannel(bch);
863 modehdlc(bch, ISDN_P_NONE);
864 spin_unlock_irqrestore(&fc->lock, flags);
865 ch->protocol = ISDN_P_NONE;
867 module_put(THIS_MODULE);
870 case CONTROL_CHANNEL:
871 ret = channel_bctrl(bch, arg);
874 pr_info("%s: %s unknown prim(%x)\n", fc->name, __func__, cmd);
880 channel_ctrl(struct fritzcard *fc, struct mISDN_ctrl_req *cq)
885 case MISDN_CTRL_GETOP:
886 cq->op = MISDN_CTRL_LOOP | MISDN_CTRL_L1_TIMER3;
888 case MISDN_CTRL_LOOP:
889 /* cq->channel: 0 disable, 1 B1 loop 2 B2 loop, 3 both */
890 if (cq->channel < 0 || cq->channel > 3) {
894 ret = fc->isac.ctrl(&fc->isac, HW_TESTLOOP, cq->channel);
896 case MISDN_CTRL_L1_TIMER3:
897 ret = fc->isac.ctrl(&fc->isac, HW_TIMER3_VALUE, cq->p1);
900 pr_info("%s: %s unknown Op %x\n", fc->name, __func__, cq->op);
908 open_bchannel(struct fritzcard *fc, struct channel_req *rq)
910 struct bchannel *bch;
912 if (rq->adr.channel == 0 || rq->adr.channel > 2)
914 if (rq->protocol == ISDN_P_NONE)
916 bch = &fc->bch[rq->adr.channel - 1];
917 if (test_and_set_bit(FLG_OPEN, &bch->Flags))
918 return -EBUSY; /* b-channel can be only open once */
919 bch->ch.protocol = rq->protocol;
925 * device control function
928 avm_dctrl(struct mISDNchannel *ch, u32 cmd, void *arg)
930 struct mISDNdevice *dev = container_of(ch, struct mISDNdevice, D);
931 struct dchannel *dch = container_of(dev, struct dchannel, dev);
932 struct fritzcard *fc = dch->hw;
933 struct channel_req *rq;
936 pr_debug("%s: %s cmd:%x %p\n", fc->name, __func__, cmd, arg);
940 if (rq->protocol == ISDN_P_TE_S0)
941 err = fc->isac.open(&fc->isac, rq);
943 err = open_bchannel(fc, rq);
946 if (!try_module_get(THIS_MODULE))
947 pr_info("%s: cannot get module\n", fc->name);
950 pr_debug("%s: dev(%d) close from %p\n", fc->name, dch->dev.id,
951 __builtin_return_address(0));
952 module_put(THIS_MODULE);
954 case CONTROL_CHANNEL:
955 err = channel_ctrl(fc, arg);
958 pr_debug("%s: %s unknown command %x\n",
959 fc->name, __func__, cmd);
966 setup_fritz(struct fritzcard *fc)
970 if (!request_region(fc->addr, 32, fc->name)) {
971 pr_info("%s: AVM config port %x-%x already in use\n",
972 fc->name, fc->addr, fc->addr + 31);
978 outl(AVM_HDLC_1, fc->addr + CHIP_INDEX);
979 ver = inl(fc->addr + CHIP_WINDOW + HDLC_STATUS) >> 24;
980 if (debug & DEBUG_HW) {
981 pr_notice("%s: PCI stat %#x\n", fc->name, val);
982 pr_notice("%s: PCI Class %X Rev %d\n", fc->name,
983 val & 0xff, (val >> 8) & 0xff);
984 pr_notice("%s: HDLC version %x\n", fc->name, ver & 0xf);
986 ASSIGN_FUNC(V1, ISAC, fc->isac);
987 fc->isac.type = IPAC_TYPE_ISAC;
989 case AVM_FRITZ_PCIV2:
991 ver = inl(fc->addr + AVM_HDLC_STATUS_1) >> 24;
992 if (debug & DEBUG_HW) {
993 pr_notice("%s: PCI V2 stat %#x\n", fc->name, val);
994 pr_notice("%s: PCI V2 Class %X Rev %d\n", fc->name,
995 val & 0xff, (val >> 8) & 0xff);
996 pr_notice("%s: HDLC version %x\n", fc->name, ver & 0xf);
998 ASSIGN_FUNC(V2, ISAC, fc->isac);
999 fc->isac.type = IPAC_TYPE_ISACX;
1002 release_region(fc->addr, 32);
1003 pr_info("%s: AVM unknown type %d\n", fc->name, fc->type);
1006 pr_notice("%s: %s config irq:%d base:0x%X\n", fc->name,
1007 (fc->type == AVM_FRITZ_PCI) ? "AVM Fritz!CARD PCI" :
1008 "AVM Fritz!CARD PCIv2", fc->irq, fc->addr);
1013 release_card(struct fritzcard *card)
1017 disable_hwirq(card);
1018 spin_lock_irqsave(&card->lock, flags);
1019 modehdlc(&card->bch[0], ISDN_P_NONE);
1020 modehdlc(&card->bch[1], ISDN_P_NONE);
1021 spin_unlock_irqrestore(&card->lock, flags);
1022 card->isac.release(&card->isac);
1023 free_irq(card->irq, card);
1024 mISDN_freebchannel(&card->bch[1]);
1025 mISDN_freebchannel(&card->bch[0]);
1026 mISDN_unregister_device(&card->isac.dch.dev);
1027 release_region(card->addr, 32);
1028 pci_disable_device(card->pdev);
1029 pci_set_drvdata(card->pdev, NULL);
1030 write_lock_irqsave(&card_lock, flags);
1031 list_del(&card->list);
1032 write_unlock_irqrestore(&card_lock, flags);
1038 setup_instance(struct fritzcard *card)
1041 unsigned short minsize;
1044 snprintf(card->name, MISDN_MAX_IDLEN - 1, "AVM.%d", AVM_cnt + 1);
1045 write_lock_irqsave(&card_lock, flags);
1046 list_add_tail(&card->list, &Cards);
1047 write_unlock_irqrestore(&card_lock, flags);
1050 card->isac.name = card->name;
1051 spin_lock_init(&card->lock);
1052 card->isac.hwlock = &card->lock;
1053 mISDNisac_init(&card->isac, card);
1055 card->isac.dch.dev.Bprotocols = (1 << (ISDN_P_B_RAW & ISDN_P_B_MASK)) |
1056 (1 << (ISDN_P_B_HDLC & ISDN_P_B_MASK));
1057 card->isac.dch.dev.D.ctrl = avm_dctrl;
1058 for (i = 0; i < 2; i++) {
1059 card->bch[i].nr = i + 1;
1060 set_channelmap(i + 1, card->isac.dch.dev.channelmap);
1061 if (AVM_FRITZ_PCIV2 == card->type)
1062 minsize = HDLC_FIFO_SIZE_V2;
1064 minsize = HDLC_FIFO_SIZE_V1;
1065 mISDN_initbchannel(&card->bch[i], MAX_DATA_MEM, minsize);
1066 card->bch[i].hw = card;
1067 card->bch[i].ch.send = avm_l2l1B;
1068 card->bch[i].ch.ctrl = avm_bctrl;
1069 card->bch[i].ch.nr = i + 1;
1070 list_add(&card->bch[i].ch.list, &card->isac.dch.dev.bchannels);
1072 err = setup_fritz(card);
1075 err = mISDN_register_device(&card->isac.dch.dev, &card->pdev->dev,
1079 err = init_card(card);
1082 pr_notice("AVM %d cards installed DEBUG\n", AVM_cnt);
1085 mISDN_unregister_device(&card->isac.dch.dev);
1087 release_region(card->addr, 32);
1089 card->isac.release(&card->isac);
1090 mISDN_freebchannel(&card->bch[1]);
1091 mISDN_freebchannel(&card->bch[0]);
1092 write_lock_irqsave(&card_lock, flags);
1093 list_del(&card->list);
1094 write_unlock_irqrestore(&card_lock, flags);
1100 fritzpci_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
1103 struct fritzcard *card;
1105 card = kzalloc(sizeof(struct fritzcard), GFP_KERNEL);
1107 pr_info("No kmem for fritzcard\n");
1110 if (pdev->device == PCI_DEVICE_ID_AVM_A1_V2)
1111 card->type = AVM_FRITZ_PCIV2;
1113 card->type = AVM_FRITZ_PCI;
1115 err = pci_enable_device(pdev);
1121 pr_notice("mISDN: found adapter %s at %s\n",
1122 (char *) ent->driver_data, pci_name(pdev));
1124 card->addr = pci_resource_start(pdev, 1);
1125 card->irq = pdev->irq;
1126 pci_set_drvdata(pdev, card);
1127 err = setup_instance(card);
1129 pci_set_drvdata(pdev, NULL);
1134 fritz_remove_pci(struct pci_dev *pdev)
1136 struct fritzcard *card = pci_get_drvdata(pdev);
1142 pr_info("%s: drvdata already removed\n", __func__);
1145 static struct pci_device_id fcpci_ids[] = {
1146 { PCI_VENDOR_ID_AVM, PCI_DEVICE_ID_AVM_A1, PCI_ANY_ID, PCI_ANY_ID,
1147 0, 0, (unsigned long) "Fritz!Card PCI"},
1148 { PCI_VENDOR_ID_AVM, PCI_DEVICE_ID_AVM_A1_V2, PCI_ANY_ID, PCI_ANY_ID,
1149 0, 0, (unsigned long) "Fritz!Card PCI v2" },
1152 MODULE_DEVICE_TABLE(pci, fcpci_ids);
1154 static struct pci_driver fcpci_driver = {
1156 .probe = fritzpci_probe,
1157 .remove = fritz_remove_pci,
1158 .id_table = fcpci_ids,
1161 static int __init AVM_init(void)
1165 pr_notice("AVM Fritz PCI driver Rev. %s\n", AVMFRITZ_REV);
1166 err = pci_register_driver(&fcpci_driver);
1170 static void __exit AVM_cleanup(void)
1172 pci_unregister_driver(&fcpci_driver);
1175 module_init(AVM_init);
1176 module_exit(AVM_cleanup);