2 * Kernel-based Virtual Machine driver for Linux
4 * This module enables machines with Intel VT-x extensions to run virtual
5 * machines without emulation or binary translation.
9 * Copyright (C) 2006 Qumranet, Inc.
12 * Yaniv Kamay <yaniv@qumranet.com>
13 * Avi Kivity <avi@qumranet.com>
15 * This work is licensed under the terms of the GNU GPL, version 2. See
16 * the COPYING file in the top-level directory.
19 #include <linux/types.h>
20 #include <linux/string.h>
23 #include <linux/highmem.h>
24 #include <linux/module.h>
29 #define pgprintk(x...) do { printk(x); } while (0)
30 #define rmap_printk(x...) do { printk(x); } while (0)
34 printk(KERN_WARNING "assertion failed %s:%d: %s\n", \
35 __FILE__, __LINE__, #x); \
38 #define PT64_PT_BITS 9
39 #define PT64_ENT_PER_PAGE (1 << PT64_PT_BITS)
40 #define PT32_PT_BITS 10
41 #define PT32_ENT_PER_PAGE (1 << PT32_PT_BITS)
43 #define PT_WRITABLE_SHIFT 1
45 #define PT_PRESENT_MASK (1ULL << 0)
46 #define PT_WRITABLE_MASK (1ULL << PT_WRITABLE_SHIFT)
47 #define PT_USER_MASK (1ULL << 2)
48 #define PT_PWT_MASK (1ULL << 3)
49 #define PT_PCD_MASK (1ULL << 4)
50 #define PT_ACCESSED_MASK (1ULL << 5)
51 #define PT_DIRTY_MASK (1ULL << 6)
52 #define PT_PAGE_SIZE_MASK (1ULL << 7)
53 #define PT_PAT_MASK (1ULL << 7)
54 #define PT_GLOBAL_MASK (1ULL << 8)
55 #define PT64_NX_MASK (1ULL << 63)
57 #define PT_PAT_SHIFT 7
58 #define PT_DIR_PAT_SHIFT 12
59 #define PT_DIR_PAT_MASK (1ULL << PT_DIR_PAT_SHIFT)
61 #define PT32_DIR_PSE36_SIZE 4
62 #define PT32_DIR_PSE36_SHIFT 13
63 #define PT32_DIR_PSE36_MASK (((1ULL << PT32_DIR_PSE36_SIZE) - 1) << PT32_DIR_PSE36_SHIFT)
66 #define PT32_PTE_COPY_MASK \
67 (PT_PRESENT_MASK | PT_ACCESSED_MASK | PT_DIRTY_MASK | PT_GLOBAL_MASK)
69 #define PT64_PTE_COPY_MASK (PT64_NX_MASK | PT32_PTE_COPY_MASK)
71 #define PT_FIRST_AVAIL_BITS_SHIFT 9
72 #define PT64_SECOND_AVAIL_BITS_SHIFT 52
74 #define PT_SHADOW_PS_MARK (1ULL << PT_FIRST_AVAIL_BITS_SHIFT)
75 #define PT_SHADOW_IO_MARK (1ULL << PT_FIRST_AVAIL_BITS_SHIFT)
77 #define PT_SHADOW_WRITABLE_SHIFT (PT_FIRST_AVAIL_BITS_SHIFT + 1)
78 #define PT_SHADOW_WRITABLE_MASK (1ULL << PT_SHADOW_WRITABLE_SHIFT)
80 #define PT_SHADOW_USER_SHIFT (PT_SHADOW_WRITABLE_SHIFT + 1)
81 #define PT_SHADOW_USER_MASK (1ULL << (PT_SHADOW_USER_SHIFT))
83 #define PT_SHADOW_BITS_OFFSET (PT_SHADOW_WRITABLE_SHIFT - PT_WRITABLE_SHIFT)
85 #define VALID_PAGE(x) ((x) != INVALID_PAGE)
87 #define PT64_LEVEL_BITS 9
89 #define PT64_LEVEL_SHIFT(level) \
90 ( PAGE_SHIFT + (level - 1) * PT64_LEVEL_BITS )
92 #define PT64_LEVEL_MASK(level) \
93 (((1ULL << PT64_LEVEL_BITS) - 1) << PT64_LEVEL_SHIFT(level))
95 #define PT64_INDEX(address, level)\
96 (((address) >> PT64_LEVEL_SHIFT(level)) & ((1 << PT64_LEVEL_BITS) - 1))
99 #define PT32_LEVEL_BITS 10
101 #define PT32_LEVEL_SHIFT(level) \
102 ( PAGE_SHIFT + (level - 1) * PT32_LEVEL_BITS )
104 #define PT32_LEVEL_MASK(level) \
105 (((1ULL << PT32_LEVEL_BITS) - 1) << PT32_LEVEL_SHIFT(level))
107 #define PT32_INDEX(address, level)\
108 (((address) >> PT32_LEVEL_SHIFT(level)) & ((1 << PT32_LEVEL_BITS) - 1))
111 #define PT64_BASE_ADDR_MASK (((1ULL << 52) - 1) & PAGE_MASK)
112 #define PT64_DIR_BASE_ADDR_MASK \
113 (PT64_BASE_ADDR_MASK & ~((1ULL << (PAGE_SHIFT + PT64_LEVEL_BITS)) - 1))
115 #define PT32_BASE_ADDR_MASK PAGE_MASK
116 #define PT32_DIR_BASE_ADDR_MASK \
117 (PAGE_MASK & ~((1ULL << (PAGE_SHIFT + PT32_LEVEL_BITS)) - 1))
120 #define PFERR_PRESENT_MASK (1U << 0)
121 #define PFERR_WRITE_MASK (1U << 1)
122 #define PFERR_USER_MASK (1U << 2)
124 #define PT64_ROOT_LEVEL 4
125 #define PT32_ROOT_LEVEL 2
126 #define PT32E_ROOT_LEVEL 3
128 #define PT_DIRECTORY_LEVEL 2
129 #define PT_PAGE_TABLE_LEVEL 1
133 struct kvm_rmap_desc {
134 u64 *shadow_ptes[RMAP_EXT];
135 struct kvm_rmap_desc *more;
138 static int is_write_protection(struct kvm_vcpu *vcpu)
140 return vcpu->cr0 & CR0_WP_MASK;
143 static int is_cpuid_PSE36(void)
148 static int is_present_pte(unsigned long pte)
150 return pte & PT_PRESENT_MASK;
153 static int is_writeble_pte(unsigned long pte)
155 return pte & PT_WRITABLE_MASK;
158 static int is_io_pte(unsigned long pte)
160 return pte & PT_SHADOW_IO_MARK;
163 static int is_rmap_pte(u64 pte)
165 return (pte & (PT_WRITABLE_MASK | PT_PRESENT_MASK))
166 == (PT_WRITABLE_MASK | PT_PRESENT_MASK);
170 * Reverse mapping data structures:
172 * If page->private bit zero is zero, then page->private points to the
173 * shadow page table entry that points to page_address(page).
175 * If page->private bit zero is one, (then page->private & ~1) points
176 * to a struct kvm_rmap_desc containing more mappings.
178 static void rmap_add(struct kvm *kvm, u64 *spte)
181 struct kvm_rmap_desc *desc;
184 if (!is_rmap_pte(*spte))
186 page = pfn_to_page((*spte & PT64_BASE_ADDR_MASK) >> PAGE_SHIFT);
187 if (!page->private) {
188 rmap_printk("rmap_add: %p %llx 0->1\n", spte, *spte);
189 page->private = (unsigned long)spte;
190 } else if (!(page->private & 1)) {
191 rmap_printk("rmap_add: %p %llx 1->many\n", spte, *spte);
192 desc = kzalloc(sizeof *desc, GFP_NOWAIT);
194 BUG(); /* FIXME: return error */
195 desc->shadow_ptes[0] = (u64 *)page->private;
196 desc->shadow_ptes[1] = spte;
197 page->private = (unsigned long)desc | 1;
199 rmap_printk("rmap_add: %p %llx many->many\n", spte, *spte);
200 desc = (struct kvm_rmap_desc *)(page->private & ~1ul);
201 while (desc->shadow_ptes[RMAP_EXT-1] && desc->more)
203 if (desc->shadow_ptes[RMAP_EXT-1]) {
204 desc->more = kzalloc(sizeof *desc->more, GFP_NOWAIT);
206 BUG(); /* FIXME: return error */
209 for (i = 0; desc->shadow_ptes[i]; ++i)
211 desc->shadow_ptes[i] = spte;
215 static void rmap_desc_remove_entry(struct page *page,
216 struct kvm_rmap_desc *desc,
218 struct kvm_rmap_desc *prev_desc)
222 for (j = RMAP_EXT - 1; !desc->shadow_ptes[j] && j > i; --j)
224 desc->shadow_ptes[i] = desc->shadow_ptes[j];
225 desc->shadow_ptes[j] = 0;
228 if (!prev_desc && !desc->more)
229 page->private = (unsigned long)desc->shadow_ptes[0];
232 prev_desc->more = desc->more;
234 page->private = (unsigned long)desc->more | 1;
238 static void rmap_remove(struct kvm *kvm, u64 *spte)
241 struct kvm_rmap_desc *desc;
242 struct kvm_rmap_desc *prev_desc;
245 if (!is_rmap_pte(*spte))
247 page = pfn_to_page((*spte & PT64_BASE_ADDR_MASK) >> PAGE_SHIFT);
248 if (!page->private) {
249 printk(KERN_ERR "rmap_remove: %p %llx 0->BUG\n", spte, *spte);
251 } else if (!(page->private & 1)) {
252 rmap_printk("rmap_remove: %p %llx 1->0\n", spte, *spte);
253 if ((u64 *)page->private != spte) {
254 printk(KERN_ERR "rmap_remove: %p %llx 1->BUG\n",
260 rmap_printk("rmap_remove: %p %llx many->many\n", spte, *spte);
261 desc = (struct kvm_rmap_desc *)(page->private & ~1ul);
264 for (i = 0; i < RMAP_EXT && desc->shadow_ptes[i]; ++i)
265 if (desc->shadow_ptes[i] == spte) {
266 rmap_desc_remove_entry(page, desc, i,
277 static void rmap_write_protect(struct kvm *kvm, u64 gfn)
280 struct kvm_memory_slot *slot;
281 struct kvm_rmap_desc *desc;
284 slot = gfn_to_memslot(kvm, gfn);
286 page = gfn_to_page(slot, gfn);
288 while (page->private) {
289 if (!(page->private & 1))
290 spte = (u64 *)page->private;
292 desc = (struct kvm_rmap_desc *)(page->private & ~1ul);
293 spte = desc->shadow_ptes[0];
296 BUG_ON((*spte & PT64_BASE_ADDR_MASK) !=
297 page_to_pfn(page) << PAGE_SHIFT);
298 BUG_ON(!(*spte & PT_PRESENT_MASK));
299 BUG_ON(!(*spte & PT_WRITABLE_MASK));
300 rmap_printk("rmap_write_protect: spte %p %llx\n", spte, *spte);
301 rmap_remove(kvm, spte);
302 *spte &= ~(u64)PT_WRITABLE_MASK;
306 static int is_empty_shadow_page(hpa_t page_hpa)
310 for (pos = __va(page_hpa), end = pos + PAGE_SIZE / sizeof(u32);
317 static void kvm_mmu_free_page(struct kvm_vcpu *vcpu, hpa_t page_hpa)
319 struct kvm_mmu_page *page_head = page_header(page_hpa);
321 ASSERT(is_empty_shadow_page(page_hpa));
322 list_del(&page_head->link);
323 page_head->page_hpa = page_hpa;
324 list_add(&page_head->link, &vcpu->free_pages);
325 ++vcpu->kvm->n_free_mmu_pages;
328 static unsigned kvm_page_table_hashfn(gfn_t gfn)
333 static struct kvm_mmu_page *kvm_mmu_alloc_page(struct kvm_vcpu *vcpu,
336 struct kvm_mmu_page *page;
338 if (list_empty(&vcpu->free_pages))
341 page = list_entry(vcpu->free_pages.next, struct kvm_mmu_page, link);
342 list_del(&page->link);
343 list_add(&page->link, &vcpu->kvm->active_mmu_pages);
344 ASSERT(is_empty_shadow_page(page->page_hpa));
345 page->slot_bitmap = 0;
347 page->multimapped = 0;
348 page->parent_pte = parent_pte;
349 --vcpu->kvm->n_free_mmu_pages;
353 static void mmu_page_add_parent_pte(struct kvm_mmu_page *page, u64 *parent_pte)
355 struct kvm_pte_chain *pte_chain;
356 struct hlist_node *node;
361 if (!page->multimapped) {
362 u64 *old = page->parent_pte;
365 page->parent_pte = parent_pte;
368 page->multimapped = 1;
369 pte_chain = kzalloc(sizeof(struct kvm_pte_chain), GFP_NOWAIT);
371 INIT_HLIST_HEAD(&page->parent_ptes);
372 hlist_add_head(&pte_chain->link, &page->parent_ptes);
373 pte_chain->parent_ptes[0] = old;
375 hlist_for_each_entry(pte_chain, node, &page->parent_ptes, link) {
376 if (pte_chain->parent_ptes[NR_PTE_CHAIN_ENTRIES-1])
378 for (i = 0; i < NR_PTE_CHAIN_ENTRIES; ++i)
379 if (!pte_chain->parent_ptes[i]) {
380 pte_chain->parent_ptes[i] = parent_pte;
384 pte_chain = kzalloc(sizeof(struct kvm_pte_chain), GFP_NOWAIT);
386 hlist_add_head(&pte_chain->link, &page->parent_ptes);
387 pte_chain->parent_ptes[0] = parent_pte;
390 static void mmu_page_remove_parent_pte(struct kvm_mmu_page *page,
393 struct kvm_pte_chain *pte_chain;
394 struct hlist_node *node;
397 if (!page->multimapped) {
398 BUG_ON(page->parent_pte != parent_pte);
399 page->parent_pte = NULL;
402 hlist_for_each_entry(pte_chain, node, &page->parent_ptes, link)
403 for (i = 0; i < NR_PTE_CHAIN_ENTRIES; ++i) {
404 if (!pte_chain->parent_ptes[i])
406 if (pte_chain->parent_ptes[i] != parent_pte)
408 while (i + 1 < NR_PTE_CHAIN_ENTRIES
409 && pte_chain->parent_ptes[i + 1]) {
410 pte_chain->parent_ptes[i]
411 = pte_chain->parent_ptes[i + 1];
414 pte_chain->parent_ptes[i] = NULL;
416 hlist_del(&pte_chain->link);
418 if (hlist_empty(&page->parent_ptes)) {
419 page->multimapped = 0;
420 page->parent_pte = NULL;
428 static struct kvm_mmu_page *kvm_mmu_lookup_page(struct kvm_vcpu *vcpu,
432 struct hlist_head *bucket;
433 struct kvm_mmu_page *page;
434 struct hlist_node *node;
436 pgprintk("%s: looking for gfn %lx\n", __FUNCTION__, gfn);
437 index = kvm_page_table_hashfn(gfn) % KVM_NUM_MMU_PAGES;
438 bucket = &vcpu->kvm->mmu_page_hash[index];
439 hlist_for_each_entry(page, node, bucket, hash_link)
440 if (page->gfn == gfn && !page->role.metaphysical) {
441 pgprintk("%s: found role %x\n",
442 __FUNCTION__, page->role.word);
448 static struct kvm_mmu_page *kvm_mmu_get_page(struct kvm_vcpu *vcpu,
455 union kvm_mmu_page_role role;
458 struct hlist_head *bucket;
459 struct kvm_mmu_page *page;
460 struct hlist_node *node;
463 role.glevels = vcpu->mmu.root_level;
465 role.metaphysical = metaphysical;
466 if (vcpu->mmu.root_level <= PT32_ROOT_LEVEL) {
467 quadrant = gaddr >> (PAGE_SHIFT + (PT64_PT_BITS * level));
468 quadrant &= (1 << ((PT32_PT_BITS - PT64_PT_BITS) * level)) - 1;
469 role.quadrant = quadrant;
471 pgprintk("%s: looking gfn %lx role %x\n", __FUNCTION__,
473 index = kvm_page_table_hashfn(gfn) % KVM_NUM_MMU_PAGES;
474 bucket = &vcpu->kvm->mmu_page_hash[index];
475 hlist_for_each_entry(page, node, bucket, hash_link)
476 if (page->gfn == gfn && page->role.word == role.word) {
477 mmu_page_add_parent_pte(page, parent_pte);
478 pgprintk("%s: found\n", __FUNCTION__);
481 page = kvm_mmu_alloc_page(vcpu, parent_pte);
484 pgprintk("%s: adding gfn %lx role %x\n", __FUNCTION__, gfn, role.word);
487 hlist_add_head(&page->hash_link, bucket);
489 rmap_write_protect(vcpu->kvm, gfn);
493 static void kvm_mmu_page_unlink_children(struct kvm_vcpu *vcpu,
494 struct kvm_mmu_page *page)
500 pt = __va(page->page_hpa);
502 if (page->role.level == PT_PAGE_TABLE_LEVEL) {
503 for (i = 0; i < PT64_ENT_PER_PAGE; ++i) {
504 if (pt[i] & PT_PRESENT_MASK)
505 rmap_remove(vcpu->kvm, &pt[i]);
511 for (i = 0; i < PT64_ENT_PER_PAGE; ++i) {
515 if (!(ent & PT_PRESENT_MASK))
517 ent &= PT64_BASE_ADDR_MASK;
518 mmu_page_remove_parent_pte(page_header(ent), &pt[i]);
522 static void kvm_mmu_put_page(struct kvm_vcpu *vcpu,
523 struct kvm_mmu_page *page,
526 mmu_page_remove_parent_pte(page, parent_pte);
529 static void kvm_mmu_zap_page(struct kvm_vcpu *vcpu,
530 struct kvm_mmu_page *page)
534 while (page->multimapped || page->parent_pte) {
535 if (!page->multimapped)
536 parent_pte = page->parent_pte;
538 struct kvm_pte_chain *chain;
540 chain = container_of(page->parent_ptes.first,
541 struct kvm_pte_chain, link);
542 parent_pte = chain->parent_ptes[0];
545 kvm_mmu_put_page(vcpu, page, parent_pte);
548 kvm_mmu_page_unlink_children(vcpu, page);
549 hlist_del(&page->hash_link);
550 kvm_mmu_free_page(vcpu, page->page_hpa);
553 static int kvm_mmu_unprotect_page(struct kvm_vcpu *vcpu, gfn_t gfn)
556 struct hlist_head *bucket;
557 struct kvm_mmu_page *page;
558 struct hlist_node *node, *n;
561 pgprintk("%s: looking for gfn %lx\n", __FUNCTION__, gfn);
563 index = kvm_page_table_hashfn(gfn) % KVM_NUM_MMU_PAGES;
564 bucket = &vcpu->kvm->mmu_page_hash[index];
565 hlist_for_each_entry_safe(page, node, n, bucket, hash_link)
566 if (page->gfn == gfn && !page->role.metaphysical) {
567 pgprintk("%s: gfn %lx role %x\n", __FUNCTION__, gfn,
569 kvm_mmu_zap_page(vcpu, page);
575 static void page_header_update_slot(struct kvm *kvm, void *pte, gpa_t gpa)
577 int slot = memslot_id(kvm, gfn_to_memslot(kvm, gpa >> PAGE_SHIFT));
578 struct kvm_mmu_page *page_head = page_header(__pa(pte));
580 __set_bit(slot, &page_head->slot_bitmap);
583 hpa_t safe_gpa_to_hpa(struct kvm_vcpu *vcpu, gpa_t gpa)
585 hpa_t hpa = gpa_to_hpa(vcpu, gpa);
587 return is_error_hpa(hpa) ? bad_page_address | (gpa & ~PAGE_MASK): hpa;
590 hpa_t gpa_to_hpa(struct kvm_vcpu *vcpu, gpa_t gpa)
592 struct kvm_memory_slot *slot;
595 ASSERT((gpa & HPA_ERR_MASK) == 0);
596 slot = gfn_to_memslot(vcpu->kvm, gpa >> PAGE_SHIFT);
598 return gpa | HPA_ERR_MASK;
599 page = gfn_to_page(slot, gpa >> PAGE_SHIFT);
600 return ((hpa_t)page_to_pfn(page) << PAGE_SHIFT)
601 | (gpa & (PAGE_SIZE-1));
604 hpa_t gva_to_hpa(struct kvm_vcpu *vcpu, gva_t gva)
606 gpa_t gpa = vcpu->mmu.gva_to_gpa(vcpu, gva);
608 if (gpa == UNMAPPED_GVA)
610 return gpa_to_hpa(vcpu, gpa);
613 static void nonpaging_new_cr3(struct kvm_vcpu *vcpu)
617 static int nonpaging_map(struct kvm_vcpu *vcpu, gva_t v, hpa_t p)
619 int level = PT32E_ROOT_LEVEL;
620 hpa_t table_addr = vcpu->mmu.root_hpa;
623 u32 index = PT64_INDEX(v, level);
627 ASSERT(VALID_PAGE(table_addr));
628 table = __va(table_addr);
632 if (is_present_pte(pte) && is_writeble_pte(pte))
634 mark_page_dirty(vcpu->kvm, v >> PAGE_SHIFT);
635 page_header_update_slot(vcpu->kvm, table, v);
636 table[index] = p | PT_PRESENT_MASK | PT_WRITABLE_MASK |
638 rmap_add(vcpu->kvm, &table[index]);
642 if (table[index] == 0) {
643 struct kvm_mmu_page *new_table;
646 pseudo_gfn = (v & PT64_DIR_BASE_ADDR_MASK)
648 new_table = kvm_mmu_get_page(vcpu, pseudo_gfn,
652 pgprintk("nonpaging_map: ENOMEM\n");
656 table[index] = new_table->page_hpa | PT_PRESENT_MASK
657 | PT_WRITABLE_MASK | PT_USER_MASK;
659 table_addr = table[index] & PT64_BASE_ADDR_MASK;
663 static void mmu_free_roots(struct kvm_vcpu *vcpu)
668 if (vcpu->mmu.shadow_root_level == PT64_ROOT_LEVEL) {
669 hpa_t root = vcpu->mmu.root_hpa;
671 ASSERT(VALID_PAGE(root));
672 vcpu->mmu.root_hpa = INVALID_PAGE;
676 for (i = 0; i < 4; ++i) {
677 hpa_t root = vcpu->mmu.pae_root[i];
679 ASSERT(VALID_PAGE(root));
680 root &= PT64_BASE_ADDR_MASK;
681 vcpu->mmu.pae_root[i] = INVALID_PAGE;
683 vcpu->mmu.root_hpa = INVALID_PAGE;
686 static void mmu_alloc_roots(struct kvm_vcpu *vcpu)
690 root_gfn = vcpu->cr3 >> PAGE_SHIFT;
693 if (vcpu->mmu.shadow_root_level == PT64_ROOT_LEVEL) {
694 hpa_t root = vcpu->mmu.root_hpa;
696 ASSERT(!VALID_PAGE(root));
697 root = kvm_mmu_get_page(vcpu, root_gfn, 0,
698 PT64_ROOT_LEVEL, 0, NULL)->page_hpa;
699 vcpu->mmu.root_hpa = root;
703 for (i = 0; i < 4; ++i) {
704 hpa_t root = vcpu->mmu.pae_root[i];
706 ASSERT(!VALID_PAGE(root));
707 if (vcpu->mmu.root_level == PT32E_ROOT_LEVEL)
708 root_gfn = vcpu->pdptrs[i] >> PAGE_SHIFT;
709 else if (vcpu->mmu.root_level == 0)
711 root = kvm_mmu_get_page(vcpu, root_gfn, i << 30,
712 PT32_ROOT_LEVEL, !is_paging(vcpu),
714 vcpu->mmu.pae_root[i] = root | PT_PRESENT_MASK;
716 vcpu->mmu.root_hpa = __pa(vcpu->mmu.pae_root);
719 static gpa_t nonpaging_gva_to_gpa(struct kvm_vcpu *vcpu, gva_t vaddr)
724 static int nonpaging_page_fault(struct kvm_vcpu *vcpu, gva_t gva,
731 ASSERT(VALID_PAGE(vcpu->mmu.root_hpa));
734 paddr = gpa_to_hpa(vcpu , addr & PT64_BASE_ADDR_MASK);
736 if (is_error_hpa(paddr))
739 return nonpaging_map(vcpu, addr & PAGE_MASK, paddr);
742 static void nonpaging_free(struct kvm_vcpu *vcpu)
744 mmu_free_roots(vcpu);
747 static int nonpaging_init_context(struct kvm_vcpu *vcpu)
749 struct kvm_mmu *context = &vcpu->mmu;
751 context->new_cr3 = nonpaging_new_cr3;
752 context->page_fault = nonpaging_page_fault;
753 context->gva_to_gpa = nonpaging_gva_to_gpa;
754 context->free = nonpaging_free;
755 context->root_level = 0;
756 context->shadow_root_level = PT32E_ROOT_LEVEL;
757 mmu_alloc_roots(vcpu);
758 ASSERT(VALID_PAGE(context->root_hpa));
759 kvm_arch_ops->set_cr3(vcpu, context->root_hpa);
763 static void kvm_mmu_flush_tlb(struct kvm_vcpu *vcpu)
765 ++kvm_stat.tlb_flush;
766 kvm_arch_ops->tlb_flush(vcpu);
769 static void paging_new_cr3(struct kvm_vcpu *vcpu)
771 pgprintk("%s: cr3 %lx\n", __FUNCTION__, vcpu->cr3);
772 mmu_free_roots(vcpu);
773 mmu_alloc_roots(vcpu);
774 kvm_mmu_flush_tlb(vcpu);
775 kvm_arch_ops->set_cr3(vcpu, vcpu->mmu.root_hpa);
778 static void mark_pagetable_nonglobal(void *shadow_pte)
780 page_header(__pa(shadow_pte))->global = 0;
783 static inline void set_pte_common(struct kvm_vcpu *vcpu,
792 *shadow_pte |= access_bits << PT_SHADOW_BITS_OFFSET;
794 access_bits &= ~PT_WRITABLE_MASK;
796 paddr = gpa_to_hpa(vcpu, gaddr & PT64_BASE_ADDR_MASK);
798 *shadow_pte |= access_bits;
800 if (!(*shadow_pte & PT_GLOBAL_MASK))
801 mark_pagetable_nonglobal(shadow_pte);
803 if (is_error_hpa(paddr)) {
804 *shadow_pte |= gaddr;
805 *shadow_pte |= PT_SHADOW_IO_MARK;
806 *shadow_pte &= ~PT_PRESENT_MASK;
810 *shadow_pte |= paddr;
812 if (access_bits & PT_WRITABLE_MASK) {
813 struct kvm_mmu_page *shadow;
815 shadow = kvm_mmu_lookup_page(vcpu, gfn);
817 pgprintk("%s: found shadow page for %lx, marking ro\n",
819 access_bits &= ~PT_WRITABLE_MASK;
820 *shadow_pte &= ~PT_WRITABLE_MASK;
824 if (access_bits & PT_WRITABLE_MASK)
825 mark_page_dirty(vcpu->kvm, gaddr >> PAGE_SHIFT);
827 page_header_update_slot(vcpu->kvm, shadow_pte, gaddr);
828 rmap_add(vcpu->kvm, shadow_pte);
831 static void inject_page_fault(struct kvm_vcpu *vcpu,
835 kvm_arch_ops->inject_page_fault(vcpu, addr, err_code);
838 static inline int fix_read_pf(u64 *shadow_ent)
840 if ((*shadow_ent & PT_SHADOW_USER_MASK) &&
841 !(*shadow_ent & PT_USER_MASK)) {
843 * If supervisor write protect is disabled, we shadow kernel
844 * pages as user pages so we can trap the write access.
846 *shadow_ent |= PT_USER_MASK;
847 *shadow_ent &= ~PT_WRITABLE_MASK;
855 static int may_access(u64 pte, int write, int user)
858 if (user && !(pte & PT_USER_MASK))
860 if (write && !(pte & PT_WRITABLE_MASK))
865 static void paging_free(struct kvm_vcpu *vcpu)
867 nonpaging_free(vcpu);
871 #include "paging_tmpl.h"
875 #include "paging_tmpl.h"
878 static int paging64_init_context_common(struct kvm_vcpu *vcpu, int level)
880 struct kvm_mmu *context = &vcpu->mmu;
882 ASSERT(is_pae(vcpu));
883 context->new_cr3 = paging_new_cr3;
884 context->page_fault = paging64_page_fault;
885 context->gva_to_gpa = paging64_gva_to_gpa;
886 context->free = paging_free;
887 context->root_level = level;
888 context->shadow_root_level = level;
889 mmu_alloc_roots(vcpu);
890 ASSERT(VALID_PAGE(context->root_hpa));
891 kvm_arch_ops->set_cr3(vcpu, context->root_hpa |
892 (vcpu->cr3 & (CR3_PCD_MASK | CR3_WPT_MASK)));
896 static int paging64_init_context(struct kvm_vcpu *vcpu)
898 return paging64_init_context_common(vcpu, PT64_ROOT_LEVEL);
901 static int paging32_init_context(struct kvm_vcpu *vcpu)
903 struct kvm_mmu *context = &vcpu->mmu;
905 context->new_cr3 = paging_new_cr3;
906 context->page_fault = paging32_page_fault;
907 context->gva_to_gpa = paging32_gva_to_gpa;
908 context->free = paging_free;
909 context->root_level = PT32_ROOT_LEVEL;
910 context->shadow_root_level = PT32E_ROOT_LEVEL;
911 mmu_alloc_roots(vcpu);
912 ASSERT(VALID_PAGE(context->root_hpa));
913 kvm_arch_ops->set_cr3(vcpu, context->root_hpa |
914 (vcpu->cr3 & (CR3_PCD_MASK | CR3_WPT_MASK)));
918 static int paging32E_init_context(struct kvm_vcpu *vcpu)
920 return paging64_init_context_common(vcpu, PT32E_ROOT_LEVEL);
923 static int init_kvm_mmu(struct kvm_vcpu *vcpu)
926 ASSERT(!VALID_PAGE(vcpu->mmu.root_hpa));
928 if (!is_paging(vcpu))
929 return nonpaging_init_context(vcpu);
930 else if (is_long_mode(vcpu))
931 return paging64_init_context(vcpu);
932 else if (is_pae(vcpu))
933 return paging32E_init_context(vcpu);
935 return paging32_init_context(vcpu);
938 static void destroy_kvm_mmu(struct kvm_vcpu *vcpu)
941 if (VALID_PAGE(vcpu->mmu.root_hpa)) {
942 vcpu->mmu.free(vcpu);
943 vcpu->mmu.root_hpa = INVALID_PAGE;
947 int kvm_mmu_reset_context(struct kvm_vcpu *vcpu)
949 destroy_kvm_mmu(vcpu);
950 return init_kvm_mmu(vcpu);
953 void kvm_mmu_pre_write(struct kvm_vcpu *vcpu, gpa_t gpa, int bytes)
955 gfn_t gfn = gpa >> PAGE_SHIFT;
956 struct kvm_mmu_page *page;
957 struct kvm_mmu_page *child;
958 struct hlist_node *node, *n;
959 struct hlist_head *bucket;
963 unsigned offset = offset_in_page(gpa);
965 unsigned page_offset;
969 pgprintk("%s: gpa %llx bytes %d\n", __FUNCTION__, gpa, bytes);
970 index = kvm_page_table_hashfn(gfn) % KVM_NUM_MMU_PAGES;
971 bucket = &vcpu->kvm->mmu_page_hash[index];
972 hlist_for_each_entry_safe(page, node, n, bucket, hash_link) {
973 if (page->gfn != gfn || page->role.metaphysical)
975 pte_size = page->role.glevels == PT32_ROOT_LEVEL ? 4 : 8;
976 misaligned = (offset ^ (offset + bytes - 1)) & ~(pte_size - 1);
979 * Misaligned accesses are too much trouble to fix
980 * up; also, they usually indicate a page is not used
983 pgprintk("misaligned: gpa %llx bytes %d role %x\n",
984 gpa, bytes, page->role.word);
985 kvm_mmu_zap_page(vcpu, page);
988 page_offset = offset;
989 level = page->role.level;
990 if (page->role.glevels == PT32_ROOT_LEVEL) {
991 page_offset <<= 1; /* 32->64 */
992 page_offset &= ~PAGE_MASK;
994 spte = __va(page->page_hpa);
995 spte += page_offset / sizeof(*spte);
997 if (is_present_pte(pte)) {
998 if (level == PT_PAGE_TABLE_LEVEL)
999 rmap_remove(vcpu->kvm, spte);
1001 child = page_header(pte & PT64_BASE_ADDR_MASK);
1002 mmu_page_remove_parent_pte(child, spte);
1009 void kvm_mmu_post_write(struct kvm_vcpu *vcpu, gpa_t gpa, int bytes)
1013 int kvm_mmu_unprotect_page_virt(struct kvm_vcpu *vcpu, gva_t gva)
1015 gpa_t gpa = vcpu->mmu.gva_to_gpa(vcpu, gva);
1017 return kvm_mmu_unprotect_page(vcpu, gpa >> PAGE_SHIFT);
1020 void kvm_mmu_free_some_pages(struct kvm_vcpu *vcpu)
1022 while (vcpu->kvm->n_free_mmu_pages < KVM_REFILL_PAGES) {
1023 struct kvm_mmu_page *page;
1025 page = container_of(vcpu->kvm->active_mmu_pages.prev,
1026 struct kvm_mmu_page, link);
1027 kvm_mmu_zap_page(vcpu, page);
1030 EXPORT_SYMBOL_GPL(kvm_mmu_free_some_pages);
1032 static void free_mmu_pages(struct kvm_vcpu *vcpu)
1034 while (!list_empty(&vcpu->free_pages)) {
1035 struct kvm_mmu_page *page;
1037 page = list_entry(vcpu->free_pages.next,
1038 struct kvm_mmu_page, link);
1039 list_del(&page->link);
1040 __free_page(pfn_to_page(page->page_hpa >> PAGE_SHIFT));
1041 page->page_hpa = INVALID_PAGE;
1043 free_page((unsigned long)vcpu->mmu.pae_root);
1046 static int alloc_mmu_pages(struct kvm_vcpu *vcpu)
1053 for (i = 0; i < KVM_NUM_MMU_PAGES; i++) {
1054 struct kvm_mmu_page *page_header = &vcpu->page_header_buf[i];
1056 INIT_LIST_HEAD(&page_header->link);
1057 if ((page = alloc_page(GFP_KERNEL)) == NULL)
1059 page->private = (unsigned long)page_header;
1060 page_header->page_hpa = (hpa_t)page_to_pfn(page) << PAGE_SHIFT;
1061 memset(__va(page_header->page_hpa), 0, PAGE_SIZE);
1062 list_add(&page_header->link, &vcpu->free_pages);
1063 ++vcpu->kvm->n_free_mmu_pages;
1067 * When emulating 32-bit mode, cr3 is only 32 bits even on x86_64.
1068 * Therefore we need to allocate shadow page tables in the first
1069 * 4GB of memory, which happens to fit the DMA32 zone.
1071 page = alloc_page(GFP_KERNEL | __GFP_DMA32);
1074 vcpu->mmu.pae_root = page_address(page);
1075 for (i = 0; i < 4; ++i)
1076 vcpu->mmu.pae_root[i] = INVALID_PAGE;
1081 free_mmu_pages(vcpu);
1085 int kvm_mmu_create(struct kvm_vcpu *vcpu)
1088 ASSERT(!VALID_PAGE(vcpu->mmu.root_hpa));
1089 ASSERT(list_empty(&vcpu->free_pages));
1091 return alloc_mmu_pages(vcpu);
1094 int kvm_mmu_setup(struct kvm_vcpu *vcpu)
1097 ASSERT(!VALID_PAGE(vcpu->mmu.root_hpa));
1098 ASSERT(!list_empty(&vcpu->free_pages));
1100 return init_kvm_mmu(vcpu);
1103 void kvm_mmu_destroy(struct kvm_vcpu *vcpu)
1107 destroy_kvm_mmu(vcpu);
1108 free_mmu_pages(vcpu);
1111 void kvm_mmu_slot_remove_write_access(struct kvm *kvm, int slot)
1113 struct kvm_mmu_page *page;
1115 list_for_each_entry(page, &kvm->active_mmu_pages, link) {
1119 if (!test_bit(slot, &page->slot_bitmap))
1122 pt = __va(page->page_hpa);
1123 for (i = 0; i < PT64_ENT_PER_PAGE; ++i)
1125 if (pt[i] & PT_WRITABLE_MASK) {
1126 rmap_remove(kvm, &pt[i]);
1127 pt[i] &= ~PT_WRITABLE_MASK;