2 * System Control and Power Interface (SCPI) Message Protocol driver
4 * Copyright (C) 2014 ARM Ltd.
5 * Copyright (c) 2014, Fuzhou Rockchip Electronics Co., Ltd
7 * This program is free software; you can redistribute it and/or modify it
8 * under the terms and conditions of the GNU General Public License,
9 * version 2, as published by the Free Software Foundation.
11 * This program is distributed in the hope it will be useful, but WITHOUT
12 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
13 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
16 * You should have received a copy of the GNU General Public License along with
17 * this program. If not, see <http://www.gnu.org/licenses/>.
19 #include <linux/of_device.h>
20 #include <linux/platform_device.h>
21 #include <linux/err.h>
22 #include <linux/export.h>
23 #include <linux/kernel.h>
24 #include <linux/module.h>
25 #include <linux/printk.h>
26 #include <linux/mailbox_client.h>
27 #include <linux/scpi_protocol.h>
28 #include <linux/slab.h>
29 #include <linux/rockchip-mailbox.h>
30 #include <linux/rockchip/common.h>
34 #define CMD_ID_SHIFT 0
35 #define CMD_ID_MASK 0xff
36 #define CMD_SENDER_ID_SHIFT 8
37 #define CMD_SENDER_ID_MASK 0xff
38 #define CMD_DATA_SIZE_SHIFT 20
39 #define CMD_DATA_SIZE_MASK 0x1ff
40 #define PACK_SCPI_CMD(cmd, sender, txsz) \
41 ((((cmd) & CMD_ID_MASK) << CMD_ID_SHIFT) | \
42 (((sender) & CMD_SENDER_ID_MASK) << CMD_SENDER_ID_SHIFT) | \
43 (((txsz) & CMD_DATA_SIZE_MASK) << CMD_DATA_SIZE_SHIFT))
44 #define SCPI_CMD_DEFAULT_TIMEOUT_MS 1000
46 #define MAX_DVFS_DOMAINS 3
47 #define MAX_DVFS_OPPS 8
48 #define DVFS_LATENCY(hdr) ((hdr) >> 16)
49 #define DVFS_OPP_COUNT(hdr) (((hdr) >> 8) & 0xff)
51 static int max_chan_num = 0;
52 static DECLARE_BITMAP(bm_mbox_chans, 4);
53 static DEFINE_MUTEX(scpi_mtx);
55 struct scpi_data_buf {
57 struct rockchip_mbox_msg *data;
58 struct completion complete;
67 static int high_priority_cmds[] = {
68 SCPI_CMD_GET_CSS_PWR_STATE,
69 SCPI_CMD_CFG_PWR_STATE_STAT,
70 SCPI_CMD_GET_PWR_STATE_STAT,
75 SCPI_CMD_SET_CLOCK_INDEX,
76 SCPI_CMD_SET_CLOCK_VALUE,
77 SCPI_CMD_GET_CLOCK_VALUE,
80 SCPI_CMD_SENSOR_CFG_PERIODIC,
81 SCPI_CMD_SENSOR_CFG_BOUNDS,
84 static struct scpi_opp *scpi_opps[MAX_DVFS_DOMAINS];
86 static struct device *the_scpi_device;
88 static int scpi_linux_errmap[SCPI_ERR_MAX] = {
89 0, -EINVAL, -ENOEXEC, -EMSGSIZE,
90 -EINVAL, -EACCES, -ERANGE, -ETIMEDOUT,
91 -ENOMEM, -EINVAL, -EOPNOTSUPP, -EIO,
94 static inline int scpi_to_linux_errno(int errno)
96 if (errno >= SCPI_SUCCESS && errno < SCPI_ERR_MAX)
97 return scpi_linux_errmap[errno];
101 static bool __maybe_unused high_priority_chan_supported(int cmd)
105 for (idx = 0; idx < ARRAY_SIZE(high_priority_cmds); idx++)
106 if (cmd == high_priority_cmds[idx])
111 static int scpi_alloc_mbox_chan(void)
115 mutex_lock(&scpi_mtx);
117 index = find_first_zero_bit(bm_mbox_chans, max_chan_num);
118 if (index >= max_chan_num) {
119 pr_err("alloc mailbox channel failed\n");
120 mutex_unlock(&scpi_mtx);
124 set_bit(index, bm_mbox_chans);
126 mutex_unlock(&scpi_mtx);
130 static void scpi_free_mbox_chan(int chan)
134 mutex_lock(&scpi_mtx);
136 if (index < max_chan_num && index >= 0)
137 clear_bit(index, bm_mbox_chans);
139 mutex_unlock(&scpi_mtx);
142 static void scpi_rx_callback(struct mbox_client *cl, void *msg)
144 struct rockchip_mbox_msg *data = (struct rockchip_mbox_msg *)msg;
145 struct scpi_data_buf *scpi_buf = data->cl_data;
147 complete(&scpi_buf->complete);
150 static int send_scpi_cmd(struct scpi_data_buf *scpi_buf, int index)
152 struct mbox_chan *chan;
153 struct mbox_client cl;
154 struct rockchip_mbox_msg *data = scpi_buf->data;
157 int timeout = msecs_to_jiffies(scpi_buf->timeout_ms);
159 if (!the_scpi_device) {
160 pr_err("Scpi initializes unsuccessfully\n");
164 cl.dev = the_scpi_device;
165 cl.rx_callback = scpi_rx_callback;
168 cl.knows_txdone = false;
170 chan = mbox_request_channel(&cl, index);
172 scpi_free_mbox_chan(index);
173 return PTR_ERR(chan);
176 init_completion(&scpi_buf->complete);
177 if (mbox_send_message(chan, (void *)data) < 0) {
178 status = SCPI_ERR_TIMEOUT;
182 ret = wait_for_completion_timeout(&scpi_buf->complete, timeout);
184 status = SCPI_ERR_TIMEOUT;
187 status = *(u32 *)(data->rx_buf); /* read first word */
190 mbox_free_channel(chan);
191 scpi_free_mbox_chan(index);
193 return scpi_to_linux_errno(status);
196 #define SCPI_SETUP_DBUF(scpi_buf, mbox_buf, _client_id,\
197 _cmd, _tx_buf, _rx_buf) \
199 struct rockchip_mbox_msg *pdata = &mbox_buf; \
201 pdata->tx_buf = &_tx_buf; \
202 pdata->tx_size = sizeof(_tx_buf); \
203 pdata->rx_buf = &_rx_buf; \
204 pdata->rx_size = sizeof(_rx_buf); \
205 scpi_buf.client_id = _client_id; \
206 scpi_buf.data = pdata; \
207 scpi_buf.timeout_ms = SCPI_CMD_DEFAULT_TIMEOUT_MS; \
210 static int scpi_execute_cmd(struct scpi_data_buf *scpi_buf)
212 struct rockchip_mbox_msg *data;
215 if (!scpi_buf || !scpi_buf->data)
218 index = scpi_alloc_mbox_chan();
222 data = scpi_buf->data;
223 data->cmd = PACK_SCPI_CMD(data->cmd, scpi_buf->client_id,
225 data->cl_data = scpi_buf;
227 return send_scpi_cmd(scpi_buf, index);
230 unsigned long scpi_clk_get_val(u16 clk_id)
232 struct scpi_data_buf sdata;
233 struct rockchip_mbox_msg mdata;
239 SCPI_SETUP_DBUF(sdata, mdata, SCPI_CL_CLOCKS,
240 SCPI_CMD_GET_CLOCK_VALUE, clk_id, buf);
241 if (scpi_execute_cmd(&sdata))
246 EXPORT_SYMBOL_GPL(scpi_clk_get_val);
248 int scpi_clk_set_val(u16 clk_id, unsigned long rate)
250 struct scpi_data_buf sdata;
251 struct rockchip_mbox_msg mdata;
258 buf.clk_rate = (u32)rate;
261 SCPI_SETUP_DBUF(sdata, mdata, SCPI_CL_CLOCKS,
262 SCPI_CMD_SET_CLOCK_VALUE, buf, stat);
263 return scpi_execute_cmd(&sdata);
265 EXPORT_SYMBOL_GPL(scpi_clk_set_val);
267 struct scpi_opp *scpi_dvfs_get_opps(u8 domain)
269 struct scpi_data_buf sdata;
270 struct rockchip_mbox_msg mdata;
274 struct scpi_opp_entry opp[MAX_DVFS_OPPS];
276 struct scpi_opp *opps;
280 if (domain >= MAX_DVFS_DOMAINS)
281 return ERR_PTR(-EINVAL);
283 if (scpi_opps[domain]) /* data already populated */
284 return scpi_opps[domain];
286 SCPI_SETUP_DBUF(sdata, mdata, SCPI_CL_DVFS,
287 SCPI_CMD_GET_DVFS_INFO, domain, buf);
288 ret = scpi_execute_cmd(&sdata);
292 opps = kmalloc(sizeof(*opps), GFP_KERNEL);
294 return ERR_PTR(-ENOMEM);
296 count = DVFS_OPP_COUNT(buf.header);
297 opps_sz = count * sizeof(*(opps->opp));
300 opps->latency = DVFS_LATENCY(buf.header);
301 opps->opp = kmalloc(opps_sz, GFP_KERNEL);
304 return ERR_PTR(-ENOMEM);
307 memcpy(opps->opp, &buf.opp[0], opps_sz);
308 scpi_opps[domain] = opps;
312 EXPORT_SYMBOL_GPL(scpi_dvfs_get_opps);
314 int scpi_dvfs_get_idx(u8 domain)
316 struct scpi_data_buf sdata;
317 struct rockchip_mbox_msg mdata;
324 if (domain >= MAX_DVFS_DOMAINS)
327 SCPI_SETUP_DBUF(sdata, mdata, SCPI_CL_DVFS,
328 SCPI_CMD_GET_DVFS, domain, buf);
329 ret = scpi_execute_cmd(&sdata);
335 EXPORT_SYMBOL_GPL(scpi_dvfs_get_idx);
337 int scpi_dvfs_set_idx(u8 domain, u8 idx)
339 struct scpi_data_buf sdata;
340 struct rockchip_mbox_msg mdata;
348 buf.dvfs_domain = domain;
350 if (domain >= MAX_DVFS_DOMAINS)
353 SCPI_SETUP_DBUF(sdata, mdata, SCPI_CL_DVFS,
354 SCPI_CMD_SET_DVFS, buf, stat);
355 return scpi_execute_cmd(&sdata);
357 EXPORT_SYMBOL_GPL(scpi_dvfs_set_idx);
359 int scpi_get_sensor(char *name)
361 struct scpi_data_buf sdata;
362 struct rockchip_mbox_msg mdata;
377 /* This should be handled by a generic macro */
379 struct rockchip_mbox_msg *pdata = &mdata;
381 pdata->cmd = SCPI_CMD_SENSOR_CAPABILITIES;
383 pdata->rx_buf = &cap_buf;
384 pdata->rx_size = sizeof(cap_buf);
385 sdata.client_id = SCPI_CL_THERMAL;
389 ret = scpi_execute_cmd(&sdata);
394 for (sensor_id = 0; sensor_id < cap_buf.sensors; sensor_id++) {
395 SCPI_SETUP_DBUF(sdata, mdata, SCPI_CL_THERMAL,
396 SCPI_CMD_SENSOR_INFO, sensor_id, info_buf);
397 ret = scpi_execute_cmd(&sdata);
401 if (!strcmp(name, info_buf.name)) {
409 EXPORT_SYMBOL_GPL(scpi_get_sensor);
411 int scpi_get_sensor_value(u16 sensor, u32 *val)
413 struct scpi_data_buf sdata;
414 struct rockchip_mbox_msg mdata;
421 SCPI_SETUP_DBUF(sdata, mdata, SCPI_CL_THERMAL, SCPI_CMD_SENSOR_VALUE,
424 ret = scpi_execute_cmd(&sdata);
430 EXPORT_SYMBOL_GPL(scpi_get_sensor_value);
432 static int scpi_get_version(u32 old, struct scpi_mcu_ver *ver)
435 struct scpi_data_buf sdata;
436 struct rockchip_mbox_msg mdata;
439 struct scpi_mcu_ver version;
442 memset(&buf, 0, sizeof(buf));
443 SCPI_SETUP_DBUF(sdata, mdata, SCPI_CL_SYS, SCPI_SYS_GET_VERSION,
446 ret = scpi_execute_cmd(&sdata);
448 pr_err("get scpi version from MCU failed, ret=%d\n", ret);
452 memcpy(ver, &(buf.version), sizeof(*ver));
458 int scpi_sys_set_mcu_state_suspend(void)
460 struct scpi_data_buf sdata;
461 struct rockchip_mbox_msg mdata;
470 SCPI_SETUP_DBUF(sdata, mdata, SCPI_CL_SYS,
471 SCPI_SYS_SET_MCU_STATE_SUSPEND, tx_buf, rx_buf);
472 return scpi_execute_cmd(&sdata);
474 EXPORT_SYMBOL_GPL(scpi_sys_set_mcu_state_suspend);
476 int scpi_sys_set_mcu_state_resume(void)
478 struct scpi_data_buf sdata;
479 struct rockchip_mbox_msg mdata;
489 SCPI_SETUP_DBUF(sdata, mdata, SCPI_CL_SYS,
490 SCPI_SYS_SET_MCU_STATE_RESUME, tx_buf, rx_buf);
491 return scpi_execute_cmd(&sdata);
493 EXPORT_SYMBOL_GPL(scpi_sys_set_mcu_state_resume);
495 int scpi_ddr_init(u32 dram_speed_bin, u32 freq, u32 lcdc_type)
497 struct scpi_data_buf sdata;
498 struct rockchip_mbox_msg mdata;
508 tx_buf.dram_speed_bin = (u32)dram_speed_bin;
509 tx_buf.freq = (u32)freq;
510 tx_buf.lcdc_type = (u32)lcdc_type;
512 SCPI_SETUP_DBUF(sdata, mdata, SCPI_CL_DDR,
513 SCPI_DDR_INIT, tx_buf, rx_buf);
514 return scpi_execute_cmd(&sdata);
516 EXPORT_SYMBOL_GPL(scpi_ddr_init);
518 int scpi_ddr_set_clk_rate(u32 rate, u32 lcdc_type)
520 struct scpi_data_buf sdata;
521 struct rockchip_mbox_msg mdata;
530 tx_buf.clk_rate = (u32)rate;
531 tx_buf.lcdc_type = (u32)lcdc_type;
532 SCPI_SETUP_DBUF(sdata, mdata, SCPI_CL_DDR,
533 SCPI_DDR_SET_FREQ, tx_buf, rx_buf);
534 return scpi_execute_cmd(&sdata);
536 EXPORT_SYMBOL_GPL(scpi_ddr_set_clk_rate);
538 int scpi_ddr_round_rate(u32 m_hz)
540 struct scpi_data_buf sdata;
541 struct rockchip_mbox_msg mdata;
550 tx_buf.clk_rate = (u32)m_hz;
552 SCPI_SETUP_DBUF(sdata, mdata, SCPI_CL_DDR,
553 SCPI_DDR_ROUND_RATE, tx_buf, rx_buf);
554 if (scpi_execute_cmd(&sdata))
557 return rx_buf.round_rate;
559 EXPORT_SYMBOL_GPL(scpi_ddr_round_rate);
561 int scpi_ddr_set_auto_self_refresh(u32 en)
563 struct scpi_data_buf sdata;
564 struct rockchip_mbox_msg mdata;
572 tx_buf.enable = (u32)en;
574 SCPI_SETUP_DBUF(sdata, mdata, SCPI_CL_DDR,
575 SCPI_DDR_AUTO_SELF_REFRESH, tx_buf, rx_buf);
576 return scpi_execute_cmd(&sdata);
578 EXPORT_SYMBOL_GPL(scpi_ddr_set_auto_self_refresh);
580 int scpi_ddr_bandwidth_get(struct ddr_bw_info *ddr_bw_ch0,
581 struct ddr_bw_info *ddr_bw_ch1)
583 struct scpi_data_buf sdata;
584 struct rockchip_mbox_msg mdata;
590 struct ddr_bw_info ddr_bw_ch0;
591 struct ddr_bw_info ddr_bw_ch1;
596 SCPI_SETUP_DBUF(sdata, mdata, SCPI_CL_DDR,
597 SCPI_DDR_BANDWIDTH_GET, tx_buf, rx_buf);
598 if (scpi_execute_cmd(&sdata))
601 memcpy(ddr_bw_ch0, &(rx_buf.ddr_bw_ch0), sizeof(rx_buf.ddr_bw_ch0));
602 memcpy(ddr_bw_ch1, &(rx_buf.ddr_bw_ch1), sizeof(rx_buf.ddr_bw_ch1));
606 EXPORT_SYMBOL_GPL(scpi_ddr_bandwidth_get);
608 int scpi_ddr_get_clk_rate(void)
610 struct scpi_data_buf sdata;
611 struct rockchip_mbox_msg mdata;
621 SCPI_SETUP_DBUF(sdata, mdata, SCPI_CL_DDR,
622 SCPI_DDR_GET_FREQ, tx_buf, rx_buf);
623 if (scpi_execute_cmd(&sdata))
626 return rx_buf.clk_rate;
628 EXPORT_SYMBOL_GPL(scpi_ddr_get_clk_rate);
630 int scpi_thermal_get_temperature(void)
633 struct scpi_data_buf sdata;
634 struct rockchip_mbox_msg mdata;
645 SCPI_SETUP_DBUF(sdata, mdata, SCPI_CL_THERMAL,
646 SCPI_THERMAL_GET_TSADC_DATA, tx_buf, rx_buf);
648 ret = scpi_execute_cmd(&sdata);
650 pr_err("get temperature from MCU failed, ret=%d\n", ret);
654 return rx_buf.tsadc_data;
656 EXPORT_SYMBOL_GPL(scpi_thermal_get_temperature);
658 int scpi_thermal_set_clk_cycle(u32 cycle)
660 struct scpi_data_buf sdata;
661 struct rockchip_mbox_msg mdata;
670 tx_buf.clk_cycle = cycle;
671 SCPI_SETUP_DBUF(sdata, mdata, SCPI_CL_THERMAL,
672 SCPI_THERMAL_SET_TSADC_CYCLE, tx_buf, rx_buf);
674 return scpi_execute_cmd(&sdata);
676 EXPORT_SYMBOL_GPL(scpi_thermal_set_clk_cycle);
678 static struct of_device_id mobx_scpi_of_match[] = {
679 { .compatible = "rockchip,mbox-scpi"},
682 MODULE_DEVICE_TABLE(of, mobx_scpi_of_match);
684 static int mobx_scpi_probe(struct platform_device *pdev)
689 struct scpi_mcu_ver mcu_ver;
690 int check_version = 1; /*0: not check version, 1: check version*/
692 the_scpi_device = &pdev->dev;
694 /* try to get mboxes chan nums from DT */
695 if (of_property_read_u32((&pdev->dev)->of_node, "chan-nums", &val)) {
696 dev_err(&pdev->dev, "parse mboxes chan-nums failed\n");
703 /* try to check up with SCPI version from MCU */
704 while ((retry--) && (check_version != 0)) {
705 memset(&mcu_ver, 0, sizeof(mcu_ver));
707 ret = scpi_get_version(SCPI_VERSION, &mcu_ver);
708 if ((ret == 0) && (mcu_ver.scpi_ver == SCPI_VERSION))
712 if ((retry <= 0) && (check_version != 0)) {
714 "Scpi verison not match:kernel ver:0x%x, MCU ver:0x%x, ret=%d\n",
715 SCPI_VERSION, mcu_ver.scpi_ver, ret);
720 dev_info(&pdev->dev, "Scpi initialize, version: 0x%x, chan nums: %d\n",
721 mcu_ver.scpi_ver, val);
722 dev_info(&pdev->dev, "MCU version: %s\n", mcu_ver.mcu_ver);
726 the_scpi_device = NULL;
730 static struct platform_driver mbox_scpi_driver = {
731 .probe = mobx_scpi_probe,
734 .of_match_table = of_match_ptr(mobx_scpi_of_match),
738 static int __init rockchip_mbox_scpi_init(void)
740 return platform_driver_register(&mbox_scpi_driver);
742 subsys_initcall(rockchip_mbox_scpi_init);