4 * Sony Ascot3E DVB-T/T2/C/C2 tuner driver
6 * Copyright 2012 Sony Corporation
7 * Copyright (C) 2014 NetUP Inc.
8 * Copyright (C) 2014 Sergey Kozlov <serjk@netup.ru>
9 * Copyright (C) 2014 Abylay Ospan <aospan@netup.ru>
11 * This program is free software; you can redistribute it and/or modify
12 * it under the terms of the GNU General Public License as published by
13 * the Free Software Foundation; either version 2 of the License, or
14 * (at your option) any later version.
16 * This program is distributed in the hope that it will be useful,
17 * but WITHOUT ANY WARRANTY; without even the implied warranty of
18 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
19 * GNU General Public License for more details.
22 #include <linux/slab.h>
23 #include <linux/module.h>
24 #include <linux/dvb/frontend.h>
25 #include <linux/types.h>
27 #include "dvb_frontend.h"
38 struct i2c_adapter *i2c;
39 enum ascot2e_state state;
41 int (*set_tuner)(void *, int);
44 enum ascot2e_tv_system_t {
49 ASCOT2E_DTV_DVBT2_1_7,
61 struct ascot2e_band_sett {
74 #define ASCOT2E_AUTO 0xff
75 #define ASCOT2E_OFFSET(ofs) ((u8)(ofs) & 0x1F)
76 #define ASCOT2E_BW_6 0x00
77 #define ASCOT2E_BW_7 0x01
78 #define ASCOT2E_BW_8 0x02
79 #define ASCOT2E_BW_1_7 0x03
81 static struct ascot2e_band_sett ascot2e_sett[] = {
82 { ASCOT2E_AUTO, ASCOT2E_AUTO, 0x03, ASCOT2E_AUTO, 0x06,
83 ASCOT2E_OFFSET(-8), ASCOT2E_OFFSET(-6), ASCOT2E_BW_6, 0x0B, 0x00 },
84 { ASCOT2E_AUTO, ASCOT2E_AUTO, 0x03, ASCOT2E_AUTO, 0x06,
85 ASCOT2E_OFFSET(-8), ASCOT2E_OFFSET(-6), ASCOT2E_BW_6, 0x0B, 0x00 },
86 { ASCOT2E_AUTO, ASCOT2E_AUTO, 0x03, ASCOT2E_AUTO, 0x06,
87 ASCOT2E_OFFSET(-6), ASCOT2E_OFFSET(-4), ASCOT2E_BW_7, 0x0B, 0x00 },
88 { ASCOT2E_AUTO, ASCOT2E_AUTO, 0x03, ASCOT2E_AUTO, 0x06,
89 ASCOT2E_OFFSET(-4), ASCOT2E_OFFSET(-2), ASCOT2E_BW_8, 0x0B, 0x00 },
90 { ASCOT2E_AUTO, ASCOT2E_AUTO, 0x03, ASCOT2E_AUTO, 0x06,
91 ASCOT2E_OFFSET(-10), ASCOT2E_OFFSET(-16), ASCOT2E_BW_1_7, 0x0B, 0x00 },
92 { ASCOT2E_AUTO, ASCOT2E_AUTO, 0x03, ASCOT2E_AUTO, 0x06,
93 ASCOT2E_OFFSET(-8), ASCOT2E_OFFSET(-6), ASCOT2E_BW_6, 0x0B, 0x00 },
94 { ASCOT2E_AUTO, ASCOT2E_AUTO, 0x03, ASCOT2E_AUTO, 0x06,
95 ASCOT2E_OFFSET(-8), ASCOT2E_OFFSET(-6), ASCOT2E_BW_6, 0x0B, 0x00 },
96 { ASCOT2E_AUTO, ASCOT2E_AUTO, 0x03, ASCOT2E_AUTO, 0x06,
97 ASCOT2E_OFFSET(-6), ASCOT2E_OFFSET(-4), ASCOT2E_BW_7, 0x0B, 0x00 },
98 { ASCOT2E_AUTO, ASCOT2E_AUTO, 0x03, ASCOT2E_AUTO, 0x06,
99 ASCOT2E_OFFSET(-4), ASCOT2E_OFFSET(-2), ASCOT2E_BW_8, 0x0B, 0x00 },
100 { ASCOT2E_AUTO, ASCOT2E_AUTO, 0x02, ASCOT2E_AUTO, 0x03,
101 ASCOT2E_OFFSET(-6), ASCOT2E_OFFSET(-8), ASCOT2E_BW_6, 0x09, 0x00 },
102 { ASCOT2E_AUTO, ASCOT2E_AUTO, 0x02, ASCOT2E_AUTO, 0x03,
103 ASCOT2E_OFFSET(-2), ASCOT2E_OFFSET(-1), ASCOT2E_BW_8, 0x09, 0x00 },
104 { ASCOT2E_AUTO, ASCOT2E_AUTO, 0x03, ASCOT2E_AUTO, 0x01,
105 ASCOT2E_OFFSET(-6), ASCOT2E_OFFSET(-4), ASCOT2E_BW_6, 0x09, 0x00 },
106 { ASCOT2E_AUTO, ASCOT2E_AUTO, 0x03, ASCOT2E_AUTO, 0x01,
107 ASCOT2E_OFFSET(-2), ASCOT2E_OFFSET(2), ASCOT2E_BW_8, 0x09, 0x00 }
110 static void ascot2e_i2c_debug(struct ascot2e_priv *priv,
111 u8 reg, u8 write, const u8 *data, u32 len)
113 dev_dbg(&priv->i2c->dev, "ascot2e: I2C %s reg 0x%02x size %d\n",
114 (write == 0 ? "read" : "write"), reg, len);
115 print_hex_dump_bytes("ascot2e: I2C data: ",
116 DUMP_PREFIX_OFFSET, data, len);
119 static int ascot2e_write_regs(struct ascot2e_priv *priv,
120 u8 reg, const u8 *data, u32 len)
124 struct i2c_msg msg[1] = {
126 .addr = priv->i2c_address,
133 ascot2e_i2c_debug(priv, reg, 1, data, len);
135 memcpy(&buf[1], data, len);
136 ret = i2c_transfer(priv->i2c, msg, 1);
137 if (ret >= 0 && ret != 1)
140 dev_warn(&priv->i2c->dev,
141 "%s: i2c wr failed=%d reg=%02x len=%d\n",
142 KBUILD_MODNAME, ret, reg, len);
148 static int ascot2e_write_reg(struct ascot2e_priv *priv, u8 reg, u8 val)
150 return ascot2e_write_regs(priv, reg, &val, 1);
153 static int ascot2e_read_regs(struct ascot2e_priv *priv,
154 u8 reg, u8 *val, u32 len)
157 struct i2c_msg msg[2] = {
159 .addr = priv->i2c_address,
164 .addr = priv->i2c_address,
171 ret = i2c_transfer(priv->i2c, &msg[0], 1);
172 if (ret >= 0 && ret != 1)
175 dev_warn(&priv->i2c->dev,
176 "%s: I2C rw failed=%d addr=%02x reg=%02x\n",
177 KBUILD_MODNAME, ret, priv->i2c_address, reg);
180 ret = i2c_transfer(priv->i2c, &msg[1], 1);
181 if (ret >= 0 && ret != 1)
184 dev_warn(&priv->i2c->dev,
185 "%s: i2c rd failed=%d addr=%02x reg=%02x\n",
186 KBUILD_MODNAME, ret, priv->i2c_address, reg);
189 ascot2e_i2c_debug(priv, reg, 0, val, len);
193 static int ascot2e_read_reg(struct ascot2e_priv *priv, u8 reg, u8 *val)
195 return ascot2e_read_regs(priv, reg, val, 1);
198 static int ascot2e_set_reg_bits(struct ascot2e_priv *priv,
199 u8 reg, u8 data, u8 mask)
205 res = ascot2e_read_reg(priv, reg, &rdata);
208 data = ((data & mask) | (rdata & (mask ^ 0xFF)));
210 return ascot2e_write_reg(priv, reg, data);
213 static int ascot2e_enter_power_save(struct ascot2e_priv *priv)
217 dev_dbg(&priv->i2c->dev, "%s()\n", __func__);
218 if (priv->state == STATE_SLEEP)
222 ascot2e_write_regs(priv, 0x14, data, 2);
223 ascot2e_write_reg(priv, 0x50, 0x01);
224 priv->state = STATE_SLEEP;
228 static int ascot2e_leave_power_save(struct ascot2e_priv *priv)
230 u8 data[2] = { 0xFB, 0x0F };
232 dev_dbg(&priv->i2c->dev, "%s()\n", __func__);
233 if (priv->state == STATE_ACTIVE)
235 ascot2e_write_regs(priv, 0x14, data, 2);
236 ascot2e_write_reg(priv, 0x50, 0x00);
237 priv->state = STATE_ACTIVE;
241 static int ascot2e_init(struct dvb_frontend *fe)
243 struct ascot2e_priv *priv = fe->tuner_priv;
245 dev_dbg(&priv->i2c->dev, "%s()\n", __func__);
246 return ascot2e_leave_power_save(priv);
249 static int ascot2e_release(struct dvb_frontend *fe)
251 struct ascot2e_priv *priv = fe->tuner_priv;
253 dev_dbg(&priv->i2c->dev, "%s()\n", __func__);
254 kfree(fe->tuner_priv);
255 fe->tuner_priv = NULL;
259 static int ascot2e_sleep(struct dvb_frontend *fe)
261 struct ascot2e_priv *priv = fe->tuner_priv;
263 dev_dbg(&priv->i2c->dev, "%s()\n", __func__);
264 ascot2e_enter_power_save(priv);
268 static enum ascot2e_tv_system_t ascot2e_get_tv_system(struct dvb_frontend *fe)
270 enum ascot2e_tv_system_t system = ASCOT2E_DTV_UNKNOWN;
271 struct dtv_frontend_properties *p = &fe->dtv_property_cache;
272 struct ascot2e_priv *priv = fe->tuner_priv;
274 if (p->delivery_system == SYS_DVBT) {
275 if (p->bandwidth_hz <= 5000000)
276 system = ASCOT2E_DTV_DVBT_5;
277 else if (p->bandwidth_hz <= 6000000)
278 system = ASCOT2E_DTV_DVBT_6;
279 else if (p->bandwidth_hz <= 7000000)
280 system = ASCOT2E_DTV_DVBT_7;
281 else if (p->bandwidth_hz <= 8000000)
282 system = ASCOT2E_DTV_DVBT_8;
284 system = ASCOT2E_DTV_DVBT_8;
285 p->bandwidth_hz = 8000000;
287 } else if (p->delivery_system == SYS_DVBT2) {
288 if (p->bandwidth_hz <= 5000000)
289 system = ASCOT2E_DTV_DVBT2_5;
290 else if (p->bandwidth_hz <= 6000000)
291 system = ASCOT2E_DTV_DVBT2_6;
292 else if (p->bandwidth_hz <= 7000000)
293 system = ASCOT2E_DTV_DVBT2_7;
294 else if (p->bandwidth_hz <= 8000000)
295 system = ASCOT2E_DTV_DVBT2_8;
297 system = ASCOT2E_DTV_DVBT2_8;
298 p->bandwidth_hz = 8000000;
300 } else if (p->delivery_system == SYS_DVBC_ANNEX_A) {
301 if (p->bandwidth_hz <= 6000000)
302 system = ASCOT2E_DTV_DVBC_6;
303 else if (p->bandwidth_hz <= 8000000)
304 system = ASCOT2E_DTV_DVBC_8;
306 dev_dbg(&priv->i2c->dev,
307 "%s(): ASCOT2E DTV system %d (delsys %d, bandwidth %d)\n",
308 __func__, (int)system, p->delivery_system, p->bandwidth_hz);
312 static int ascot2e_set_params(struct dvb_frontend *fe)
316 enum ascot2e_tv_system_t tv_system;
317 struct dtv_frontend_properties *p = &fe->dtv_property_cache;
318 struct ascot2e_priv *priv = fe->tuner_priv;
320 dev_dbg(&priv->i2c->dev, "%s(): tune frequency %dkHz\n",
321 __func__, p->frequency / 1000);
322 tv_system = ascot2e_get_tv_system(fe);
324 if (tv_system == ASCOT2E_DTV_UNKNOWN) {
325 dev_dbg(&priv->i2c->dev, "%s(): unknown DTV system\n",
330 priv->set_tuner(priv->set_tuner_data, 1);
331 frequency = roundup(p->frequency / 1000, 25);
332 if (priv->state == STATE_SLEEP)
333 ascot2e_leave_power_save(priv);
335 /* IF_OUT_SEL / AGC_SEL setting */
337 if (ascot2e_sett[tv_system].agc_sel != ASCOT2E_AUTO) {
338 /* AGC pin setting from parameter table */
340 (ascot2e_sett[tv_system].agc_sel & 0x03) << 3);
342 if (ascot2e_sett[tv_system].if_out_sel != ASCOT2E_AUTO) {
343 /* IFOUT pin setting from parameter table */
345 (ascot2e_sett[tv_system].if_out_sel & 0x01) << 2);
347 /* Set bit[4:2] only */
348 ascot2e_set_reg_bits(priv, 0x05, data[0], 0x1c);
350 /* REF_R setting (0x06) */
351 if (tv_system == ASCOT2E_DTV_DVBC_6 ||
352 tv_system == ASCOT2E_DTV_DVBC_8) {
354 data[0] = (frequency > 500000) ? 16 : 32;
357 data[0] = (frequency > 500000) ? 2 : 4;
361 /* KBW setting (0x08), KC0 setting (0x09), KC1 setting (0x0A) */
362 if (tv_system == ASCOT2E_DTV_DVBC_6 ||
363 tv_system == ASCOT2E_DTV_DVBC_8) {
372 /* ORDER/R2_RANGE/R2_BANK/C2_BANK setting (0x0B) */
373 if (tv_system == ASCOT2E_DTV_DVBC_6 ||
374 tv_system == ASCOT2E_DTV_DVBC_8)
375 data[5] = (frequency > 500000) ? 0x08 : 0x0c;
377 data[5] = (frequency > 500000) ? 0x30 : 0x38;
378 /* Set MIX_OLL (0x0C) value from parameter table */
379 data[6] = ascot2e_sett[tv_system].mix_oll;
380 /* Set RF_GAIN (0x0D) setting from parameter table */
381 if (ascot2e_sett[tv_system].rf_gain == ASCOT2E_AUTO) {
382 /* RF_GAIN auto control enable */
383 ascot2e_write_reg(priv, 0x4E, 0x01);
384 /* RF_GAIN Default value */
387 /* RF_GAIN auto control disable */
388 ascot2e_write_reg(priv, 0x4E, 0x00);
389 data[7] = ascot2e_sett[tv_system].rf_gain;
391 /* Set IF_BPF_GC/FIF_OFFSET (0x0E) value from parameter table */
392 data[8] = (u8)((ascot2e_sett[tv_system].fif_offset << 3) |
393 (ascot2e_sett[tv_system].if_bpf_gc & 0x07));
394 /* Set BW_OFFSET (0x0F) value from parameter table */
395 data[9] = ascot2e_sett[tv_system].bw_offset;
396 ascot2e_write_regs(priv, 0x06, data, 10);
399 * LNA optimization setting
400 * RF_LNA_DIST1-5, RF_LNA_CM
402 if (tv_system == ASCOT2E_DTV_DVBC_6 ||
403 tv_system == ASCOT2E_DTV_DVBC_8) {
412 ascot2e_write_regs(priv, 0x45, data, 3);
414 Set RF_OLDET_ENX/RF_OLDET_OLL value from parameter table */
415 data[0] = ascot2e_sett[tv_system].rf_oldet;
416 /* Set IF_BPF_F0 value from parameter table */
417 data[1] = ascot2e_sett[tv_system].if_bpf_f0;
418 ascot2e_write_regs(priv, 0x49, data, 2);
421 * RFAGC fast mode / RFAGC auto control enable
422 * (set bit[7], bit[5:4] only)
423 * vco_cal = 1, set MIX_OL_CPU_EN
425 ascot2e_set_reg_bits(priv, 0x0c, 0x90, 0xb0);
426 /* Logic wake up, CPU wake up */
429 ascot2e_write_regs(priv, 0x03, data, 2);
431 data[0] = (u8)(frequency & 0xFF); /* 0x10: FRF_L */
432 data[1] = (u8)((frequency >> 8) & 0xFF); /* 0x11: FRF_M */
433 data[2] = (u8)((frequency >> 16) & 0x0F); /* 0x12: FRF_H (bit[3:0]) */
434 /* 0x12: BW (bit[5:4]) */
435 data[2] |= (u8)(ascot2e_sett[tv_system].bw << 4);
436 data[3] = 0xFF; /* 0x13: VCO calibration enable */
437 data[4] = 0xFF; /* 0x14: Analog block enable */
438 /* Tune (Burst write) */
439 ascot2e_write_regs(priv, 0x10, data, 5);
442 ascot2e_write_reg(priv, 0x04, 0x00);
444 ascot2e_write_reg(priv, 0x03, 0xC0);
445 /* RFAGC normal mode (set bit[5:4] only) */
446 ascot2e_set_reg_bits(priv, 0x0C, 0x00, 0x30);
447 priv->frequency = frequency;
451 static int ascot2e_get_frequency(struct dvb_frontend *fe, u32 *frequency)
453 struct ascot2e_priv *priv = fe->tuner_priv;
455 *frequency = priv->frequency * 1000;
459 static struct dvb_tuner_ops ascot2e_tuner_ops = {
461 .name = "Sony ASCOT2E",
462 .frequency_min = 1000000,
463 .frequency_max = 1200000000,
464 .frequency_step = 25000,
466 .init = ascot2e_init,
467 .release = ascot2e_release,
468 .sleep = ascot2e_sleep,
469 .set_params = ascot2e_set_params,
470 .get_frequency = ascot2e_get_frequency,
473 struct dvb_frontend *ascot2e_attach(struct dvb_frontend *fe,
474 const struct ascot2e_config *config,
475 struct i2c_adapter *i2c)
478 struct ascot2e_priv *priv = NULL;
480 priv = kzalloc(sizeof(struct ascot2e_priv), GFP_KERNEL);
483 priv->i2c_address = (config->i2c_address >> 1);
485 priv->set_tuner_data = config->set_tuner_priv;
486 priv->set_tuner = config->set_tuner_callback;
488 if (fe->ops.i2c_gate_ctrl)
489 fe->ops.i2c_gate_ctrl(fe, 1);
491 /* 16 MHz xTal frequency */
493 /* VCO current setting */
495 /* Logic wake up, CPU boot */
498 ascot2e_write_regs(priv, 0x01, data, 4);
499 /* RFVGA optimization setting (RF_DIST0 - RF_DIST2) */
503 ascot2e_write_regs(priv, 0x22, data, 3);
504 /* PLL mode setting */
505 ascot2e_write_reg(priv, 0x28, 0x1e);
507 ascot2e_write_reg(priv, 0x59, 0x04);
508 /* TODO check CPU HW error state here */
510 /* Xtal oscillator current control setting */
511 ascot2e_write_reg(priv, 0x4c, 0x01);
513 ascot2e_write_reg(priv, 0x07, 0x04);
515 ascot2e_write_reg(priv, 0x04, 0x00);
517 ascot2e_write_reg(priv, 0x03, 0xc0);
518 /* Power save setting */
521 ascot2e_write_regs(priv, 0x14, data, 2);
522 ascot2e_write_reg(priv, 0x50, 0x01);
523 priv->state = STATE_SLEEP;
525 if (fe->ops.i2c_gate_ctrl)
526 fe->ops.i2c_gate_ctrl(fe, 0);
528 memcpy(&fe->ops.tuner_ops, &ascot2e_tuner_ops,
529 sizeof(struct dvb_tuner_ops));
530 fe->tuner_priv = priv;
531 dev_info(&priv->i2c->dev,
532 "Sony ASCOT2E attached on addr=%x at I2C adapter %p\n",
533 priv->i2c_address, priv->i2c);
536 EXPORT_SYMBOL(ascot2e_attach);
538 MODULE_DESCRIPTION("Sony ASCOT2E terr/cab tuner driver");
539 MODULE_AUTHOR("info@netup.ru");
540 MODULE_LICENSE("GPL");