drivers/media/dvb-frontends/cx24120.c

   1 /*
   2     Conexant cx24120/cx24118 - DVBS/S2 Satellite demod/tuner driver
   3
   4     Copyright (C) 2008 Patrick Boettcher <pb@linuxtv.org>
   5     Copyright (C) 2009 Sergey Tyurin <forum.free-x.de>
   6     Updated 2012 by Jannis Achstetter <jannis_achstetter@web.de>
   7     Copyright (C) 2015 Jemma Denson <jdenson@gmail.com>
   8         April 2015
   9             Refactored & simplified driver
  10             Updated to work with delivery system supplied by DVBv5
  11             Add frequency, fec & pilot to get_frontend
  12
  13         Cards supported: Technisat Skystar S2
  14
  15     This program is free software; you can redistribute it and/or modify
  16     it under the terms of the GNU General Public License as published by
  17     the Free Software Foundation; either version 2 of the License, or
  18     (at your option) any later version.
  19
  20     This program is distributed in the hope that it will be useful,
  21     but WITHOUT ANY WARRANTY; without even the implied warranty of
  22     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  23     GNU General Public License for more details.
  24 */
  25
  26 #include <linux/slab.h>
  27 #include <linux/kernel.h>
  28 #include <linux/module.h>
  29 #include <linux/moduleparam.h>
  30 #include <linux/init.h>
  31 #include <linux/firmware.h>
  32 #include "dvb_frontend.h"
  33 #include "cx24120.h"
  34
  35 #define CX24120_SEARCH_RANGE_KHZ 5000
  36 #define CX24120_FIRMWARE "dvb-fe-cx24120-1.20.58.2.fw"
  37
  38 /* cx24120 i2c registers  */
  39 #define CX24120_REG_CMD_START   0x00            /* write cmd_id */
  40 #define CX24120_REG_CMD_ARGS    0x01            /* write command arguments */
  41 #define CX24120_REG_CMD_END     0x1f            /* write 0x01 for end */
  42
  43 #define CX24120_REG_MAILBOX     0x33
  44 #define CX24120_REG_FREQ3       0x34            /* frequency */
  45 #define CX24120_REG_FREQ2       0x35
  46 #define CX24120_REG_FREQ1       0x36
  47
  48 #define CX24120_REG_FECMODE     0x39            /* FEC status */
  49 #define CX24120_REG_STATUS      0x3a            /* Tuner status */
  50 #define CX24120_REG_SIGSTR_H    0x3a            /* Signal strength high */
  51 #define CX24120_REG_SIGSTR_L    0x3b            /* Signal strength low byte */
  52 #define CX24120_REG_QUALITY_H   0x40            /* SNR high byte */
  53 #define CX24120_REG_QUALITY_L   0x41            /* SNR low byte */
  54
  55 #define CX24120_REG_BER_HH      0x47            /* BER high byte of high word */
  56 #define CX24120_REG_BER_HL      0x48            /* BER low byte of high word */
  57 #define CX24120_REG_BER_LH      0x49            /* BER high byte of low word */
  58 #define CX24120_REG_BER_LL      0x4a            /* BER low byte of low word */
  59
  60 #define CX24120_REG_UCB_H       0x50            /* UCB high byte */
  61 #define CX24120_REG_UCB_L       0x51            /* UCB low byte  */
  62
  63 #define CX24120_REG_CLKDIV      0xe6
  64 #define CX24120_REG_RATEDIV     0xf0
  65
  66 #define CX24120_REG_REVISION    0xff            /* Chip revision (ro) */
  67
  68 /* Command messages */
  69 enum command_message_id {
  70         CMD_VCO_SET             = 0x10,         /* cmd.len = 12; */
  71         CMD_TUNEREQUEST         = 0x11,         /* cmd.len = 15; */
  72
  73         CMD_MPEG_ONOFF          = 0x13,         /* cmd.len = 4; */
  74         CMD_MPEG_INIT           = 0x14,         /* cmd.len = 7; */
  75         CMD_BANDWIDTH           = 0x15,         /* cmd.len = 12; */
  76         CMD_CLOCK_READ          = 0x16,         /* read clock */
  77         CMD_CLOCK_SET           = 0x17,         /* cmd.len = 10; */
  78
  79         CMD_DISEQC_MSG1         = 0x20,         /* cmd.len = 11; */
  80         CMD_DISEQC_MSG2         = 0x21,         /* cmd.len = d->msg_len + 6; */
  81         CMD_SETVOLTAGE          = 0x22,         /* cmd.len = 2; */
  82         CMD_SETTONE             = 0x23,         /* cmd.len = 4; */
  83         CMD_DISEQC_BURST        = 0x24,         /* cmd.len not used !!! */
  84
  85         CMD_READ_SNR            = 0x1a,         /* Read signal strength */
  86         CMD_START_TUNER         = 0x1b,         /* ??? */
  87
  88         CMD_FWVERSION           = 0x35,
  89
  90         CMD_TUNER_INIT          = 0x3c,         /* cmd.len = 0x03; */
  91 };
  92
  93 #define CX24120_MAX_CMD_LEN     30
  94
  95 /* pilot mask */
  96 #define CX24120_PILOT_OFF       0x00
  97 #define CX24120_PILOT_ON        0x40
  98 #define CX24120_PILOT_AUTO      0x80
  99
 100 /* signal status */
 101 #define CX24120_HAS_SIGNAL      0x01
 102 #define CX24120_HAS_CARRIER     0x02
 103 #define CX24120_HAS_VITERBI     0x04
 104 #define CX24120_HAS_LOCK        0x08
 105 #define CX24120_HAS_UNK1        0x10
 106 #define CX24120_HAS_UNK2        0x20
 107 #define CX24120_STATUS_MASK     0x0f
 108 #define CX24120_SIGNAL_MASK     0xc0
 109
 110 #define info(args...) pr_info("cx24120: " args)
 111 #define err(args...)  pr_err("cx24120: ### ERROR: " args)
 112
 113 /* The Demod/Tuner can't easily provide these, we cache them */
 114 struct cx24120_tuning {
 115         u32 frequency;
 116         u32 symbol_rate;
 117         fe_spectral_inversion_t inversion;
 118         fe_code_rate_t fec;
 119
 120         fe_delivery_system_t delsys;
 121         fe_modulation_t modulation;
 122         fe_pilot_t pilot;
 123
 124         /* Demod values */
 125         u8 fec_val;
 126         u8 fec_mask;
 127         u8 clkdiv;
 128         u8 ratediv;
 129         u8 inversion_val;
 130         u8 pilot_val;
 131 };
 132
 133 /* Private state */
 134 struct cx24120_state {
 135         struct i2c_adapter *i2c;
 136         const struct cx24120_config *config;
 137         struct dvb_frontend frontend;
 138
 139         u8 cold_init;
 140         u8 mpeg_enabled;
 141         u8 need_clock_set;
 142
 143         /* current and next tuning parameters */
 144         struct cx24120_tuning dcur;
 145         struct cx24120_tuning dnxt;
 146
 147         fe_status_t fe_status;
 148 };
 149
 150 /* Command message to firmware */
 151 struct cx24120_cmd {
 152         u8 id;
 153         u8 len;
 154         u8 arg[CX24120_MAX_CMD_LEN];
 155 };
 156
 157 /* Read single register */
 158 static int cx24120_readreg(struct cx24120_state *state, u8 reg)
 159 {
 160         int ret;
 161         u8 buf = 0;
 162         struct i2c_msg msg[] = {
 163                 {
 164                         .addr = state->config->i2c_addr,
 165                         .flags = 0,
 166                         .len = 1,
 167                         .buf = &reg
 168                 }, {
 169                         .addr = state->config->i2c_addr,
 170                         .flags = I2C_M_RD,
 171                         .len = 1,
 172                         .buf = &buf
 173                 }
 174         };
 175
 176         ret = i2c_transfer(state->i2c, msg, 2);
 177         if (ret != 2) {
 178                 err("Read error: reg=0x%02x, ret=%i)\n", reg, ret);
 179                 return ret;
 180         }
 181
 182         dev_dbg(&state->i2c->dev, "reg=0x%02x; data=0x%02x\n", reg, buf);
 183
 184         return buf;
 185 }
 186
 187 /* Write single register */
 188 static int cx24120_writereg(struct cx24120_state *state, u8 reg, u8 data)
 189 {
 190         u8 buf[] = { reg, data };
 191         struct i2c_msg msg = {
 192                 .addr = state->config->i2c_addr,
 193                 .flags = 0,
 194                 .buf = buf,
 195                 .len = 2
 196         };
 197         int ret;
 198
 199         ret = i2c_transfer(state->i2c, &msg, 1);
 200         if (ret != 1) {
 201                 err("Write error: i2c_write error(err == %i, 0x%02x: 0x%02x)\n",
 202                     ret, reg, data);
 203                 return ret;
 204         }
 205
 206         dev_dbg(&state->i2c->dev, "reg=0x%02x; data=0x%02x\n", reg, data);
 207
 208         return 0;
 209 }
 210
 211 /* Write multiple registers in chunks of i2c_wr_max-sized buffers */
 212 static int cx24120_writeregs(struct cx24120_state *state,
 213                              u8 reg, const u8 *values, u16 len, u8 incr)
 214 {
 215         int ret;
 216         u16 max = state->config->i2c_wr_max > 0 ?
 217                                 state->config->i2c_wr_max :
 218                                 len;
 219
 220         struct i2c_msg msg = {
 221                 .addr = state->config->i2c_addr,
 222                 .flags = 0,
 223         };
 224
 225         msg.buf = kmalloc(max + 1, GFP_KERNEL);
 226         if (!msg.buf)
 227                 return -ENOMEM;
 228
 229         while (len) {
 230                 msg.buf[0] = reg;
 231                 msg.len = len > max ? max : len;
 232                 memcpy(&msg.buf[1], values, msg.len);
 233
 234                 len    -= msg.len;      /* data length revers counter */
 235                 values += msg.len;      /* incr data pointer */
 236
 237                 if (incr)
 238                         reg += msg.len;
 239                 msg.len++;              /* don't forget the addr byte */
 240
 241                 ret = i2c_transfer(state->i2c, &msg, 1);
 242                 if (ret != 1) {
 243                         err("i2c_write error(err == %i, 0x%02x)\n", ret, reg);
 244                         goto out;
 245                 }
 246
 247                 dev_dbg(&state->i2c->dev, "reg=0x%02x; data=%*ph\n",
 248                         reg, msg.len - 1, msg.buf + 1);
 249         }
 250
 251         ret = 0;
 252
 253 out:
 254         kfree(msg.buf);
 255         return ret;
 256 }
 257
 258 static struct dvb_frontend_ops cx24120_ops;
 259
 260 struct dvb_frontend *cx24120_attach(const struct cx24120_config *config,
 261                                     struct i2c_adapter *i2c)
 262 {
 263         struct cx24120_state *state;
 264         int demod_rev;
 265
 266         info("Conexant cx24120/cx24118 - DVBS/S2 Satellite demod/tuner\n");
 267         state = kzalloc(sizeof(*state), GFP_KERNEL);
 268         if (!state) {
 269                 err("Unable to allocate memory for cx24120_state\n");
 270                 goto error;
 271         }
 272
 273         /* setup the state */
 274         state->config = config;
 275         state->i2c = i2c;
 276
 277         /* check if the demod is present and has proper type */
 278         demod_rev = cx24120_readreg(state, CX24120_REG_REVISION);
 279         switch (demod_rev) {
 280         case 0x07:
 281                 info("Demod cx24120 rev. 0x07 detected.\n");
 282                 break;
 283         case 0x05:
 284                 info("Demod cx24120 rev. 0x05 detected.\n");
 285                 break;
 286         default:
 287                 err("Unsupported demod revision: 0x%x detected.\n", demod_rev);
 288                 goto error;
 289         }
 290
 291         /* create dvb_frontend */
 292         state->cold_init = 0;
 293         memcpy(&state->frontend.ops, &cx24120_ops,
 294                sizeof(struct dvb_frontend_ops));
 295         state->frontend.demodulator_priv = state;
 296
 297         info("Conexant cx24120/cx24118 attached.\n");
 298         return &state->frontend;
 299
 300 error:
 301         kfree(state);
 302         return NULL;
 303 }
 304 EXPORT_SYMBOL(cx24120_attach);
 305
 306 static int cx24120_test_rom(struct cx24120_state *state)
 307 {
 308         int err, ret;
 309
 310         err = cx24120_readreg(state, 0xfd);
 311         if (err & 4) {
 312                 ret = cx24120_readreg(state, 0xdf) & 0xfe;
 313                 err = cx24120_writereg(state, 0xdf, ret);
 314         }
 315         return err;
 316 }
 317
 318 static int cx24120_read_snr(struct dvb_frontend *fe, u16 *snr)
 319 {
 320         struct dtv_frontend_properties *c = &fe->dtv_property_cache;
 321
 322         if (c->cnr.stat[0].scale != FE_SCALE_DECIBEL)
 323                 *snr = 0;
 324         else
 325                 *snr = div_s64(c->cnr.stat[0].svalue, 100);
 326
 327         return 0;
 328 }
 329
 330 static int cx24120_read_ber(struct dvb_frontend *fe, u32 *ber)
 331 {
 332         struct cx24120_state *state = fe->demodulator_priv;
 333
 334         *ber =  (cx24120_readreg(state, CX24120_REG_BER_HH) << 24)      |
 335                 (cx24120_readreg(state, CX24120_REG_BER_HL) << 16)      |
 336                 (cx24120_readreg(state, CX24120_REG_BER_LH) <<  8)      |
 337                  cx24120_readreg(state, CX24120_REG_BER_LL);
 338         dev_dbg(&state->i2c->dev, "read BER index = %d\n", *ber);
 339
 340         return 0;
 341 }
 342
 343 static int cx24120_msg_mpeg_output_global_config(struct cx24120_state *state,
 344                                                  u8 flag);
 345
 346 /* Check if we're running a command that needs to disable mpeg out */
 347 static void cx24120_check_cmd(struct cx24120_state *state, u8 id)
 348 {
 349         switch (id) {
 350         case CMD_TUNEREQUEST:
 351         case CMD_CLOCK_READ:
 352         case CMD_DISEQC_MSG1:
 353         case CMD_DISEQC_MSG2:
 354         case CMD_SETVOLTAGE:
 355         case CMD_SETTONE:
 356         case CMD_DISEQC_BURST:
 357                 cx24120_msg_mpeg_output_global_config(state, 0);
 358                 /* Old driver would do a msleep(100) here */
 359         default:
 360                 return;
 361         }
 362 }
 363
 364 /* Send a message to the firmware */
 365 static int cx24120_message_send(struct cx24120_state *state,
 366                                 struct cx24120_cmd *cmd)
 367 {
 368         int ret, ficus;
 369
 370         if (state->mpeg_enabled) {
 371                 /* Disable mpeg out on certain commands */
 372                 cx24120_check_cmd(state, cmd->id);
 373         }
 374
 375         ret = cx24120_writereg(state, CX24120_REG_CMD_START, cmd->id);
 376         ret = cx24120_writeregs(state, CX24120_REG_CMD_ARGS, &cmd->arg[0],
 377                                 cmd->len, 1);
 378         ret = cx24120_writereg(state, CX24120_REG_CMD_END, 0x01);
 379
 380         ficus = 1000;
 381         while (cx24120_readreg(state, CX24120_REG_CMD_END)) {
 382                 msleep(20);
 383                 ficus -= 20;
 384                 if (ficus == 0) {
 385                         err("Error sending message to firmware\n");
 386                         return -EREMOTEIO;
 387                 }
 388         }
 389         dev_dbg(&state->i2c->dev, "sent message 0x%02x\n", cmd->id);
 390
 391         return 0;
 392 }
 393
 394 /* Send a message and fill arg[] with the results */
 395 static int cx24120_message_sendrcv(struct cx24120_state *state,
 396                                    struct cx24120_cmd *cmd, u8 numreg)
 397 {
 398         int ret, i;
 399
 400         if (numreg > CX24120_MAX_CMD_LEN) {
 401                 err("Too many registers to read. cmd->reg = %d", numreg);
 402                 return -EREMOTEIO;
 403         }
 404
 405         ret = cx24120_message_send(state, cmd);
 406         if (ret != 0)
 407                 return ret;
 408
 409         if (!numreg)
 410                 return 0;
 411
 412         /* Read numreg registers starting from register cmd->len */
 413         for (i = 0; i < numreg; i++)
 414                 cmd->arg[i] = cx24120_readreg(state, (cmd->len + i + 1));
 415
 416         return 0;
 417 }
 418
 419 static int cx24120_read_signal_strength(struct dvb_frontend *fe,
 420                                         u16 *signal_strength)
 421 {
 422         struct dtv_frontend_properties *c = &fe->dtv_property_cache;
 423
 424         if (c->strength.stat[0].scale != FE_SCALE_RELATIVE)
 425                 *signal_strength = 0;
 426         else
 427                 *signal_strength = c->strength.stat[0].uvalue;
 428
 429         return 0;
 430 }
 431
 432 static int cx24120_msg_mpeg_output_global_config(struct cx24120_state *state,
 433                                                  u8 enable)
 434 {
 435         struct cx24120_cmd cmd;
 436         int ret;
 437
 438         cmd.id = CMD_MPEG_ONOFF;
 439         cmd.len = 4;
 440         cmd.arg[0] = 0x01;
 441         cmd.arg[1] = 0x00;
 442         cmd.arg[2] = enable ? 0 : (u8)(-1);
 443         cmd.arg[3] = 0x01;
 444
 445         ret = cx24120_message_send(state, &cmd);
 446         if (ret != 0) {
 447                 dev_dbg(&state->i2c->dev, "failed to %s MPEG output\n",
 448                         enable ? "enable" : "disable");
 449                 return ret;
 450         }
 451
 452         state->mpeg_enabled = enable;
 453         dev_dbg(&state->i2c->dev, "MPEG output %s\n",
 454                 enable ? "enabled" : "disabled");
 455
 456         return 0;
 457 }
 458
 459 static int cx24120_msg_mpeg_output_config(struct cx24120_state *state, u8 seq)
 460 {
 461         struct cx24120_cmd cmd;
 462         struct cx24120_initial_mpeg_config i =
 463                         state->config->initial_mpeg_config;
 464
 465         cmd.id = CMD_MPEG_INIT;
 466         cmd.len = 7;
 467         cmd.arg[0] = seq; /* sequental number - can be 0,1,2 */
 468         cmd.arg[1] = ((i.x1 & 0x01) << 1) | ((i.x1 >> 1) & 0x01);
 469         cmd.arg[2] = 0x05;
 470         cmd.arg[3] = 0x02;
 471         cmd.arg[4] = ((i.x2 >> 1) & 0x01);
 472         cmd.arg[5] = (i.x2 & 0xf0) | (i.x3 & 0x0f);
 473         cmd.arg[6] = 0x10;
 474
 475         return cx24120_message_send(state, &cmd);
 476 }
 477
 478 static int cx24120_diseqc_send_burst(struct dvb_frontend *fe,
 479                                      fe_sec_mini_cmd_t burst)
 480 {
 481         struct cx24120_state *state = fe->demodulator_priv;
 482         struct cx24120_cmd cmd;
 483
 484         dev_dbg(&state->i2c->dev, "\n");
 485
 486         /*
 487          * Yes, cmd.len is set to zero. The old driver
 488          * didn't specify any len, but also had a
 489          * memset 0 before every use of the cmd struct
 490          * which would have set it to zero.
 491          * This quite probably needs looking into.
 492          */
 493         cmd.id = CMD_DISEQC_BURST;
 494         cmd.len = 0;
 495         cmd.arg[0] = 0x00;
 496         cmd.arg[1] = (burst == SEC_MINI_B) ? 0x01 : 0x00;
 497
 498         return cx24120_message_send(state, &cmd);
 499 }
 500
 501 static int cx24120_set_tone(struct dvb_frontend *fe, fe_sec_tone_mode_t tone)
 502 {
 503         struct cx24120_state *state = fe->demodulator_priv;
 504         struct cx24120_cmd cmd;
 505
 506         dev_dbg(&state->i2c->dev, "(%d)\n", tone);
 507
 508         if ((tone != SEC_TONE_ON) && (tone != SEC_TONE_OFF)) {
 509                 err("Invalid tone=%d\n", tone);
 510                 return -EINVAL;
 511         }
 512
 513         cmd.id = CMD_SETTONE;
 514         cmd.len = 4;
 515         cmd.arg[0] = 0x00;
 516         cmd.arg[1] = 0x00;
 517         cmd.arg[2] = 0x00;
 518         cmd.arg[3] = (tone == SEC_TONE_ON) ? 0x01 : 0x00;
 519
 520         return cx24120_message_send(state, &cmd);
 521 }
 522
 523 static int cx24120_set_voltage(struct dvb_frontend *fe,
 524                                fe_sec_voltage_t voltage)
 525 {
 526         struct cx24120_state *state = fe->demodulator_priv;
 527         struct cx24120_cmd cmd;
 528
 529         dev_dbg(&state->i2c->dev, "(%d)\n", voltage);
 530
 531         cmd.id = CMD_SETVOLTAGE;
 532         cmd.len = 2;
 533         cmd.arg[0] = 0x00;
 534         cmd.arg[1] = (voltage == SEC_VOLTAGE_18) ? 0x01 : 0x00;
 535
 536         return cx24120_message_send(state, &cmd);
 537 }
 538
 539 static int cx24120_send_diseqc_msg(struct dvb_frontend *fe,
 540                                    struct dvb_diseqc_master_cmd *d)
 541 {
 542         struct cx24120_state *state = fe->demodulator_priv;
 543         struct cx24120_cmd cmd;
 544         int back_count;
 545
 546         dev_dbg(&state->i2c->dev, "\n");
 547
 548         cmd.id = CMD_DISEQC_MSG1;
 549         cmd.len = 11;
 550         cmd.arg[0] = 0x00;
 551         cmd.arg[1] = 0x00;
 552         cmd.arg[2] = 0x03;
 553         cmd.arg[3] = 0x16;
 554         cmd.arg[4] = 0x28;
 555         cmd.arg[5] = 0x01;
 556         cmd.arg[6] = 0x01;
 557         cmd.arg[7] = 0x14;
 558         cmd.arg[8] = 0x19;
 559         cmd.arg[9] = 0x14;
 560         cmd.arg[10] = 0x1e;
 561
 562         if (cx24120_message_send(state, &cmd)) {
 563                 err("send 1st message(0x%x) failed\n", cmd.id);
 564                 return -EREMOTEIO;
 565         }
 566
 567         cmd.id = CMD_DISEQC_MSG2;
 568         cmd.len = d->msg_len + 6;
 569         cmd.arg[0] = 0x00;
 570         cmd.arg[1] = 0x01;
 571         cmd.arg[2] = 0x02;
 572         cmd.arg[3] = 0x00;
 573         cmd.arg[4] = 0x00;
 574         cmd.arg[5] = d->msg_len;
 575
 576         memcpy(&cmd.arg[6], &d->msg, d->msg_len);
 577
 578         if (cx24120_message_send(state, &cmd)) {
 579                 err("send 2nd message(0x%x) failed\n", cmd.id);
 580                 return -EREMOTEIO;
 581         }
 582
 583         back_count = 500;
 584         do {
 585                 if (!(cx24120_readreg(state, 0x93) & 0x01)) {
 586                         dev_dbg(&state->i2c->dev, "diseqc sequence sent\n");
 587                         return 0;
 588                 }
 589                 msleep(20);
 590                 back_count -= 20;
 591         } while (back_count);
 592
 593         err("Too long waiting for diseqc.\n");
 594         return -ETIMEDOUT;
 595 }
 596
 597 static void cx24120_get_stats(struct cx24120_state *state)
 598 {
 599         struct dvb_frontend *fe = &state->frontend;
 600         struct dtv_frontend_properties *c = &fe->dtv_property_cache;
 601         struct cx24120_cmd cmd;
 602         int ret, cnr;
 603         u16 sig;
 604
 605         dev_dbg(&state->i2c->dev, "\n");
 606
 607         /* signal strength */
 608         if (state->fe_status & FE_HAS_SIGNAL) {
 609                 cmd.id = CMD_READ_SNR;
 610                 cmd.len = 1;
 611                 cmd.arg[0] = 0x00;
 612
 613                 ret = cx24120_message_send(state, &cmd);
 614                 if (ret != 0) {
 615                         err("error reading signal strength\n");
 616                         return;
 617                 }
 618
 619                 /* raw */
 620                 sig = cx24120_readreg(state, CX24120_REG_SIGSTR_H) >> 6;
 621                 sig = sig << 8;
 622                 sig |= cx24120_readreg(state, CX24120_REG_SIGSTR_L);
 623                 dev_dbg(&state->i2c->dev,
 624                         "signal strength from firmware = 0x%x\n", sig);
 625
 626                 /* cooked */
 627                 sig = -100 * sig + 94324;
 628
 629                 c->strength.stat[0].scale = FE_SCALE_RELATIVE;
 630                 c->strength.stat[0].uvalue = sig;
 631         } else {
 632                 c->strength.stat[0].scale = FE_SCALE_NOT_AVAILABLE;
 633         }
 634
 635         /* CNR */
 636         if (state->fe_status & FE_HAS_VITERBI) {
 637                 cnr = cx24120_readreg(state, CX24120_REG_QUALITY_H) << 8;
 638                 cnr |= cx24120_readreg(state, CX24120_REG_QUALITY_L);
 639                 dev_dbg(&state->i2c->dev, "read SNR index = %d\n", cnr);
 640
 641                 /* guessed - seems about right */
 642                 cnr = cnr * 100;
 643
 644                 c->cnr.stat[0].scale = FE_SCALE_DECIBEL;
 645                 c->cnr.stat[0].svalue = cnr;
 646         } else {
 647                 c->cnr.stat[0].scale = FE_SCALE_NOT_AVAILABLE;
 648         }
 649
 650         /* FIXME: add UCB/BER */
 651 }
 652
 653 static void cx24120_set_clock_ratios(struct dvb_frontend *fe);
 654
 655 /* Read current tuning status */
 656 static int cx24120_read_status(struct dvb_frontend *fe, fe_status_t *status)
 657 {
 658         struct cx24120_state *state = fe->demodulator_priv;
 659         int lock;
 660
 661         lock = cx24120_readreg(state, CX24120_REG_STATUS);
 662
 663         dev_dbg(&state->i2c->dev, "status = 0x%02x\n", lock);
 664
 665         *status = 0;
 666
 667         if (lock & CX24120_HAS_SIGNAL)
 668                 *status = FE_HAS_SIGNAL;
 669         if (lock & CX24120_HAS_CARRIER)
 670                 *status |= FE_HAS_CARRIER;
 671         if (lock & CX24120_HAS_VITERBI)
 672                 *status |= FE_HAS_VITERBI | FE_HAS_SYNC;
 673         if (lock & CX24120_HAS_LOCK)
 674                 *status |= FE_HAS_LOCK;
 675
 676         /*
 677          * TODO: is FE_HAS_SYNC in the right place?
 678          * Other cx241xx drivers have this slightly
 679          * different
 680          */
 681
 682         state->fe_status = *status;
 683         cx24120_get_stats(state);
 684
 685         /* Set the clock once tuned in */
 686         if (state->need_clock_set && *status & FE_HAS_LOCK) {
 687                 /* Set clock ratios */
 688                 cx24120_set_clock_ratios(fe);
 689
 690                 /* Old driver would do a msleep(200) here */
 691
 692                 /* Renable mpeg output */
 693                 if (!state->mpeg_enabled)
 694                         cx24120_msg_mpeg_output_global_config(state, 1);
 695
 696                 state->need_clock_set = 0;
 697         }
 698
 699         return 0;
 700 }
 701
 702 /*
 703  * FEC & modulation lookup table
 704  * Used for decoding the REG_FECMODE register
 705  * once tuned in.
 706  */
 707 static struct cx24120_modfec {
 708         fe_delivery_system_t delsys;
 709         fe_modulation_t mod;
 710         fe_code_rate_t fec;
 711         u8 val;
 712 } modfec_lookup_table[] = {
 713         /*delsys     mod    fec       val */
 714         { SYS_DVBS,  QPSK,  FEC_1_2,  0x01 },
 715         { SYS_DVBS,  QPSK,  FEC_2_3,  0x02 },
 716         { SYS_DVBS,  QPSK,  FEC_3_4,  0x03 },
 717         { SYS_DVBS,  QPSK,  FEC_4_5,  0x04 },
 718         { SYS_DVBS,  QPSK,  FEC_5_6,  0x05 },
 719         { SYS_DVBS,  QPSK,  FEC_6_7,  0x06 },
 720         { SYS_DVBS,  QPSK,  FEC_7_8,  0x07 },
 721
 722         { SYS_DVBS2, QPSK,  FEC_1_2,  0x04 },
 723         { SYS_DVBS2, QPSK,  FEC_3_5,  0x05 },
 724         { SYS_DVBS2, QPSK,  FEC_2_3,  0x06 },
 725         { SYS_DVBS2, QPSK,  FEC_3_4,  0x07 },
 726         { SYS_DVBS2, QPSK,  FEC_4_5,  0x08 },
 727         { SYS_DVBS2, QPSK,  FEC_5_6,  0x09 },
 728         { SYS_DVBS2, QPSK,  FEC_8_9,  0x0a },
 729         { SYS_DVBS2, QPSK,  FEC_9_10, 0x0b },
 730
 731         { SYS_DVBS2, PSK_8, FEC_3_5,  0x0c },
 732         { SYS_DVBS2, PSK_8, FEC_2_3,  0x0d },
 733         { SYS_DVBS2, PSK_8, FEC_3_4,  0x0e },
 734         { SYS_DVBS2, PSK_8, FEC_5_6,  0x0f },
 735         { SYS_DVBS2, PSK_8, FEC_8_9,  0x10 },
 736         { SYS_DVBS2, PSK_8, FEC_9_10, 0x11 },
 737 };
 738
 739 /* Retrieve current fec, modulation & pilot values */
 740 static int cx24120_get_fec(struct dvb_frontend *fe)
 741 {
 742         struct dtv_frontend_properties *c = &fe->dtv_property_cache;
 743         struct cx24120_state *state = fe->demodulator_priv;
 744         int idx;
 745         int ret;
 746         int fec;
 747
 748         ret = cx24120_readreg(state, CX24120_REG_FECMODE);
 749         fec = ret & 0x3f; /* Lower 6 bits */
 750
 751         dev_dbg(&state->i2c->dev, "raw fec = %d\n", fec);
 752
 753         for (idx = 0; idx < ARRAY_SIZE(modfec_lookup_table); idx++) {
 754                 if (modfec_lookup_table[idx].delsys != state->dcur.delsys)
 755                         continue;
 756                 if (modfec_lookup_table[idx].val != fec)
 757                         continue;
 758
 759                 break; /* found */
 760         }
 761
 762         if (idx >= ARRAY_SIZE(modfec_lookup_table)) {
 763                 dev_dbg(&state->i2c->dev, "couldn't find fec!\n");
 764                 return -EINVAL;
 765         }
 766
 767         /* save values back to cache */
 768         c->modulation = modfec_lookup_table[idx].mod;
 769         c->fec_inner = modfec_lookup_table[idx].fec;
 770         c->pilot = (ret & 0x80) ? PILOT_ON : PILOT_OFF;
 771
 772         dev_dbg(&state->i2c->dev, "mod(%d), fec(%d), pilot(%d)\n",
 773                 c->modulation, c->fec_inner, c->pilot);
 774
 775         return 0;
 776 }
 777
 778 /*
 779  * Clock ratios lookup table
 780  *
 781  * Values obtained from much larger table in old driver
 782  * which had numerous entries which would never match.
 783  *
 784  * There's probably some way of calculating these but I
 785  * can't determine the pattern
 786  */
 787 static struct cx24120_clock_ratios_table {
 788         fe_delivery_system_t delsys;
 789         fe_pilot_t pilot;
 790         fe_modulation_t mod;
 791         fe_code_rate_t fec;
 792         u32 m_rat;
 793         u32 n_rat;
 794         u32 rate;
 795 } clock_ratios_table[] = {
 796         /*delsys     pilot      mod    fec       m_rat    n_rat   rate */
 797         { SYS_DVBS2, PILOT_OFF, QPSK,  FEC_1_2,  273088,  254505, 274 },
 798         { SYS_DVBS2, PILOT_OFF, QPSK,  FEC_3_5,  17272,   13395,  330 },
 799         { SYS_DVBS2, PILOT_OFF, QPSK,  FEC_2_3,  24344,   16967,  367 },
 800         { SYS_DVBS2, PILOT_OFF, QPSK,  FEC_3_4,  410788,  254505, 413 },
 801         { SYS_DVBS2, PILOT_OFF, QPSK,  FEC_4_5,  438328,  254505, 440 },
 802         { SYS_DVBS2, PILOT_OFF, QPSK,  FEC_5_6,  30464,   16967,  459 },
 803         { SYS_DVBS2, PILOT_OFF, QPSK,  FEC_8_9,  487832,  254505, 490 },
 804         { SYS_DVBS2, PILOT_OFF, QPSK,  FEC_9_10, 493952,  254505, 496 },
 805         { SYS_DVBS2, PILOT_OFF, PSK_8, FEC_3_5,  328168,  169905, 494 },
 806         { SYS_DVBS2, PILOT_OFF, PSK_8, FEC_2_3,  24344,   11327,  550 },
 807         { SYS_DVBS2, PILOT_OFF, PSK_8, FEC_3_4,  410788,  169905, 618 },
 808         { SYS_DVBS2, PILOT_OFF, PSK_8, FEC_5_6,  30464,   11327,  688 },
 809         { SYS_DVBS2, PILOT_OFF, PSK_8, FEC_8_9,  487832,  169905, 735 },
 810         { SYS_DVBS2, PILOT_OFF, PSK_8, FEC_9_10, 493952,  169905, 744 },
 811         { SYS_DVBS2, PILOT_ON,  QPSK,  FEC_1_2,  273088,  260709, 268 },
 812         { SYS_DVBS2, PILOT_ON,  QPSK,  FEC_3_5,  328168,  260709, 322 },
 813         { SYS_DVBS2, PILOT_ON,  QPSK,  FEC_2_3,  121720,  86903,  358 },
 814         { SYS_DVBS2, PILOT_ON,  QPSK,  FEC_3_4,  410788,  260709, 403 },
 815         { SYS_DVBS2, PILOT_ON,  QPSK,  FEC_4_5,  438328,  260709, 430 },
 816         { SYS_DVBS2, PILOT_ON,  QPSK,  FEC_5_6,  152320,  86903,  448 },
 817         { SYS_DVBS2, PILOT_ON,  QPSK,  FEC_8_9,  487832,  260709, 479 },
 818         { SYS_DVBS2, PILOT_ON,  QPSK,  FEC_9_10, 493952,  260709, 485 },
 819         { SYS_DVBS2, PILOT_ON,  PSK_8, FEC_3_5,  328168,  173853, 483 },
 820         { SYS_DVBS2, PILOT_ON,  PSK_8, FEC_2_3,  121720,  57951,  537 },
 821         { SYS_DVBS2, PILOT_ON,  PSK_8, FEC_3_4,  410788,  173853, 604 },
 822         { SYS_DVBS2, PILOT_ON,  PSK_8, FEC_5_6,  152320,  57951,  672 },
 823         { SYS_DVBS2, PILOT_ON,  PSK_8, FEC_8_9,  487832,  173853, 718 },
 824         { SYS_DVBS2, PILOT_ON,  PSK_8, FEC_9_10, 493952,  173853, 727 },
 825         { SYS_DVBS,  PILOT_OFF, QPSK,  FEC_1_2,  152592,  152592, 256 },
 826         { SYS_DVBS,  PILOT_OFF, QPSK,  FEC_2_3,  305184,  228888, 341 },
 827         { SYS_DVBS,  PILOT_OFF, QPSK,  FEC_3_4,  457776,  305184, 384 },
 828         { SYS_DVBS,  PILOT_OFF, QPSK,  FEC_5_6,  762960,  457776, 427 },
 829         { SYS_DVBS,  PILOT_OFF, QPSK,  FEC_7_8,  1068144, 610368, 448 },
 830 };
 831
 832 /* Set clock ratio from lookup table */
 833 static void cx24120_set_clock_ratios(struct dvb_frontend *fe)
 834 {
 835         struct dtv_frontend_properties *c = &fe->dtv_property_cache;
 836         struct cx24120_state *state = fe->demodulator_priv;
 837         struct cx24120_cmd cmd;
 838         int ret, idx;
 839
 840         /* Find fec, modulation, pilot */
 841         ret = cx24120_get_fec(fe);
 842         if (ret != 0)
 843                 return;
 844
 845         /* Find the clock ratios in the lookup table */
 846         for (idx = 0; idx < ARRAY_SIZE(clock_ratios_table); idx++) {
 847                 if (clock_ratios_table[idx].delsys != state->dcur.delsys)
 848                         continue;
 849                 if (clock_ratios_table[idx].mod != c->modulation)
 850                         continue;
 851                 if (clock_ratios_table[idx].fec != c->fec_inner)
 852                         continue;
 853                 if (clock_ratios_table[idx].pilot != c->pilot)
 854                         continue;
 855
 856                 break;          /* found */
 857         }
 858
 859         if (idx >= ARRAY_SIZE(clock_ratios_table)) {
 860                 info("Clock ratio not found - data reception in danger\n");
 861                 return;
 862         }
 863
 864         /* Read current values? */
 865         cmd.id = CMD_CLOCK_READ;
 866         cmd.len = 1;
 867         cmd.arg[0] = 0x00;
 868         ret = cx24120_message_sendrcv(state, &cmd, 6);
 869         if (ret != 0)
 870                 return;
 871         /* in cmd[0]-[5] - result */
 872
 873         dev_dbg(&state->i2c->dev, "m=%d, n=%d; idx: %d m=%d, n=%d, rate=%d\n",
 874                 cmd.arg[2] | (cmd.arg[1] << 8) | (cmd.arg[0] << 16),
 875                 cmd.arg[5] | (cmd.arg[4] << 8) | (cmd.arg[3] << 16),
 876                 idx,
 877                 clock_ratios_table[idx].m_rat,
 878                 clock_ratios_table[idx].n_rat,
 879                 clock_ratios_table[idx].rate);
 880
 881         /* Set the clock */
 882         cmd.id = CMD_CLOCK_SET;
 883         cmd.len = 10;
 884         cmd.arg[0] = 0;
 885         cmd.arg[1] = 0x10;
 886         cmd.arg[2] = (clock_ratios_table[idx].m_rat >> 16) & 0xff;
 887         cmd.arg[3] = (clock_ratios_table[idx].m_rat >>  8) & 0xff;
 888         cmd.arg[4] = (clock_ratios_table[idx].m_rat >>  0) & 0xff;
 889         cmd.arg[5] = (clock_ratios_table[idx].n_rat >> 16) & 0xff;
 890         cmd.arg[6] = (clock_ratios_table[idx].n_rat >>  8) & 0xff;
 891         cmd.arg[7] = (clock_ratios_table[idx].n_rat >>  0) & 0xff;
 892         cmd.arg[8] = (clock_ratios_table[idx].rate >> 8) & 0xff;
 893         cmd.arg[9] = (clock_ratios_table[idx].rate >> 0) & 0xff;
 894
 895         cx24120_message_send(state, &cmd);
 896 }
 897
 898 /* Set inversion value */
 899 static int cx24120_set_inversion(struct cx24120_state *state,
 900                                  fe_spectral_inversion_t inversion)
 901 {
 902         dev_dbg(&state->i2c->dev, "(%d)\n", inversion);
 903
 904         switch (inversion) {
 905         case INVERSION_OFF:
 906                 state->dnxt.inversion_val = 0x00;
 907                 break;
 908         case INVERSION_ON:
 909                 state->dnxt.inversion_val = 0x04;
 910                 break;
 911         case INVERSION_AUTO:
 912                 state->dnxt.inversion_val = 0x0c;
 913                 break;
 914         default:
 915                 return -EINVAL;
 916         }
 917
 918         state->dnxt.inversion = inversion;
 919
 920         return 0;
 921 }
 922
 923 /*
 924  * FEC lookup table for tuning Some DVB-S2 val's have been found by
 925  * trial and error. Sofar it seems to match up with the contents of
 926  * the REG_FECMODE after tuning The rest will probably be the same but
 927  * would need testing.  Anything not in the table will run with
 928  * FEC_AUTO and take a while longer to tune in ( c.500ms instead of
 929  * 30ms )
 930  */
 931 static struct cx24120_modfec_table {
 932         fe_delivery_system_t delsys;
 933         fe_modulation_t mod;
 934         fe_code_rate_t fec;
 935         u8 val;
 936 } modfec_table[] = {
 937         /*delsys        mod     fec      val */
 938         { SYS_DVBS,  QPSK,  FEC_1_2, 0x2e },
 939         { SYS_DVBS,  QPSK,  FEC_2_3, 0x2f },
 940         { SYS_DVBS,  QPSK,  FEC_3_4, 0x30 },
 941         { SYS_DVBS,  QPSK,  FEC_5_6, 0x31 },
 942         { SYS_DVBS,  QPSK,  FEC_6_7, 0x32 },
 943         { SYS_DVBS,  QPSK,  FEC_7_8, 0x33 },
 944
 945         { SYS_DVBS2, QPSK,  FEC_3_4, 0x07 },
 946
 947         { SYS_DVBS2, PSK_8, FEC_2_3, 0x0d },
 948         { SYS_DVBS2, PSK_8, FEC_3_4, 0x0e },
 949 };
 950
 951 /* Set fec_val & fec_mask values from delsys, modulation & fec */
 952 static int cx24120_set_fec(struct cx24120_state *state, fe_modulation_t mod,
 953                            fe_code_rate_t fec)
 954 {
 955         int idx;
 956
 957         dev_dbg(&state->i2c->dev, "(0x%02x,0x%02x)\n", mod, fec);
 958
 959         state->dnxt.fec = fec;
 960
 961         /* Lookup fec_val from modfec table */
 962         for (idx = 0; idx < ARRAY_SIZE(modfec_table); idx++) {
 963                 if (modfec_table[idx].delsys != state->dnxt.delsys)
 964                         continue;
 965                 if (modfec_table[idx].mod != mod)
 966                         continue;
 967                 if (modfec_table[idx].fec != fec)
 968                         continue;
 969
 970                 /* found */
 971                 state->dnxt.fec_mask = 0x00;
 972                 state->dnxt.fec_val = modfec_table[idx].val;
 973                 return 0;
 974         }
 975
 976         if (state->dnxt.delsys == SYS_DVBS2) {
 977                 /* DVBS2 auto is 0x00/0x00 */
 978                 state->dnxt.fec_mask = 0x00;
 979                 state->dnxt.fec_val  = 0x00;
 980         } else {
 981                 /* Set DVB-S to auto */
 982                 state->dnxt.fec_val  = 0x2e;
 983                 state->dnxt.fec_mask = 0xac;
 984         }
 985
 986         return 0;
 987 }
 988
 989 /* Set pilot */
 990 static int cx24120_set_pilot(struct cx24120_state *state, fe_pilot_t pilot)
 991 {
 992         dev_dbg(&state->i2c->dev, "(%d)\n", pilot);
 993
 994         /* Pilot only valid in DVBS2 */
 995         if (state->dnxt.delsys != SYS_DVBS2) {
 996                 state->dnxt.pilot_val = CX24120_PILOT_OFF;
 997                 return 0;
 998         }
 999
1000         switch (pilot) {
1001         case PILOT_OFF:
1002                 state->dnxt.pilot_val = CX24120_PILOT_OFF;
1003                 break;
1004         case PILOT_ON:
1005                 state->dnxt.pilot_val = CX24120_PILOT_ON;
1006                 break;
1007         case PILOT_AUTO:
1008         default:
1009                 state->dnxt.pilot_val = CX24120_PILOT_AUTO;
1010         }
1011
1012         return 0;
1013 }
1014
1015 /* Set symbol rate */
1016 static int cx24120_set_symbolrate(struct cx24120_state *state, u32 rate)
1017 {
1018         dev_dbg(&state->i2c->dev, "(%d)\n", rate);
1019
1020         state->dnxt.symbol_rate = rate;
1021
1022         /* Check symbol rate */
1023         if (rate  > 31000000) {
1024                 state->dnxt.clkdiv  = (-(rate < 31000001) & 3) + 2;
1025                 state->dnxt.ratediv = (-(rate < 31000001) & 6) + 4;
1026         } else {
1027                 state->dnxt.clkdiv  = 3;
1028                 state->dnxt.ratediv = 6;
1029         }
1030
1031         return 0;
1032 }
1033
1034 /* Overwrite the current tuning params, we are about to tune */
1035 static void cx24120_clone_params(struct dvb_frontend *fe)
1036 {
1037         struct cx24120_state *state = fe->demodulator_priv;
1038
1039         state->dcur = state->dnxt;
1040 }
1041
1042 static int cx24120_set_frontend(struct dvb_frontend *fe)
1043 {
1044         struct dtv_frontend_properties *c = &fe->dtv_property_cache;
1045         struct cx24120_state *state = fe->demodulator_priv;
1046         struct cx24120_cmd cmd;
1047         int ret;
1048
1049         switch (c->delivery_system) {
1050         case SYS_DVBS2:
1051                 dev_dbg(&state->i2c->dev, "DVB-S2\n");
1052                 break;
1053         case SYS_DVBS:
1054                 dev_dbg(&state->i2c->dev, "DVB-S\n");
1055                 break;
1056         default:
1057                 dev_dbg(&state->i2c->dev,
1058                         "delivery system(%d) not supported\n",
1059                         c->delivery_system);
1060                 ret = -EINVAL;
1061                 break;
1062         }
1063
1064         state->dnxt.delsys = c->delivery_system;
1065         state->dnxt.modulation = c->modulation;
1066         state->dnxt.frequency = c->frequency;
1067         state->dnxt.pilot = c->pilot;
1068
1069         ret = cx24120_set_inversion(state, c->inversion);
1070         if (ret !=  0)
1071                 return ret;
1072
1073         ret = cx24120_set_fec(state, c->modulation, c->fec_inner);
1074         if (ret !=  0)
1075                 return ret;
1076
1077         ret = cx24120_set_pilot(state, c->pilot);
1078         if (ret != 0)
1079                 return ret;
1080
1081         ret = cx24120_set_symbolrate(state, c->symbol_rate);
1082         if (ret !=  0)
1083                 return ret;
1084
1085         /* discard the 'current' tuning parameters and prepare to tune */
1086         cx24120_clone_params(fe);
1087
1088         dev_dbg(&state->i2c->dev,
1089                 "delsys      = %d\n", state->dcur.delsys);
1090         dev_dbg(&state->i2c->dev,
1091                 "modulation  = %d\n", state->dcur.modulation);
1092         dev_dbg(&state->i2c->dev,
1093                 "frequency   = %d\n", state->dcur.frequency);
1094         dev_dbg(&state->i2c->dev,
1095                 "pilot       = %d (val = 0x%02x)\n",
1096                 state->dcur.pilot, state->dcur.pilot_val);
1097         dev_dbg(&state->i2c->dev,
1098                 "symbol_rate = %d (clkdiv/ratediv = 0x%02x/0x%02x)\n",
1099                  state->dcur.symbol_rate,
1100                  state->dcur.clkdiv, state->dcur.ratediv);
1101         dev_dbg(&state->i2c->dev,
1102                 "FEC         = %d (mask/val = 0x%02x/0x%02x)\n",
1103                 state->dcur.fec, state->dcur.fec_mask, state->dcur.fec_val);
1104         dev_dbg(&state->i2c->dev,
1105                 "Inversion   = %d (val = 0x%02x)\n",
1106                 state->dcur.inversion, state->dcur.inversion_val);
1107
1108         /* Flag that clock needs to be set after tune */
1109         state->need_clock_set = 1;
1110
1111         /* Tune in */
1112         cmd.id = CMD_TUNEREQUEST;
1113         cmd.len = 15;
1114         cmd.arg[0] = 0;
1115         cmd.arg[1]  = (state->dcur.frequency & 0xff0000) >> 16;
1116         cmd.arg[2]  = (state->dcur.frequency & 0x00ff00) >> 8;
1117         cmd.arg[3]  = (state->dcur.frequency & 0x0000ff);
1118         cmd.arg[4]  = ((state->dcur.symbol_rate / 1000) & 0xff00) >> 8;
1119         cmd.arg[5]  = ((state->dcur.symbol_rate / 1000) & 0x00ff);
1120         cmd.arg[6]  = state->dcur.inversion;
1121         cmd.arg[7]  = state->dcur.fec_val | state->dcur.pilot_val;
1122         cmd.arg[8]  = CX24120_SEARCH_RANGE_KHZ >> 8;
1123         cmd.arg[9]  = CX24120_SEARCH_RANGE_KHZ & 0xff;
1124         cmd.arg[10] = 0;                /* maybe rolloff? */
1125         cmd.arg[11] = state->dcur.fec_mask;
1126         cmd.arg[12] = state->dcur.ratediv;
1127         cmd.arg[13] = state->dcur.clkdiv;
1128         cmd.arg[14] = 0;
1129
1130         /* Send tune command */
1131         ret = cx24120_message_send(state, &cmd);
1132         if (ret != 0)
1133                 return ret;
1134
1135         /* Write symbol rate values */
1136         ret = cx24120_writereg(state, CX24120_REG_CLKDIV, state->dcur.clkdiv);
1137         ret = cx24120_readreg(state, CX24120_REG_RATEDIV);
1138         ret &= 0xfffffff0;
1139         ret |= state->dcur.ratediv;
1140         ret = cx24120_writereg(state, CX24120_REG_RATEDIV, ret);
1141
1142         return 0;
1143 }
1144
1145 /* Set vco from config */
1146 static int cx24120_set_vco(struct cx24120_state *state)
1147 {
1148         struct cx24120_cmd cmd;
1149         u32 nxtal_khz, vco;
1150         u64 inv_vco;
1151         u32 xtal_khz = state->config->xtal_khz;
1152
1153         nxtal_khz = xtal_khz * 4;
1154         vco = nxtal_khz * 10;
1155         inv_vco = DIV_ROUND_CLOSEST_ULL(0x400000000ULL, vco);
1156
1157         dev_dbg(&state->i2c->dev, "xtal=%d, vco=%d, inv_vco=%lld\n",
1158                 xtal_khz, vco, inv_vco);
1159
1160         cmd.id = CMD_VCO_SET;
1161         cmd.len = 12;
1162         cmd.arg[0] = (vco >> 16) & 0xff;
1163         cmd.arg[1] = (vco >> 8) & 0xff;
1164         cmd.arg[2] = vco & 0xff;
1165         cmd.arg[3] = (inv_vco >> 8) & 0xff;
1166         cmd.arg[4] = (inv_vco) & 0xff;
1167         cmd.arg[5] = 0x03;
1168         cmd.arg[6] = (nxtal_khz >> 8) & 0xff;
1169         cmd.arg[7] = nxtal_khz & 0xff;
1170         cmd.arg[8] = 0x06;
1171         cmd.arg[9] = 0x03;
1172         cmd.arg[10] = (xtal_khz >> 16) & 0xff;
1173         cmd.arg[11] = xtal_khz & 0xff;
1174
1175         return cx24120_message_send(state, &cmd);
1176 }
1177
1178 int cx24120_init(struct dvb_frontend *fe)
1179 {
1180         const struct firmware *fw;
1181         struct dtv_frontend_properties *c = &fe->dtv_property_cache;
1182         struct cx24120_state *state = fe->demodulator_priv;
1183         struct cx24120_cmd cmd;
1184         u8 ret, reg, reg1;
1185         int reset_result;
1186
1187         int i;
1188         unsigned char vers[4];
1189
1190         if (state->cold_init)
1191                 return 0;
1192
1193         /* ???? */
1194         cx24120_writereg(state, 0xea, 0x00);
1195         cx24120_test_rom(state);
1196         reg = cx24120_readreg(state, 0xfb) & 0xfe;
1197         cx24120_writereg(state, 0xfb, reg);
1198         reg = cx24120_readreg(state, 0xfc) & 0xfe;
1199         cx24120_writereg(state, 0xfc, reg);
1200         cx24120_writereg(state, 0xc3, 0x04);
1201         cx24120_writereg(state, 0xc4, 0x04);
1202         cx24120_writereg(state, 0xce, 0x00);
1203         cx24120_writereg(state, 0xcf, 0x00);
1204         reg = cx24120_readreg(state, 0xea) & 0xfe;
1205         cx24120_writereg(state, 0xea, reg);
1206         cx24120_writereg(state, 0xeb, 0x0c);
1207         cx24120_writereg(state, 0xec, 0x06);
1208         cx24120_writereg(state, 0xed, 0x05);
1209         cx24120_writereg(state, 0xee, 0x03);
1210         cx24120_writereg(state, 0xef, 0x05);
1211         cx24120_writereg(state, 0xf3, 0x03);
1212         cx24120_writereg(state, 0xf4, 0x44);
1213
1214         for (reg1 = 0xf0; reg1 < 0xf3; reg1++) {
1215                 cx24120_writereg(state, reg1, 0x04);
1216                 cx24120_writereg(state, reg1 - 10, 0x02);
1217         }
1218
1219         cx24120_writereg(state, 0xea, (reg | 0x01));
1220         for (reg1 = 0xc5; reg1 < 0xcb; reg1 += 2) {
1221                 cx24120_writereg(state, reg1, 0x00);
1222                 cx24120_writereg(state, reg1 + 1, 0x00);
1223         }
1224
1225         cx24120_writereg(state, 0xe4, 0x03);
1226         cx24120_writereg(state, 0xeb, 0x0a);
1227
1228         dev_dbg(&state->i2c->dev, "requesting firmware (%s) to download...\n",
1229                 CX24120_FIRMWARE);
1230
1231         ret = state->config->request_firmware(fe, &fw, CX24120_FIRMWARE);
1232         if (ret) {
1233                 err("Could not load firmware (%s): %d\n", CX24120_FIRMWARE,
1234                     ret);
1235                 return ret;
1236         }
1237
1238         dev_dbg(&state->i2c->dev,
1239                 "Firmware found, size %d bytes (%02x %02x .. %02x %02x)\n",
1240                 (int)fw->size,                  /* firmware_size in bytes */
1241                 fw->data[0],                    /* fw 1st byte */
1242                 fw->data[1],                    /* fw 2d byte */
1243                 fw->data[fw->size - 2],         /* fw before last byte */
1244                 fw->data[fw->size - 1]);        /* fw last byte */
1245
1246         cx24120_test_rom(state);
1247         reg = cx24120_readreg(state, 0xfb) & 0xfe;
1248         cx24120_writereg(state, 0xfb, reg);
1249         cx24120_writereg(state, 0xe0, 0x76);
1250         cx24120_writereg(state, 0xf7, 0x81);
1251         cx24120_writereg(state, 0xf8, 0x00);
1252         cx24120_writereg(state, 0xf9, 0x00);
1253         cx24120_writeregs(state, 0xfa, fw->data, (fw->size - 1), 0x00);
1254         cx24120_writereg(state, 0xf7, 0xc0);
1255         cx24120_writereg(state, 0xe0, 0x00);
1256         reg = (fw->size - 2) & 0x00ff;
1257         cx24120_writereg(state, 0xf8, reg);
1258         reg = ((fw->size - 2) >> 8) & 0x00ff;
1259         cx24120_writereg(state, 0xf9, reg);
1260         cx24120_writereg(state, 0xf7, 0x00);
1261         cx24120_writereg(state, 0xdc, 0x00);
1262         cx24120_writereg(state, 0xdc, 0x07);
1263         msleep(500);
1264
1265         /* Check final byte matches final byte of firmware */
1266         reg = cx24120_readreg(state, 0xe1);
1267         if (reg == fw->data[fw->size - 1]) {
1268                 dev_dbg(&state->i2c->dev, "Firmware uploaded successfully\n");
1269                 reset_result = 0;
1270         } else {
1271                 err("Firmware upload failed. Last byte returned=0x%x\n", ret);
1272                 reset_result = -EREMOTEIO;
1273         }
1274         cx24120_writereg(state, 0xdc, 0x00);
1275         release_firmware(fw);
1276         if (reset_result != 0)
1277                 return reset_result;
1278
1279         /* Start tuner */
1280         cmd.id = CMD_START_TUNER;
1281         cmd.len = 3;
1282         cmd.arg[0] = 0x00;
1283         cmd.arg[1] = 0x00;
1284         cmd.arg[2] = 0x00;
1285
1286         if (cx24120_message_send(state, &cmd) != 0) {
1287                 err("Error tuner start! :(\n");
1288                 return -EREMOTEIO;
1289         }
1290
1291         /* Set VCO */
1292         ret = cx24120_set_vco(state);
1293         if (ret != 0) {
1294                 err("Error set VCO! :(\n");
1295                 return ret;
1296         }
1297
1298         /* set bandwidth */
1299         cmd.id = CMD_BANDWIDTH;
1300         cmd.len = 12;
1301         cmd.arg[0] = 0x00;
1302         cmd.arg[1] = 0x00;
1303         cmd.arg[2] = 0x00;
1304         cmd.arg[3] = 0x00;
1305         cmd.arg[4] = 0x05;
1306         cmd.arg[5] = 0x02;
1307         cmd.arg[6] = 0x02;
1308         cmd.arg[7] = 0x00;
1309         cmd.arg[8] = 0x05;
1310         cmd.arg[9] = 0x02;
1311         cmd.arg[10] = 0x02;
1312         cmd.arg[11] = 0x00;
1313
1314         if (cx24120_message_send(state, &cmd)) {
1315                 err("Error set bandwidth!\n");
1316                 return -EREMOTEIO;
1317         }
1318
1319         reg = cx24120_readreg(state, 0xba);
1320         if (reg > 3) {
1321                 dev_dbg(&state->i2c->dev, "Reset-readreg 0xba: %x\n", ret);
1322                 err("Error initialising tuner!\n");
1323                 return -EREMOTEIO;
1324         }
1325
1326         dev_dbg(&state->i2c->dev, "Tuner initialised correctly.\n");
1327
1328         /* Initialise mpeg outputs */
1329         cx24120_writereg(state, 0xeb, 0x0a);
1330         if (cx24120_msg_mpeg_output_global_config(state, 0) ||
1331             cx24120_msg_mpeg_output_config(state, 0) ||
1332             cx24120_msg_mpeg_output_config(state, 1) ||
1333             cx24120_msg_mpeg_output_config(state, 2)) {
1334                 err("Error initialising mpeg output. :(\n");
1335                 return -EREMOTEIO;
1336         }
1337
1338         /* ???? */
1339         cmd.id = CMD_TUNER_INIT;
1340         cmd.len = 3;
1341         cmd.arg[0] = 0x00;
1342         cmd.arg[1] = 0x10;
1343         cmd.arg[2] = 0x10;
1344         if (cx24120_message_send(state, &cmd)) {
1345                 err("Error sending final init message. :(\n");
1346                 return -EREMOTEIO;
1347         }
1348
1349         /* Firmware CMD 35: Get firmware version */
1350         cmd.id = CMD_FWVERSION;
1351         cmd.len = 1;
1352         for (i = 0; i < 4; i++) {
1353                 cmd.arg[0] = i;
1354                 ret = cx24120_message_send(state, &cmd);
1355                 if (ret != 0)
1356                         return ret;
1357                 vers[i] = cx24120_readreg(state, CX24120_REG_MAILBOX);
1358         }
1359         info("FW version %i.%i.%i.%i\n", vers[0], vers[1], vers[2], vers[3]);
1360
1361         /* init stats here in order signal app which stats are supported */
1362         c->strength.len = 1;
1363         c->strength.stat[0].scale = FE_SCALE_NOT_AVAILABLE;
1364         c->cnr.len = 1;
1365         c->cnr.stat[0].scale = FE_SCALE_NOT_AVAILABLE;
1366
1367         state->cold_init = 1;
1368         return 0;
1369 }
1370
1371 static int cx24120_tune(struct dvb_frontend *fe, bool re_tune,
1372                         unsigned int mode_flags, unsigned int *delay,
1373                         fe_status_t *status)
1374 {
1375         struct cx24120_state *state = fe->demodulator_priv;
1376         int ret;
1377
1378         dev_dbg(&state->i2c->dev, "(%d)\n", re_tune);
1379
1380         /* TODO: Do we need to set delay? */
1381
1382         if (re_tune) {
1383                 ret = cx24120_set_frontend(fe);
1384                 if (ret)
1385                         return ret;
1386         }
1387
1388         return cx24120_read_status(fe, status);
1389 }
1390
1391 static int cx24120_get_algo(struct dvb_frontend *fe)
1392 {
1393         return DVBFE_ALGO_HW;
1394 }
1395
1396 static int cx24120_sleep(struct dvb_frontend *fe)
1397 {
1398         return 0;
1399 }
1400
1401 static int cx24120_get_frontend(struct dvb_frontend *fe)
1402 {
1403         struct dtv_frontend_properties *c = &fe->dtv_property_cache;
1404         struct cx24120_state *state = fe->demodulator_priv;
1405         u8 freq1, freq2, freq3;
1406
1407         dev_dbg(&state->i2c->dev, "\n");
1408
1409         /* don't return empty data if we're not tuned in */
1410         if ((state->fe_status & FE_HAS_LOCK) == 0)
1411                 return 0;
1412
1413         /* Get frequency */
1414         freq1 = cx24120_readreg(state, CX24120_REG_FREQ1);
1415         freq2 = cx24120_readreg(state, CX24120_REG_FREQ2);
1416         freq3 = cx24120_readreg(state, CX24120_REG_FREQ3);
1417         c->frequency = (freq3 << 16) | (freq2 << 8) | freq1;
1418         dev_dbg(&state->i2c->dev, "frequency = %d\n", c->frequency);
1419
1420         /* Get modulation, fec, pilot */
1421         cx24120_get_fec(fe);
1422
1423         return 0;
1424 }
1425
1426 static void cx24120_release(struct dvb_frontend *fe)
1427 {
1428         struct cx24120_state *state = fe->demodulator_priv;
1429
1430         dev_dbg(&state->i2c->dev, "Clear state structure\n");
1431         kfree(state);
1432 }
1433
1434 static int cx24120_read_ucblocks(struct dvb_frontend *fe, u32 *ucblocks)
1435 {
1436         struct cx24120_state *state = fe->demodulator_priv;
1437
1438         *ucblocks = (cx24120_readreg(state, CX24120_REG_UCB_H) << 8) |
1439                      cx24120_readreg(state, CX24120_REG_UCB_L);
1440
1441         dev_dbg(&state->i2c->dev, "ucblocks = %d\n", *ucblocks);
1442         return 0;
1443 }
1444
1445 static struct dvb_frontend_ops cx24120_ops = {
1446         .delsys = { SYS_DVBS, SYS_DVBS2 },
1447         .info = {
1448                 .name = "Conexant CX24120/CX24118",
1449                 .frequency_min = 950000,
1450                 .frequency_max = 2150000,
1451                 .frequency_stepsize = 1011, /* kHz for QPSK frontends */
1452                 .frequency_tolerance = 5000,
1453                 .symbol_rate_min = 1000000,
1454                 .symbol_rate_max = 45000000,
1455                 .caps = FE_CAN_INVERSION_AUTO |
1456                         FE_CAN_FEC_1_2 | FE_CAN_FEC_2_3 | FE_CAN_FEC_3_4 |
1457                         FE_CAN_FEC_4_5 | FE_CAN_FEC_5_6 | FE_CAN_FEC_6_7 |
1458                         FE_CAN_FEC_7_8 | FE_CAN_FEC_AUTO |
1459                         FE_CAN_2G_MODULATION |
1460                         FE_CAN_QPSK | FE_CAN_RECOVER
1461         },
1462         .release =                      cx24120_release,
1463
1464         .init =                         cx24120_init,
1465         .sleep =                        cx24120_sleep,
1466
1467         .tune =                         cx24120_tune,
1468         .get_frontend_algo =            cx24120_get_algo,
1469         .set_frontend =                 cx24120_set_frontend,
1470
1471         .get_frontend =                 cx24120_get_frontend,
1472         .read_status =                  cx24120_read_status,
1473         .read_ber =                     cx24120_read_ber,
1474         .read_signal_strength =         cx24120_read_signal_strength,
1475         .read_snr =                     cx24120_read_snr,
1476         .read_ucblocks =                cx24120_read_ucblocks,
1477
1478         .diseqc_send_master_cmd =       cx24120_send_diseqc_msg,
1479
1480         .diseqc_send_burst =            cx24120_diseqc_send_burst,
1481         .set_tone =                     cx24120_set_tone,
1482         .set_voltage =                  cx24120_set_voltage,
1483 };
1484
1485 MODULE_DESCRIPTION("DVB Frontend module for Conexant CX24120/CX24118 hardware");
1486 MODULE_AUTHOR("Jemma Denson");
1487 MODULE_LICENSE("GPL");