2 Conexant cx24120/cx24118 - DVBS/S2 Satellite demod/tuner driver
4 Copyright (C) 2008 Patrick Boettcher <pb@linuxtv.org>
5 Copyright (C) 2009 Sergey Tyurin <forum.free-x.de>
6 Updated 2012 by Jannis Achstetter <jannis_achstetter@web.de>
7 Copyright (C) 2015 Jemma Denson <jdenson@gmail.com>
9 Refactored & simplified driver
10 Updated to work with delivery system supplied by DVBv5
11 Add frequency, fec & pilot to get_frontend
13 Cards supported: Technisat Skystar S2
15 This program is free software; you can redistribute it and/or modify
16 it under the terms of the GNU General Public License as published by
17 the Free Software Foundation; either version 2 of the License, or
18 (at your option) any later version.
20 This program is distributed in the hope that it will be useful,
21 but WITHOUT ANY WARRANTY; without even the implied warranty of
22 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
23 GNU General Public License for more details.
26 #include <linux/slab.h>
27 #include <linux/kernel.h>
28 #include <linux/module.h>
29 #include <linux/moduleparam.h>
30 #include <linux/init.h>
31 #include <linux/firmware.h>
32 #include "dvb_frontend.h"
35 #define CX24120_SEARCH_RANGE_KHZ 5000
36 #define CX24120_FIRMWARE "dvb-fe-cx24120-1.20.58.2.fw"
38 /* cx24120 i2c registers */
39 #define CX24120_REG_CMD_START 0x00 /* write cmd_id */
40 #define CX24120_REG_CMD_ARGS 0x01 /* write command arguments */
41 #define CX24120_REG_CMD_END 0x1f /* write 0x01 for end */
43 #define CX24120_REG_MAILBOX 0x33
44 #define CX24120_REG_FREQ3 0x34 /* frequency */
45 #define CX24120_REG_FREQ2 0x35
46 #define CX24120_REG_FREQ1 0x36
48 #define CX24120_REG_FECMODE 0x39 /* FEC status */
49 #define CX24120_REG_STATUS 0x3a /* Tuner status */
50 #define CX24120_REG_SIGSTR_H 0x3a /* Signal strength high */
51 #define CX24120_REG_SIGSTR_L 0x3b /* Signal strength low byte */
52 #define CX24120_REG_QUALITY_H 0x40 /* SNR high byte */
53 #define CX24120_REG_QUALITY_L 0x41 /* SNR low byte */
55 #define CX24120_REG_BER_HH 0x47 /* BER high byte of high word */
56 #define CX24120_REG_BER_HL 0x48 /* BER low byte of high word */
57 #define CX24120_REG_BER_LH 0x49 /* BER high byte of low word */
58 #define CX24120_REG_BER_LL 0x4a /* BER low byte of low word */
60 #define CX24120_REG_UCB_H 0x50 /* UCB high byte */
61 #define CX24120_REG_UCB_L 0x51 /* UCB low byte */
63 #define CX24120_REG_CLKDIV 0xe6
64 #define CX24120_REG_RATEDIV 0xf0
66 #define CX24120_REG_REVISION 0xff /* Chip revision (ro) */
68 /* Command messages */
69 enum command_message_id {
70 CMD_VCO_SET = 0x10, /* cmd.len = 12; */
71 CMD_TUNEREQUEST = 0x11, /* cmd.len = 15; */
73 CMD_MPEG_ONOFF = 0x13, /* cmd.len = 4; */
74 CMD_MPEG_INIT = 0x14, /* cmd.len = 7; */
75 CMD_BANDWIDTH = 0x15, /* cmd.len = 12; */
76 CMD_CLOCK_READ = 0x16, /* read clock */
77 CMD_CLOCK_SET = 0x17, /* cmd.len = 10; */
79 CMD_DISEQC_MSG1 = 0x20, /* cmd.len = 11; */
80 CMD_DISEQC_MSG2 = 0x21, /* cmd.len = d->msg_len + 6; */
81 CMD_SETVOLTAGE = 0x22, /* cmd.len = 2; */
82 CMD_SETTONE = 0x23, /* cmd.len = 4; */
83 CMD_DISEQC_BURST = 0x24, /* cmd.len not used !!! */
85 CMD_READ_SNR = 0x1a, /* Read signal strength */
86 CMD_START_TUNER = 0x1b, /* ??? */
90 CMD_TUNER_INIT = 0x3c, /* cmd.len = 0x03; */
93 #define CX24120_MAX_CMD_LEN 30
96 #define CX24120_PILOT_OFF 0x00
97 #define CX24120_PILOT_ON 0x40
98 #define CX24120_PILOT_AUTO 0x80
101 #define CX24120_HAS_SIGNAL 0x01
102 #define CX24120_HAS_CARRIER 0x02
103 #define CX24120_HAS_VITERBI 0x04
104 #define CX24120_HAS_LOCK 0x08
105 #define CX24120_HAS_UNK1 0x10
106 #define CX24120_HAS_UNK2 0x20
107 #define CX24120_STATUS_MASK 0x0f
108 #define CX24120_SIGNAL_MASK 0xc0
110 #define info(args...) pr_info("cx24120: " args)
111 #define err(args...) pr_err("cx24120: ### ERROR: " args)
113 /* The Demod/Tuner can't easily provide these, we cache them */
114 struct cx24120_tuning {
117 fe_spectral_inversion_t inversion;
120 fe_delivery_system_t delsys;
121 fe_modulation_t modulation;
134 struct cx24120_state {
135 struct i2c_adapter *i2c;
136 const struct cx24120_config *config;
137 struct dvb_frontend frontend;
143 /* current and next tuning parameters */
144 struct cx24120_tuning dcur;
145 struct cx24120_tuning dnxt;
147 fe_status_t fe_status;
150 /* Command message to firmware */
154 u8 arg[CX24120_MAX_CMD_LEN];
157 /* Read single register */
158 static int cx24120_readreg(struct cx24120_state *state, u8 reg)
162 struct i2c_msg msg[] = {
164 .addr = state->config->i2c_addr,
169 .addr = state->config->i2c_addr,
176 ret = i2c_transfer(state->i2c, msg, 2);
178 err("Read error: reg=0x%02x, ret=%i)\n", reg, ret);
182 dev_dbg(&state->i2c->dev, "%s: reg=0x%02x; data=0x%02x\n",
188 /* Write single register */
189 static int cx24120_writereg(struct cx24120_state *state, u8 reg, u8 data)
191 u8 buf[] = { reg, data };
192 struct i2c_msg msg = {
193 .addr = state->config->i2c_addr,
200 ret = i2c_transfer(state->i2c, &msg, 1);
202 err("Write error: i2c_write error(err == %i, 0x%02x: 0x%02x)\n",
207 dev_dbg(&state->i2c->dev, "%s: reg=0x%02x; data=0x%02x\n",
208 __func__, reg, data);
213 /* Write multiple registers in chunks of i2c_wr_max-sized buffers */
214 static int cx24120_writeregs(struct cx24120_state *state,
215 u8 reg, const u8 *values, u16 len, u8 incr)
218 u16 max = state->config->i2c_wr_max > 0 ?
219 state->config->i2c_wr_max :
222 struct i2c_msg msg = {
223 .addr = state->config->i2c_addr,
227 msg.buf = kmalloc(max + 1, GFP_KERNEL);
233 msg.len = len > max ? max : len;
234 memcpy(&msg.buf[1], values, msg.len);
236 len -= msg.len; /* data length revers counter */
237 values += msg.len; /* incr data pointer */
241 msg.len++; /* don't forget the addr byte */
243 ret = i2c_transfer(state->i2c, &msg, 1);
245 err("i2c_write error(err == %i, 0x%02x)\n", ret, reg);
249 dev_dbg(&state->i2c->dev,
250 "%s: reg=0x%02x; data=%*ph\n",
251 __func__, reg, msg.len - 1, msg.buf + 1);
261 static struct dvb_frontend_ops cx24120_ops;
263 struct dvb_frontend *cx24120_attach(const struct cx24120_config *config,
264 struct i2c_adapter *i2c)
266 struct cx24120_state *state;
269 info("Conexant cx24120/cx24118 - DVBS/S2 Satellite demod/tuner\n");
270 state = kzalloc(sizeof(*state), GFP_KERNEL);
272 err("Unable to allocate memory for cx24120_state\n");
276 /* setup the state */
277 state->config = config;
280 /* check if the demod is present and has proper type */
281 demod_rev = cx24120_readreg(state, CX24120_REG_REVISION);
284 info("Demod cx24120 rev. 0x07 detected.\n");
287 info("Demod cx24120 rev. 0x05 detected.\n");
290 err("Unsupported demod revision: 0x%x detected.\n", demod_rev);
294 /* create dvb_frontend */
295 state->cold_init = 0;
296 memcpy(&state->frontend.ops, &cx24120_ops,
297 sizeof(struct dvb_frontend_ops));
298 state->frontend.demodulator_priv = state;
300 info("Conexant cx24120/cx24118 attached.\n");
301 return &state->frontend;
307 EXPORT_SYMBOL(cx24120_attach);
309 static int cx24120_test_rom(struct cx24120_state *state)
313 err = cx24120_readreg(state, 0xfd);
315 ret = cx24120_readreg(state, 0xdf) & 0xfe;
316 err = cx24120_writereg(state, 0xdf, ret);
321 static int cx24120_read_snr(struct dvb_frontend *fe, u16 *snr)
323 struct dtv_frontend_properties *c = &fe->dtv_property_cache;
325 if (c->cnr.stat[0].scale != FE_SCALE_DECIBEL)
328 *snr = div_s64(c->cnr.stat[0].svalue, 100);
333 static int cx24120_read_ber(struct dvb_frontend *fe, u32 *ber)
335 struct cx24120_state *state = fe->demodulator_priv;
337 *ber = (cx24120_readreg(state, CX24120_REG_BER_HH) << 24) |
338 (cx24120_readreg(state, CX24120_REG_BER_HL) << 16) |
339 (cx24120_readreg(state, CX24120_REG_BER_LH) << 8) |
340 cx24120_readreg(state, CX24120_REG_BER_LL);
341 dev_dbg(&state->i2c->dev, "%s: read BER index = %d\n", __func__, *ber);
346 static int cx24120_msg_mpeg_output_global_config(struct cx24120_state *state,
349 /* Check if we're running a command that needs to disable mpeg out */
350 static void cx24120_check_cmd(struct cx24120_state *state, u8 id)
353 case CMD_TUNEREQUEST:
355 case CMD_DISEQC_MSG1:
356 case CMD_DISEQC_MSG2:
359 case CMD_DISEQC_BURST:
360 cx24120_msg_mpeg_output_global_config(state, 0);
361 /* Old driver would do a msleep(100) here */
367 /* Send a message to the firmware */
368 static int cx24120_message_send(struct cx24120_state *state,
369 struct cx24120_cmd *cmd)
373 if (state->mpeg_enabled) {
374 /* Disable mpeg out on certain commands */
375 cx24120_check_cmd(state, cmd->id);
378 ret = cx24120_writereg(state, CX24120_REG_CMD_START, cmd->id);
379 ret = cx24120_writeregs(state, CX24120_REG_CMD_ARGS, &cmd->arg[0],
381 ret = cx24120_writereg(state, CX24120_REG_CMD_END, 0x01);
384 while (cx24120_readreg(state, CX24120_REG_CMD_END)) {
388 err("Error sending message to firmware\n");
392 dev_dbg(&state->i2c->dev, "%s: Successfully send message 0x%02x\n",
398 /* Send a message and fill arg[] with the results */
399 static int cx24120_message_sendrcv(struct cx24120_state *state,
400 struct cx24120_cmd *cmd, u8 numreg)
404 if (numreg > CX24120_MAX_CMD_LEN) {
405 err("Too many registers to read. cmd->reg = %d", numreg);
409 ret = cx24120_message_send(state, cmd);
416 /* Read numreg registers starting from register cmd->len */
417 for (i = 0; i < numreg; i++)
418 cmd->arg[i] = cx24120_readreg(state, (cmd->len + i + 1));
423 static int cx24120_read_signal_strength(struct dvb_frontend *fe,
424 u16 *signal_strength)
426 struct cx24120_state *state = fe->demodulator_priv;
427 struct dtv_frontend_properties *c = &fe->dtv_property_cache;
429 if (c->strength.stat[0].scale != FE_SCALE_RELATIVE)
430 *signal_strength = 0;
432 *signal_strength = c->strength.stat[0].uvalue;
434 dev_dbg(&state->i2c->dev, "%s: Signal strength from cache: 0x%x\n",
435 __func__, *signal_strength);
440 static int cx24120_msg_mpeg_output_global_config(struct cx24120_state *state,
443 struct cx24120_cmd cmd;
446 cmd.id = CMD_MPEG_ONOFF;
450 cmd.arg[2] = enable ? 0 : (u8)(-1);
453 ret = cx24120_message_send(state, &cmd);
455 dev_dbg(&state->i2c->dev,
456 "%s: Failed to set MPEG output to %s\n",
457 __func__, enable ? "enabled" : "disabled");
461 state->mpeg_enabled = enable;
462 dev_dbg(&state->i2c->dev, "%s: MPEG output %s\n",
463 __func__, enable ? "enabled" : "disabled");
468 static int cx24120_msg_mpeg_output_config(struct cx24120_state *state, u8 seq)
470 struct cx24120_cmd cmd;
471 struct cx24120_initial_mpeg_config i =
472 state->config->initial_mpeg_config;
474 cmd.id = CMD_MPEG_INIT;
476 cmd.arg[0] = seq; /* sequental number - can be 0,1,2 */
477 cmd.arg[1] = ((i.x1 & 0x01) << 1) | ((i.x1 >> 1) & 0x01);
480 cmd.arg[4] = ((i.x2 >> 1) & 0x01);
481 cmd.arg[5] = (i.x2 & 0xf0) | (i.x3 & 0x0f);
484 return cx24120_message_send(state, &cmd);
487 static int cx24120_diseqc_send_burst(struct dvb_frontend *fe,
488 fe_sec_mini_cmd_t burst)
490 struct cx24120_state *state = fe->demodulator_priv;
491 struct cx24120_cmd cmd;
494 * Yes, cmd.len is set to zero. The old driver
495 * didn't specify any len, but also had a
496 * memset 0 before every use of the cmd struct
497 * which would have set it to zero.
498 * This quite probably needs looking into.
500 cmd.id = CMD_DISEQC_BURST;
503 cmd.arg[1] = (burst == SEC_MINI_B) ? 0x01 : 0x00;
505 dev_dbg(&state->i2c->dev, "%s: burst sent.\n", __func__);
507 return cx24120_message_send(state, &cmd);
510 static int cx24120_set_tone(struct dvb_frontend *fe, fe_sec_tone_mode_t tone)
512 struct cx24120_state *state = fe->demodulator_priv;
513 struct cx24120_cmd cmd;
515 dev_dbg(&state->i2c->dev, "%s(%d)\n", __func__, tone);
517 if ((tone != SEC_TONE_ON) && (tone != SEC_TONE_OFF)) {
518 err("Invalid tone=%d\n", tone);
522 cmd.id = CMD_SETTONE;
527 cmd.arg[3] = (tone == SEC_TONE_ON) ? 0x01 : 0x00;
529 return cx24120_message_send(state, &cmd);
532 static int cx24120_set_voltage(struct dvb_frontend *fe,
533 fe_sec_voltage_t voltage)
535 struct cx24120_state *state = fe->demodulator_priv;
536 struct cx24120_cmd cmd;
538 dev_dbg(&state->i2c->dev, "%s(%d)\n", __func__, voltage);
540 cmd.id = CMD_SETVOLTAGE;
543 cmd.arg[1] = (voltage == SEC_VOLTAGE_18) ? 0x01 : 0x00;
545 return cx24120_message_send(state, &cmd);
548 static int cx24120_send_diseqc_msg(struct dvb_frontend *fe,
549 struct dvb_diseqc_master_cmd *d)
551 struct cx24120_state *state = fe->demodulator_priv;
552 struct cx24120_cmd cmd;
555 dev_dbg(&state->i2c->dev, "%s()\n", __func__);
557 cmd.id = CMD_DISEQC_MSG1;
571 if (cx24120_message_send(state, &cmd)) {
572 err("send 1st message(0x%x) failed\n", cmd.id);
576 cmd.id = CMD_DISEQC_MSG2;
577 cmd.len = d->msg_len + 6;
583 cmd.arg[5] = d->msg_len;
585 memcpy(&cmd.arg[6], &d->msg, d->msg_len);
587 if (cx24120_message_send(state, &cmd)) {
588 err("send 2nd message(0x%x) failed\n", cmd.id);
594 if (!(cx24120_readreg(state, 0x93) & 0x01)) {
595 dev_dbg(&state->i2c->dev,
596 "%s: diseqc sequence sent success\n",
602 } while (back_count);
604 err("Too long waiting for diseqc.\n");
608 static void cx24120_get_stats(struct cx24120_state *state)
610 struct dvb_frontend *fe = &state->frontend;
611 struct dtv_frontend_properties *c = &fe->dtv_property_cache;
612 struct cx24120_cmd cmd;
616 dev_dbg(&state->i2c->dev, "%s()\n", __func__);
618 /* signal strength */
619 if (state->fe_status & FE_HAS_SIGNAL) {
620 cmd.id = CMD_READ_SNR;
624 ret = cx24120_message_send(state, &cmd);
626 err("error reading signal strength\n");
631 sig = cx24120_readreg(state, CX24120_REG_SIGSTR_H) >> 6;
633 sig |= cx24120_readreg(state, CX24120_REG_SIGSTR_L);
634 dev_dbg(&state->i2c->dev,
635 "%s: Signal strength from firmware= 0x%x\n",
639 sig = -100 * sig + 94324;
641 c->strength.stat[0].scale = FE_SCALE_RELATIVE;
642 c->strength.stat[0].uvalue = sig;
644 c->strength.stat[0].scale = FE_SCALE_NOT_AVAILABLE;
648 if (state->fe_status & FE_HAS_VITERBI) {
649 cnr = cx24120_readreg(state, CX24120_REG_QUALITY_H) << 8;
650 cnr |= cx24120_readreg(state, CX24120_REG_QUALITY_L);
651 dev_dbg(&state->i2c->dev, "%s: read SNR index = %d\n",
654 /* guessed - seems about right */
657 c->cnr.stat[0].scale = FE_SCALE_DECIBEL;
658 c->cnr.stat[0].svalue = cnr;
660 c->cnr.stat[0].scale = FE_SCALE_NOT_AVAILABLE;
663 /* FIXME: add UCB/BER */
666 static void cx24120_set_clock_ratios(struct dvb_frontend *fe);
668 /* Read current tuning status */
669 static int cx24120_read_status(struct dvb_frontend *fe, fe_status_t *status)
671 struct cx24120_state *state = fe->demodulator_priv;
674 lock = cx24120_readreg(state, CX24120_REG_STATUS);
676 dev_dbg(&state->i2c->dev, "%s() status = 0x%02x\n",
681 if (lock & CX24120_HAS_SIGNAL)
682 *status = FE_HAS_SIGNAL;
683 if (lock & CX24120_HAS_CARRIER)
684 *status |= FE_HAS_CARRIER;
685 if (lock & CX24120_HAS_VITERBI)
686 *status |= FE_HAS_VITERBI | FE_HAS_SYNC;
687 if (lock & CX24120_HAS_LOCK)
688 *status |= FE_HAS_LOCK;
691 * TODO: is FE_HAS_SYNC in the right place?
692 * Other cx241xx drivers have this slightly
696 state->fe_status = *status;
697 cx24120_get_stats(state);
699 /* Set the clock once tuned in */
700 if (state->need_clock_set && *status & FE_HAS_LOCK) {
701 /* Set clock ratios */
702 cx24120_set_clock_ratios(fe);
704 /* Old driver would do a msleep(200) here */
706 /* Renable mpeg output */
707 if (!state->mpeg_enabled)
708 cx24120_msg_mpeg_output_global_config(state, 1);
710 state->need_clock_set = 0;
717 * FEC & modulation lookup table
718 * Used for decoding the REG_FECMODE register
721 static struct cx24120_modfec {
722 fe_delivery_system_t delsys;
726 } modfec_lookup_table[] = {
727 /*delsys mod fec val */
728 { SYS_DVBS, QPSK, FEC_1_2, 0x01 },
729 { SYS_DVBS, QPSK, FEC_2_3, 0x02 },
730 { SYS_DVBS, QPSK, FEC_3_4, 0x03 },
731 { SYS_DVBS, QPSK, FEC_4_5, 0x04 },
732 { SYS_DVBS, QPSK, FEC_5_6, 0x05 },
733 { SYS_DVBS, QPSK, FEC_6_7, 0x06 },
734 { SYS_DVBS, QPSK, FEC_7_8, 0x07 },
736 { SYS_DVBS2, QPSK, FEC_1_2, 0x04 },
737 { SYS_DVBS2, QPSK, FEC_3_5, 0x05 },
738 { SYS_DVBS2, QPSK, FEC_2_3, 0x06 },
739 { SYS_DVBS2, QPSK, FEC_3_4, 0x07 },
740 { SYS_DVBS2, QPSK, FEC_4_5, 0x08 },
741 { SYS_DVBS2, QPSK, FEC_5_6, 0x09 },
742 { SYS_DVBS2, QPSK, FEC_8_9, 0x0a },
743 { SYS_DVBS2, QPSK, FEC_9_10, 0x0b },
745 { SYS_DVBS2, PSK_8, FEC_3_5, 0x0c },
746 { SYS_DVBS2, PSK_8, FEC_2_3, 0x0d },
747 { SYS_DVBS2, PSK_8, FEC_3_4, 0x0e },
748 { SYS_DVBS2, PSK_8, FEC_5_6, 0x0f },
749 { SYS_DVBS2, PSK_8, FEC_8_9, 0x10 },
750 { SYS_DVBS2, PSK_8, FEC_9_10, 0x11 },
753 /* Retrieve current fec, modulation & pilot values */
754 static int cx24120_get_fec(struct dvb_frontend *fe)
756 struct dtv_frontend_properties *c = &fe->dtv_property_cache;
757 struct cx24120_state *state = fe->demodulator_priv;
762 dev_dbg(&state->i2c->dev, "%s()\n", __func__);
764 ret = cx24120_readreg(state, CX24120_REG_FECMODE);
765 fec = ret & 0x3f; /* Lower 6 bits */
767 dev_dbg(&state->i2c->dev, "%s: Get FEC: %d\n", __func__, fec);
769 for (idx = 0; idx < ARRAY_SIZE(modfec_lookup_table); idx++) {
770 if (modfec_lookup_table[idx].delsys != state->dcur.delsys)
772 if (modfec_lookup_table[idx].val != fec)
778 if (idx >= ARRAY_SIZE(modfec_lookup_table)) {
779 dev_dbg(&state->i2c->dev, "%s: Couldn't find fec!\n",
784 /* save values back to cache */
785 c->modulation = modfec_lookup_table[idx].mod;
786 c->fec_inner = modfec_lookup_table[idx].fec;
787 c->pilot = (ret & 0x80) ? PILOT_ON : PILOT_OFF;
789 dev_dbg(&state->i2c->dev,
790 "%s: mod(%d), fec(%d), pilot(%d)\n",
792 c->modulation, c->fec_inner, c->pilot);
798 * Clock ratios lookup table
800 * Values obtained from much larger table in old driver
801 * which had numerous entries which would never match.
803 * There's probably some way of calculating these but I
804 * can't determine the pattern
806 static struct cx24120_clock_ratios_table {
807 fe_delivery_system_t delsys;
814 } clock_ratios_table[] = {
815 /*delsys pilot mod fec m_rat n_rat rate */
816 { SYS_DVBS2, PILOT_OFF, QPSK, FEC_1_2, 273088, 254505, 274 },
817 { SYS_DVBS2, PILOT_OFF, QPSK, FEC_3_5, 17272, 13395, 330 },
818 { SYS_DVBS2, PILOT_OFF, QPSK, FEC_2_3, 24344, 16967, 367 },
819 { SYS_DVBS2, PILOT_OFF, QPSK, FEC_3_4, 410788, 254505, 413 },
820 { SYS_DVBS2, PILOT_OFF, QPSK, FEC_4_5, 438328, 254505, 440 },
821 { SYS_DVBS2, PILOT_OFF, QPSK, FEC_5_6, 30464, 16967, 459 },
822 { SYS_DVBS2, PILOT_OFF, QPSK, FEC_8_9, 487832, 254505, 490 },
823 { SYS_DVBS2, PILOT_OFF, QPSK, FEC_9_10, 493952, 254505, 496 },
824 { SYS_DVBS2, PILOT_OFF, PSK_8, FEC_3_5, 328168, 169905, 494 },
825 { SYS_DVBS2, PILOT_OFF, PSK_8, FEC_2_3, 24344, 11327, 550 },
826 { SYS_DVBS2, PILOT_OFF, PSK_8, FEC_3_4, 410788, 169905, 618 },
827 { SYS_DVBS2, PILOT_OFF, PSK_8, FEC_5_6, 30464, 11327, 688 },
828 { SYS_DVBS2, PILOT_OFF, PSK_8, FEC_8_9, 487832, 169905, 735 },
829 { SYS_DVBS2, PILOT_OFF, PSK_8, FEC_9_10, 493952, 169905, 744 },
830 { SYS_DVBS2, PILOT_ON, QPSK, FEC_1_2, 273088, 260709, 268 },
831 { SYS_DVBS2, PILOT_ON, QPSK, FEC_3_5, 328168, 260709, 322 },
832 { SYS_DVBS2, PILOT_ON, QPSK, FEC_2_3, 121720, 86903, 358 },
833 { SYS_DVBS2, PILOT_ON, QPSK, FEC_3_4, 410788, 260709, 403 },
834 { SYS_DVBS2, PILOT_ON, QPSK, FEC_4_5, 438328, 260709, 430 },
835 { SYS_DVBS2, PILOT_ON, QPSK, FEC_5_6, 152320, 86903, 448 },
836 { SYS_DVBS2, PILOT_ON, QPSK, FEC_8_9, 487832, 260709, 479 },
837 { SYS_DVBS2, PILOT_ON, QPSK, FEC_9_10, 493952, 260709, 485 },
838 { SYS_DVBS2, PILOT_ON, PSK_8, FEC_3_5, 328168, 173853, 483 },
839 { SYS_DVBS2, PILOT_ON, PSK_8, FEC_2_3, 121720, 57951, 537 },
840 { SYS_DVBS2, PILOT_ON, PSK_8, FEC_3_4, 410788, 173853, 604 },
841 { SYS_DVBS2, PILOT_ON, PSK_8, FEC_5_6, 152320, 57951, 672 },
842 { SYS_DVBS2, PILOT_ON, PSK_8, FEC_8_9, 487832, 173853, 718 },
843 { SYS_DVBS2, PILOT_ON, PSK_8, FEC_9_10, 493952, 173853, 727 },
844 { SYS_DVBS, PILOT_OFF, QPSK, FEC_1_2, 152592, 152592, 256 },
845 { SYS_DVBS, PILOT_OFF, QPSK, FEC_2_3, 305184, 228888, 341 },
846 { SYS_DVBS, PILOT_OFF, QPSK, FEC_3_4, 457776, 305184, 384 },
847 { SYS_DVBS, PILOT_OFF, QPSK, FEC_5_6, 762960, 457776, 427 },
848 { SYS_DVBS, PILOT_OFF, QPSK, FEC_7_8, 1068144, 610368, 448 },
851 /* Set clock ratio from lookup table */
852 static void cx24120_set_clock_ratios(struct dvb_frontend *fe)
854 struct dtv_frontend_properties *c = &fe->dtv_property_cache;
855 struct cx24120_state *state = fe->demodulator_priv;
856 struct cx24120_cmd cmd;
859 /* Find fec, modulation, pilot */
860 ret = cx24120_get_fec(fe);
864 /* Find the clock ratios in the lookup table */
865 for (idx = 0; idx < ARRAY_SIZE(clock_ratios_table); idx++) {
866 if (clock_ratios_table[idx].delsys != state->dcur.delsys)
868 if (clock_ratios_table[idx].mod != c->modulation)
870 if (clock_ratios_table[idx].fec != c->fec_inner)
872 if (clock_ratios_table[idx].pilot != c->pilot)
878 if (idx >= ARRAY_SIZE(clock_ratios_table)) {
879 info("Clock ratio not found - data reception in danger\n");
883 /* Read current values? */
884 cmd.id = CMD_CLOCK_READ;
887 ret = cx24120_message_sendrcv(state, &cmd, 6);
890 /* in cmd[0]-[5] - result */
892 dev_dbg(&state->i2c->dev,
893 "%s: m=%d, n=%d; idx: %d m=%d, n=%d, rate=%d\n",
895 cmd.arg[2] | (cmd.arg[1] << 8) | (cmd.arg[0] << 16),
896 cmd.arg[5] | (cmd.arg[4] << 8) | (cmd.arg[3] << 16),
898 clock_ratios_table[idx].m_rat,
899 clock_ratios_table[idx].n_rat,
900 clock_ratios_table[idx].rate);
903 cmd.id = CMD_CLOCK_SET;
907 cmd.arg[2] = (clock_ratios_table[idx].m_rat >> 16) & 0xff;
908 cmd.arg[3] = (clock_ratios_table[idx].m_rat >> 8) & 0xff;
909 cmd.arg[4] = (clock_ratios_table[idx].m_rat >> 0) & 0xff;
910 cmd.arg[5] = (clock_ratios_table[idx].n_rat >> 16) & 0xff;
911 cmd.arg[6] = (clock_ratios_table[idx].n_rat >> 8) & 0xff;
912 cmd.arg[7] = (clock_ratios_table[idx].n_rat >> 0) & 0xff;
913 cmd.arg[8] = (clock_ratios_table[idx].rate >> 8) & 0xff;
914 cmd.arg[9] = (clock_ratios_table[idx].rate >> 0) & 0xff;
916 cx24120_message_send(state, &cmd);
919 /* Set inversion value */
920 static int cx24120_set_inversion(struct cx24120_state *state,
921 fe_spectral_inversion_t inversion)
923 dev_dbg(&state->i2c->dev, "%s(%d)\n", __func__, inversion);
927 state->dnxt.inversion_val = 0x00;
930 state->dnxt.inversion_val = 0x04;
933 state->dnxt.inversion_val = 0x0c;
939 state->dnxt.inversion = inversion;
945 * FEC lookup table for tuning Some DVB-S2 val's have been found by
946 * trial and error. Sofar it seems to match up with the contents of
947 * the REG_FECMODE after tuning The rest will probably be the same but
948 * would need testing. Anything not in the table will run with
949 * FEC_AUTO and take a while longer to tune in ( c.500ms instead of
952 static struct cx24120_modfec_table {
953 fe_delivery_system_t delsys;
958 /*delsys mod fec val */
959 { SYS_DVBS, QPSK, FEC_1_2, 0x2e },
960 { SYS_DVBS, QPSK, FEC_2_3, 0x2f },
961 { SYS_DVBS, QPSK, FEC_3_4, 0x30 },
962 { SYS_DVBS, QPSK, FEC_5_6, 0x31 },
963 { SYS_DVBS, QPSK, FEC_6_7, 0x32 },
964 { SYS_DVBS, QPSK, FEC_7_8, 0x33 },
966 { SYS_DVBS2, QPSK, FEC_3_4, 0x07 },
968 { SYS_DVBS2, PSK_8, FEC_2_3, 0x0d },
969 { SYS_DVBS2, PSK_8, FEC_3_4, 0x0e },
972 /* Set fec_val & fec_mask values from delsys, modulation & fec */
973 static int cx24120_set_fec(struct cx24120_state *state, fe_modulation_t mod,
978 dev_dbg(&state->i2c->dev, "%s(0x%02x,0x%02x)\n", __func__, mod, fec);
980 state->dnxt.fec = fec;
982 /* Lookup fec_val from modfec table */
983 for (idx = 0; idx < ARRAY_SIZE(modfec_table); idx++) {
984 if (modfec_table[idx].delsys != state->dnxt.delsys)
986 if (modfec_table[idx].mod != mod)
988 if (modfec_table[idx].fec != fec)
992 state->dnxt.fec_mask = 0x00;
993 state->dnxt.fec_val = modfec_table[idx].val;
997 if (state->dnxt.delsys == SYS_DVBS2) {
998 /* DVBS2 auto is 0x00/0x00 */
999 state->dnxt.fec_mask = 0x00;
1000 state->dnxt.fec_val = 0x00;
1002 /* Set DVB-S to auto */
1003 state->dnxt.fec_val = 0x2e;
1004 state->dnxt.fec_mask = 0xac;
1011 static int cx24120_set_pilot(struct cx24120_state *state, fe_pilot_t pilot)
1013 dev_dbg(&state->i2c->dev, "%s(%d)\n", __func__, pilot);
1015 /* Pilot only valid in DVBS2 */
1016 if (state->dnxt.delsys != SYS_DVBS2) {
1017 state->dnxt.pilot_val = CX24120_PILOT_OFF;
1023 state->dnxt.pilot_val = CX24120_PILOT_OFF;
1026 state->dnxt.pilot_val = CX24120_PILOT_ON;
1030 state->dnxt.pilot_val = CX24120_PILOT_AUTO;
1036 /* Set symbol rate */
1037 static int cx24120_set_symbolrate(struct cx24120_state *state, u32 rate)
1039 dev_dbg(&state->i2c->dev, "%s(%d)\n",
1042 state->dnxt.symbol_rate = rate;
1044 /* Check symbol rate */
1045 if (rate > 31000000) {
1046 state->dnxt.clkdiv = (-(rate < 31000001) & 3) + 2;
1047 state->dnxt.ratediv = (-(rate < 31000001) & 6) + 4;
1049 state->dnxt.clkdiv = 3;
1050 state->dnxt.ratediv = 6;
1056 /* Overwrite the current tuning params, we are about to tune */
1057 static void cx24120_clone_params(struct dvb_frontend *fe)
1059 struct cx24120_state *state = fe->demodulator_priv;
1061 state->dcur = state->dnxt;
1064 static int cx24120_set_frontend(struct dvb_frontend *fe)
1066 struct dtv_frontend_properties *c = &fe->dtv_property_cache;
1067 struct cx24120_state *state = fe->demodulator_priv;
1068 struct cx24120_cmd cmd;
1071 switch (c->delivery_system) {
1073 dev_dbg(&state->i2c->dev, "%s() DVB-S2\n",
1077 dev_dbg(&state->i2c->dev, "%s() DVB-S\n",
1081 dev_dbg(&state->i2c->dev,
1082 "%s() Delivery system(%d) not supported\n",
1083 __func__, c->delivery_system);
1088 state->dnxt.delsys = c->delivery_system;
1089 state->dnxt.modulation = c->modulation;
1090 state->dnxt.frequency = c->frequency;
1091 state->dnxt.pilot = c->pilot;
1093 ret = cx24120_set_inversion(state, c->inversion);
1097 ret = cx24120_set_fec(state, c->modulation, c->fec_inner);
1101 ret = cx24120_set_pilot(state, c->pilot);
1105 ret = cx24120_set_symbolrate(state, c->symbol_rate);
1109 /* discard the 'current' tuning parameters and prepare to tune */
1110 cx24120_clone_params(fe);
1112 dev_dbg(&state->i2c->dev,
1113 "%s: delsys = %d\n", __func__, state->dcur.delsys);
1114 dev_dbg(&state->i2c->dev,
1115 "%s: modulation = %d\n", __func__, state->dcur.modulation);
1116 dev_dbg(&state->i2c->dev,
1117 "%s: frequency = %d\n", __func__, state->dcur.frequency);
1118 dev_dbg(&state->i2c->dev,
1119 "%s: pilot = %d (val = 0x%02x)\n", __func__,
1120 state->dcur.pilot, state->dcur.pilot_val);
1121 dev_dbg(&state->i2c->dev,
1122 "%s: symbol_rate = %d (clkdiv/ratediv = 0x%02x/0x%02x)\n",
1123 __func__, state->dcur.symbol_rate,
1124 state->dcur.clkdiv, state->dcur.ratediv);
1125 dev_dbg(&state->i2c->dev,
1126 "%s: FEC = %d (mask/val = 0x%02x/0x%02x)\n", __func__,
1127 state->dcur.fec, state->dcur.fec_mask, state->dcur.fec_val);
1128 dev_dbg(&state->i2c->dev,
1129 "%s: Inversion = %d (val = 0x%02x)\n", __func__,
1130 state->dcur.inversion, state->dcur.inversion_val);
1132 /* Flag that clock needs to be set after tune */
1133 state->need_clock_set = 1;
1136 cmd.id = CMD_TUNEREQUEST;
1139 cmd.arg[1] = (state->dcur.frequency & 0xff0000) >> 16;
1140 cmd.arg[2] = (state->dcur.frequency & 0x00ff00) >> 8;
1141 cmd.arg[3] = (state->dcur.frequency & 0x0000ff);
1142 cmd.arg[4] = ((state->dcur.symbol_rate / 1000) & 0xff00) >> 8;
1143 cmd.arg[5] = ((state->dcur.symbol_rate / 1000) & 0x00ff);
1144 cmd.arg[6] = state->dcur.inversion;
1145 cmd.arg[7] = state->dcur.fec_val | state->dcur.pilot_val;
1146 cmd.arg[8] = CX24120_SEARCH_RANGE_KHZ >> 8;
1147 cmd.arg[9] = CX24120_SEARCH_RANGE_KHZ & 0xff;
1148 cmd.arg[10] = 0; /* maybe rolloff? */
1149 cmd.arg[11] = state->dcur.fec_mask;
1150 cmd.arg[12] = state->dcur.ratediv;
1151 cmd.arg[13] = state->dcur.clkdiv;
1154 /* Send tune command */
1155 ret = cx24120_message_send(state, &cmd);
1159 /* Write symbol rate values */
1160 ret = cx24120_writereg(state, CX24120_REG_CLKDIV, state->dcur.clkdiv);
1161 ret = cx24120_readreg(state, CX24120_REG_RATEDIV);
1163 ret |= state->dcur.ratediv;
1164 ret = cx24120_writereg(state, CX24120_REG_RATEDIV, ret);
1169 /* Set vco from config */
1170 static int cx24120_set_vco(struct cx24120_state *state)
1172 struct cx24120_cmd cmd;
1175 u32 xtal_khz = state->config->xtal_khz;
1177 nxtal_khz = xtal_khz * 4;
1178 vco = nxtal_khz * 10;
1179 inv_vco = DIV_ROUND_CLOSEST_ULL(0x400000000ULL, vco);
1181 dev_dbg(&state->i2c->dev,
1182 "%s: xtal=%d, vco=%d, inv_vco=%lld\n",
1183 __func__, xtal_khz, vco, inv_vco);
1185 cmd.id = CMD_VCO_SET;
1187 cmd.arg[0] = (vco >> 16) & 0xff;
1188 cmd.arg[1] = (vco >> 8) & 0xff;
1189 cmd.arg[2] = vco & 0xff;
1190 cmd.arg[3] = (inv_vco >> 8) & 0xff;
1191 cmd.arg[4] = (inv_vco) & 0xff;
1193 cmd.arg[6] = (nxtal_khz >> 8) & 0xff;
1194 cmd.arg[7] = nxtal_khz & 0xff;
1197 cmd.arg[10] = (xtal_khz >> 16) & 0xff;
1198 cmd.arg[11] = xtal_khz & 0xff;
1200 return cx24120_message_send(state, &cmd);
1203 int cx24120_init(struct dvb_frontend *fe)
1205 const struct firmware *fw;
1206 struct dtv_frontend_properties *c = &fe->dtv_property_cache;
1207 struct cx24120_state *state = fe->demodulator_priv;
1208 struct cx24120_cmd cmd;
1209 u8 ret, ret_EA, reg1;
1213 unsigned char vers[4];
1215 if (state->cold_init)
1219 ret = cx24120_writereg(state, 0xea, 0x00);
1220 ret = cx24120_test_rom(state);
1221 ret = cx24120_readreg(state, 0xfb) & 0xfe;
1222 ret = cx24120_writereg(state, 0xfb, ret);
1223 ret = cx24120_readreg(state, 0xfc) & 0xfe;
1224 ret = cx24120_writereg(state, 0xfc, ret);
1225 ret = cx24120_writereg(state, 0xc3, 0x04);
1226 ret = cx24120_writereg(state, 0xc4, 0x04);
1227 ret = cx24120_writereg(state, 0xce, 0x00);
1228 ret = cx24120_writereg(state, 0xcf, 0x00);
1229 ret_EA = cx24120_readreg(state, 0xea) & 0xfe;
1230 ret = cx24120_writereg(state, 0xea, ret_EA);
1231 ret = cx24120_writereg(state, 0xeb, 0x0c);
1232 ret = cx24120_writereg(state, 0xec, 0x06);
1233 ret = cx24120_writereg(state, 0xed, 0x05);
1234 ret = cx24120_writereg(state, 0xee, 0x03);
1235 ret = cx24120_writereg(state, 0xef, 0x05);
1236 ret = cx24120_writereg(state, 0xf3, 0x03);
1237 ret = cx24120_writereg(state, 0xf4, 0x44);
1239 for (reg1 = 0xf0; reg1 < 0xf3; reg1++) {
1240 cx24120_writereg(state, reg1, 0x04);
1241 cx24120_writereg(state, reg1 - 10, 0x02);
1244 ret = cx24120_writereg(state, 0xea, (ret_EA | 0x01));
1245 for (reg1 = 0xc5; reg1 < 0xcb; reg1 += 2) {
1246 ret = cx24120_writereg(state, reg1, 0x00);
1247 ret = cx24120_writereg(state, reg1 + 1, 0x00);
1250 ret = cx24120_writereg(state, 0xe4, 0x03);
1251 ret = cx24120_writereg(state, 0xeb, 0x0a);
1253 dev_dbg(&state->i2c->dev,
1254 "%s: Requesting firmware (%s) to download...\n",
1255 __func__, CX24120_FIRMWARE);
1257 ret = state->config->request_firmware(fe, &fw, CX24120_FIRMWARE);
1259 err("Could not load firmware (%s): %d\n", CX24120_FIRMWARE,
1264 dev_dbg(&state->i2c->dev,
1265 "%s: Firmware found, size %d bytes (%02x %02x .. %02x %02x)\n",
1267 (int)fw->size, /* firmware_size in bytes */
1268 fw->data[0], /* fw 1st byte */
1269 fw->data[1], /* fw 2d byte */
1270 fw->data[fw->size - 2], /* fw before last byte */
1271 fw->data[fw->size - 1]); /* fw last byte */
1273 ret = cx24120_test_rom(state);
1274 ret = cx24120_readreg(state, 0xfb) & 0xfe;
1275 ret = cx24120_writereg(state, 0xfb, ret);
1276 ret = cx24120_writereg(state, 0xe0, 0x76);
1277 ret = cx24120_writereg(state, 0xf7, 0x81);
1278 ret = cx24120_writereg(state, 0xf8, 0x00);
1279 ret = cx24120_writereg(state, 0xf9, 0x00);
1280 ret = cx24120_writeregs(state, 0xfa, fw->data, (fw->size - 1), 0x00);
1281 ret = cx24120_writereg(state, 0xf7, 0xc0);
1282 ret = cx24120_writereg(state, 0xe0, 0x00);
1283 ret = (fw->size - 2) & 0x00ff;
1284 ret = cx24120_writereg(state, 0xf8, ret);
1285 ret = ((fw->size - 2) >> 8) & 0x00ff;
1286 ret = cx24120_writereg(state, 0xf9, ret);
1287 ret = cx24120_writereg(state, 0xf7, 0x00);
1288 ret = cx24120_writereg(state, 0xdc, 0x00);
1289 ret = cx24120_writereg(state, 0xdc, 0x07);
1292 /* Check final byte matches final byte of firmware */
1293 ret = cx24120_readreg(state, 0xe1);
1294 if (ret == fw->data[fw->size - 1]) {
1295 dev_dbg(&state->i2c->dev,
1296 "%s: Firmware uploaded successfully\n",
1300 err("Firmware upload failed. Last byte returned=0x%x\n", ret);
1301 reset_result = -EREMOTEIO;
1303 ret = cx24120_writereg(state, 0xdc, 0x00);
1304 release_firmware(fw);
1305 if (reset_result != 0)
1306 return reset_result;
1309 cmd.id = CMD_START_TUNER;
1315 if (cx24120_message_send(state, &cmd) != 0) {
1316 err("Error tuner start! :(\n");
1321 ret = cx24120_set_vco(state);
1323 err("Error set VCO! :(\n");
1328 cmd.id = CMD_BANDWIDTH;
1343 if (cx24120_message_send(state, &cmd)) {
1344 err("Error set bandwidth!\n");
1348 ret = cx24120_readreg(state, 0xba);
1350 dev_dbg(&state->i2c->dev, "%s: Reset-readreg 0xba: %x\n",
1352 err("Error initialising tuner!\n");
1356 dev_dbg(&state->i2c->dev, "%s: Tuner initialised correctly.\n",
1359 /* Initialise mpeg outputs */
1360 ret = cx24120_writereg(state, 0xeb, 0x0a);
1361 if (cx24120_msg_mpeg_output_global_config(state, 0) ||
1362 cx24120_msg_mpeg_output_config(state, 0) ||
1363 cx24120_msg_mpeg_output_config(state, 1) ||
1364 cx24120_msg_mpeg_output_config(state, 2)) {
1365 err("Error initialising mpeg output. :(\n");
1370 cmd.id = CMD_TUNER_INIT;
1375 if (cx24120_message_send(state, &cmd)) {
1376 err("Error sending final init message. :(\n");
1380 /* Firmware CMD 35: Get firmware version */
1381 cmd.id = CMD_FWVERSION;
1383 for (i = 0; i < 4; i++) {
1385 ret = cx24120_message_send(state, &cmd);
1388 vers[i] = cx24120_readreg(state, CX24120_REG_MAILBOX);
1390 info("FW version %i.%i.%i.%i\n", vers[0], vers[1], vers[2], vers[3]);
1392 /* init stats here in order signal app which stats are supported */
1393 c->strength.len = 1;
1394 c->strength.stat[0].scale = FE_SCALE_NOT_AVAILABLE;
1396 c->cnr.stat[0].scale = FE_SCALE_NOT_AVAILABLE;
1398 state->cold_init = 1;
1402 static int cx24120_tune(struct dvb_frontend *fe, bool re_tune,
1403 unsigned int mode_flags, unsigned int *delay,
1404 fe_status_t *status)
1406 struct cx24120_state *state = fe->demodulator_priv;
1409 dev_dbg(&state->i2c->dev, "%s(%d)\n", __func__, re_tune);
1411 /* TODO: Do we need to set delay? */
1414 ret = cx24120_set_frontend(fe);
1419 return cx24120_read_status(fe, status);
1422 static int cx24120_get_algo(struct dvb_frontend *fe)
1424 return DVBFE_ALGO_HW;
1427 static int cx24120_sleep(struct dvb_frontend *fe)
1432 static int cx24120_get_frontend(struct dvb_frontend *fe)
1434 struct dtv_frontend_properties *c = &fe->dtv_property_cache;
1435 struct cx24120_state *state = fe->demodulator_priv;
1436 u8 freq1, freq2, freq3;
1438 dev_dbg(&state->i2c->dev, "%s()", __func__);
1440 /* don't return empty data if we're not tuned in */
1441 if ((state->fe_status & FE_HAS_LOCK) == 0)
1445 freq1 = cx24120_readreg(state, CX24120_REG_FREQ1);
1446 freq2 = cx24120_readreg(state, CX24120_REG_FREQ2);
1447 freq3 = cx24120_readreg(state, CX24120_REG_FREQ3);
1448 c->frequency = (freq3 << 16) | (freq2 << 8) | freq1;
1449 dev_dbg(&state->i2c->dev, "%s frequency = %d\n", __func__,
1452 /* Get modulation, fec, pilot */
1453 cx24120_get_fec(fe);
1458 static void cx24120_release(struct dvb_frontend *fe)
1460 struct cx24120_state *state = fe->demodulator_priv;
1462 dev_dbg(&state->i2c->dev, "%s: Clear state structure\n", __func__);
1466 static int cx24120_read_ucblocks(struct dvb_frontend *fe, u32 *ucblocks)
1468 struct cx24120_state *state = fe->demodulator_priv;
1470 *ucblocks = (cx24120_readreg(state, CX24120_REG_UCB_H) << 8) |
1471 cx24120_readreg(state, CX24120_REG_UCB_L);
1473 dev_dbg(&state->i2c->dev, "%s: Blocks = %d\n", __func__, *ucblocks);
1477 static struct dvb_frontend_ops cx24120_ops = {
1478 .delsys = { SYS_DVBS, SYS_DVBS2 },
1480 .name = "Conexant CX24120/CX24118",
1481 .frequency_min = 950000,
1482 .frequency_max = 2150000,
1483 .frequency_stepsize = 1011, /* kHz for QPSK frontends */
1484 .frequency_tolerance = 5000,
1485 .symbol_rate_min = 1000000,
1486 .symbol_rate_max = 45000000,
1487 .caps = FE_CAN_INVERSION_AUTO |
1488 FE_CAN_FEC_1_2 | FE_CAN_FEC_2_3 | FE_CAN_FEC_3_4 |
1489 FE_CAN_FEC_4_5 | FE_CAN_FEC_5_6 | FE_CAN_FEC_6_7 |
1490 FE_CAN_FEC_7_8 | FE_CAN_FEC_AUTO |
1491 FE_CAN_2G_MODULATION |
1492 FE_CAN_QPSK | FE_CAN_RECOVER
1494 .release = cx24120_release,
1496 .init = cx24120_init,
1497 .sleep = cx24120_sleep,
1499 .tune = cx24120_tune,
1500 .get_frontend_algo = cx24120_get_algo,
1501 .set_frontend = cx24120_set_frontend,
1503 .get_frontend = cx24120_get_frontend,
1504 .read_status = cx24120_read_status,
1505 .read_ber = cx24120_read_ber,
1506 .read_signal_strength = cx24120_read_signal_strength,
1507 .read_snr = cx24120_read_snr,
1508 .read_ucblocks = cx24120_read_ucblocks,
1510 .diseqc_send_master_cmd = cx24120_send_diseqc_msg,
1512 .diseqc_send_burst = cx24120_diseqc_send_burst,
1513 .set_tone = cx24120_set_tone,
1514 .set_voltage = cx24120_set_voltage,
1517 MODULE_DESCRIPTION("DVB Frontend module for Conexant CX24120/CX24118 hardware");
1518 MODULE_AUTHOR("Jemma Denson");
1519 MODULE_LICENSE("GPL");