2 Conexant cx24120/cx24118 - DVBS/S2 Satellite demod/tuner driver
4 Copyright (C) 2008 Patrick Boettcher <pb@linuxtv.org>
5 Copyright (C) 2009 Sergey Tyurin <forum.free-x.de>
6 Updated 2012 by Jannis Achstetter <jannis_achstetter@web.de>
7 Copyright (C) 2015 Jemma Denson <jdenson@gmail.com>
9 Refactored & simplified driver
10 Updated to work with delivery system supplied by DVBv5
11 Add frequency, fec & pilot to get_frontend
13 Cards supported: Technisat Skystar S2
15 This program is free software; you can redistribute it and/or modify
16 it under the terms of the GNU General Public License as published by
17 the Free Software Foundation; either version 2 of the License, or
18 (at your option) any later version.
20 This program is distributed in the hope that it will be useful,
21 but WITHOUT ANY WARRANTY; without even the implied warranty of
22 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
23 GNU General Public License for more details.
26 #include <linux/slab.h>
27 #include <linux/kernel.h>
28 #include <linux/module.h>
29 #include <linux/moduleparam.h>
30 #include <linux/init.h>
31 #include <linux/firmware.h>
32 #include "dvb_frontend.h"
35 #define CX24120_SEARCH_RANGE_KHZ 5000
36 #define CX24120_FIRMWARE "dvb-fe-cx24120-1.20.58.2.fw"
38 /* cx24120 i2c registers */
39 #define CX24120_REG_CMD_START 0x00 /* write cmd_id */
40 #define CX24120_REG_CMD_ARGS 0x01 /* write command arguments */
41 #define CX24120_REG_CMD_END 0x1f /* write 0x01 for end */
43 #define CX24120_REG_MAILBOX 0x33
44 #define CX24120_REG_FREQ3 0x34 /* frequency */
45 #define CX24120_REG_FREQ2 0x35
46 #define CX24120_REG_FREQ1 0x36
48 #define CX24120_REG_FECMODE 0x39 /* FEC status */
49 #define CX24120_REG_STATUS 0x3a /* Tuner status */
50 #define CX24120_REG_SIGSTR_H 0x3a /* Signal strength high */
51 #define CX24120_REG_SIGSTR_L 0x3b /* Signal strength low byte */
52 #define CX24120_REG_QUALITY_H 0x40 /* SNR high byte */
53 #define CX24120_REG_QUALITY_L 0x41 /* SNR low byte */
55 #define CX24120_REG_BER_HH 0x47 /* BER high byte of high word */
56 #define CX24120_REG_BER_HL 0x48 /* BER low byte of high word */
57 #define CX24120_REG_BER_LH 0x49 /* BER high byte of low word */
58 #define CX24120_REG_BER_LL 0x4a /* BER low byte of low word */
60 #define CX24120_REG_UCB_H 0x50 /* UCB high byte */
61 #define CX24120_REG_UCB_L 0x51 /* UCB low byte */
63 #define CX24120_REG_CLKDIV 0xe6
64 #define CX24120_REG_RATEDIV 0xf0
66 #define CX24120_REG_REVISION 0xff /* Chip revision (ro) */
68 /* Command messages */
69 enum command_message_id {
70 CMD_VCO_SET = 0x10, /* cmd.len = 12; */
71 CMD_TUNEREQUEST = 0x11, /* cmd.len = 15; */
73 CMD_MPEG_ONOFF = 0x13, /* cmd.len = 4; */
74 CMD_MPEG_INIT = 0x14, /* cmd.len = 7; */
75 CMD_BANDWIDTH = 0x15, /* cmd.len = 12; */
76 CMD_CLOCK_READ = 0x16, /* read clock */
77 CMD_CLOCK_SET = 0x17, /* cmd.len = 10; */
79 CMD_DISEQC_MSG1 = 0x20, /* cmd.len = 11; */
80 CMD_DISEQC_MSG2 = 0x21, /* cmd.len = d->msg_len + 6; */
81 CMD_SETVOLTAGE = 0x22, /* cmd.len = 2; */
82 CMD_SETTONE = 0x23, /* cmd.len = 4; */
83 CMD_DISEQC_BURST = 0x24, /* cmd.len not used !!! */
85 CMD_READ_SNR = 0x1a, /* Read signal strength */
86 CMD_START_TUNER = 0x1b, /* ??? */
90 CMD_TUNER_INIT = 0x3c, /* cmd.len = 0x03; */
93 #define CX24120_MAX_CMD_LEN 30
96 #define CX24120_PILOT_OFF 0x00
97 #define CX24120_PILOT_ON 0x40
98 #define CX24120_PILOT_AUTO 0x80
101 #define CX24120_HAS_SIGNAL 0x01
102 #define CX24120_HAS_CARRIER 0x02
103 #define CX24120_HAS_VITERBI 0x04
104 #define CX24120_HAS_LOCK 0x08
105 #define CX24120_HAS_UNK1 0x10
106 #define CX24120_HAS_UNK2 0x20
107 #define CX24120_STATUS_MASK 0x0f
108 #define CX24120_SIGNAL_MASK 0xc0
110 #define info(args...) pr_info("cx24120: " args)
111 #define err(args...) pr_err("cx24120: ### ERROR: " args)
113 /* The Demod/Tuner can't easily provide these, we cache them */
114 struct cx24120_tuning {
117 fe_spectral_inversion_t inversion;
120 fe_delivery_system_t delsys;
121 fe_modulation_t modulation;
134 struct cx24120_state {
135 struct i2c_adapter *i2c;
136 const struct cx24120_config *config;
137 struct dvb_frontend frontend;
143 /* current and next tuning parameters */
144 struct cx24120_tuning dcur;
145 struct cx24120_tuning dnxt;
148 /* Command message to firmware */
152 u8 arg[CX24120_MAX_CMD_LEN];
155 /* Read single register */
156 static int cx24120_readreg(struct cx24120_state *state, u8 reg)
160 struct i2c_msg msg[] = {
161 { .addr = state->config->i2c_addr,
166 .addr = state->config->i2c_addr,
173 ret = i2c_transfer(state->i2c, msg, 2);
175 err("Read error: reg=0x%02x, ret=%i)\n", reg, ret);
179 dev_dbg(&state->i2c->dev, "%s: reg=0x%02x; data=0x%02x\n",
185 /* Write single register */
186 static int cx24120_writereg(struct cx24120_state *state, u8 reg, u8 data)
188 u8 buf[] = { reg, data };
189 struct i2c_msg msg = {
190 .addr = state->config->i2c_addr,
197 ret = i2c_transfer(state->i2c, &msg, 1);
199 err("Write error: i2c_write error(err == %i, 0x%02x: 0x%02x)\n",
204 dev_dbg(&state->i2c->dev, "%s: reg=0x%02x; data=0x%02x\n",
205 __func__, reg, data);
210 /* Write multiple registers in chunks of i2c_wr_max-sized buffers */
211 static int cx24120_writeregs(struct cx24120_state *state,
212 u8 reg, const u8 *values, u16 len, u8 incr)
215 u16 max = state->config->i2c_wr_max > 0 ?
216 state->config->i2c_wr_max :
219 struct i2c_msg msg = {
220 .addr = state->config->i2c_addr,
224 msg.buf = kmalloc(max + 1, GFP_KERNEL);
230 msg.len = len > max ? max : len;
231 memcpy(&msg.buf[1], values, msg.len);
233 len -= msg.len; /* data length revers counter */
234 values += msg.len; /* incr data pointer */
238 msg.len++; /* don't forget the addr byte */
240 ret = i2c_transfer(state->i2c, &msg, 1);
242 err("i2c_write error(err == %i, 0x%02x)\n", ret, reg);
246 dev_dbg(&state->i2c->dev,
247 "%s: reg=0x%02x; data=%*ph\n",
248 __func__, reg, msg.len - 1, msg.buf + 1);
258 static struct dvb_frontend_ops cx24120_ops;
260 struct dvb_frontend *cx24120_attach(const struct cx24120_config *config,
261 struct i2c_adapter *i2c)
263 struct cx24120_state *state;
266 info("Conexant cx24120/cx24118 - DVBS/S2 Satellite demod/tuner\n");
267 state = kzalloc(sizeof(*state), GFP_KERNEL);
269 err("Unable to allocate memory for cx24120_state\n");
273 /* setup the state */
274 state->config = config;
277 /* check if the demod is present and has proper type */
278 demod_rev = cx24120_readreg(state, CX24120_REG_REVISION);
281 info("Demod cx24120 rev. 0x07 detected.\n");
284 info("Demod cx24120 rev. 0x05 detected.\n");
287 err("Unsupported demod revision: 0x%x detected.\n", demod_rev);
291 /* create dvb_frontend */
292 state->cold_init = 0;
293 memcpy(&state->frontend.ops, &cx24120_ops,
294 sizeof(struct dvb_frontend_ops));
295 state->frontend.demodulator_priv = state;
297 info("Conexant cx24120/cx24118 attached.\n");
298 return &state->frontend;
304 EXPORT_SYMBOL(cx24120_attach);
306 static int cx24120_test_rom(struct cx24120_state *state)
310 err = cx24120_readreg(state, 0xfd);
312 ret = cx24120_readreg(state, 0xdf) & 0xfe;
313 err = cx24120_writereg(state, 0xdf, ret);
318 static int cx24120_read_snr(struct dvb_frontend *fe, u16 *snr)
320 struct cx24120_state *state = fe->demodulator_priv;
322 *snr = (cx24120_readreg(state, CX24120_REG_QUALITY_H) << 8) |
323 (cx24120_readreg(state, CX24120_REG_QUALITY_L));
324 dev_dbg(&state->i2c->dev, "%s: read SNR index = %d\n", __func__, *snr);
329 static int cx24120_read_ber(struct dvb_frontend *fe, u32 *ber)
331 struct cx24120_state *state = fe->demodulator_priv;
333 *ber = (cx24120_readreg(state, CX24120_REG_BER_HH) << 24) |
334 (cx24120_readreg(state, CX24120_REG_BER_HL) << 16) |
335 (cx24120_readreg(state, CX24120_REG_BER_LH) << 8) |
336 cx24120_readreg(state, CX24120_REG_BER_LL);
337 dev_dbg(&state->i2c->dev, "%s: read BER index = %d\n", __func__, *ber);
342 static int cx24120_msg_mpeg_output_global_config(struct cx24120_state *state,
345 /* Check if we're running a command that needs to disable mpeg out */
346 static void cx24120_check_cmd(struct cx24120_state *state, u8 id)
349 case CMD_TUNEREQUEST:
351 case CMD_DISEQC_MSG1:
352 case CMD_DISEQC_MSG2:
355 case CMD_DISEQC_BURST:
356 cx24120_msg_mpeg_output_global_config(state, 0);
357 /* Old driver would do a msleep(100) here */
363 /* Send a message to the firmware */
364 static int cx24120_message_send(struct cx24120_state *state,
365 struct cx24120_cmd *cmd)
369 if (state->mpeg_enabled) {
370 /* Disable mpeg out on certain commands */
371 cx24120_check_cmd(state, cmd->id);
374 ret = cx24120_writereg(state, CX24120_REG_CMD_START, cmd->id);
375 ret = cx24120_writeregs(state, CX24120_REG_CMD_ARGS, &cmd->arg[0],
377 ret = cx24120_writereg(state, CX24120_REG_CMD_END, 0x01);
380 while (cx24120_readreg(state, CX24120_REG_CMD_END)) {
384 err("Error sending message to firmware\n");
388 dev_dbg(&state->i2c->dev, "%s: Successfully send message 0x%02x\n",
394 /* Send a message and fill arg[] with the results */
395 static int cx24120_message_sendrcv(struct cx24120_state *state,
396 struct cx24120_cmd *cmd, u8 numreg)
400 if (numreg > CX24120_MAX_CMD_LEN) {
401 err("Too many registers to read. cmd->reg = %d", numreg);
405 ret = cx24120_message_send(state, cmd);
412 /* Read numreg registers starting from register cmd->len */
413 for (i = 0; i < numreg; i++)
414 cmd->arg[i] = cx24120_readreg(state, (cmd->len + i + 1));
419 static int cx24120_read_signal_strength(struct dvb_frontend *fe,
420 u16 *signal_strength)
422 struct cx24120_state *state = fe->demodulator_priv;
423 struct cx24120_cmd cmd;
424 int ret, sigstr_h, sigstr_l;
426 cmd.id = CMD_READ_SNR;
430 ret = cx24120_message_send(state, &cmd);
432 err("error reading signal strength\n");
437 sigstr_h = (cx24120_readreg(state, CX24120_REG_SIGSTR_H) >> 6) << 8;
438 sigstr_l = cx24120_readreg(state, CX24120_REG_SIGSTR_L);
439 dev_dbg(&state->i2c->dev, "%s: Signal strength from firmware= 0x%x\n",
440 __func__, (sigstr_h | sigstr_l));
443 *signal_strength = ((sigstr_h | sigstr_l) << 5) & 0x0000ffff;
444 dev_dbg(&state->i2c->dev, "%s: Signal strength= 0x%x\n",
445 __func__, *signal_strength);
450 static int cx24120_msg_mpeg_output_global_config(struct cx24120_state *state,
453 struct cx24120_cmd cmd;
456 cmd.id = CMD_MPEG_ONOFF;
460 cmd.arg[2] = enable ? 0 : (u8)(-1);
463 ret = cx24120_message_send(state, &cmd);
465 dev_dbg(&state->i2c->dev,
466 "%s: Failed to set MPEG output to %s\n",
467 __func__, enable ? "enabled" : "disabled");
471 state->mpeg_enabled = enable;
472 dev_dbg(&state->i2c->dev, "%s: MPEG output %s\n",
473 __func__, enable ? "enabled" : "disabled");
478 static int cx24120_msg_mpeg_output_config(struct cx24120_state *state, u8 seq)
480 struct cx24120_cmd cmd;
481 struct cx24120_initial_mpeg_config i =
482 state->config->initial_mpeg_config;
484 cmd.id = CMD_MPEG_INIT;
486 cmd.arg[0] = seq; /* sequental number - can be 0,1,2 */
487 cmd.arg[1] = ((i.x1 & 0x01) << 1) | ((i.x1 >> 1) & 0x01);
490 cmd.arg[4] = ((i.x2 >> 1) & 0x01);
491 cmd.arg[5] = (i.x2 & 0xf0) | (i.x3 & 0x0f);
494 return cx24120_message_send(state, &cmd);
497 static int cx24120_diseqc_send_burst(struct dvb_frontend *fe,
498 fe_sec_mini_cmd_t burst)
500 struct cx24120_state *state = fe->demodulator_priv;
501 struct cx24120_cmd cmd;
503 /* Yes, cmd.len is set to zero. The old driver
504 * didn't specify any len, but also had a
505 * memset 0 before every use of the cmd struct
506 * which would have set it to zero.
507 * This quite probably needs looking into.
509 cmd.id = CMD_DISEQC_BURST;
515 dev_dbg(&state->i2c->dev, "%s: burst sent.\n", __func__);
517 return cx24120_message_send(state, &cmd);
520 static int cx24120_set_tone(struct dvb_frontend *fe, fe_sec_tone_mode_t tone)
522 struct cx24120_state *state = fe->demodulator_priv;
523 struct cx24120_cmd cmd;
525 dev_dbg(&state->i2c->dev, "%s(%d)\n", __func__, tone);
527 if ((tone != SEC_TONE_ON) && (tone != SEC_TONE_OFF)) {
528 err("Invalid tone=%d\n", tone);
532 cmd.id = CMD_SETTONE;
537 cmd.arg[3] = (tone == SEC_TONE_ON) ? 0x01 : 0x00;
539 return cx24120_message_send(state, &cmd);
542 static int cx24120_set_voltage(struct dvb_frontend *fe,
543 fe_sec_voltage_t voltage)
545 struct cx24120_state *state = fe->demodulator_priv;
546 struct cx24120_cmd cmd;
548 dev_dbg(&state->i2c->dev, "%s(%d)\n", __func__, voltage);
550 cmd.id = CMD_SETVOLTAGE;
553 cmd.arg[1] = (voltage == SEC_VOLTAGE_18) ? 0x01 : 0x00;
555 return cx24120_message_send(state, &cmd);
558 static int cx24120_send_diseqc_msg(struct dvb_frontend *fe,
559 struct dvb_diseqc_master_cmd *d)
561 struct cx24120_state *state = fe->demodulator_priv;
562 struct cx24120_cmd cmd;
565 dev_dbg(&state->i2c->dev, "%s()\n", __func__);
567 cmd.id = CMD_DISEQC_MSG1;
581 if (cx24120_message_send(state, &cmd)) {
582 err("send 1st message(0x%x) failed\n", cmd.id);
586 cmd.id = CMD_DISEQC_MSG2;
587 cmd.len = d->msg_len + 6;
593 cmd.arg[5] = d->msg_len;
595 memcpy(&cmd.arg[6], &d->msg, d->msg_len);
597 if (cx24120_message_send(state, &cmd)) {
598 err("send 2nd message(0x%x) failed\n", cmd.id);
604 if (!(cx24120_readreg(state, 0x93) & 0x01)) {
605 dev_dbg(&state->i2c->dev,
606 "%s: diseqc sequence sent success\n",
612 } while (back_count);
614 err("Too long waiting for diseqc.\n");
618 static void cx24120_get_stats(struct cx24120_state *state, fe_status_t status)
620 struct dvb_frontend *fe = &state->frontend;
621 struct dtv_frontend_properties *c = &fe->dtv_property_cache;
625 dev_dbg(&state->i2c->dev, "%s()\n", __func__);
627 /* signal strength */
628 if (status & FE_HAS_SIGNAL) {
629 ret = cx24120_read_signal_strength(fe, &u16tmp);
633 c->strength.stat[0].scale = FE_SCALE_RELATIVE;
634 c->strength.stat[0].uvalue = u16tmp;
636 c->strength.stat[0].scale = FE_SCALE_NOT_AVAILABLE;
641 /* FIXME: add UCB/BER */
644 static void cx24120_set_clock_ratios(struct dvb_frontend *fe);
646 /* Read current tuning status */
647 static int cx24120_read_status(struct dvb_frontend *fe, fe_status_t *status)
649 struct cx24120_state *state = fe->demodulator_priv;
652 lock = cx24120_readreg(state, CX24120_REG_STATUS);
654 dev_dbg(&state->i2c->dev, "%s() status = 0x%02x\n",
659 if (lock & CX24120_HAS_SIGNAL)
660 *status = FE_HAS_SIGNAL;
661 if (lock & CX24120_HAS_CARRIER)
662 *status |= FE_HAS_CARRIER;
663 if (lock & CX24120_HAS_VITERBI)
664 *status |= FE_HAS_VITERBI | FE_HAS_SYNC;
665 if (lock & CX24120_HAS_LOCK)
666 *status |= FE_HAS_LOCK;
668 /* TODO: is FE_HAS_SYNC in the right place?
669 * Other cx241xx drivers have this slightly
672 cx24120_get_stats(state, *status);
674 /* Set the clock once tuned in */
675 if (state->need_clock_set && *status & FE_HAS_LOCK) {
676 /* Set clock ratios */
677 cx24120_set_clock_ratios(fe);
679 /* Old driver would do a msleep(200) here */
681 /* Renable mpeg output */
682 if (!state->mpeg_enabled)
683 cx24120_msg_mpeg_output_global_config(state, 1);
685 state->need_clock_set = 0;
691 /* FEC & modulation lookup table
692 * Used for decoding the REG_FECMODE register
695 static struct cx24120_modfec {
696 fe_delivery_system_t delsys;
700 } modfec_lookup_table[] = {
701 /*delsys mod fec val */
702 { SYS_DVBS, QPSK, FEC_1_2, 0x01 },
703 { SYS_DVBS, QPSK, FEC_2_3, 0x02 },
704 { SYS_DVBS, QPSK, FEC_3_4, 0x03 },
705 { SYS_DVBS, QPSK, FEC_4_5, 0x04 },
706 { SYS_DVBS, QPSK, FEC_5_6, 0x05 },
707 { SYS_DVBS, QPSK, FEC_6_7, 0x06 },
708 { SYS_DVBS, QPSK, FEC_7_8, 0x07 },
710 { SYS_DVBS2, QPSK, FEC_1_2, 0x04 },
711 { SYS_DVBS2, QPSK, FEC_3_5, 0x05 },
712 { SYS_DVBS2, QPSK, FEC_2_3, 0x06 },
713 { SYS_DVBS2, QPSK, FEC_3_4, 0x07 },
714 { SYS_DVBS2, QPSK, FEC_4_5, 0x08 },
715 { SYS_DVBS2, QPSK, FEC_5_6, 0x09 },
716 { SYS_DVBS2, QPSK, FEC_8_9, 0x0a },
717 { SYS_DVBS2, QPSK, FEC_9_10, 0x0b },
719 { SYS_DVBS2, PSK_8, FEC_3_5, 0x0c },
720 { SYS_DVBS2, PSK_8, FEC_2_3, 0x0d },
721 { SYS_DVBS2, PSK_8, FEC_3_4, 0x0e },
722 { SYS_DVBS2, PSK_8, FEC_5_6, 0x0f },
723 { SYS_DVBS2, PSK_8, FEC_8_9, 0x10 },
724 { SYS_DVBS2, PSK_8, FEC_9_10, 0x11 },
727 /* Retrieve current fec, modulation & pilot values */
728 static int cx24120_get_fec(struct dvb_frontend *fe)
730 struct dtv_frontend_properties *c = &fe->dtv_property_cache;
731 struct cx24120_state *state = fe->demodulator_priv;
736 dev_dbg(&state->i2c->dev, "%s()\n", __func__);
738 ret = cx24120_readreg(state, CX24120_REG_FECMODE);
739 fec = ret & 0x3f; /* Lower 6 bits */
741 dev_dbg(&state->i2c->dev, "%s: Get FEC: %d\n", __func__, fec);
743 for (idx = 0; idx < ARRAY_SIZE(modfec_lookup_table); idx++) {
744 if (modfec_lookup_table[idx].delsys != state->dcur.delsys)
746 if (modfec_lookup_table[idx].val != fec)
752 if (idx >= ARRAY_SIZE(modfec_lookup_table)) {
753 dev_dbg(&state->i2c->dev, "%s: Couldn't find fec!\n",
758 /* save values back to cache */
759 c->modulation = modfec_lookup_table[idx].mod;
760 c->fec_inner = modfec_lookup_table[idx].fec;
761 c->pilot = (ret & 0x80) ? PILOT_ON : PILOT_OFF;
763 dev_dbg(&state->i2c->dev,
764 "%s: mod(%d), fec(%d), pilot(%d)\n",
766 c->modulation, c->fec_inner, c->pilot);
771 /* Clock ratios lookup table
773 * Values obtained from much larger table in old driver
774 * which had numerous entries which would never match.
776 * There's probably some way of calculating these but I
777 * can't determine the pattern
779 static struct cx24120_clock_ratios_table {
780 fe_delivery_system_t delsys;
787 } clock_ratios_table[] = {
788 /*delsys pilot mod fec m_rat n_rat rate */
789 { SYS_DVBS2, PILOT_OFF, QPSK, FEC_1_2, 273088, 254505, 274 },
790 { SYS_DVBS2, PILOT_OFF, QPSK, FEC_3_5, 17272, 13395, 330 },
791 { SYS_DVBS2, PILOT_OFF, QPSK, FEC_2_3, 24344, 16967, 367 },
792 { SYS_DVBS2, PILOT_OFF, QPSK, FEC_3_4, 410788, 254505, 413 },
793 { SYS_DVBS2, PILOT_OFF, QPSK, FEC_4_5, 438328, 254505, 440 },
794 { SYS_DVBS2, PILOT_OFF, QPSK, FEC_5_6, 30464, 16967, 459 },
795 { SYS_DVBS2, PILOT_OFF, QPSK, FEC_8_9, 487832, 254505, 490 },
796 { SYS_DVBS2, PILOT_OFF, QPSK, FEC_9_10, 493952, 254505, 496 },
797 { SYS_DVBS2, PILOT_OFF, PSK_8, FEC_3_5, 328168, 169905, 494 },
798 { SYS_DVBS2, PILOT_OFF, PSK_8, FEC_2_3, 24344, 11327, 550 },
799 { SYS_DVBS2, PILOT_OFF, PSK_8, FEC_3_4, 410788, 169905, 618 },
800 { SYS_DVBS2, PILOT_OFF, PSK_8, FEC_5_6, 30464, 11327, 688 },
801 { SYS_DVBS2, PILOT_OFF, PSK_8, FEC_8_9, 487832, 169905, 735 },
802 { SYS_DVBS2, PILOT_OFF, PSK_8, FEC_9_10, 493952, 169905, 744 },
803 { SYS_DVBS2, PILOT_ON, QPSK, FEC_1_2, 273088, 260709, 268 },
804 { SYS_DVBS2, PILOT_ON, QPSK, FEC_3_5, 328168, 260709, 322 },
805 { SYS_DVBS2, PILOT_ON, QPSK, FEC_2_3, 121720, 86903, 358 },
806 { SYS_DVBS2, PILOT_ON, QPSK, FEC_3_4, 410788, 260709, 403 },
807 { SYS_DVBS2, PILOT_ON, QPSK, FEC_4_5, 438328, 260709, 430 },
808 { SYS_DVBS2, PILOT_ON, QPSK, FEC_5_6, 152320, 86903, 448 },
809 { SYS_DVBS2, PILOT_ON, QPSK, FEC_8_9, 487832, 260709, 479 },
810 { SYS_DVBS2, PILOT_ON, QPSK, FEC_9_10, 493952, 260709, 485 },
811 { SYS_DVBS2, PILOT_ON, PSK_8, FEC_3_5, 328168, 173853, 483 },
812 { SYS_DVBS2, PILOT_ON, PSK_8, FEC_2_3, 121720, 57951, 537 },
813 { SYS_DVBS2, PILOT_ON, PSK_8, FEC_3_4, 410788, 173853, 604 },
814 { SYS_DVBS2, PILOT_ON, PSK_8, FEC_5_6, 152320, 57951, 672 },
815 { SYS_DVBS2, PILOT_ON, PSK_8, FEC_8_9, 487832, 173853, 718 },
816 { SYS_DVBS2, PILOT_ON, PSK_8, FEC_9_10, 493952, 173853, 727 },
817 { SYS_DVBS, PILOT_OFF, QPSK, FEC_1_2, 152592, 152592, 256 },
818 { SYS_DVBS, PILOT_OFF, QPSK, FEC_2_3, 305184, 228888, 341 },
819 { SYS_DVBS, PILOT_OFF, QPSK, FEC_3_4, 457776, 305184, 384 },
820 { SYS_DVBS, PILOT_OFF, QPSK, FEC_5_6, 762960, 457776, 427 },
821 { SYS_DVBS, PILOT_OFF, QPSK, FEC_7_8, 1068144, 610368, 448 },
824 /* Set clock ratio from lookup table */
825 static void cx24120_set_clock_ratios(struct dvb_frontend *fe)
827 struct dtv_frontend_properties *c = &fe->dtv_property_cache;
828 struct cx24120_state *state = fe->demodulator_priv;
829 struct cx24120_cmd cmd;
832 /* Find fec, modulation, pilot */
833 ret = cx24120_get_fec(fe);
837 /* Find the clock ratios in the lookup table */
838 for (idx = 0; idx < ARRAY_SIZE(clock_ratios_table); idx++) {
839 if (clock_ratios_table[idx].delsys != state->dcur.delsys)
841 if (clock_ratios_table[idx].mod != c->modulation)
843 if (clock_ratios_table[idx].fec != c->fec_inner)
845 if (clock_ratios_table[idx].pilot != c->pilot)
851 if (idx >= ARRAY_SIZE(clock_ratios_table)) {
852 info("Clock ratio not found - data reception in danger\n");
856 /* Read current values? */
857 cmd.id = CMD_CLOCK_READ;
860 ret = cx24120_message_sendrcv(state, &cmd, 6);
863 /* in cmd[0]-[5] - result */
865 dev_dbg(&state->i2c->dev,
866 "%s: m=%d, n=%d; idx: %d m=%d, n=%d, rate=%d\n",
868 cmd.arg[2] | (cmd.arg[1] << 8) | (cmd.arg[0] << 16),
869 cmd.arg[5] | (cmd.arg[4] << 8) | (cmd.arg[3] << 16),
871 clock_ratios_table[idx].m_rat,
872 clock_ratios_table[idx].n_rat,
873 clock_ratios_table[idx].rate);
876 cmd.id = CMD_CLOCK_SET;
880 cmd.arg[2] = (clock_ratios_table[idx].m_rat >> 16) & 0xff;
881 cmd.arg[3] = (clock_ratios_table[idx].m_rat >> 8) & 0xff;
882 cmd.arg[4] = (clock_ratios_table[idx].m_rat >> 0) & 0xff;
883 cmd.arg[5] = (clock_ratios_table[idx].n_rat >> 16) & 0xff;
884 cmd.arg[6] = (clock_ratios_table[idx].n_rat >> 8) & 0xff;
885 cmd.arg[7] = (clock_ratios_table[idx].n_rat >> 0) & 0xff;
886 cmd.arg[8] = (clock_ratios_table[idx].rate >> 8) & 0xff;
887 cmd.arg[9] = (clock_ratios_table[idx].rate >> 0) & 0xff;
889 cx24120_message_send(state, &cmd);
892 /* Set inversion value */
893 static int cx24120_set_inversion(struct cx24120_state *state,
894 fe_spectral_inversion_t inversion)
896 dev_dbg(&state->i2c->dev, "%s(%d)\n", __func__, inversion);
900 state->dnxt.inversion_val = 0x00;
903 state->dnxt.inversion_val = 0x04;
906 state->dnxt.inversion_val = 0x0c;
912 state->dnxt.inversion = inversion;
918 * FEC lookup table for tuning Some DVB-S2 val's have been found by
919 * trial and error. Sofar it seems to match up with the contents of
920 * the REG_FECMODE after tuning The rest will probably be the same but
921 * would need testing. Anything not in the table will run with
922 * FEC_AUTO and take a while longer to tune in ( c.500ms instead of
925 static struct cx24120_modfec_table {
926 fe_delivery_system_t delsys;
931 /*delsys mod fec val */
932 { SYS_DVBS, QPSK, FEC_1_2, 0x2e },
933 { SYS_DVBS, QPSK, FEC_2_3, 0x2f },
934 { SYS_DVBS, QPSK, FEC_3_4, 0x30 },
935 { SYS_DVBS, QPSK, FEC_5_6, 0x31 },
936 { SYS_DVBS, QPSK, FEC_6_7, 0x32 },
937 { SYS_DVBS, QPSK, FEC_7_8, 0x33 },
939 { SYS_DVBS2, QPSK, FEC_3_4, 0x07 },
941 { SYS_DVBS2, PSK_8, FEC_2_3, 0x0d },
942 { SYS_DVBS2, PSK_8, FEC_3_4, 0x0e },
945 /* Set fec_val & fec_mask values from delsys, modulation & fec */
946 static int cx24120_set_fec(struct cx24120_state *state, fe_modulation_t mod,
951 dev_dbg(&state->i2c->dev, "%s(0x%02x,0x%02x)\n", __func__, mod, fec);
953 state->dnxt.fec = fec;
955 /* Lookup fec_val from modfec table */
956 for (idx = 0; idx < ARRAY_SIZE(modfec_table); idx++) {
957 if (modfec_table[idx].delsys != state->dnxt.delsys)
959 if (modfec_table[idx].mod != mod)
961 if (modfec_table[idx].fec != fec)
965 state->dnxt.fec_mask = 0x00;
966 state->dnxt.fec_val = modfec_table[idx].val;
970 if (state->dnxt.delsys == SYS_DVBS2) {
971 /* DVBS2 auto is 0x00/0x00 */
972 state->dnxt.fec_mask = 0x00;
973 state->dnxt.fec_val = 0x00;
975 /* Set DVB-S to auto */
976 state->dnxt.fec_val = 0x2e;
977 state->dnxt.fec_mask = 0xac;
984 static int cx24120_set_pilot(struct cx24120_state *state, fe_pilot_t pilot)
986 dev_dbg(&state->i2c->dev, "%s(%d)\n", __func__, pilot);
988 /* Pilot only valid in DVBS2 */
989 if (state->dnxt.delsys != SYS_DVBS2) {
990 state->dnxt.pilot_val = CX24120_PILOT_OFF;
996 state->dnxt.pilot_val = CX24120_PILOT_OFF;
999 state->dnxt.pilot_val = CX24120_PILOT_ON;
1003 state->dnxt.pilot_val = CX24120_PILOT_AUTO;
1009 /* Set symbol rate */
1010 static int cx24120_set_symbolrate(struct cx24120_state *state, u32 rate)
1012 dev_dbg(&state->i2c->dev, "%s(%d)\n",
1015 state->dnxt.symbol_rate = rate;
1017 /* Check symbol rate */
1018 if (rate > 31000000) {
1019 state->dnxt.clkdiv = (-(rate < 31000001) & 3) + 2;
1020 state->dnxt.ratediv = (-(rate < 31000001) & 6) + 4;
1022 state->dnxt.clkdiv = 3;
1023 state->dnxt.ratediv = 6;
1029 /* Overwrite the current tuning params, we are about to tune */
1030 static void cx24120_clone_params(struct dvb_frontend *fe)
1032 struct cx24120_state *state = fe->demodulator_priv;
1034 state->dcur = state->dnxt;
1037 static int cx24120_set_frontend(struct dvb_frontend *fe)
1039 struct dtv_frontend_properties *c = &fe->dtv_property_cache;
1040 struct cx24120_state *state = fe->demodulator_priv;
1041 struct cx24120_cmd cmd;
1044 switch (c->delivery_system) {
1046 dev_dbg(&state->i2c->dev, "%s() DVB-S2\n",
1050 dev_dbg(&state->i2c->dev, "%s() DVB-S\n",
1054 dev_dbg(&state->i2c->dev,
1055 "%s() Delivery system(%d) not supported\n",
1056 __func__, c->delivery_system);
1061 state->dnxt.delsys = c->delivery_system;
1062 state->dnxt.modulation = c->modulation;
1063 state->dnxt.frequency = c->frequency;
1064 state->dnxt.pilot = c->pilot;
1066 ret = cx24120_set_inversion(state, c->inversion);
1070 ret = cx24120_set_fec(state, c->modulation, c->fec_inner);
1074 ret = cx24120_set_pilot(state, c->pilot);
1078 ret = cx24120_set_symbolrate(state, c->symbol_rate);
1082 /* discard the 'current' tuning parameters and prepare to tune */
1083 cx24120_clone_params(fe);
1085 dev_dbg(&state->i2c->dev,
1086 "%s: delsys = %d\n", __func__, state->dcur.delsys);
1087 dev_dbg(&state->i2c->dev,
1088 "%s: modulation = %d\n", __func__, state->dcur.modulation);
1089 dev_dbg(&state->i2c->dev,
1090 "%s: frequency = %d\n", __func__, state->dcur.frequency);
1091 dev_dbg(&state->i2c->dev,
1092 "%s: pilot = %d (val = 0x%02x)\n", __func__,
1093 state->dcur.pilot, state->dcur.pilot_val);
1094 dev_dbg(&state->i2c->dev,
1095 "%s: symbol_rate = %d (clkdiv/ratediv = 0x%02x/0x%02x)\n",
1096 __func__, state->dcur.symbol_rate,
1097 state->dcur.clkdiv, state->dcur.ratediv);
1098 dev_dbg(&state->i2c->dev,
1099 "%s: FEC = %d (mask/val = 0x%02x/0x%02x)\n", __func__,
1100 state->dcur.fec, state->dcur.fec_mask, state->dcur.fec_val);
1101 dev_dbg(&state->i2c->dev,
1102 "%s: Inversion = %d (val = 0x%02x)\n", __func__,
1103 state->dcur.inversion, state->dcur.inversion_val);
1105 /* Flag that clock needs to be set after tune */
1106 state->need_clock_set = 1;
1109 cmd.id = CMD_TUNEREQUEST;
1112 cmd.arg[1] = (state->dcur.frequency & 0xff0000) >> 16;
1113 cmd.arg[2] = (state->dcur.frequency & 0x00ff00) >> 8;
1114 cmd.arg[3] = (state->dcur.frequency & 0x0000ff);
1115 cmd.arg[4] = ((state->dcur.symbol_rate / 1000) & 0xff00) >> 8;
1116 cmd.arg[5] = ((state->dcur.symbol_rate / 1000) & 0x00ff);
1117 cmd.arg[6] = state->dcur.inversion;
1118 cmd.arg[7] = state->dcur.fec_val | state->dcur.pilot_val;
1119 cmd.arg[8] = CX24120_SEARCH_RANGE_KHZ >> 8;
1120 cmd.arg[9] = CX24120_SEARCH_RANGE_KHZ & 0xff;
1121 cmd.arg[10] = 0; /* maybe rolloff? */
1122 cmd.arg[11] = state->dcur.fec_mask;
1123 cmd.arg[12] = state->dcur.ratediv;
1124 cmd.arg[13] = state->dcur.clkdiv;
1127 /* Send tune command */
1128 ret = cx24120_message_send(state, &cmd);
1132 /* Write symbol rate values */
1133 ret = cx24120_writereg(state, CX24120_REG_CLKDIV, state->dcur.clkdiv);
1134 ret = cx24120_readreg(state, CX24120_REG_RATEDIV);
1136 ret |= state->dcur.ratediv;
1137 ret = cx24120_writereg(state, CX24120_REG_RATEDIV, ret);
1142 /* Set vco from config */
1143 static int cx24120_set_vco(struct cx24120_state *state)
1145 struct cx24120_cmd cmd;
1148 u32 xtal_khz = state->config->xtal_khz;
1150 nxtal_khz = xtal_khz * 4;
1151 vco = nxtal_khz * 10;
1152 inv_vco = DIV_ROUND_CLOSEST_ULL(0x400000000ULL, vco);
1154 dev_dbg(&state->i2c->dev,
1155 "%s: xtal=%d, vco=%d, inv_vco=%lld\n",
1156 __func__, xtal_khz, vco, inv_vco);
1158 cmd.id = CMD_VCO_SET;
1160 cmd.arg[0] = (vco >> 16) & 0xff;
1161 cmd.arg[1] = (vco >> 8) & 0xff;
1162 cmd.arg[2] = vco & 0xff;
1163 cmd.arg[3] = (inv_vco >> 8) & 0xff;
1164 cmd.arg[4] = (inv_vco) & 0xff;
1166 cmd.arg[6] = (nxtal_khz >> 8) & 0xff;
1167 cmd.arg[7] = nxtal_khz & 0xff;
1170 cmd.arg[10] = (xtal_khz >> 16) & 0xff;
1171 cmd.arg[11] = xtal_khz & 0xff;
1173 return cx24120_message_send(state, &cmd);
1176 int cx24120_init(struct dvb_frontend *fe)
1178 const struct firmware *fw;
1179 struct cx24120_state *state = fe->demodulator_priv;
1180 struct cx24120_cmd cmd;
1181 u8 ret, ret_EA, reg1;
1185 unsigned char vers[4];
1187 if (state->cold_init)
1191 ret = cx24120_writereg(state, 0xea, 0x00);
1192 ret = cx24120_test_rom(state);
1193 ret = cx24120_readreg(state, 0xfb) & 0xfe;
1194 ret = cx24120_writereg(state, 0xfb, ret);
1195 ret = cx24120_readreg(state, 0xfc) & 0xfe;
1196 ret = cx24120_writereg(state, 0xfc, ret);
1197 ret = cx24120_writereg(state, 0xc3, 0x04);
1198 ret = cx24120_writereg(state, 0xc4, 0x04);
1199 ret = cx24120_writereg(state, 0xce, 0x00);
1200 ret = cx24120_writereg(state, 0xcf, 0x00);
1201 ret_EA = cx24120_readreg(state, 0xea) & 0xfe;
1202 ret = cx24120_writereg(state, 0xea, ret_EA);
1203 ret = cx24120_writereg(state, 0xeb, 0x0c);
1204 ret = cx24120_writereg(state, 0xec, 0x06);
1205 ret = cx24120_writereg(state, 0xed, 0x05);
1206 ret = cx24120_writereg(state, 0xee, 0x03);
1207 ret = cx24120_writereg(state, 0xef, 0x05);
1208 ret = cx24120_writereg(state, 0xf3, 0x03);
1209 ret = cx24120_writereg(state, 0xf4, 0x44);
1211 for (reg1 = 0xf0; reg1 < 0xf3; reg1++) {
1212 cx24120_writereg(state, reg1, 0x04);
1213 cx24120_writereg(state, reg1 - 10, 0x02);
1216 ret = cx24120_writereg(state, 0xea, (ret_EA | 0x01));
1217 for (reg1 = 0xc5; reg1 < 0xcb; reg1 += 2) {
1218 ret = cx24120_writereg(state, reg1, 0x00);
1219 ret = cx24120_writereg(state, reg1 + 1, 0x00);
1222 ret = cx24120_writereg(state, 0xe4, 0x03);
1223 ret = cx24120_writereg(state, 0xeb, 0x0a);
1225 dev_dbg(&state->i2c->dev,
1226 "%s: Requesting firmware (%s) to download...\n",
1227 __func__, CX24120_FIRMWARE);
1229 ret = state->config->request_firmware(fe, &fw, CX24120_FIRMWARE);
1231 err("Could not load firmware (%s): %d\n", CX24120_FIRMWARE,
1236 dev_dbg(&state->i2c->dev,
1237 "%s: Firmware found, size %d bytes (%02x %02x .. %02x %02x)\n",
1239 (int)fw->size, /* firmware_size in bytes */
1240 fw->data[0], /* fw 1st byte */
1241 fw->data[1], /* fw 2d byte */
1242 fw->data[fw->size - 2], /* fw before last byte */
1243 fw->data[fw->size - 1]); /* fw last byte */
1245 ret = cx24120_test_rom(state);
1246 ret = cx24120_readreg(state, 0xfb) & 0xfe;
1247 ret = cx24120_writereg(state, 0xfb, ret);
1248 ret = cx24120_writereg(state, 0xe0, 0x76);
1249 ret = cx24120_writereg(state, 0xf7, 0x81);
1250 ret = cx24120_writereg(state, 0xf8, 0x00);
1251 ret = cx24120_writereg(state, 0xf9, 0x00);
1252 ret = cx24120_writeregs(state, 0xfa, fw->data, (fw->size - 1), 0x00);
1253 ret = cx24120_writereg(state, 0xf7, 0xc0);
1254 ret = cx24120_writereg(state, 0xe0, 0x00);
1255 ret = (fw->size - 2) & 0x00ff;
1256 ret = cx24120_writereg(state, 0xf8, ret);
1257 ret = ((fw->size - 2) >> 8) & 0x00ff;
1258 ret = cx24120_writereg(state, 0xf9, ret);
1259 ret = cx24120_writereg(state, 0xf7, 0x00);
1260 ret = cx24120_writereg(state, 0xdc, 0x00);
1261 ret = cx24120_writereg(state, 0xdc, 0x07);
1264 /* Check final byte matches final byte of firmware */
1265 ret = cx24120_readreg(state, 0xe1);
1266 if (ret == fw->data[fw->size - 1]) {
1267 dev_dbg(&state->i2c->dev,
1268 "%s: Firmware uploaded successfully\n",
1272 err("Firmware upload failed. Last byte returned=0x%x\n", ret);
1273 reset_result = -EREMOTEIO;
1275 ret = cx24120_writereg(state, 0xdc, 0x00);
1276 release_firmware(fw);
1277 if (reset_result != 0)
1278 return reset_result;
1281 cmd.id = CMD_START_TUNER;
1287 if (cx24120_message_send(state, &cmd) != 0) {
1288 err("Error tuner start! :(\n");
1293 ret = cx24120_set_vco(state);
1295 err("Error set VCO! :(\n");
1300 cmd.id = CMD_BANDWIDTH;
1315 if (cx24120_message_send(state, &cmd)) {
1316 err("Error set bandwidth!\n");
1320 ret = cx24120_readreg(state, 0xba);
1322 dev_dbg(&state->i2c->dev, "%s: Reset-readreg 0xba: %x\n",
1324 err("Error initialising tuner!\n");
1328 dev_dbg(&state->i2c->dev, "%s: Tuner initialised correctly.\n",
1331 /* Initialise mpeg outputs */
1332 ret = cx24120_writereg(state, 0xeb, 0x0a);
1333 if (cx24120_msg_mpeg_output_global_config(state, 0) ||
1334 cx24120_msg_mpeg_output_config(state, 0) ||
1335 cx24120_msg_mpeg_output_config(state, 1) ||
1336 cx24120_msg_mpeg_output_config(state, 2)) {
1337 err("Error initialising mpeg output. :(\n");
1342 cmd.id = CMD_TUNER_INIT;
1347 if (cx24120_message_send(state, &cmd)) {
1348 err("Error sending final init message. :(\n");
1352 /* Firmware CMD 35: Get firmware version */
1353 cmd.id = CMD_FWVERSION;
1355 for (i = 0; i < 4; i++) {
1357 ret = cx24120_message_send(state, &cmd);
1360 vers[i] = cx24120_readreg(state, CX24120_REG_MAILBOX);
1362 info("FW version %i.%i.%i.%i\n", vers[0], vers[1], vers[2], vers[3]);
1364 state->cold_init = 1;
1368 static int cx24120_tune(struct dvb_frontend *fe, bool re_tune,
1369 unsigned int mode_flags, unsigned int *delay,
1370 fe_status_t *status)
1372 struct cx24120_state *state = fe->demodulator_priv;
1375 dev_dbg(&state->i2c->dev, "%s(%d)\n", __func__, re_tune);
1377 /* TODO: Do we need to set delay? */
1380 ret = cx24120_set_frontend(fe);
1385 return cx24120_read_status(fe, status);
1388 static int cx24120_get_algo(struct dvb_frontend *fe)
1390 return DVBFE_ALGO_HW;
1393 static int cx24120_sleep(struct dvb_frontend *fe)
1398 static int cx24120_get_frontend(struct dvb_frontend *fe)
1400 struct dtv_frontend_properties *c = &fe->dtv_property_cache;
1401 struct cx24120_state *state = fe->demodulator_priv;
1402 u8 freq1, freq2, freq3;
1405 dev_dbg(&state->i2c->dev, "%s()", __func__);
1407 /* don't return empty data if we're not tuned in */
1408 cx24120_read_status(fe, &status);
1409 if ((status & FE_HAS_LOCK) == 0)
1413 freq1 = cx24120_readreg(state, CX24120_REG_FREQ1);
1414 freq2 = cx24120_readreg(state, CX24120_REG_FREQ2);
1415 freq3 = cx24120_readreg(state, CX24120_REG_FREQ3);
1416 c->frequency = (freq3 << 16) | (freq2 << 8) | freq1;
1417 dev_dbg(&state->i2c->dev, "%s frequency = %d\n", __func__,
1420 /* Get modulation, fec, pilot */
1421 cx24120_get_fec(fe);
1426 static void cx24120_release(struct dvb_frontend *fe)
1428 struct cx24120_state *state = fe->demodulator_priv;
1430 dev_dbg(&state->i2c->dev, "%s: Clear state structure\n", __func__);
1434 static int cx24120_read_ucblocks(struct dvb_frontend *fe, u32 *ucblocks)
1436 struct cx24120_state *state = fe->demodulator_priv;
1438 *ucblocks = (cx24120_readreg(state, CX24120_REG_UCB_H) << 8) |
1439 cx24120_readreg(state, CX24120_REG_UCB_L);
1441 dev_dbg(&state->i2c->dev, "%s: Blocks = %d\n", __func__, *ucblocks);
1445 static struct dvb_frontend_ops cx24120_ops = {
1446 .delsys = { SYS_DVBS, SYS_DVBS2 },
1448 .name = "Conexant CX24120/CX24118",
1449 .frequency_min = 950000,
1450 .frequency_max = 2150000,
1451 .frequency_stepsize = 1011, /* kHz for QPSK frontends */
1452 .frequency_tolerance = 5000,
1453 .symbol_rate_min = 1000000,
1454 .symbol_rate_max = 45000000,
1455 .caps = FE_CAN_INVERSION_AUTO |
1456 FE_CAN_FEC_1_2 | FE_CAN_FEC_2_3 | FE_CAN_FEC_3_4 |
1457 FE_CAN_FEC_4_5 | FE_CAN_FEC_5_6 | FE_CAN_FEC_6_7 |
1458 FE_CAN_FEC_7_8 | FE_CAN_FEC_AUTO |
1459 FE_CAN_2G_MODULATION |
1460 FE_CAN_QPSK | FE_CAN_RECOVER
1462 .release = cx24120_release,
1464 .init = cx24120_init,
1465 .sleep = cx24120_sleep,
1467 .tune = cx24120_tune,
1468 .get_frontend_algo = cx24120_get_algo,
1469 .set_frontend = cx24120_set_frontend,
1471 .get_frontend = cx24120_get_frontend,
1472 .read_status = cx24120_read_status,
1473 .read_ber = cx24120_read_ber,
1474 .read_signal_strength = cx24120_read_signal_strength,
1475 .read_snr = cx24120_read_snr,
1476 .read_ucblocks = cx24120_read_ucblocks,
1478 .diseqc_send_master_cmd = cx24120_send_diseqc_msg,
1480 .diseqc_send_burst = cx24120_diseqc_send_burst,
1481 .set_tone = cx24120_set_tone,
1482 .set_voltage = cx24120_set_voltage,
1485 MODULE_DESCRIPTION("DVB Frontend module for Conexant CX24120/CX24118 hardware");
1486 MODULE_AUTHOR("Jemma Denson");
1487 MODULE_LICENSE("GPL");