2 Conexant cx24120/cx24118 - DVBS/S2 Satellite demod/tuner driver
4 Copyright (C) 2008 Patrick Boettcher <pb@linuxtv.org>
5 Copyright (C) 2009 Sergey Tyurin <forum.free-x.de>
6 Updated 2012 by Jannis Achstetter <jannis_achstetter@web.de>
7 Copyright (C) 2015 Jemma Denson <jdenson@gmail.com>
9 Refactored & simplified driver
10 Updated to work with delivery system supplied by DVBv5
11 Add frequency, fec & pilot to get_frontend
13 Cards supported: Technisat Skystar S2
15 This program is free software; you can redistribute it and/or modify
16 it under the terms of the GNU General Public License as published by
17 the Free Software Foundation; either version 2 of the License, or
18 (at your option) any later version.
20 This program is distributed in the hope that it will be useful,
21 but WITHOUT ANY WARRANTY; without even the implied warranty of
22 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
23 GNU General Public License for more details.
26 #include <linux/slab.h>
27 #include <linux/kernel.h>
28 #include <linux/module.h>
29 #include <linux/moduleparam.h>
30 #include <linux/init.h>
31 #include <linux/firmware.h>
32 #include "dvb_frontend.h"
35 #define CX24120_SEARCH_RANGE_KHZ 5000
36 #define CX24120_FIRMWARE "dvb-fe-cx24120-1.20.58.2.fw"
38 /* cx24120 i2c registers */
39 #define CX24120_REG_CMD_START (0x00) /* write cmd_id */
40 #define CX24120_REG_CMD_ARGS (0x01) /* write command arguments */
41 #define CX24120_REG_CMD_END (0x1f) /* write 0x01 for end */
43 #define CX24120_REG_MAILBOX (0x33)
44 #define CX24120_REG_FREQ3 (0x34) /* frequency */
45 #define CX24120_REG_FREQ2 (0x35)
46 #define CX24120_REG_FREQ1 (0x36)
48 #define CX24120_REG_FECMODE (0x39) /* FEC status */
49 #define CX24120_REG_STATUS (0x3a) /* Tuner status */
50 #define CX24120_REG_SIGSTR_H (0x3a) /* Signal strength high */
51 #define CX24120_REG_SIGSTR_L (0x3b) /* Signal strength low byte */
52 #define CX24120_REG_QUALITY_H (0x40) /* SNR high byte */
53 #define CX24120_REG_QUALITY_L (0x41) /* SNR low byte */
55 #define CX24120_REG_BER_HH (0x47) /* BER high byte of high word */
56 #define CX24120_REG_BER_HL (0x48) /* BER low byte of high word */
57 #define CX24120_REG_BER_LH (0x49) /* BER high byte of low word */
58 #define CX24120_REG_BER_LL (0x4a) /* BER low byte of low word */
60 #define CX24120_REG_UCB_H (0x50) /* UCB high byte */
61 #define CX24120_REG_UCB_L (0x51) /* UCB low byte */
63 #define CX24120_REG_CLKDIV (0xe6)
64 #define CX24120_REG_RATEDIV (0xf0)
66 #define CX24120_REG_REVISION (0xff) /* Chip revision (ro) */
69 /* Command messages */
70 enum command_message_id {
71 CMD_VCO_SET = 0x10, /* cmd.len = 12; */
72 CMD_TUNEREQUEST = 0x11, /* cmd.len = 15; */
74 CMD_MPEG_ONOFF = 0x13, /* cmd.len = 4; */
75 CMD_MPEG_INIT = 0x14, /* cmd.len = 7; */
76 CMD_BANDWIDTH = 0x15, /* cmd.len = 12; */
77 CMD_CLOCK_READ = 0x16, /* read clock */
78 CMD_CLOCK_SET = 0x17, /* cmd.len = 10; */
80 CMD_DISEQC_MSG1 = 0x20, /* cmd.len = 11; */
81 CMD_DISEQC_MSG2 = 0x21, /* cmd.len = d->msg_len + 6; */
82 CMD_SETVOLTAGE = 0x22, /* cmd.len = 2; */
83 CMD_SETTONE = 0x23, /* cmd.len = 4; */
84 CMD_DISEQC_BURST = 0x24, /* cmd.len not used !!! */
86 CMD_READ_SNR = 0x1a, /* Read signal strength */
87 CMD_START_TUNER = 0x1b, /* ??? */
91 CMD_TUNER_INIT = 0x3c, /* cmd.len = 0x03; */
94 #define CX24120_MAX_CMD_LEN 30
97 #define CX24120_PILOT_OFF (0x00)
98 #define CX24120_PILOT_ON (0x40)
99 #define CX24120_PILOT_AUTO (0x80)
102 #define CX24120_HAS_SIGNAL (0x01)
103 #define CX24120_HAS_CARRIER (0x02)
104 #define CX24120_HAS_VITERBI (0x04)
105 #define CX24120_HAS_LOCK (0x08)
106 #define CX24120_HAS_UNK1 (0x10)
107 #define CX24120_HAS_UNK2 (0x20)
108 #define CX24120_STATUS_MASK (0x0f)
109 #define CX24120_SIGNAL_MASK (0xc0)
111 #define info(args...) pr_info("cx24120: " args)
112 #define err(args...) pr_err("cx24120: ### ERROR: " args)
114 /* The Demod/Tuner can't easily provide these, we cache them */
115 struct cx24120_tuning {
118 fe_spectral_inversion_t inversion;
121 fe_delivery_system_t delsys;
122 fe_modulation_t modulation;
136 struct cx24120_state {
137 struct i2c_adapter *i2c;
138 const struct cx24120_config *config;
139 struct dvb_frontend frontend;
144 /* current and next tuning parameters */
145 struct cx24120_tuning dcur;
146 struct cx24120_tuning dnxt;
150 /* Command message to firmware */
154 u8 arg[CX24120_MAX_CMD_LEN];
158 /* Read single register */
159 static int cx24120_readreg(struct cx24120_state *state, u8 reg)
163 struct i2c_msg msg[] = {
164 { .addr = state->config->i2c_addr,
169 { .addr = state->config->i2c_addr,
174 ret = i2c_transfer(state->i2c, msg, 2);
176 err("Read error: reg=0x%02x, ret=0x%02x)\n", reg, ret);
180 dev_dbg(&state->i2c->dev, "%s: reg=0x%02x; data=0x%02x\n",
187 /* Write single register */
188 static int cx24120_writereg(struct cx24120_state *state, u8 reg, u8 data)
190 u8 buf[] = { reg, data };
191 struct i2c_msg msg = {
192 .addr = state->config->i2c_addr,
198 ret = i2c_transfer(state->i2c, &msg, 1);
200 err("Write error: i2c_write error(err == %i, 0x%02x: 0x%02x)\n",
205 dev_dbg(&state->i2c->dev, "%s: reg=0x%02x; data=0x%02x\n",
206 __func__, reg, data);
212 /* Write multiple registers */
213 static int cx24120_writeregN(struct cx24120_state *state,
214 u8 reg, const u8 *values, u16 len, u8 incr)
217 u8 buf[5]; /* maximum 4 data bytes at once - flexcop limitation
218 (very limited i2c-interface this one) */
220 struct i2c_msg msg = {
221 .addr = state->config->i2c_addr,
228 msg.len = len > 4 ? 4 : len;
229 memcpy(&buf[1], values, msg.len);
231 len -= msg.len; /* data length revers counter */
232 values += msg.len; /* incr data pointer */
236 msg.len++; /* don't forget the addr byte */
238 ret = i2c_transfer(state->i2c, &msg, 1);
240 err("i2c_write error(err == %i, 0x%02x)\n", ret, reg);
244 dev_dbg(&state->i2c->dev,
245 "%s: reg=0x%02x; data=0x%02x,0x%02x,0x%02x,0x%02x\n",
247 buf[1], buf[2], buf[3], buf[4]);
255 static struct dvb_frontend_ops cx24120_ops;
257 struct dvb_frontend *cx24120_attach(const struct cx24120_config *config,
258 struct i2c_adapter *i2c)
260 struct cx24120_state *state = NULL;
263 info("Conexant cx24120/cx24118 - DVBS/S2 Satellite demod/tuner\n");
264 state = kzalloc(sizeof(struct cx24120_state),
267 err("Unable to allocate memory for cx24120_state\n");
271 /* setup the state */
272 state->config = config;
275 /* check if the demod is present and has proper type */
276 demod_rev = cx24120_readreg(state, CX24120_REG_REVISION);
279 info("Demod cx24120 rev. 0x07 detected.\n");
282 info("Demod cx24120 rev. 0x05 detected.\n");
285 err("Unsupported demod revision: 0x%x detected.\n",
290 /* create dvb_frontend */
291 state->cold_init = 0;
292 memcpy(&state->frontend.ops, &cx24120_ops,
293 sizeof(struct dvb_frontend_ops));
294 state->frontend.demodulator_priv = state;
296 info("Conexant cx24120/cx24118 attached.\n");
297 return &state->frontend;
303 EXPORT_SYMBOL(cx24120_attach);
305 static int cx24120_test_rom(struct cx24120_state *state)
309 err = cx24120_readreg(state, 0xfd);
311 ret = cx24120_readreg(state, 0xdf) & 0xfe;
312 err = cx24120_writereg(state, 0xdf, ret);
318 static int cx24120_read_snr(struct dvb_frontend *fe, u16 *snr)
320 struct cx24120_state *state = fe->demodulator_priv;
322 *snr = (cx24120_readreg(state, CX24120_REG_QUALITY_H)<<8) |
323 (cx24120_readreg(state, CX24120_REG_QUALITY_L));
324 dev_dbg(&state->i2c->dev, "%s: read SNR index = %d\n",
331 static int cx24120_read_ber(struct dvb_frontend *fe, u32 *ber)
333 struct cx24120_state *state = fe->demodulator_priv;
335 *ber = (cx24120_readreg(state, CX24120_REG_BER_HH) << 24) |
336 (cx24120_readreg(state, CX24120_REG_BER_HL) << 16) |
337 (cx24120_readreg(state, CX24120_REG_BER_LH) << 8) |
338 cx24120_readreg(state, CX24120_REG_BER_LL);
339 dev_dbg(&state->i2c->dev, "%s: read BER index = %d\n",
345 static int cx24120_msg_mpeg_output_global_config(struct cx24120_state *state,
348 /* Check if we're running a command that needs to disable mpeg out */
349 static void cx24120_check_cmd(struct cx24120_state *state, u8 id)
352 case CMD_TUNEREQUEST:
354 case CMD_DISEQC_MSG1:
355 case CMD_DISEQC_MSG2:
358 cx24120_msg_mpeg_output_global_config(state, 0);
359 /* Old driver would do a msleep(100) here */
366 /* Send a message to the firmware */
367 static int cx24120_message_send(struct cx24120_state *state,
368 struct cx24120_cmd *cmd)
372 if (state->mpeg_enabled) {
373 /* Disable mpeg out on certain commands */
374 cx24120_check_cmd(state, cmd->id);
377 ret = cx24120_writereg(state, CX24120_REG_CMD_START, cmd->id);
378 ret = cx24120_writeregN(state, CX24120_REG_CMD_ARGS, &cmd->arg[0],
380 ret = cx24120_writereg(state, CX24120_REG_CMD_END, 0x01);
383 while (cx24120_readreg(state, CX24120_REG_CMD_END)) {
387 err("Error sending message to firmware\n");
391 dev_dbg(&state->i2c->dev, "%s: Successfully send message 0x%02x\n",
397 /* Send a message and fill arg[] with the results */
398 static int cx24120_message_sendrcv(struct cx24120_state *state,
399 struct cx24120_cmd *cmd, u8 numreg)
403 if (numreg > CX24120_MAX_CMD_LEN) {
404 err("Too many registers to read. cmd->reg = %d", numreg);
408 ret = cx24120_message_send(state, cmd);
415 /* Read numreg registers starting from register cmd->len */
416 for (i = 0; i < numreg; i++)
417 cmd->arg[i] = cx24120_readreg(state, (cmd->len+i+1));
424 static int cx24120_read_signal_strength(struct dvb_frontend *fe,
425 u16 *signal_strength)
427 struct cx24120_state *state = fe->demodulator_priv;
428 struct cx24120_cmd cmd;
429 int ret, sigstr_h, sigstr_l;
431 cmd.id = CMD_READ_SNR;
435 ret = cx24120_message_send(state, &cmd);
437 err("error reading signal strength\n");
442 sigstr_h = (cx24120_readreg(state, CX24120_REG_SIGSTR_H) >> 6) << 8;
443 sigstr_l = cx24120_readreg(state, CX24120_REG_SIGSTR_L);
444 dev_dbg(&state->i2c->dev, "%s: Signal strength from firmware= 0x%x\n",
445 __func__, (sigstr_h | sigstr_l));
448 *signal_strength = ((sigstr_h | sigstr_l) << 5) & 0x0000ffff;
449 dev_dbg(&state->i2c->dev, "%s: Signal strength= 0x%x\n",
450 __func__, *signal_strength);
456 static int cx24120_msg_mpeg_output_global_config(struct cx24120_state *state,
459 struct cx24120_cmd cmd;
462 cmd.id = CMD_MPEG_ONOFF;
466 cmd.arg[2] = enable ? 0 : (u8)(-1);
469 ret = cx24120_message_send(state, &cmd);
471 dev_dbg(&state->i2c->dev,
472 "%s: Failed to set MPEG output to %s\n",
474 (enable)?"enabled":"disabled");
478 state->mpeg_enabled = enable;
479 dev_dbg(&state->i2c->dev, "%s: MPEG output %s\n",
481 (enable)?"enabled":"disabled");
487 static int cx24120_msg_mpeg_output_config(struct cx24120_state *state, u8 seq)
489 struct cx24120_cmd cmd;
490 struct cx24120_initial_mpeg_config i =
491 state->config->initial_mpeg_config;
493 cmd.id = CMD_MPEG_INIT;
495 cmd.arg[0] = seq; /* sequental number - can be 0,1,2 */
496 cmd.arg[1] = ((i.x1 & 0x01) << 1) | ((i.x1 >> 1) & 0x01);
499 cmd.arg[4] = ((i.x2 >> 1) & 0x01);
500 cmd.arg[5] = (i.x2 & 0xf0) | (i.x3 & 0x0f);
503 return cx24120_message_send(state, &cmd);
507 static int cx24120_diseqc_send_burst(struct dvb_frontend *fe,
508 fe_sec_mini_cmd_t burst)
510 struct cx24120_state *state = fe->demodulator_priv;
511 struct cx24120_cmd cmd;
513 /* Yes, cmd.len is set to zero. The old driver
514 * didn't specify any len, but also had a
515 * memset 0 before every use of the cmd struct
516 * which would have set it to zero.
517 * This quite probably needs looking into.
519 cmd.id = CMD_DISEQC_BURST;
524 dev_dbg(&state->i2c->dev, "%s: burst sent.\n", __func__);
526 return cx24120_message_send(state, &cmd);
530 static int cx24120_set_tone(struct dvb_frontend *fe, fe_sec_tone_mode_t tone)
532 struct cx24120_state *state = fe->demodulator_priv;
533 struct cx24120_cmd cmd;
535 dev_dbg(&state->i2c->dev, "%s(%d)\n",
538 if ((tone != SEC_TONE_ON) && (tone != SEC_TONE_OFF)) {
539 err("Invalid tone=%d\n", tone);
543 cmd.id = CMD_SETTONE;
548 cmd.arg[3] = (tone == SEC_TONE_ON)?0x01:0x00;
550 return cx24120_message_send(state, &cmd);
554 static int cx24120_set_voltage(struct dvb_frontend *fe,
555 fe_sec_voltage_t voltage)
557 struct cx24120_state *state = fe->demodulator_priv;
558 struct cx24120_cmd cmd;
560 dev_dbg(&state->i2c->dev, "%s(%d)\n",
563 cmd.id = CMD_SETVOLTAGE;
566 cmd.arg[1] = (voltage == SEC_VOLTAGE_18)?0x01:0x00;
568 return cx24120_message_send(state, &cmd);
572 static int cx24120_send_diseqc_msg(struct dvb_frontend *fe,
573 struct dvb_diseqc_master_cmd *d)
575 struct cx24120_state *state = fe->demodulator_priv;
576 struct cx24120_cmd cmd;
579 dev_dbg(&state->i2c->dev, "%s()\n", __func__);
581 cmd.id = CMD_DISEQC_MSG1;
595 if (cx24120_message_send(state, &cmd)) {
596 err("send 1st message(0x%x) failed\n", cmd.id);
600 cmd.id = CMD_DISEQC_MSG2;
601 cmd.len = d->msg_len + 6;
607 cmd.arg[5] = d->msg_len;
609 memcpy(&cmd.arg[6], &d->msg, d->msg_len);
611 if (cx24120_message_send(state, &cmd)) {
612 err("send 2nd message(0x%x) failed\n", cmd.id);
618 if (!(cx24120_readreg(state, 0x93) & 0x01)) {
619 dev_dbg(&state->i2c->dev,
620 "%s: diseqc sequence sent success\n",
626 } while (back_count);
628 err("Too long waiting for diseqc.\n");
633 /* Read current tuning status */
634 static int cx24120_read_status(struct dvb_frontend *fe, fe_status_t *status)
636 struct cx24120_state *state = fe->demodulator_priv;
639 lock = cx24120_readreg(state, CX24120_REG_STATUS);
641 dev_dbg(&state->i2c->dev, "%s() status = 0x%02x\n",
646 if (lock & CX24120_HAS_SIGNAL)
647 *status = FE_HAS_SIGNAL;
648 if (lock & CX24120_HAS_CARRIER)
649 *status |= FE_HAS_CARRIER;
650 if (lock & CX24120_HAS_VITERBI)
651 *status |= FE_HAS_VITERBI | FE_HAS_SYNC;
652 if (lock & CX24120_HAS_LOCK)
653 *status |= FE_HAS_LOCK;
655 /* TODO: is FE_HAS_SYNC in the right place?
656 * Other cx241xx drivers have this slightly
663 /* FEC & modulation lookup table
664 * Used for decoding the REG_FECMODE register
667 static struct cx24120_modfec {
668 fe_delivery_system_t delsys;
672 } modfec_lookup_table[] = {
673 /*delsys mod fec val */
674 { SYS_DVBS, QPSK, FEC_1_2, 0x01 },
675 { SYS_DVBS, QPSK, FEC_2_3, 0x02 },
676 { SYS_DVBS, QPSK, FEC_3_4, 0x03 },
677 { SYS_DVBS, QPSK, FEC_4_5, 0x04 },
678 { SYS_DVBS, QPSK, FEC_5_6, 0x05 },
679 { SYS_DVBS, QPSK, FEC_6_7, 0x06 },
680 { SYS_DVBS, QPSK, FEC_7_8, 0x07 },
682 { SYS_DVBS2, QPSK, FEC_1_2, 0x04 },
683 { SYS_DVBS2, QPSK, FEC_3_5, 0x05 },
684 { SYS_DVBS2, QPSK, FEC_2_3, 0x06 },
685 { SYS_DVBS2, QPSK, FEC_3_4, 0x07 },
686 { SYS_DVBS2, QPSK, FEC_4_5, 0x08 },
687 { SYS_DVBS2, QPSK, FEC_5_6, 0x09 },
688 { SYS_DVBS2, QPSK, FEC_8_9, 0x0a },
689 { SYS_DVBS2, QPSK, FEC_9_10, 0x0b },
691 { SYS_DVBS2, PSK_8, FEC_3_5, 0x0c },
692 { SYS_DVBS2, PSK_8, FEC_2_3, 0x0d },
693 { SYS_DVBS2, PSK_8, FEC_3_4, 0x0e },
694 { SYS_DVBS2, PSK_8, FEC_5_6, 0x0f },
695 { SYS_DVBS2, PSK_8, FEC_8_9, 0x10 },
696 { SYS_DVBS2, PSK_8, FEC_9_10, 0x11 },
700 /* Retrieve current fec, modulation & pilot values */
701 static int cx24120_get_fec(struct dvb_frontend *fe)
703 struct dtv_frontend_properties *c = &fe->dtv_property_cache;
704 struct cx24120_state *state = fe->demodulator_priv;
709 dev_dbg(&state->i2c->dev, "%s()\n", __func__);
711 ret = cx24120_readreg(state, CX24120_REG_FECMODE);
712 GettedFEC = ret & 0x3f; /* Lower 6 bits */
714 dev_dbg(&state->i2c->dev, "%s: Get FEC: %d\n", __func__, GettedFEC);
716 for (idx = 0; idx < ARRAY_SIZE(modfec_lookup_table); idx++) {
717 if (modfec_lookup_table[idx].delsys != state->dcur.delsys)
719 if (modfec_lookup_table[idx].val != GettedFEC)
725 if (idx >= ARRAY_SIZE(modfec_lookup_table)) {
726 dev_dbg(&state->i2c->dev, "%s: Couldn't find fec!\n",
731 /* save values back to cache */
732 c->modulation = modfec_lookup_table[idx].mod;
733 c->fec_inner = modfec_lookup_table[idx].fec;
734 c->pilot = (ret & 0x80) ? PILOT_ON : PILOT_OFF;
736 dev_dbg(&state->i2c->dev,
737 "%s: mod(%d), fec(%d), pilot(%d)\n",
739 c->modulation, c->fec_inner, c->pilot);
745 /* Clock ratios lookup table
747 * Values obtained from much larger table in old driver
748 * which had numerous entries which would never match.
750 * There's probably some way of calculating these but I
751 * can't determine the pattern
753 static struct cx24120_clock_ratios_table {
754 fe_delivery_system_t delsys;
761 } clock_ratios_table[] = {
762 /*delsys pilot mod fec m_rat n_rat rate */
763 { SYS_DVBS2, PILOT_OFF, QPSK, FEC_1_2, 273088, 254505, 274 },
764 { SYS_DVBS2, PILOT_OFF, QPSK, FEC_3_5, 17272, 13395, 330 },
765 { SYS_DVBS2, PILOT_OFF, QPSK, FEC_2_3, 24344, 16967, 367 },
766 { SYS_DVBS2, PILOT_OFF, QPSK, FEC_3_4, 410788, 254505, 413 },
767 { SYS_DVBS2, PILOT_OFF, QPSK, FEC_4_5, 438328, 254505, 440 },
768 { SYS_DVBS2, PILOT_OFF, QPSK, FEC_5_6, 30464, 16967, 459 },
769 { SYS_DVBS2, PILOT_OFF, QPSK, FEC_8_9, 487832, 254505, 490 },
770 { SYS_DVBS2, PILOT_OFF, QPSK, FEC_9_10, 493952, 254505, 496 },
771 { SYS_DVBS2, PILOT_OFF, PSK_8, FEC_3_5, 328168, 169905, 494 },
772 { SYS_DVBS2, PILOT_OFF, PSK_8, FEC_2_3, 24344, 11327, 550 },
773 { SYS_DVBS2, PILOT_OFF, PSK_8, FEC_3_4, 410788, 169905, 618 },
774 { SYS_DVBS2, PILOT_OFF, PSK_8, FEC_5_6, 30464, 11327, 688 },
775 { SYS_DVBS2, PILOT_OFF, PSK_8, FEC_8_9, 487832, 169905, 735 },
776 { SYS_DVBS2, PILOT_OFF, PSK_8, FEC_9_10, 493952, 169905, 744 },
777 { SYS_DVBS2, PILOT_ON, QPSK, FEC_1_2, 273088, 260709, 268 },
778 { SYS_DVBS2, PILOT_ON, QPSK, FEC_3_5, 328168, 260709, 322 },
779 { SYS_DVBS2, PILOT_ON, QPSK, FEC_2_3, 121720, 86903, 358 },
780 { SYS_DVBS2, PILOT_ON, QPSK, FEC_3_4, 410788, 260709, 403 },
781 { SYS_DVBS2, PILOT_ON, QPSK, FEC_4_5, 438328, 260709, 430 },
782 { SYS_DVBS2, PILOT_ON, QPSK, FEC_5_6, 152320, 86903, 448 },
783 { SYS_DVBS2, PILOT_ON, QPSK, FEC_8_9, 487832, 260709, 479 },
784 { SYS_DVBS2, PILOT_ON, QPSK, FEC_9_10, 493952, 260709, 485 },
785 { SYS_DVBS2, PILOT_ON, PSK_8, FEC_3_5, 328168, 173853, 483 },
786 { SYS_DVBS2, PILOT_ON, PSK_8, FEC_2_3, 121720, 57951, 537 },
787 { SYS_DVBS2, PILOT_ON, PSK_8, FEC_3_4, 410788, 173853, 604 },
788 { SYS_DVBS2, PILOT_ON, PSK_8, FEC_5_6, 152320, 57951, 672 },
789 { SYS_DVBS2, PILOT_ON, PSK_8, FEC_8_9, 487832, 173853, 718 },
790 { SYS_DVBS2, PILOT_ON, PSK_8, FEC_9_10, 493952, 173853, 727 },
791 { SYS_DVBS, PILOT_OFF, QPSK, FEC_1_2, 152592, 152592, 256 },
792 { SYS_DVBS, PILOT_OFF, QPSK, FEC_2_3, 305184, 228888, 341 },
793 { SYS_DVBS, PILOT_OFF, QPSK, FEC_3_4, 457776, 305184, 384 },
794 { SYS_DVBS, PILOT_OFF, QPSK, FEC_5_6, 762960, 457776, 427 },
795 { SYS_DVBS, PILOT_OFF, QPSK, FEC_7_8, 1068144, 610368, 448 },
799 /* Set clock ratio from lookup table */
800 static void cx24120_set_clock_ratios(struct dvb_frontend *fe)
802 struct dtv_frontend_properties *c = &fe->dtv_property_cache;
803 struct cx24120_state *state = fe->demodulator_priv;
804 struct cx24120_cmd cmd;
807 /* Find fec, modulation, pilot */
808 ret = cx24120_get_fec(fe);
812 /* Find the clock ratios in the lookup table */
813 for (idx = 0; idx < ARRAY_SIZE(clock_ratios_table); idx++) {
814 if (clock_ratios_table[idx].delsys != state->dcur.delsys)
816 if (clock_ratios_table[idx].mod != c->modulation)
818 if (clock_ratios_table[idx].fec != c->fec_inner)
820 if (clock_ratios_table[idx].pilot != c->pilot)
826 if (idx >= ARRAY_SIZE(clock_ratios_table)) {
827 info("Clock ratio not found - data reception in danger\n");
832 /* Read current values? */
833 cmd.id = CMD_CLOCK_READ;
836 ret = cx24120_message_sendrcv(state, &cmd, 6);
839 /* in cmd[0]-[5] - result */
841 dev_dbg(&state->i2c->dev,
842 "%s: m=%d, n=%d; idx: %d m=%d, n=%d, rate=%d\n",
844 cmd.arg[2] | (cmd.arg[1] << 8) | (cmd.arg[0] << 16),
845 cmd.arg[5] | (cmd.arg[4] << 8) | (cmd.arg[3] << 16),
847 clock_ratios_table[idx].m_rat,
848 clock_ratios_table[idx].n_rat,
849 clock_ratios_table[idx].rate);
854 cmd.id = CMD_CLOCK_SET;
858 cmd.arg[2] = (clock_ratios_table[idx].m_rat >> 16) & 0xff;
859 cmd.arg[3] = (clock_ratios_table[idx].m_rat >> 8) & 0xff;
860 cmd.arg[4] = (clock_ratios_table[idx].m_rat >> 0) & 0xff;
861 cmd.arg[5] = (clock_ratios_table[idx].n_rat >> 16) & 0xff;
862 cmd.arg[6] = (clock_ratios_table[idx].n_rat >> 8) & 0xff;
863 cmd.arg[7] = (clock_ratios_table[idx].n_rat >> 0) & 0xff;
864 cmd.arg[8] = (clock_ratios_table[idx].rate >> 8) & 0xff;
865 cmd.arg[9] = (clock_ratios_table[idx].rate >> 0) & 0xff;
867 cx24120_message_send(state, &cmd);
872 /* Set inversion value */
873 static int cx24120_set_inversion(struct cx24120_state *state,
874 fe_spectral_inversion_t inversion)
876 dev_dbg(&state->i2c->dev, "%s(%d)\n",
877 __func__, inversion);
881 state->dnxt.inversion_val = 0x00;
884 state->dnxt.inversion_val = 0x04;
887 state->dnxt.inversion_val = 0x0c;
893 state->dnxt.inversion = inversion;
898 /* FEC lookup table for tuning
899 * Some DVB-S2 val's have been found by trial
900 * and error. Sofar it seems to match up with
901 * the contents of the REG_FECMODE after tuning
902 * The rest will probably be the same but would
904 * Anything not in the table will run with
905 * FEC_AUTO and take a while longer to tune in
906 * ( c.500ms instead of 30ms )
908 static struct cx24120_modfec_table {
909 fe_delivery_system_t delsys;
914 /*delsys mod fec val */
915 { SYS_DVBS, QPSK, FEC_1_2, 0x2e },
916 { SYS_DVBS, QPSK, FEC_2_3, 0x2f },
917 { SYS_DVBS, QPSK, FEC_3_4, 0x30 },
918 { SYS_DVBS, QPSK, FEC_5_6, 0x31 },
919 { SYS_DVBS, QPSK, FEC_6_7, 0x32 },
920 { SYS_DVBS, QPSK, FEC_7_8, 0x33 },
922 { SYS_DVBS2, QPSK, FEC_3_4, 0x07 },
924 { SYS_DVBS2, PSK_8, FEC_2_3, 0x0d },
925 { SYS_DVBS2, PSK_8, FEC_3_4, 0x0e },
928 /* Set fec_val & fec_mask values from delsys, modulation & fec */
929 static int cx24120_set_fec(struct cx24120_state *state,
930 fe_modulation_t mod, fe_code_rate_t fec)
934 dev_dbg(&state->i2c->dev,
935 "%s(0x%02x,0x%02x)\n", __func__, mod, fec);
937 state->dnxt.fec = fec;
939 /* Lookup fec_val from modfec table */
940 for (idx = 0; idx < ARRAY_SIZE(modfec_table); idx++) {
941 if (modfec_table[idx].delsys != state->dnxt.delsys)
943 if (modfec_table[idx].mod != mod)
945 if (modfec_table[idx].fec != fec)
949 state->dnxt.fec_mask = 0x00;
950 state->dnxt.fec_val = modfec_table[idx].val;
955 if (state->dnxt.delsys == SYS_DVBS2) {
956 /* DVBS2 auto is 0x00/0x00 */
957 state->dnxt.fec_mask = 0x00;
958 state->dnxt.fec_val = 0x00;
960 /* Set DVB-S to auto */
961 state->dnxt.fec_val = 0x2e;
962 state->dnxt.fec_mask = 0xac;
970 static int cx24120_set_pilot(struct cx24120_state *state,
973 dev_dbg(&state->i2c->dev,
974 "%s(%d)\n", __func__, pilot);
976 /* Pilot only valid in DVBS2 */
977 if (state->dnxt.delsys != SYS_DVBS2) {
978 state->dnxt.pilot_val = CX24120_PILOT_OFF;
985 state->dnxt.pilot_val = CX24120_PILOT_OFF;
988 state->dnxt.pilot_val = CX24120_PILOT_ON;
992 state->dnxt.pilot_val = CX24120_PILOT_AUTO;
998 /* Set symbol rate */
999 static int cx24120_set_symbolrate(struct cx24120_state *state, u32 rate)
1001 dev_dbg(&state->i2c->dev, "%s(%d)\n",
1004 state->dnxt.symbol_rate = rate;
1006 /* Check symbol rate */
1007 if (rate > 31000000) {
1008 state->dnxt.clkdiv = (-(rate < 31000001) & 3) + 2;
1009 state->dnxt.ratediv = (-(rate < 31000001) & 6) + 4;
1011 state->dnxt.clkdiv = 3;
1012 state->dnxt.ratediv = 6;
1019 /* Overwrite the current tuning params, we are about to tune */
1020 static void cx24120_clone_params(struct dvb_frontend *fe)
1022 struct cx24120_state *state = fe->demodulator_priv;
1024 state->dcur = state->dnxt;
1028 /* Table of time to tune for different symrates */
1029 static struct cx24120_symrate_delay {
1030 fe_delivery_system_t delsys;
1031 u32 symrate; /* Check for >= this symrate */
1032 u32 delay; /* Timeout in ms */
1033 } symrates_delay_table[] = {
1034 { SYS_DVBS, 10000000, 400 },
1035 { SYS_DVBS, 8000000, 2000 },
1036 { SYS_DVBS, 6000000, 5000 },
1037 { SYS_DVBS, 3000000, 10000 },
1038 { SYS_DVBS, 0, 15000 },
1039 { SYS_DVBS2, 10000000, 600 }, /* DVBS2 needs a little longer */
1040 { SYS_DVBS2, 8000000, 2000 }, /* (so these might need bumping too) */
1041 { SYS_DVBS2, 6000000, 5000 },
1042 { SYS_DVBS2, 3000000, 10000 },
1043 { SYS_DVBS2, 0, 15000 },
1047 static int cx24120_set_frontend(struct dvb_frontend *fe)
1049 struct dtv_frontend_properties *c = &fe->dtv_property_cache;
1050 struct cx24120_state *state = fe->demodulator_priv;
1051 struct cx24120_cmd cmd;
1053 int delay_cnt, sd_idx = 0;
1056 switch (c->delivery_system) {
1058 dev_dbg(&state->i2c->dev, "%s() DVB-S2\n",
1062 dev_dbg(&state->i2c->dev, "%s() DVB-S\n",
1066 dev_dbg(&state->i2c->dev,
1067 "%s() Delivery system(%d) not supported\n",
1068 __func__, c->delivery_system);
1074 state->dnxt.delsys = c->delivery_system;
1075 state->dnxt.modulation = c->modulation;
1076 state->dnxt.frequency = c->frequency;
1077 state->dnxt.pilot = c->pilot;
1079 ret = cx24120_set_inversion(state, c->inversion);
1083 ret = cx24120_set_fec(state, c->modulation, c->fec_inner);
1087 ret = cx24120_set_pilot(state, c->pilot);
1091 ret = cx24120_set_symbolrate(state, c->symbol_rate);
1096 /* discard the 'current' tuning parameters and prepare to tune */
1097 cx24120_clone_params(fe);
1099 dev_dbg(&state->i2c->dev,
1100 "%s: delsys = %d\n", __func__, state->dcur.delsys);
1101 dev_dbg(&state->i2c->dev,
1102 "%s: modulation = %d\n", __func__, state->dcur.modulation);
1103 dev_dbg(&state->i2c->dev,
1104 "%s: frequency = %d\n", __func__, state->dcur.frequency);
1105 dev_dbg(&state->i2c->dev,
1106 "%s: pilot = %d (val = 0x%02x)\n", __func__,
1107 state->dcur.pilot, state->dcur.pilot_val);
1108 dev_dbg(&state->i2c->dev,
1109 "%s: symbol_rate = %d (clkdiv/ratediv = 0x%02x/0x%02x)\n",
1110 __func__, state->dcur.symbol_rate,
1111 state->dcur.clkdiv, state->dcur.ratediv);
1112 dev_dbg(&state->i2c->dev,
1113 "%s: FEC = %d (mask/val = 0x%02x/0x%02x)\n", __func__,
1114 state->dcur.fec, state->dcur.fec_mask, state->dcur.fec_val);
1115 dev_dbg(&state->i2c->dev,
1116 "%s: Inversion = %d (val = 0x%02x)\n", __func__,
1117 state->dcur.inversion, state->dcur.inversion_val);
1122 cmd.id = CMD_TUNEREQUEST;
1125 cmd.arg[1] = (state->dcur.frequency & 0xff0000) >> 16;
1126 cmd.arg[2] = (state->dcur.frequency & 0x00ff00) >> 8;
1127 cmd.arg[3] = (state->dcur.frequency & 0x0000ff);
1128 cmd.arg[4] = ((state->dcur.symbol_rate/1000) & 0xff00) >> 8;
1129 cmd.arg[5] = ((state->dcur.symbol_rate/1000) & 0x00ff);
1130 cmd.arg[6] = state->dcur.inversion;
1131 cmd.arg[7] = state->dcur.fec_val | state->dcur.pilot_val;
1132 cmd.arg[8] = CX24120_SEARCH_RANGE_KHZ >> 8;
1133 cmd.arg[9] = CX24120_SEARCH_RANGE_KHZ & 0xff;
1134 cmd.arg[10] = 0; /* maybe rolloff? */
1135 cmd.arg[11] = state->dcur.fec_mask;
1136 cmd.arg[12] = state->dcur.ratediv;
1137 cmd.arg[13] = state->dcur.clkdiv;
1141 /* Send tune command */
1142 ret = cx24120_message_send(state, &cmd);
1146 /* Write symbol rate values */
1147 ret = cx24120_writereg(state, CX24120_REG_CLKDIV, state->dcur.clkdiv);
1148 ret = cx24120_readreg(state, CX24120_REG_RATEDIV);
1150 ret |= state->dcur.ratediv;
1151 ret = cx24120_writereg(state, CX24120_REG_RATEDIV, ret);
1153 /* Default time to tune */
1156 /* Establish time to tune from symrates_delay_table */
1157 for (sd_idx = 0; sd_idx < ARRAY_SIZE(symrates_delay_table); sd_idx++) {
1158 if (state->dcur.delsys != symrates_delay_table[sd_idx].delsys)
1160 if (c->symbol_rate < symrates_delay_table[sd_idx].symrate)
1164 delay_cnt = symrates_delay_table[sd_idx].delay;
1165 dev_dbg(&state->i2c->dev, "%s: Found symrate delay = %d\n",
1166 __func__, delay_cnt);
1170 /* Wait for tuning */
1171 while (delay_cnt >= 0) {
1172 cx24120_read_status(fe, &status);
1173 if (status & FE_HAS_LOCK)
1181 dev_dbg(&state->i2c->dev, "%s: Tuning failed\n",
1188 dev_dbg(&state->i2c->dev, "%s: Tuning successful\n",
1191 /* Set clock ratios */
1192 cx24120_set_clock_ratios(fe);
1194 /* Old driver would do a msleep(200) here */
1196 /* Renable mpeg output */
1197 if (!state->mpeg_enabled)
1198 cx24120_msg_mpeg_output_global_config(state, 1);
1204 /* Calculate vco from config */
1205 static u64 cx24120_calculate_vco(struct cx24120_state *state)
1208 u64 inv_vco, res, xxyyzz;
1209 u32 xtal_khz = state->config->xtal_khz;
1211 xxyyzz = 0x400000000ULL;
1212 vco = xtal_khz * 10 * 4;
1213 inv_vco = xxyyzz / vco;
1216 if (inv_vco > xtal_khz * 10 * 2)
1219 dev_dbg(&state->i2c->dev,
1220 "%s: xtal=%d, vco=%d, inv_vco=%lld, res=%lld\n",
1221 __func__, xtal_khz, vco, inv_vco, res);
1227 int cx24120_init(struct dvb_frontend *fe)
1229 const struct firmware *fw;
1230 struct cx24120_state *state = fe->demodulator_priv;
1231 struct cx24120_cmd cmd;
1232 u8 ret, ret_EA, reg1;
1237 unsigned char vers[4];
1239 if (state->cold_init)
1243 ret = cx24120_writereg(state, 0xea, 0x00);
1244 ret = cx24120_test_rom(state);
1245 ret = cx24120_readreg(state, 0xfb) & 0xfe;
1246 ret = cx24120_writereg(state, 0xfb, ret);
1247 ret = cx24120_readreg(state, 0xfc) & 0xfe;
1248 ret = cx24120_writereg(state, 0xfc, ret);
1249 ret = cx24120_writereg(state, 0xc3, 0x04);
1250 ret = cx24120_writereg(state, 0xc4, 0x04);
1251 ret = cx24120_writereg(state, 0xce, 0x00);
1252 ret = cx24120_writereg(state, 0xcf, 0x00);
1253 ret_EA = cx24120_readreg(state, 0xea) & 0xfe;
1254 ret = cx24120_writereg(state, 0xea, ret_EA);
1255 ret = cx24120_writereg(state, 0xeb, 0x0c);
1256 ret = cx24120_writereg(state, 0xec, 0x06);
1257 ret = cx24120_writereg(state, 0xed, 0x05);
1258 ret = cx24120_writereg(state, 0xee, 0x03);
1259 ret = cx24120_writereg(state, 0xef, 0x05);
1260 ret = cx24120_writereg(state, 0xf3, 0x03);
1261 ret = cx24120_writereg(state, 0xf4, 0x44);
1263 for (reg1 = 0xf0; reg1 < 0xf3; reg1++) {
1264 cx24120_writereg(state, reg1, 0x04);
1265 cx24120_writereg(state, reg1 - 10, 0x02);
1268 ret = cx24120_writereg(state, 0xea, (ret_EA | 0x01));
1269 for (reg1 = 0xc5; reg1 < 0xcb; reg1 += 2) {
1270 ret = cx24120_writereg(state, reg1, 0x00);
1271 ret = cx24120_writereg(state, reg1 + 1, 0x00);
1274 ret = cx24120_writereg(state, 0xe4, 0x03);
1275 ret = cx24120_writereg(state, 0xeb, 0x0a);
1277 dev_dbg(&state->i2c->dev,
1278 "%s: Requesting firmware (%s) to download...\n",
1279 __func__, CX24120_FIRMWARE);
1281 ret = state->config->request_firmware(fe, &fw, CX24120_FIRMWARE);
1283 err("Could not load firmware (%s): %d\n",
1284 CX24120_FIRMWARE, ret);
1288 dev_dbg(&state->i2c->dev,
1289 "%s: Firmware found, size %d bytes (%02x %02x .. %02x %02x)\n",
1291 (int)fw->size, /* firmware_size in bytes */
1292 fw->data[0], /* fw 1st byte */
1293 fw->data[1], /* fw 2d byte */
1294 fw->data[fw->size - 2], /* fw before last byte */
1295 fw->data[fw->size - 1]); /* fw last byte */
1297 ret = cx24120_test_rom(state);
1298 ret = cx24120_readreg(state, 0xfb) & 0xfe;
1299 ret = cx24120_writereg(state, 0xfb, ret);
1300 ret = cx24120_writereg(state, 0xe0, 0x76);
1301 ret = cx24120_writereg(state, 0xf7, 0x81);
1302 ret = cx24120_writereg(state, 0xf8, 0x00);
1303 ret = cx24120_writereg(state, 0xf9, 0x00);
1304 ret = cx24120_writeregN(state, 0xfa, fw->data, (fw->size - 1), 0x00);
1305 ret = cx24120_writereg(state, 0xf7, 0xc0);
1306 ret = cx24120_writereg(state, 0xe0, 0x00);
1307 ret = (fw->size - 2) & 0x00ff;
1308 ret = cx24120_writereg(state, 0xf8, ret);
1309 ret = ((fw->size - 2) >> 8) & 0x00ff;
1310 ret = cx24120_writereg(state, 0xf9, ret);
1311 ret = cx24120_writereg(state, 0xf7, 0x00);
1312 ret = cx24120_writereg(state, 0xdc, 0x00);
1313 ret = cx24120_writereg(state, 0xdc, 0x07);
1316 /* Check final byte matches final byte of firmware */
1317 ret = cx24120_readreg(state, 0xe1);
1318 if (ret == fw->data[fw->size - 1]) {
1319 dev_dbg(&state->i2c->dev,
1320 "%s: Firmware uploaded successfully\n",
1324 err("Firmware upload failed. Last byte returned=0x%x\n", ret);
1325 reset_result = -EREMOTEIO;
1327 ret = cx24120_writereg(state, 0xdc, 0x00);
1328 release_firmware(fw);
1329 if (reset_result != 0)
1330 return reset_result;
1334 cmd.id = CMD_START_TUNER;
1340 if (cx24120_message_send(state, &cmd) != 0) {
1341 err("Error tuner start! :(\n");
1346 inv_vco = cx24120_calculate_vco(state);
1348 cmd.id = CMD_VCO_SET;
1353 cmd.arg[3] = (inv_vco >> 8) & 0xff;
1354 cmd.arg[4] = (inv_vco) & 0xff;
1363 if (cx24120_message_send(state, &cmd)) {
1364 err("Error set VCO! :(\n");
1370 cmd.id = CMD_BANDWIDTH;
1385 if (cx24120_message_send(state, &cmd)) {
1386 err("Error set bandwidth!\n");
1390 ret = cx24120_readreg(state, 0xba);
1392 dev_dbg(&state->i2c->dev, "%s: Reset-readreg 0xba: %x\n",
1394 err("Error initialising tuner!\n");
1398 dev_dbg(&state->i2c->dev, "%s: Tuner initialised correctly.\n",
1402 /* Initialise mpeg outputs */
1403 ret = cx24120_writereg(state, 0xeb, 0x0a);
1404 if (cx24120_msg_mpeg_output_global_config(state, 0) ||
1405 cx24120_msg_mpeg_output_config(state, 0) ||
1406 cx24120_msg_mpeg_output_config(state, 1) ||
1407 cx24120_msg_mpeg_output_config(state, 2)) {
1408 err("Error initialising mpeg output. :(\n");
1414 cmd.id = CMD_TUNER_INIT;
1419 if (cx24120_message_send(state, &cmd)) {
1420 err("Error sending final init message. :(\n");
1425 /* Firmware CMD 35: Get firmware version */
1426 cmd.id = CMD_FWVERSION;
1428 for (i = 0; i < 4; i++) {
1430 ret = cx24120_message_send(state, &cmd);
1433 vers[i] = cx24120_readreg(state, CX24120_REG_MAILBOX);
1435 info("FW version %i.%i.%i.%i\n", vers[0], vers[1], vers[2], vers[3]);
1438 state->cold_init = 1;
1443 static int cx24120_tune(struct dvb_frontend *fe, bool re_tune,
1444 unsigned int mode_flags, unsigned int *delay, fe_status_t *status)
1446 struct cx24120_state *state = fe->demodulator_priv;
1449 dev_dbg(&state->i2c->dev, "%s(%d)\n", __func__, re_tune);
1451 /* TODO: Do we need to set delay? */
1454 ret = cx24120_set_frontend(fe);
1459 return cx24120_read_status(fe, status);
1464 static int cx24120_get_algo(struct dvb_frontend *fe)
1466 return DVBFE_ALGO_HW;
1470 static int cx24120_sleep(struct dvb_frontend *fe)
1476 /*static int cx24120_wakeup(struct dvb_frontend *fe)
1483 static int cx24120_get_frontend(struct dvb_frontend *fe)
1485 struct dtv_frontend_properties *c = &fe->dtv_property_cache;
1486 struct cx24120_state *state = fe->demodulator_priv;
1487 u8 freq1, freq2, freq3;
1489 dev_dbg(&state->i2c->dev, "%s()", __func__);
1491 /* don't return empty data if we're not tuned in */
1492 if (state->mpeg_enabled)
1496 freq1 = cx24120_readreg(state, CX24120_REG_FREQ1);
1497 freq2 = cx24120_readreg(state, CX24120_REG_FREQ2);
1498 freq3 = cx24120_readreg(state, CX24120_REG_FREQ3);
1499 c->frequency = (freq3 << 16) | (freq2 << 8) | freq1;
1500 dev_dbg(&state->i2c->dev, "%s frequency = %d\n", __func__,
1503 /* Get modulation, fec, pilot */
1504 cx24120_get_fec(fe);
1510 static void cx24120_release(struct dvb_frontend *fe)
1512 struct cx24120_state *state = fe->demodulator_priv;
1514 dev_dbg(&state->i2c->dev, "%s: Clear state structure\n", __func__);
1519 static int cx24120_read_ucblocks(struct dvb_frontend *fe, u32 *ucblocks)
1521 struct cx24120_state *state = fe->demodulator_priv;
1523 *ucblocks = (cx24120_readreg(state, CX24120_REG_UCB_H) << 8) |
1524 cx24120_readreg(state, CX24120_REG_UCB_L);
1526 dev_dbg(&state->i2c->dev, "%s: Blocks = %d\n",
1527 __func__, *ucblocks);
1532 static struct dvb_frontend_ops cx24120_ops = {
1533 .delsys = { SYS_DVBS, SYS_DVBS2 },
1535 .name = "Conexant CX24120/CX24118",
1536 .frequency_min = 950000,
1537 .frequency_max = 2150000,
1538 .frequency_stepsize = 1011, /* kHz for QPSK frontends */
1539 .frequency_tolerance = 5000,
1540 .symbol_rate_min = 1000000,
1541 .symbol_rate_max = 45000000,
1542 .caps = FE_CAN_INVERSION_AUTO |
1543 FE_CAN_FEC_1_2 | FE_CAN_FEC_2_3 | FE_CAN_FEC_3_4 |
1544 FE_CAN_FEC_4_5 | FE_CAN_FEC_5_6 | FE_CAN_FEC_6_7 |
1545 FE_CAN_FEC_7_8 | FE_CAN_FEC_AUTO |
1546 FE_CAN_2G_MODULATION |
1547 FE_CAN_QPSK | FE_CAN_RECOVER
1549 .release = cx24120_release,
1551 .init = cx24120_init,
1552 .sleep = cx24120_sleep,
1554 .tune = cx24120_tune,
1555 .get_frontend_algo = cx24120_get_algo,
1556 .set_frontend = cx24120_set_frontend,
1558 .get_frontend = cx24120_get_frontend,
1559 .read_status = cx24120_read_status,
1560 .read_ber = cx24120_read_ber,
1561 .read_signal_strength = cx24120_read_signal_strength,
1562 .read_snr = cx24120_read_snr,
1563 .read_ucblocks = cx24120_read_ucblocks,
1565 .diseqc_send_master_cmd = cx24120_send_diseqc_msg,
1567 .diseqc_send_burst = cx24120_diseqc_send_burst,
1568 .set_tone = cx24120_set_tone,
1569 .set_voltage = cx24120_set_voltage,
1572 MODULE_DESCRIPTION("DVB Frontend module for Conexant CX24120/CX24118 hardware");
1573 MODULE_AUTHOR("Jemma Denson");
1574 MODULE_LICENSE("GPL");