2 Conexant cx24120/cx24118 - DVBS/S2 Satellite demod/tuner driver
4 Copyright (C) 2008 Patrick Boettcher <pb@linuxtv.org>
5 Copyright (C) 2009 Sergey Tyurin <forum.free-x.de>
6 Updated 2012 by Jannis Achstetter <jannis_achstetter@web.de>
7 Copyright (C) 2015 Jemma Denson <jdenson@gmail.com>
9 Refactored & simplified driver
10 Updated to work with delivery system supplied by DVBv5
11 Add frequency, fec & pilot to get_frontend
13 Cards supported: Technisat Skystar S2
15 This program is free software; you can redistribute it and/or modify
16 it under the terms of the GNU General Public License as published by
17 the Free Software Foundation; either version 2 of the License, or
18 (at your option) any later version.
20 This program is distributed in the hope that it will be useful,
21 but WITHOUT ANY WARRANTY; without even the implied warranty of
22 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
23 GNU General Public License for more details.
26 #include <linux/slab.h>
27 #include <linux/kernel.h>
28 #include <linux/module.h>
29 #include <linux/moduleparam.h>
30 #include <linux/init.h>
31 #include <linux/firmware.h>
32 #include "dvb_frontend.h"
35 #define CX24120_SEARCH_RANGE_KHZ 5000
36 #define CX24120_FIRMWARE "dvb-fe-cx24120-1.20.58.2.fw"
38 /* cx24120 i2c registers */
39 #define CX24120_REG_CMD_START (0x00) /* write cmd_id */
40 #define CX24120_REG_CMD_ARGS (0x01) /* write command arguments */
41 #define CX24120_REG_CMD_END (0x1f) /* write 0x01 for end */
43 #define CX24120_REG_MAILBOX (0x33)
44 #define CX24120_REG_FREQ3 (0x34) /* frequency */
45 #define CX24120_REG_FREQ2 (0x35)
46 #define CX24120_REG_FREQ1 (0x36)
48 #define CX24120_REG_FECMODE (0x39) /* FEC status */
49 #define CX24120_REG_STATUS (0x3a) /* Tuner status */
50 #define CX24120_REG_SIGSTR_H (0x3a) /* Signal strength high */
51 #define CX24120_REG_SIGSTR_L (0x3b) /* Signal strength low byte */
52 #define CX24120_REG_QUALITY_H (0x40) /* SNR high byte */
53 #define CX24120_REG_QUALITY_L (0x41) /* SNR low byte */
55 #define CX24120_REG_BER_HH (0x47) /* BER high byte of high word */
56 #define CX24120_REG_BER_HL (0x48) /* BER low byte of high word */
57 #define CX24120_REG_BER_LH (0x49) /* BER high byte of low word */
58 #define CX24120_REG_BER_LL (0x4a) /* BER low byte of low word */
60 #define CX24120_REG_UCB_H (0x50) /* UCB high byte */
61 #define CX24120_REG_UCB_L (0x51) /* UCB low byte */
63 #define CX24120_REG_CLKDIV (0xe6)
64 #define CX24120_REG_RATEDIV (0xf0)
66 #define CX24120_REG_REVISION (0xff) /* Chip revision (ro) */
69 /* Command messages */
70 enum command_message_id {
71 CMD_VCO_SET = 0x10, /* cmd.len = 12; */
72 CMD_TUNEREQUEST = 0x11, /* cmd.len = 15; */
74 CMD_MPEG_ONOFF = 0x13, /* cmd.len = 4; */
75 CMD_MPEG_INIT = 0x14, /* cmd.len = 7; */
76 CMD_BANDWIDTH = 0x15, /* cmd.len = 12; */
77 CMD_CLOCK_READ = 0x16, /* read clock */
78 CMD_CLOCK_SET = 0x17, /* cmd.len = 10; */
80 CMD_DISEQC_MSG1 = 0x20, /* cmd.len = 11; */
81 CMD_DISEQC_MSG2 = 0x21, /* cmd.len = d->msg_len + 6; */
82 CMD_SETVOLTAGE = 0x22, /* cmd.len = 2; */
83 CMD_SETTONE = 0x23, /* cmd.len = 4; */
84 CMD_DISEQC_BURST = 0x24, /* cmd.len not used !!! */
86 CMD_READ_SNR = 0x1a, /* Read signal strength */
87 CMD_START_TUNER = 0x1b, /* ??? */
91 CMD_TUNER_INIT = 0x3c, /* cmd.len = 0x03; */
94 #define CX24120_MAX_CMD_LEN 30
97 #define CX24120_PILOT_OFF (0x00)
98 #define CX24120_PILOT_ON (0x40)
99 #define CX24120_PILOT_AUTO (0x80)
102 #define CX24120_HAS_SIGNAL (0x01)
103 #define CX24120_HAS_CARRIER (0x02)
104 #define CX24120_HAS_VITERBI (0x04)
105 #define CX24120_HAS_LOCK (0x08)
106 #define CX24120_HAS_UNK1 (0x10)
107 #define CX24120_HAS_UNK2 (0x20)
108 #define CX24120_STATUS_MASK (0x0f)
109 #define CX24120_SIGNAL_MASK (0xc0)
111 #define info(args...) pr_info("cx24120: " args)
112 #define err(args...) pr_err("cx24120: ### ERROR: " args)
114 /* The Demod/Tuner can't easily provide these, we cache them */
115 struct cx24120_tuning {
118 fe_spectral_inversion_t inversion;
121 fe_delivery_system_t delsys;
122 fe_modulation_t modulation;
136 struct cx24120_state {
137 struct i2c_adapter *i2c;
138 const struct cx24120_config *config;
139 struct dvb_frontend frontend;
144 /* current and next tuning parameters */
145 struct cx24120_tuning dcur;
146 struct cx24120_tuning dnxt;
150 /* Command message to firmware */
154 u8 arg[CX24120_MAX_CMD_LEN];
158 /* Read single register */
159 static int cx24120_readreg(struct cx24120_state *state, u8 reg)
163 struct i2c_msg msg[] = {
164 { .addr = state->config->i2c_addr,
169 { .addr = state->config->i2c_addr,
174 ret = i2c_transfer(state->i2c, msg, 2);
176 err("Read error: reg=0x%02x, ret=0x%02x)\n", reg, ret);
180 dev_dbg(&state->i2c->dev, "%s: reg=0x%02x; data=0x%02x\n",
187 /* Write single register */
188 static int cx24120_writereg(struct cx24120_state *state, u8 reg, u8 data)
190 u8 buf[] = { reg, data };
191 struct i2c_msg msg = {
192 .addr = state->config->i2c_addr,
198 ret = i2c_transfer(state->i2c, &msg, 1);
200 err("Write error: i2c_write error(err == %i, 0x%02x: 0x%02x)\n",
205 dev_dbg(&state->i2c->dev, "%s: reg=0x%02x; data=0x%02x\n",
206 __func__, reg, data);
212 /* Write multiple registers in chunks of i2c_wr_max-sized buffers */
213 static int cx24120_writeregN(struct cx24120_state *state,
214 u8 reg, const u8 *values, u16 len, u8 incr)
217 u16 max = state->config->i2c_wr_max > 0 ?
218 state->config->i2c_wr_max :
221 struct i2c_msg msg = {
222 .addr = state->config->i2c_addr,
226 msg.buf = kmalloc(max + 1, GFP_KERNEL);
232 msg.len = len > max ? max : len;
233 memcpy(&msg.buf[1], values, msg.len);
235 len -= msg.len; /* data length revers counter */
236 values += msg.len; /* incr data pointer */
240 msg.len++; /* don't forget the addr byte */
242 ret = i2c_transfer(state->i2c, &msg, 1);
244 err("i2c_write error(err == %i, 0x%02x)\n", ret, reg);
248 dev_dbg(&state->i2c->dev,
249 "%s: reg=0x%02x; data=0x%02x,0x%02x,0x%02x,0x%02x\n",
251 msg.buf[1], msg.buf[2], msg.buf[3], msg.buf[4]);
262 static struct dvb_frontend_ops cx24120_ops;
264 struct dvb_frontend *cx24120_attach(const struct cx24120_config *config,
265 struct i2c_adapter *i2c)
267 struct cx24120_state *state = NULL;
270 info("Conexant cx24120/cx24118 - DVBS/S2 Satellite demod/tuner\n");
271 state = kzalloc(sizeof(struct cx24120_state),
274 err("Unable to allocate memory for cx24120_state\n");
278 /* setup the state */
279 state->config = config;
282 /* check if the demod is present and has proper type */
283 demod_rev = cx24120_readreg(state, CX24120_REG_REVISION);
286 info("Demod cx24120 rev. 0x07 detected.\n");
289 info("Demod cx24120 rev. 0x05 detected.\n");
292 err("Unsupported demod revision: 0x%x detected.\n",
297 /* create dvb_frontend */
298 state->cold_init = 0;
299 memcpy(&state->frontend.ops, &cx24120_ops,
300 sizeof(struct dvb_frontend_ops));
301 state->frontend.demodulator_priv = state;
303 info("Conexant cx24120/cx24118 attached.\n");
304 return &state->frontend;
310 EXPORT_SYMBOL(cx24120_attach);
312 static int cx24120_test_rom(struct cx24120_state *state)
316 err = cx24120_readreg(state, 0xfd);
318 ret = cx24120_readreg(state, 0xdf) & 0xfe;
319 err = cx24120_writereg(state, 0xdf, ret);
325 static int cx24120_read_snr(struct dvb_frontend *fe, u16 *snr)
327 struct cx24120_state *state = fe->demodulator_priv;
329 *snr = (cx24120_readreg(state, CX24120_REG_QUALITY_H)<<8) |
330 (cx24120_readreg(state, CX24120_REG_QUALITY_L));
331 dev_dbg(&state->i2c->dev, "%s: read SNR index = %d\n",
338 static int cx24120_read_ber(struct dvb_frontend *fe, u32 *ber)
340 struct cx24120_state *state = fe->demodulator_priv;
342 *ber = (cx24120_readreg(state, CX24120_REG_BER_HH) << 24) |
343 (cx24120_readreg(state, CX24120_REG_BER_HL) << 16) |
344 (cx24120_readreg(state, CX24120_REG_BER_LH) << 8) |
345 cx24120_readreg(state, CX24120_REG_BER_LL);
346 dev_dbg(&state->i2c->dev, "%s: read BER index = %d\n",
352 static int cx24120_msg_mpeg_output_global_config(struct cx24120_state *state,
355 /* Check if we're running a command that needs to disable mpeg out */
356 static void cx24120_check_cmd(struct cx24120_state *state, u8 id)
359 case CMD_TUNEREQUEST:
361 case CMD_DISEQC_MSG1:
362 case CMD_DISEQC_MSG2:
365 cx24120_msg_mpeg_output_global_config(state, 0);
366 /* Old driver would do a msleep(100) here */
373 /* Send a message to the firmware */
374 static int cx24120_message_send(struct cx24120_state *state,
375 struct cx24120_cmd *cmd)
379 if (state->mpeg_enabled) {
380 /* Disable mpeg out on certain commands */
381 cx24120_check_cmd(state, cmd->id);
384 ret = cx24120_writereg(state, CX24120_REG_CMD_START, cmd->id);
385 ret = cx24120_writeregN(state, CX24120_REG_CMD_ARGS, &cmd->arg[0],
387 ret = cx24120_writereg(state, CX24120_REG_CMD_END, 0x01);
390 while (cx24120_readreg(state, CX24120_REG_CMD_END)) {
394 err("Error sending message to firmware\n");
398 dev_dbg(&state->i2c->dev, "%s: Successfully send message 0x%02x\n",
404 /* Send a message and fill arg[] with the results */
405 static int cx24120_message_sendrcv(struct cx24120_state *state,
406 struct cx24120_cmd *cmd, u8 numreg)
410 if (numreg > CX24120_MAX_CMD_LEN) {
411 err("Too many registers to read. cmd->reg = %d", numreg);
415 ret = cx24120_message_send(state, cmd);
422 /* Read numreg registers starting from register cmd->len */
423 for (i = 0; i < numreg; i++)
424 cmd->arg[i] = cx24120_readreg(state, (cmd->len+i+1));
431 static int cx24120_read_signal_strength(struct dvb_frontend *fe,
432 u16 *signal_strength)
434 struct cx24120_state *state = fe->demodulator_priv;
435 struct cx24120_cmd cmd;
436 int ret, sigstr_h, sigstr_l;
438 cmd.id = CMD_READ_SNR;
442 ret = cx24120_message_send(state, &cmd);
444 err("error reading signal strength\n");
449 sigstr_h = (cx24120_readreg(state, CX24120_REG_SIGSTR_H) >> 6) << 8;
450 sigstr_l = cx24120_readreg(state, CX24120_REG_SIGSTR_L);
451 dev_dbg(&state->i2c->dev, "%s: Signal strength from firmware= 0x%x\n",
452 __func__, (sigstr_h | sigstr_l));
455 *signal_strength = ((sigstr_h | sigstr_l) << 5) & 0x0000ffff;
456 dev_dbg(&state->i2c->dev, "%s: Signal strength= 0x%x\n",
457 __func__, *signal_strength);
463 static int cx24120_msg_mpeg_output_global_config(struct cx24120_state *state,
466 struct cx24120_cmd cmd;
469 cmd.id = CMD_MPEG_ONOFF;
473 cmd.arg[2] = enable ? 0 : (u8)(-1);
476 ret = cx24120_message_send(state, &cmd);
478 dev_dbg(&state->i2c->dev,
479 "%s: Failed to set MPEG output to %s\n",
481 (enable)?"enabled":"disabled");
485 state->mpeg_enabled = enable;
486 dev_dbg(&state->i2c->dev, "%s: MPEG output %s\n",
488 (enable)?"enabled":"disabled");
494 static int cx24120_msg_mpeg_output_config(struct cx24120_state *state, u8 seq)
496 struct cx24120_cmd cmd;
497 struct cx24120_initial_mpeg_config i =
498 state->config->initial_mpeg_config;
500 cmd.id = CMD_MPEG_INIT;
502 cmd.arg[0] = seq; /* sequental number - can be 0,1,2 */
503 cmd.arg[1] = ((i.x1 & 0x01) << 1) | ((i.x1 >> 1) & 0x01);
506 cmd.arg[4] = ((i.x2 >> 1) & 0x01);
507 cmd.arg[5] = (i.x2 & 0xf0) | (i.x3 & 0x0f);
510 return cx24120_message_send(state, &cmd);
514 static int cx24120_diseqc_send_burst(struct dvb_frontend *fe,
515 fe_sec_mini_cmd_t burst)
517 struct cx24120_state *state = fe->demodulator_priv;
518 struct cx24120_cmd cmd;
520 /* Yes, cmd.len is set to zero. The old driver
521 * didn't specify any len, but also had a
522 * memset 0 before every use of the cmd struct
523 * which would have set it to zero.
524 * This quite probably needs looking into.
526 cmd.id = CMD_DISEQC_BURST;
531 dev_dbg(&state->i2c->dev, "%s: burst sent.\n", __func__);
533 return cx24120_message_send(state, &cmd);
537 static int cx24120_set_tone(struct dvb_frontend *fe, fe_sec_tone_mode_t tone)
539 struct cx24120_state *state = fe->demodulator_priv;
540 struct cx24120_cmd cmd;
542 dev_dbg(&state->i2c->dev, "%s(%d)\n",
545 if ((tone != SEC_TONE_ON) && (tone != SEC_TONE_OFF)) {
546 err("Invalid tone=%d\n", tone);
550 cmd.id = CMD_SETTONE;
555 cmd.arg[3] = (tone == SEC_TONE_ON)?0x01:0x00;
557 return cx24120_message_send(state, &cmd);
561 static int cx24120_set_voltage(struct dvb_frontend *fe,
562 fe_sec_voltage_t voltage)
564 struct cx24120_state *state = fe->demodulator_priv;
565 struct cx24120_cmd cmd;
567 dev_dbg(&state->i2c->dev, "%s(%d)\n",
570 cmd.id = CMD_SETVOLTAGE;
573 cmd.arg[1] = (voltage == SEC_VOLTAGE_18)?0x01:0x00;
575 return cx24120_message_send(state, &cmd);
579 static int cx24120_send_diseqc_msg(struct dvb_frontend *fe,
580 struct dvb_diseqc_master_cmd *d)
582 struct cx24120_state *state = fe->demodulator_priv;
583 struct cx24120_cmd cmd;
586 dev_dbg(&state->i2c->dev, "%s()\n", __func__);
588 cmd.id = CMD_DISEQC_MSG1;
602 if (cx24120_message_send(state, &cmd)) {
603 err("send 1st message(0x%x) failed\n", cmd.id);
607 cmd.id = CMD_DISEQC_MSG2;
608 cmd.len = d->msg_len + 6;
614 cmd.arg[5] = d->msg_len;
616 memcpy(&cmd.arg[6], &d->msg, d->msg_len);
618 if (cx24120_message_send(state, &cmd)) {
619 err("send 2nd message(0x%x) failed\n", cmd.id);
625 if (!(cx24120_readreg(state, 0x93) & 0x01)) {
626 dev_dbg(&state->i2c->dev,
627 "%s: diseqc sequence sent success\n",
633 } while (back_count);
635 err("Too long waiting for diseqc.\n");
640 /* Read current tuning status */
641 static int cx24120_read_status(struct dvb_frontend *fe, fe_status_t *status)
643 struct cx24120_state *state = fe->demodulator_priv;
646 lock = cx24120_readreg(state, CX24120_REG_STATUS);
648 dev_dbg(&state->i2c->dev, "%s() status = 0x%02x\n",
653 if (lock & CX24120_HAS_SIGNAL)
654 *status = FE_HAS_SIGNAL;
655 if (lock & CX24120_HAS_CARRIER)
656 *status |= FE_HAS_CARRIER;
657 if (lock & CX24120_HAS_VITERBI)
658 *status |= FE_HAS_VITERBI | FE_HAS_SYNC;
659 if (lock & CX24120_HAS_LOCK)
660 *status |= FE_HAS_LOCK;
662 /* TODO: is FE_HAS_SYNC in the right place?
663 * Other cx241xx drivers have this slightly
670 /* FEC & modulation lookup table
671 * Used for decoding the REG_FECMODE register
674 static struct cx24120_modfec {
675 fe_delivery_system_t delsys;
679 } modfec_lookup_table[] = {
680 /*delsys mod fec val */
681 { SYS_DVBS, QPSK, FEC_1_2, 0x01 },
682 { SYS_DVBS, QPSK, FEC_2_3, 0x02 },
683 { SYS_DVBS, QPSK, FEC_3_4, 0x03 },
684 { SYS_DVBS, QPSK, FEC_4_5, 0x04 },
685 { SYS_DVBS, QPSK, FEC_5_6, 0x05 },
686 { SYS_DVBS, QPSK, FEC_6_7, 0x06 },
687 { SYS_DVBS, QPSK, FEC_7_8, 0x07 },
689 { SYS_DVBS2, QPSK, FEC_1_2, 0x04 },
690 { SYS_DVBS2, QPSK, FEC_3_5, 0x05 },
691 { SYS_DVBS2, QPSK, FEC_2_3, 0x06 },
692 { SYS_DVBS2, QPSK, FEC_3_4, 0x07 },
693 { SYS_DVBS2, QPSK, FEC_4_5, 0x08 },
694 { SYS_DVBS2, QPSK, FEC_5_6, 0x09 },
695 { SYS_DVBS2, QPSK, FEC_8_9, 0x0a },
696 { SYS_DVBS2, QPSK, FEC_9_10, 0x0b },
698 { SYS_DVBS2, PSK_8, FEC_3_5, 0x0c },
699 { SYS_DVBS2, PSK_8, FEC_2_3, 0x0d },
700 { SYS_DVBS2, PSK_8, FEC_3_4, 0x0e },
701 { SYS_DVBS2, PSK_8, FEC_5_6, 0x0f },
702 { SYS_DVBS2, PSK_8, FEC_8_9, 0x10 },
703 { SYS_DVBS2, PSK_8, FEC_9_10, 0x11 },
707 /* Retrieve current fec, modulation & pilot values */
708 static int cx24120_get_fec(struct dvb_frontend *fe)
710 struct dtv_frontend_properties *c = &fe->dtv_property_cache;
711 struct cx24120_state *state = fe->demodulator_priv;
716 dev_dbg(&state->i2c->dev, "%s()\n", __func__);
718 ret = cx24120_readreg(state, CX24120_REG_FECMODE);
719 GettedFEC = ret & 0x3f; /* Lower 6 bits */
721 dev_dbg(&state->i2c->dev, "%s: Get FEC: %d\n", __func__, GettedFEC);
723 for (idx = 0; idx < ARRAY_SIZE(modfec_lookup_table); idx++) {
724 if (modfec_lookup_table[idx].delsys != state->dcur.delsys)
726 if (modfec_lookup_table[idx].val != GettedFEC)
732 if (idx >= ARRAY_SIZE(modfec_lookup_table)) {
733 dev_dbg(&state->i2c->dev, "%s: Couldn't find fec!\n",
738 /* save values back to cache */
739 c->modulation = modfec_lookup_table[idx].mod;
740 c->fec_inner = modfec_lookup_table[idx].fec;
741 c->pilot = (ret & 0x80) ? PILOT_ON : PILOT_OFF;
743 dev_dbg(&state->i2c->dev,
744 "%s: mod(%d), fec(%d), pilot(%d)\n",
746 c->modulation, c->fec_inner, c->pilot);
752 /* Clock ratios lookup table
754 * Values obtained from much larger table in old driver
755 * which had numerous entries which would never match.
757 * There's probably some way of calculating these but I
758 * can't determine the pattern
760 static struct cx24120_clock_ratios_table {
761 fe_delivery_system_t delsys;
768 } clock_ratios_table[] = {
769 /*delsys pilot mod fec m_rat n_rat rate */
770 { SYS_DVBS2, PILOT_OFF, QPSK, FEC_1_2, 273088, 254505, 274 },
771 { SYS_DVBS2, PILOT_OFF, QPSK, FEC_3_5, 17272, 13395, 330 },
772 { SYS_DVBS2, PILOT_OFF, QPSK, FEC_2_3, 24344, 16967, 367 },
773 { SYS_DVBS2, PILOT_OFF, QPSK, FEC_3_4, 410788, 254505, 413 },
774 { SYS_DVBS2, PILOT_OFF, QPSK, FEC_4_5, 438328, 254505, 440 },
775 { SYS_DVBS2, PILOT_OFF, QPSK, FEC_5_6, 30464, 16967, 459 },
776 { SYS_DVBS2, PILOT_OFF, QPSK, FEC_8_9, 487832, 254505, 490 },
777 { SYS_DVBS2, PILOT_OFF, QPSK, FEC_9_10, 493952, 254505, 496 },
778 { SYS_DVBS2, PILOT_OFF, PSK_8, FEC_3_5, 328168, 169905, 494 },
779 { SYS_DVBS2, PILOT_OFF, PSK_8, FEC_2_3, 24344, 11327, 550 },
780 { SYS_DVBS2, PILOT_OFF, PSK_8, FEC_3_4, 410788, 169905, 618 },
781 { SYS_DVBS2, PILOT_OFF, PSK_8, FEC_5_6, 30464, 11327, 688 },
782 { SYS_DVBS2, PILOT_OFF, PSK_8, FEC_8_9, 487832, 169905, 735 },
783 { SYS_DVBS2, PILOT_OFF, PSK_8, FEC_9_10, 493952, 169905, 744 },
784 { SYS_DVBS2, PILOT_ON, QPSK, FEC_1_2, 273088, 260709, 268 },
785 { SYS_DVBS2, PILOT_ON, QPSK, FEC_3_5, 328168, 260709, 322 },
786 { SYS_DVBS2, PILOT_ON, QPSK, FEC_2_3, 121720, 86903, 358 },
787 { SYS_DVBS2, PILOT_ON, QPSK, FEC_3_4, 410788, 260709, 403 },
788 { SYS_DVBS2, PILOT_ON, QPSK, FEC_4_5, 438328, 260709, 430 },
789 { SYS_DVBS2, PILOT_ON, QPSK, FEC_5_6, 152320, 86903, 448 },
790 { SYS_DVBS2, PILOT_ON, QPSK, FEC_8_9, 487832, 260709, 479 },
791 { SYS_DVBS2, PILOT_ON, QPSK, FEC_9_10, 493952, 260709, 485 },
792 { SYS_DVBS2, PILOT_ON, PSK_8, FEC_3_5, 328168, 173853, 483 },
793 { SYS_DVBS2, PILOT_ON, PSK_8, FEC_2_3, 121720, 57951, 537 },
794 { SYS_DVBS2, PILOT_ON, PSK_8, FEC_3_4, 410788, 173853, 604 },
795 { SYS_DVBS2, PILOT_ON, PSK_8, FEC_5_6, 152320, 57951, 672 },
796 { SYS_DVBS2, PILOT_ON, PSK_8, FEC_8_9, 487832, 173853, 718 },
797 { SYS_DVBS2, PILOT_ON, PSK_8, FEC_9_10, 493952, 173853, 727 },
798 { SYS_DVBS, PILOT_OFF, QPSK, FEC_1_2, 152592, 152592, 256 },
799 { SYS_DVBS, PILOT_OFF, QPSK, FEC_2_3, 305184, 228888, 341 },
800 { SYS_DVBS, PILOT_OFF, QPSK, FEC_3_4, 457776, 305184, 384 },
801 { SYS_DVBS, PILOT_OFF, QPSK, FEC_5_6, 762960, 457776, 427 },
802 { SYS_DVBS, PILOT_OFF, QPSK, FEC_7_8, 1068144, 610368, 448 },
806 /* Set clock ratio from lookup table */
807 static void cx24120_set_clock_ratios(struct dvb_frontend *fe)
809 struct dtv_frontend_properties *c = &fe->dtv_property_cache;
810 struct cx24120_state *state = fe->demodulator_priv;
811 struct cx24120_cmd cmd;
814 /* Find fec, modulation, pilot */
815 ret = cx24120_get_fec(fe);
819 /* Find the clock ratios in the lookup table */
820 for (idx = 0; idx < ARRAY_SIZE(clock_ratios_table); idx++) {
821 if (clock_ratios_table[idx].delsys != state->dcur.delsys)
823 if (clock_ratios_table[idx].mod != c->modulation)
825 if (clock_ratios_table[idx].fec != c->fec_inner)
827 if (clock_ratios_table[idx].pilot != c->pilot)
833 if (idx >= ARRAY_SIZE(clock_ratios_table)) {
834 info("Clock ratio not found - data reception in danger\n");
839 /* Read current values? */
840 cmd.id = CMD_CLOCK_READ;
843 ret = cx24120_message_sendrcv(state, &cmd, 6);
846 /* in cmd[0]-[5] - result */
848 dev_dbg(&state->i2c->dev,
849 "%s: m=%d, n=%d; idx: %d m=%d, n=%d, rate=%d\n",
851 cmd.arg[2] | (cmd.arg[1] << 8) | (cmd.arg[0] << 16),
852 cmd.arg[5] | (cmd.arg[4] << 8) | (cmd.arg[3] << 16),
854 clock_ratios_table[idx].m_rat,
855 clock_ratios_table[idx].n_rat,
856 clock_ratios_table[idx].rate);
861 cmd.id = CMD_CLOCK_SET;
865 cmd.arg[2] = (clock_ratios_table[idx].m_rat >> 16) & 0xff;
866 cmd.arg[3] = (clock_ratios_table[idx].m_rat >> 8) & 0xff;
867 cmd.arg[4] = (clock_ratios_table[idx].m_rat >> 0) & 0xff;
868 cmd.arg[5] = (clock_ratios_table[idx].n_rat >> 16) & 0xff;
869 cmd.arg[6] = (clock_ratios_table[idx].n_rat >> 8) & 0xff;
870 cmd.arg[7] = (clock_ratios_table[idx].n_rat >> 0) & 0xff;
871 cmd.arg[8] = (clock_ratios_table[idx].rate >> 8) & 0xff;
872 cmd.arg[9] = (clock_ratios_table[idx].rate >> 0) & 0xff;
874 cx24120_message_send(state, &cmd);
879 /* Set inversion value */
880 static int cx24120_set_inversion(struct cx24120_state *state,
881 fe_spectral_inversion_t inversion)
883 dev_dbg(&state->i2c->dev, "%s(%d)\n",
884 __func__, inversion);
888 state->dnxt.inversion_val = 0x00;
891 state->dnxt.inversion_val = 0x04;
894 state->dnxt.inversion_val = 0x0c;
900 state->dnxt.inversion = inversion;
905 /* FEC lookup table for tuning
906 * Some DVB-S2 val's have been found by trial
907 * and error. Sofar it seems to match up with
908 * the contents of the REG_FECMODE after tuning
909 * The rest will probably be the same but would
911 * Anything not in the table will run with
912 * FEC_AUTO and take a while longer to tune in
913 * ( c.500ms instead of 30ms )
915 static struct cx24120_modfec_table {
916 fe_delivery_system_t delsys;
921 /*delsys mod fec val */
922 { SYS_DVBS, QPSK, FEC_1_2, 0x2e },
923 { SYS_DVBS, QPSK, FEC_2_3, 0x2f },
924 { SYS_DVBS, QPSK, FEC_3_4, 0x30 },
925 { SYS_DVBS, QPSK, FEC_5_6, 0x31 },
926 { SYS_DVBS, QPSK, FEC_6_7, 0x32 },
927 { SYS_DVBS, QPSK, FEC_7_8, 0x33 },
929 { SYS_DVBS2, QPSK, FEC_3_4, 0x07 },
931 { SYS_DVBS2, PSK_8, FEC_2_3, 0x0d },
932 { SYS_DVBS2, PSK_8, FEC_3_4, 0x0e },
935 /* Set fec_val & fec_mask values from delsys, modulation & fec */
936 static int cx24120_set_fec(struct cx24120_state *state,
937 fe_modulation_t mod, fe_code_rate_t fec)
941 dev_dbg(&state->i2c->dev,
942 "%s(0x%02x,0x%02x)\n", __func__, mod, fec);
944 state->dnxt.fec = fec;
946 /* Lookup fec_val from modfec table */
947 for (idx = 0; idx < ARRAY_SIZE(modfec_table); idx++) {
948 if (modfec_table[idx].delsys != state->dnxt.delsys)
950 if (modfec_table[idx].mod != mod)
952 if (modfec_table[idx].fec != fec)
956 state->dnxt.fec_mask = 0x00;
957 state->dnxt.fec_val = modfec_table[idx].val;
962 if (state->dnxt.delsys == SYS_DVBS2) {
963 /* DVBS2 auto is 0x00/0x00 */
964 state->dnxt.fec_mask = 0x00;
965 state->dnxt.fec_val = 0x00;
967 /* Set DVB-S to auto */
968 state->dnxt.fec_val = 0x2e;
969 state->dnxt.fec_mask = 0xac;
977 static int cx24120_set_pilot(struct cx24120_state *state,
980 dev_dbg(&state->i2c->dev,
981 "%s(%d)\n", __func__, pilot);
983 /* Pilot only valid in DVBS2 */
984 if (state->dnxt.delsys != SYS_DVBS2) {
985 state->dnxt.pilot_val = CX24120_PILOT_OFF;
992 state->dnxt.pilot_val = CX24120_PILOT_OFF;
995 state->dnxt.pilot_val = CX24120_PILOT_ON;
999 state->dnxt.pilot_val = CX24120_PILOT_AUTO;
1005 /* Set symbol rate */
1006 static int cx24120_set_symbolrate(struct cx24120_state *state, u32 rate)
1008 dev_dbg(&state->i2c->dev, "%s(%d)\n",
1011 state->dnxt.symbol_rate = rate;
1013 /* Check symbol rate */
1014 if (rate > 31000000) {
1015 state->dnxt.clkdiv = (-(rate < 31000001) & 3) + 2;
1016 state->dnxt.ratediv = (-(rate < 31000001) & 6) + 4;
1018 state->dnxt.clkdiv = 3;
1019 state->dnxt.ratediv = 6;
1026 /* Overwrite the current tuning params, we are about to tune */
1027 static void cx24120_clone_params(struct dvb_frontend *fe)
1029 struct cx24120_state *state = fe->demodulator_priv;
1031 state->dcur = state->dnxt;
1035 /* Table of time to tune for different symrates */
1036 static struct cx24120_symrate_delay {
1037 fe_delivery_system_t delsys;
1038 u32 symrate; /* Check for >= this symrate */
1039 u32 delay; /* Timeout in ms */
1040 } symrates_delay_table[] = {
1041 { SYS_DVBS, 10000000, 400 },
1042 { SYS_DVBS, 8000000, 2000 },
1043 { SYS_DVBS, 6000000, 5000 },
1044 { SYS_DVBS, 3000000, 10000 },
1045 { SYS_DVBS, 0, 15000 },
1046 { SYS_DVBS2, 10000000, 600 }, /* DVBS2 needs a little longer */
1047 { SYS_DVBS2, 8000000, 2000 }, /* (so these might need bumping too) */
1048 { SYS_DVBS2, 6000000, 5000 },
1049 { SYS_DVBS2, 3000000, 10000 },
1050 { SYS_DVBS2, 0, 15000 },
1054 static int cx24120_set_frontend(struct dvb_frontend *fe)
1056 struct dtv_frontend_properties *c = &fe->dtv_property_cache;
1057 struct cx24120_state *state = fe->demodulator_priv;
1058 struct cx24120_cmd cmd;
1060 int delay_cnt, sd_idx = 0;
1063 switch (c->delivery_system) {
1065 dev_dbg(&state->i2c->dev, "%s() DVB-S2\n",
1069 dev_dbg(&state->i2c->dev, "%s() DVB-S\n",
1073 dev_dbg(&state->i2c->dev,
1074 "%s() Delivery system(%d) not supported\n",
1075 __func__, c->delivery_system);
1081 state->dnxt.delsys = c->delivery_system;
1082 state->dnxt.modulation = c->modulation;
1083 state->dnxt.frequency = c->frequency;
1084 state->dnxt.pilot = c->pilot;
1086 ret = cx24120_set_inversion(state, c->inversion);
1090 ret = cx24120_set_fec(state, c->modulation, c->fec_inner);
1094 ret = cx24120_set_pilot(state, c->pilot);
1098 ret = cx24120_set_symbolrate(state, c->symbol_rate);
1103 /* discard the 'current' tuning parameters and prepare to tune */
1104 cx24120_clone_params(fe);
1106 dev_dbg(&state->i2c->dev,
1107 "%s: delsys = %d\n", __func__, state->dcur.delsys);
1108 dev_dbg(&state->i2c->dev,
1109 "%s: modulation = %d\n", __func__, state->dcur.modulation);
1110 dev_dbg(&state->i2c->dev,
1111 "%s: frequency = %d\n", __func__, state->dcur.frequency);
1112 dev_dbg(&state->i2c->dev,
1113 "%s: pilot = %d (val = 0x%02x)\n", __func__,
1114 state->dcur.pilot, state->dcur.pilot_val);
1115 dev_dbg(&state->i2c->dev,
1116 "%s: symbol_rate = %d (clkdiv/ratediv = 0x%02x/0x%02x)\n",
1117 __func__, state->dcur.symbol_rate,
1118 state->dcur.clkdiv, state->dcur.ratediv);
1119 dev_dbg(&state->i2c->dev,
1120 "%s: FEC = %d (mask/val = 0x%02x/0x%02x)\n", __func__,
1121 state->dcur.fec, state->dcur.fec_mask, state->dcur.fec_val);
1122 dev_dbg(&state->i2c->dev,
1123 "%s: Inversion = %d (val = 0x%02x)\n", __func__,
1124 state->dcur.inversion, state->dcur.inversion_val);
1129 cmd.id = CMD_TUNEREQUEST;
1132 cmd.arg[1] = (state->dcur.frequency & 0xff0000) >> 16;
1133 cmd.arg[2] = (state->dcur.frequency & 0x00ff00) >> 8;
1134 cmd.arg[3] = (state->dcur.frequency & 0x0000ff);
1135 cmd.arg[4] = ((state->dcur.symbol_rate/1000) & 0xff00) >> 8;
1136 cmd.arg[5] = ((state->dcur.symbol_rate/1000) & 0x00ff);
1137 cmd.arg[6] = state->dcur.inversion;
1138 cmd.arg[7] = state->dcur.fec_val | state->dcur.pilot_val;
1139 cmd.arg[8] = CX24120_SEARCH_RANGE_KHZ >> 8;
1140 cmd.arg[9] = CX24120_SEARCH_RANGE_KHZ & 0xff;
1141 cmd.arg[10] = 0; /* maybe rolloff? */
1142 cmd.arg[11] = state->dcur.fec_mask;
1143 cmd.arg[12] = state->dcur.ratediv;
1144 cmd.arg[13] = state->dcur.clkdiv;
1148 /* Send tune command */
1149 ret = cx24120_message_send(state, &cmd);
1153 /* Write symbol rate values */
1154 ret = cx24120_writereg(state, CX24120_REG_CLKDIV, state->dcur.clkdiv);
1155 ret = cx24120_readreg(state, CX24120_REG_RATEDIV);
1157 ret |= state->dcur.ratediv;
1158 ret = cx24120_writereg(state, CX24120_REG_RATEDIV, ret);
1160 /* Default time to tune */
1163 /* Establish time to tune from symrates_delay_table */
1164 for (sd_idx = 0; sd_idx < ARRAY_SIZE(symrates_delay_table); sd_idx++) {
1165 if (state->dcur.delsys != symrates_delay_table[sd_idx].delsys)
1167 if (c->symbol_rate < symrates_delay_table[sd_idx].symrate)
1171 delay_cnt = symrates_delay_table[sd_idx].delay;
1172 dev_dbg(&state->i2c->dev, "%s: Found symrate delay = %d\n",
1173 __func__, delay_cnt);
1177 /* Wait for tuning */
1178 while (delay_cnt >= 0) {
1179 cx24120_read_status(fe, &status);
1180 if (status & FE_HAS_LOCK)
1188 dev_dbg(&state->i2c->dev, "%s: Tuning failed\n",
1195 dev_dbg(&state->i2c->dev, "%s: Tuning successful\n",
1198 /* Set clock ratios */
1199 cx24120_set_clock_ratios(fe);
1201 /* Old driver would do a msleep(200) here */
1203 /* Renable mpeg output */
1204 if (!state->mpeg_enabled)
1205 cx24120_msg_mpeg_output_global_config(state, 1);
1211 /* Calculate vco from config */
1212 static u64 cx24120_calculate_vco(struct cx24120_state *state)
1215 u64 inv_vco, res, xxyyzz;
1216 u32 xtal_khz = state->config->xtal_khz;
1218 xxyyzz = 0x400000000ULL;
1219 vco = xtal_khz * 10 * 4;
1220 inv_vco = xxyyzz / vco;
1223 if (inv_vco > xtal_khz * 10 * 2)
1226 dev_dbg(&state->i2c->dev,
1227 "%s: xtal=%d, vco=%d, inv_vco=%lld, res=%lld\n",
1228 __func__, xtal_khz, vco, inv_vco, res);
1234 int cx24120_init(struct dvb_frontend *fe)
1236 const struct firmware *fw;
1237 struct cx24120_state *state = fe->demodulator_priv;
1238 struct cx24120_cmd cmd;
1239 u8 ret, ret_EA, reg1;
1244 unsigned char vers[4];
1246 if (state->cold_init)
1250 ret = cx24120_writereg(state, 0xea, 0x00);
1251 ret = cx24120_test_rom(state);
1252 ret = cx24120_readreg(state, 0xfb) & 0xfe;
1253 ret = cx24120_writereg(state, 0xfb, ret);
1254 ret = cx24120_readreg(state, 0xfc) & 0xfe;
1255 ret = cx24120_writereg(state, 0xfc, ret);
1256 ret = cx24120_writereg(state, 0xc3, 0x04);
1257 ret = cx24120_writereg(state, 0xc4, 0x04);
1258 ret = cx24120_writereg(state, 0xce, 0x00);
1259 ret = cx24120_writereg(state, 0xcf, 0x00);
1260 ret_EA = cx24120_readreg(state, 0xea) & 0xfe;
1261 ret = cx24120_writereg(state, 0xea, ret_EA);
1262 ret = cx24120_writereg(state, 0xeb, 0x0c);
1263 ret = cx24120_writereg(state, 0xec, 0x06);
1264 ret = cx24120_writereg(state, 0xed, 0x05);
1265 ret = cx24120_writereg(state, 0xee, 0x03);
1266 ret = cx24120_writereg(state, 0xef, 0x05);
1267 ret = cx24120_writereg(state, 0xf3, 0x03);
1268 ret = cx24120_writereg(state, 0xf4, 0x44);
1270 for (reg1 = 0xf0; reg1 < 0xf3; reg1++) {
1271 cx24120_writereg(state, reg1, 0x04);
1272 cx24120_writereg(state, reg1 - 10, 0x02);
1275 ret = cx24120_writereg(state, 0xea, (ret_EA | 0x01));
1276 for (reg1 = 0xc5; reg1 < 0xcb; reg1 += 2) {
1277 ret = cx24120_writereg(state, reg1, 0x00);
1278 ret = cx24120_writereg(state, reg1 + 1, 0x00);
1281 ret = cx24120_writereg(state, 0xe4, 0x03);
1282 ret = cx24120_writereg(state, 0xeb, 0x0a);
1284 dev_dbg(&state->i2c->dev,
1285 "%s: Requesting firmware (%s) to download...\n",
1286 __func__, CX24120_FIRMWARE);
1288 ret = state->config->request_firmware(fe, &fw, CX24120_FIRMWARE);
1290 err("Could not load firmware (%s): %d\n",
1291 CX24120_FIRMWARE, ret);
1295 dev_dbg(&state->i2c->dev,
1296 "%s: Firmware found, size %d bytes (%02x %02x .. %02x %02x)\n",
1298 (int)fw->size, /* firmware_size in bytes */
1299 fw->data[0], /* fw 1st byte */
1300 fw->data[1], /* fw 2d byte */
1301 fw->data[fw->size - 2], /* fw before last byte */
1302 fw->data[fw->size - 1]); /* fw last byte */
1304 ret = cx24120_test_rom(state);
1305 ret = cx24120_readreg(state, 0xfb) & 0xfe;
1306 ret = cx24120_writereg(state, 0xfb, ret);
1307 ret = cx24120_writereg(state, 0xe0, 0x76);
1308 ret = cx24120_writereg(state, 0xf7, 0x81);
1309 ret = cx24120_writereg(state, 0xf8, 0x00);
1310 ret = cx24120_writereg(state, 0xf9, 0x00);
1311 ret = cx24120_writeregN(state, 0xfa, fw->data, (fw->size - 1), 0x00);
1312 ret = cx24120_writereg(state, 0xf7, 0xc0);
1313 ret = cx24120_writereg(state, 0xe0, 0x00);
1314 ret = (fw->size - 2) & 0x00ff;
1315 ret = cx24120_writereg(state, 0xf8, ret);
1316 ret = ((fw->size - 2) >> 8) & 0x00ff;
1317 ret = cx24120_writereg(state, 0xf9, ret);
1318 ret = cx24120_writereg(state, 0xf7, 0x00);
1319 ret = cx24120_writereg(state, 0xdc, 0x00);
1320 ret = cx24120_writereg(state, 0xdc, 0x07);
1323 /* Check final byte matches final byte of firmware */
1324 ret = cx24120_readreg(state, 0xe1);
1325 if (ret == fw->data[fw->size - 1]) {
1326 dev_dbg(&state->i2c->dev,
1327 "%s: Firmware uploaded successfully\n",
1331 err("Firmware upload failed. Last byte returned=0x%x\n", ret);
1332 reset_result = -EREMOTEIO;
1334 ret = cx24120_writereg(state, 0xdc, 0x00);
1335 release_firmware(fw);
1336 if (reset_result != 0)
1337 return reset_result;
1341 cmd.id = CMD_START_TUNER;
1347 if (cx24120_message_send(state, &cmd) != 0) {
1348 err("Error tuner start! :(\n");
1353 inv_vco = cx24120_calculate_vco(state);
1355 cmd.id = CMD_VCO_SET;
1360 cmd.arg[3] = (inv_vco >> 8) & 0xff;
1361 cmd.arg[4] = (inv_vco) & 0xff;
1370 if (cx24120_message_send(state, &cmd)) {
1371 err("Error set VCO! :(\n");
1377 cmd.id = CMD_BANDWIDTH;
1392 if (cx24120_message_send(state, &cmd)) {
1393 err("Error set bandwidth!\n");
1397 ret = cx24120_readreg(state, 0xba);
1399 dev_dbg(&state->i2c->dev, "%s: Reset-readreg 0xba: %x\n",
1401 err("Error initialising tuner!\n");
1405 dev_dbg(&state->i2c->dev, "%s: Tuner initialised correctly.\n",
1409 /* Initialise mpeg outputs */
1410 ret = cx24120_writereg(state, 0xeb, 0x0a);
1411 if (cx24120_msg_mpeg_output_global_config(state, 0) ||
1412 cx24120_msg_mpeg_output_config(state, 0) ||
1413 cx24120_msg_mpeg_output_config(state, 1) ||
1414 cx24120_msg_mpeg_output_config(state, 2)) {
1415 err("Error initialising mpeg output. :(\n");
1421 cmd.id = CMD_TUNER_INIT;
1426 if (cx24120_message_send(state, &cmd)) {
1427 err("Error sending final init message. :(\n");
1432 /* Firmware CMD 35: Get firmware version */
1433 cmd.id = CMD_FWVERSION;
1435 for (i = 0; i < 4; i++) {
1437 ret = cx24120_message_send(state, &cmd);
1440 vers[i] = cx24120_readreg(state, CX24120_REG_MAILBOX);
1442 info("FW version %i.%i.%i.%i\n", vers[0], vers[1], vers[2], vers[3]);
1444 state->cold_init = 1;
1449 static int cx24120_tune(struct dvb_frontend *fe, bool re_tune,
1450 unsigned int mode_flags, unsigned int *delay, fe_status_t *status)
1452 struct cx24120_state *state = fe->demodulator_priv;
1455 dev_dbg(&state->i2c->dev, "%s(%d)\n", __func__, re_tune);
1457 /* TODO: Do we need to set delay? */
1460 ret = cx24120_set_frontend(fe);
1465 return cx24120_read_status(fe, status);
1470 static int cx24120_get_algo(struct dvb_frontend *fe)
1472 return DVBFE_ALGO_HW;
1476 static int cx24120_sleep(struct dvb_frontend *fe)
1482 /*static int cx24120_wakeup(struct dvb_frontend *fe)
1489 static int cx24120_get_frontend(struct dvb_frontend *fe)
1491 struct dtv_frontend_properties *c = &fe->dtv_property_cache;
1492 struct cx24120_state *state = fe->demodulator_priv;
1493 u8 freq1, freq2, freq3;
1495 dev_dbg(&state->i2c->dev, "%s()", __func__);
1497 /* don't return empty data if we're not tuned in */
1498 if (state->mpeg_enabled)
1502 freq1 = cx24120_readreg(state, CX24120_REG_FREQ1);
1503 freq2 = cx24120_readreg(state, CX24120_REG_FREQ2);
1504 freq3 = cx24120_readreg(state, CX24120_REG_FREQ3);
1505 c->frequency = (freq3 << 16) | (freq2 << 8) | freq1;
1506 dev_dbg(&state->i2c->dev, "%s frequency = %d\n", __func__,
1509 /* Get modulation, fec, pilot */
1510 cx24120_get_fec(fe);
1516 static void cx24120_release(struct dvb_frontend *fe)
1518 struct cx24120_state *state = fe->demodulator_priv;
1520 dev_dbg(&state->i2c->dev, "%s: Clear state structure\n", __func__);
1525 static int cx24120_read_ucblocks(struct dvb_frontend *fe, u32 *ucblocks)
1527 struct cx24120_state *state = fe->demodulator_priv;
1529 *ucblocks = (cx24120_readreg(state, CX24120_REG_UCB_H) << 8) |
1530 cx24120_readreg(state, CX24120_REG_UCB_L);
1532 dev_dbg(&state->i2c->dev, "%s: Blocks = %d\n",
1533 __func__, *ucblocks);
1538 static struct dvb_frontend_ops cx24120_ops = {
1539 .delsys = { SYS_DVBS, SYS_DVBS2 },
1541 .name = "Conexant CX24120/CX24118",
1542 .frequency_min = 950000,
1543 .frequency_max = 2150000,
1544 .frequency_stepsize = 1011, /* kHz for QPSK frontends */
1545 .frequency_tolerance = 5000,
1546 .symbol_rate_min = 1000000,
1547 .symbol_rate_max = 45000000,
1548 .caps = FE_CAN_INVERSION_AUTO |
1549 FE_CAN_FEC_1_2 | FE_CAN_FEC_2_3 | FE_CAN_FEC_3_4 |
1550 FE_CAN_FEC_4_5 | FE_CAN_FEC_5_6 | FE_CAN_FEC_6_7 |
1551 FE_CAN_FEC_7_8 | FE_CAN_FEC_AUTO |
1552 FE_CAN_2G_MODULATION |
1553 FE_CAN_QPSK | FE_CAN_RECOVER
1555 .release = cx24120_release,
1557 .init = cx24120_init,
1558 .sleep = cx24120_sleep,
1560 .tune = cx24120_tune,
1561 .get_frontend_algo = cx24120_get_algo,
1562 .set_frontend = cx24120_set_frontend,
1564 .get_frontend = cx24120_get_frontend,
1565 .read_status = cx24120_read_status,
1566 .read_ber = cx24120_read_ber,
1567 .read_signal_strength = cx24120_read_signal_strength,
1568 .read_snr = cx24120_read_snr,
1569 .read_ucblocks = cx24120_read_ucblocks,
1571 .diseqc_send_master_cmd = cx24120_send_diseqc_msg,
1573 .diseqc_send_burst = cx24120_diseqc_send_burst,
1574 .set_tone = cx24120_set_tone,
1575 .set_voltage = cx24120_set_voltage,
1578 MODULE_DESCRIPTION("DVB Frontend module for Conexant CX24120/CX24118 hardware");
1579 MODULE_AUTHOR("Jemma Denson");
1580 MODULE_LICENSE("GPL");