drivers/media/dvb-frontends/rtl2832.c

   1 /*
   2  * Realtek RTL2832 DVB-T demodulator driver
   3  *
   4  * Copyright (C) 2012 Thomas Mair <thomas.mair86@gmail.com>
   5  *
   6  *      This program is free software; you can redistribute it and/or modify
   7  *      it under the terms of the GNU General Public License as published by
   8  *      the Free Software Foundation; either version 2 of the License, or
   9  *      (at your option) any later version.
  10  *
  11  *      This program is distributed in the hope that it will be useful,
  12  *      but WITHOUT ANY WARRANTY; without even the implied warranty of
  13  *      MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  14  *      GNU General Public License for more details.
  15  *
  16  *      You should have received a copy of the GNU General Public License along
  17  *      with this program; if not, write to the Free Software Foundation, Inc.,
  18  *      51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
  19  */
  20
  21 #include "rtl2832_priv.h"
  22
  23 #define REG_MASK(b) (BIT(b + 1) - 1)
  24
  25 static const struct rtl2832_reg_entry registers[] = {
  26         [DVBT_SOFT_RST]         = {0x101,  2, 2},
  27         [DVBT_IIC_REPEAT]       = {0x101,  3, 3},
  28         [DVBT_TR_WAIT_MIN_8K]   = {0x188, 11, 2},
  29         [DVBT_RSD_BER_FAIL_VAL] = {0x18f, 15, 0},
  30         [DVBT_EN_BK_TRK]        = {0x1a6,  7, 7},
  31         [DVBT_AD_EN_REG]        = {0x008,  7, 7},
  32         [DVBT_AD_EN_REG1]       = {0x008,  6, 6},
  33         [DVBT_EN_BBIN]          = {0x1b1,  0, 0},
  34         [DVBT_MGD_THD0]         = {0x195,  7, 0},
  35         [DVBT_MGD_THD1]         = {0x196,  7, 0},
  36         [DVBT_MGD_THD2]         = {0x197,  7, 0},
  37         [DVBT_MGD_THD3]         = {0x198,  7, 0},
  38         [DVBT_MGD_THD4]         = {0x199,  7, 0},
  39         [DVBT_MGD_THD5]         = {0x19a,  7, 0},
  40         [DVBT_MGD_THD6]         = {0x19b,  7, 0},
  41         [DVBT_MGD_THD7]         = {0x19c,  7, 0},
  42         [DVBT_EN_CACQ_NOTCH]    = {0x161,  4, 4},
  43         [DVBT_AD_AV_REF]        = {0x009,  6, 0},
  44         [DVBT_REG_PI]           = {0x00a,  2, 0},
  45         [DVBT_PIP_ON]           = {0x021,  3, 3},
  46         [DVBT_SCALE1_B92]       = {0x292,  7, 0},
  47         [DVBT_SCALE1_B93]       = {0x293,  7, 0},
  48         [DVBT_SCALE1_BA7]       = {0x2a7,  7, 0},
  49         [DVBT_SCALE1_BA9]       = {0x2a9,  7, 0},
  50         [DVBT_SCALE1_BAA]       = {0x2aa,  7, 0},
  51         [DVBT_SCALE1_BAB]       = {0x2ab,  7, 0},
  52         [DVBT_SCALE1_BAC]       = {0x2ac,  7, 0},
  53         [DVBT_SCALE1_BB0]       = {0x2b0,  7, 0},
  54         [DVBT_SCALE1_BB1]       = {0x2b1,  7, 0},
  55         [DVBT_KB_P1]            = {0x164,  3, 1},
  56         [DVBT_KB_P2]            = {0x164,  6, 4},
  57         [DVBT_KB_P3]            = {0x165,  2, 0},
  58         [DVBT_OPT_ADC_IQ]       = {0x006,  5, 4},
  59         [DVBT_AD_AVI]           = {0x009,  1, 0},
  60         [DVBT_AD_AVQ]           = {0x009,  3, 2},
  61         [DVBT_K1_CR_STEP12]     = {0x2ad,  9, 4},
  62         [DVBT_TRK_KS_P2]        = {0x16f,  2, 0},
  63         [DVBT_TRK_KS_I2]        = {0x170,  5, 3},
  64         [DVBT_TR_THD_SET2]      = {0x172,  3, 0},
  65         [DVBT_TRK_KC_P2]        = {0x173,  5, 3},
  66         [DVBT_TRK_KC_I2]        = {0x175,  2, 0},
  67         [DVBT_CR_THD_SET2]      = {0x176,  7, 6},
  68         [DVBT_PSET_IFFREQ]      = {0x119, 21, 0},
  69         [DVBT_SPEC_INV]         = {0x115,  0, 0},
  70         [DVBT_RSAMP_RATIO]      = {0x19f, 27, 2},
  71         [DVBT_CFREQ_OFF_RATIO]  = {0x19d, 23, 4},
  72         [DVBT_FSM_STAGE]        = {0x351,  6, 3},
  73         [DVBT_RX_CONSTEL]       = {0x33c,  3, 2},
  74         [DVBT_RX_HIER]          = {0x33c,  6, 4},
  75         [DVBT_RX_C_RATE_LP]     = {0x33d,  2, 0},
  76         [DVBT_RX_C_RATE_HP]     = {0x33d,  5, 3},
  77         [DVBT_GI_IDX]           = {0x351,  1, 0},
  78         [DVBT_FFT_MODE_IDX]     = {0x351,  2, 2},
  79         [DVBT_RSD_BER_EST]      = {0x34e, 15, 0},
  80         [DVBT_CE_EST_EVM]       = {0x40c, 15, 0},
  81         [DVBT_RF_AGC_VAL]       = {0x35b, 13, 0},
  82         [DVBT_IF_AGC_VAL]       = {0x359, 13, 0},
  83         [DVBT_DAGC_VAL]         = {0x305,  7, 0},
  84         [DVBT_SFREQ_OFF]        = {0x318, 13, 0},
  85         [DVBT_CFREQ_OFF]        = {0x35f, 17, 0},
  86         [DVBT_POLAR_RF_AGC]     = {0x00e,  1, 1},
  87         [DVBT_POLAR_IF_AGC]     = {0x00e,  0, 0},
  88         [DVBT_AAGC_HOLD]        = {0x104,  5, 5},
  89         [DVBT_EN_RF_AGC]        = {0x104,  6, 6},
  90         [DVBT_EN_IF_AGC]        = {0x104,  7, 7},
  91         [DVBT_IF_AGC_MIN]       = {0x108,  7, 0},
  92         [DVBT_IF_AGC_MAX]       = {0x109,  7, 0},
  93         [DVBT_RF_AGC_MIN]       = {0x10a,  7, 0},
  94         [DVBT_RF_AGC_MAX]       = {0x10b,  7, 0},
  95         [DVBT_IF_AGC_MAN]       = {0x10c,  6, 6},
  96         [DVBT_IF_AGC_MAN_VAL]   = {0x10c, 13, 0},
  97         [DVBT_RF_AGC_MAN]       = {0x10e,  6, 6},
  98         [DVBT_RF_AGC_MAN_VAL]   = {0x10e, 13, 0},
  99         [DVBT_DAGC_TRG_VAL]     = {0x112,  7, 0},
 100         [DVBT_AGC_TARG_VAL_0]   = {0x102,  0, 0},
 101         [DVBT_AGC_TARG_VAL_8_1] = {0x103,  7, 0},
 102         [DVBT_AAGC_LOOP_GAIN]   = {0x1c7,  5, 1},
 103         [DVBT_LOOP_GAIN2_3_0]   = {0x104,  4, 1},
 104         [DVBT_LOOP_GAIN2_4]     = {0x105,  7, 7},
 105         [DVBT_LOOP_GAIN3]       = {0x1c8,  4, 0},
 106         [DVBT_VTOP1]            = {0x106,  5, 0},
 107         [DVBT_VTOP2]            = {0x1c9,  5, 0},
 108         [DVBT_VTOP3]            = {0x1ca,  5, 0},
 109         [DVBT_KRF1]             = {0x1cb,  7, 0},
 110         [DVBT_KRF2]             = {0x107,  7, 0},
 111         [DVBT_KRF3]             = {0x1cd,  7, 0},
 112         [DVBT_KRF4]             = {0x1ce,  7, 0},
 113         [DVBT_EN_GI_PGA]        = {0x1e5,  0, 0},
 114         [DVBT_THD_LOCK_UP]      = {0x1d9,  8, 0},
 115         [DVBT_THD_LOCK_DW]      = {0x1db,  8, 0},
 116         [DVBT_THD_UP1]          = {0x1dd,  7, 0},
 117         [DVBT_THD_DW1]          = {0x1de,  7, 0},
 118         [DVBT_INTER_CNT_LEN]    = {0x1d8,  3, 0},
 119         [DVBT_GI_PGA_STATE]     = {0x1e6,  3, 3},
 120         [DVBT_EN_AGC_PGA]       = {0x1d7,  0, 0},
 121         [DVBT_CKOUTPAR]         = {0x17b,  5, 5},
 122         [DVBT_CKOUT_PWR]        = {0x17b,  6, 6},
 123         [DVBT_SYNC_DUR]         = {0x17b,  7, 7},
 124         [DVBT_ERR_DUR]          = {0x17c,  0, 0},
 125         [DVBT_SYNC_LVL]         = {0x17c,  1, 1},
 126         [DVBT_ERR_LVL]          = {0x17c,  2, 2},
 127         [DVBT_VAL_LVL]          = {0x17c,  3, 3},
 128         [DVBT_SERIAL]           = {0x17c,  4, 4},
 129         [DVBT_SER_LSB]          = {0x17c,  5, 5},
 130         [DVBT_CDIV_PH0]         = {0x17d,  3, 0},
 131         [DVBT_CDIV_PH1]         = {0x17d,  7, 4},
 132         [DVBT_MPEG_IO_OPT_2_2]  = {0x006,  7, 7},
 133         [DVBT_MPEG_IO_OPT_1_0]  = {0x007,  7, 6},
 134         [DVBT_CKOUTPAR_PIP]     = {0x0b7,  4, 4},
 135         [DVBT_CKOUT_PWR_PIP]    = {0x0b7,  3, 3},
 136         [DVBT_SYNC_LVL_PIP]     = {0x0b7,  2, 2},
 137         [DVBT_ERR_LVL_PIP]      = {0x0b7,  1, 1},
 138         [DVBT_VAL_LVL_PIP]      = {0x0b7,  0, 0},
 139         [DVBT_CKOUTPAR_PID]     = {0x0b9,  4, 4},
 140         [DVBT_CKOUT_PWR_PID]    = {0x0b9,  3, 3},
 141         [DVBT_SYNC_LVL_PID]     = {0x0b9,  2, 2},
 142         [DVBT_ERR_LVL_PID]      = {0x0b9,  1, 1},
 143         [DVBT_VAL_LVL_PID]      = {0x0b9,  0, 0},
 144         [DVBT_SM_PASS]          = {0x193, 11, 0},
 145         [DVBT_AD7_SETTING]      = {0x011, 15, 0},
 146         [DVBT_RSSI_R]           = {0x301,  6, 0},
 147         [DVBT_ACI_DET_IND]      = {0x312,  0, 0},
 148         [DVBT_REG_MON]          = {0x00d,  1, 0},
 149         [DVBT_REG_MONSEL]       = {0x00d,  2, 2},
 150         [DVBT_REG_GPE]          = {0x00d,  7, 7},
 151         [DVBT_REG_GPO]          = {0x010,  0, 0},
 152         [DVBT_REG_4MSEL]        = {0x013,  0, 0},
 153 };
 154
 155 /* Our regmap is bypassing I2C adapter lock, thus we do it! */
 156 int rtl2832_bulk_write(struct i2c_client *client, unsigned int reg,
 157                        const void *val, size_t val_count)
 158 {
 159         struct rtl2832_dev *dev = i2c_get_clientdata(client);
 160         int ret;
 161
 162         i2c_lock_adapter(client->adapter);
 163         ret = regmap_bulk_write(dev->regmap, reg, val, val_count);
 164         i2c_unlock_adapter(client->adapter);
 165         return ret;
 166 }
 167
 168 int rtl2832_update_bits(struct i2c_client *client, unsigned int reg,
 169                         unsigned int mask, unsigned int val)
 170 {
 171         struct rtl2832_dev *dev = i2c_get_clientdata(client);
 172         int ret;
 173
 174         i2c_lock_adapter(client->adapter);
 175         ret = regmap_update_bits(dev->regmap, reg, mask, val);
 176         i2c_unlock_adapter(client->adapter);
 177         return ret;
 178 }
 179
 180 int rtl2832_bulk_read(struct i2c_client *client, unsigned int reg, void *val,
 181                       size_t val_count)
 182 {
 183         struct rtl2832_dev *dev = i2c_get_clientdata(client);
 184         int ret;
 185
 186         i2c_lock_adapter(client->adapter);
 187         ret = regmap_bulk_read(dev->regmap, reg, val, val_count);
 188         i2c_unlock_adapter(client->adapter);
 189         return ret;
 190 }
 191
 192 static int rtl2832_rd_demod_reg(struct rtl2832_dev *dev, int reg, u32 *val)
 193 {
 194         struct i2c_client *client = dev->client;
 195         int ret, i;
 196         u16 reg_start_addr;
 197         u8 msb, lsb, reading[4], len;
 198         u32 reading_tmp, mask;
 199
 200         reg_start_addr = registers[reg].start_address;
 201         msb = registers[reg].msb;
 202         lsb = registers[reg].lsb;
 203         len = (msb >> 3) + 1;
 204         mask = REG_MASK(msb - lsb);
 205
 206         ret = rtl2832_bulk_read(client, reg_start_addr, reading, len);
 207         if (ret)
 208                 goto err;
 209
 210         reading_tmp = 0;
 211         for (i = 0; i < len; i++)
 212                 reading_tmp |= reading[i] << ((len - 1 - i) * 8);
 213
 214         *val = (reading_tmp >> lsb) & mask;
 215
 216         return 0;
 217 err:
 218         dev_dbg(&client->dev, "failed=%d\n", ret);
 219         return ret;
 220 }
 221
 222 static int rtl2832_wr_demod_reg(struct rtl2832_dev *dev, int reg, u32 val)
 223 {
 224         struct i2c_client *client = dev->client;
 225         int ret, i;
 226         u16 reg_start_addr;
 227         u8 msb, lsb, reading[4], writing[4], len;
 228         u32 reading_tmp, writing_tmp, mask;
 229
 230         reg_start_addr = registers[reg].start_address;
 231         msb = registers[reg].msb;
 232         lsb = registers[reg].lsb;
 233         len = (msb >> 3) + 1;
 234         mask = REG_MASK(msb - lsb);
 235
 236         ret = rtl2832_bulk_read(client, reg_start_addr, reading, len);
 237         if (ret)
 238                 goto err;
 239
 240         reading_tmp = 0;
 241         for (i = 0; i < len; i++)
 242                 reading_tmp |= reading[i] << ((len - 1 - i) * 8);
 243
 244         writing_tmp = reading_tmp & ~(mask << lsb);
 245         writing_tmp |= ((val & mask) << lsb);
 246
 247         for (i = 0; i < len; i++)
 248                 writing[i] = (writing_tmp >> ((len - 1 - i) * 8)) & 0xff;
 249
 250         ret = rtl2832_bulk_write(client, reg_start_addr, writing, len);
 251         if (ret)
 252                 goto err;
 253
 254         return 0;
 255 err:
 256         dev_dbg(&client->dev, "failed=%d\n", ret);
 257         return ret;
 258 }
 259
 260 static int rtl2832_set_if(struct dvb_frontend *fe, u32 if_freq)
 261 {
 262         struct rtl2832_dev *dev = fe->demodulator_priv;
 263         struct i2c_client *client = dev->client;
 264         int ret;
 265         u64 pset_iffreq;
 266         u8 en_bbin = (if_freq == 0 ? 0x1 : 0x0);
 267
 268         /*
 269         * PSET_IFFREQ = - floor((IfFreqHz % CrystalFreqHz) * pow(2, 22)
 270         *               / CrystalFreqHz)
 271         */
 272         pset_iffreq = if_freq % dev->pdata->clk;
 273         pset_iffreq *= 0x400000;
 274         pset_iffreq = div_u64(pset_iffreq, dev->pdata->clk);
 275         pset_iffreq = -pset_iffreq;
 276         pset_iffreq = pset_iffreq & 0x3fffff;
 277         dev_dbg(&client->dev, "if_frequency=%d pset_iffreq=%08x\n",
 278                 if_freq, (unsigned)pset_iffreq);
 279
 280         ret = rtl2832_wr_demod_reg(dev, DVBT_EN_BBIN, en_bbin);
 281         if (ret)
 282                 goto err;
 283
 284         ret = rtl2832_wr_demod_reg(dev, DVBT_PSET_IFFREQ, pset_iffreq);
 285         if (ret)
 286                 goto err;
 287
 288         return 0;
 289 err:
 290         dev_dbg(&client->dev, "failed=%d\n", ret);
 291         return ret;
 292 }
 293
 294 static int rtl2832_init(struct dvb_frontend *fe)
 295 {
 296         struct rtl2832_dev *dev = fe->demodulator_priv;
 297         struct i2c_client *client = dev->client;
 298         struct dtv_frontend_properties *c = &dev->fe.dtv_property_cache;
 299         const struct rtl2832_reg_value *init;
 300         int i, ret, len;
 301         /* initialization values for the demodulator registers */
 302         struct rtl2832_reg_value rtl2832_initial_regs[] = {
 303                 {DVBT_AD_EN_REG,                0x1},
 304                 {DVBT_AD_EN_REG1,               0x1},
 305                 {DVBT_RSD_BER_FAIL_VAL,         0x2800},
 306                 {DVBT_MGD_THD0,                 0x10},
 307                 {DVBT_MGD_THD1,                 0x20},
 308                 {DVBT_MGD_THD2,                 0x20},
 309                 {DVBT_MGD_THD3,                 0x40},
 310                 {DVBT_MGD_THD4,                 0x22},
 311                 {DVBT_MGD_THD5,                 0x32},
 312                 {DVBT_MGD_THD6,                 0x37},
 313                 {DVBT_MGD_THD7,                 0x39},
 314                 {DVBT_EN_BK_TRK,                0x0},
 315                 {DVBT_EN_CACQ_NOTCH,            0x0},
 316                 {DVBT_AD_AV_REF,                0x2a},
 317                 {DVBT_REG_PI,                   0x6},
 318                 {DVBT_PIP_ON,                   0x0},
 319                 {DVBT_CDIV_PH0,                 0x8},
 320                 {DVBT_CDIV_PH1,                 0x8},
 321                 {DVBT_SCALE1_B92,               0x4},
 322                 {DVBT_SCALE1_B93,               0xb0},
 323                 {DVBT_SCALE1_BA7,               0x78},
 324                 {DVBT_SCALE1_BA9,               0x28},
 325                 {DVBT_SCALE1_BAA,               0x59},
 326                 {DVBT_SCALE1_BAB,               0x83},
 327                 {DVBT_SCALE1_BAC,               0xd4},
 328                 {DVBT_SCALE1_BB0,               0x65},
 329                 {DVBT_SCALE1_BB1,               0x43},
 330                 {DVBT_KB_P1,                    0x1},
 331                 {DVBT_KB_P2,                    0x4},
 332                 {DVBT_KB_P3,                    0x7},
 333                 {DVBT_K1_CR_STEP12,             0xa},
 334                 {DVBT_REG_GPE,                  0x1},
 335                 {DVBT_SERIAL,                   0x0},
 336                 {DVBT_CDIV_PH0,                 0x9},
 337                 {DVBT_CDIV_PH1,                 0x9},
 338                 {DVBT_MPEG_IO_OPT_2_2,          0x0},
 339                 {DVBT_MPEG_IO_OPT_1_0,          0x0},
 340                 {DVBT_TRK_KS_P2,                0x4},
 341                 {DVBT_TRK_KS_I2,                0x7},
 342                 {DVBT_TR_THD_SET2,              0x6},
 343                 {DVBT_TRK_KC_I2,                0x5},
 344                 {DVBT_CR_THD_SET2,              0x1},
 345         };
 346
 347         dev_dbg(&client->dev, "\n");
 348
 349         for (i = 0; i < ARRAY_SIZE(rtl2832_initial_regs); i++) {
 350                 ret = rtl2832_wr_demod_reg(dev, rtl2832_initial_regs[i].reg,
 351                         rtl2832_initial_regs[i].value);
 352                 if (ret)
 353                         goto err;
 354         }
 355
 356         /* load tuner specific settings */
 357         dev_dbg(&client->dev, "load settings for tuner=%02x\n",
 358                 dev->pdata->tuner);
 359         switch (dev->pdata->tuner) {
 360         case RTL2832_TUNER_FC0012:
 361         case RTL2832_TUNER_FC0013:
 362                 len = ARRAY_SIZE(rtl2832_tuner_init_fc0012);
 363                 init = rtl2832_tuner_init_fc0012;
 364                 break;
 365         case RTL2832_TUNER_TUA9001:
 366                 len = ARRAY_SIZE(rtl2832_tuner_init_tua9001);
 367                 init = rtl2832_tuner_init_tua9001;
 368                 break;
 369         case RTL2832_TUNER_E4000:
 370                 len = ARRAY_SIZE(rtl2832_tuner_init_e4000);
 371                 init = rtl2832_tuner_init_e4000;
 372                 break;
 373         case RTL2832_TUNER_R820T:
 374         case RTL2832_TUNER_R828D:
 375                 len = ARRAY_SIZE(rtl2832_tuner_init_r820t);
 376                 init = rtl2832_tuner_init_r820t;
 377                 break;
 378         default:
 379                 ret = -EINVAL;
 380                 goto err;
 381         }
 382
 383         for (i = 0; i < len; i++) {
 384                 ret = rtl2832_wr_demod_reg(dev, init[i].reg, init[i].value);
 385                 if (ret)
 386                         goto err;
 387         }
 388
 389         /* init stats here in order signal app which stats are supported */
 390         c->strength.len = 1;
 391         c->strength.stat[0].scale = FE_SCALE_NOT_AVAILABLE;
 392         c->cnr.len = 1;
 393         c->cnr.stat[0].scale = FE_SCALE_NOT_AVAILABLE;
 394         c->post_bit_error.len = 1;
 395         c->post_bit_error.stat[0].scale = FE_SCALE_NOT_AVAILABLE;
 396         c->post_bit_count.len = 1;
 397         c->post_bit_count.stat[0].scale = FE_SCALE_NOT_AVAILABLE;
 398         /* start statistics polling */
 399         schedule_delayed_work(&dev->stat_work, msecs_to_jiffies(2000));
 400         dev->sleeping = false;
 401
 402         return 0;
 403 err:
 404         dev_dbg(&client->dev, "failed=%d\n", ret);
 405         return ret;
 406 }
 407
 408 static int rtl2832_sleep(struct dvb_frontend *fe)
 409 {
 410         struct rtl2832_dev *dev = fe->demodulator_priv;
 411         struct i2c_client *client = dev->client;
 412
 413         dev_dbg(&client->dev, "\n");
 414         dev->sleeping = true;
 415         /* stop statistics polling */
 416         cancel_delayed_work_sync(&dev->stat_work);
 417         dev->fe_status = 0;
 418         return 0;
 419 }
 420
 421 static int rtl2832_get_tune_settings(struct dvb_frontend *fe,
 422         struct dvb_frontend_tune_settings *s)
 423 {
 424         struct rtl2832_dev *dev = fe->demodulator_priv;
 425         struct i2c_client *client = dev->client;
 426
 427         dev_dbg(&client->dev, "\n");
 428         s->min_delay_ms = 1000;
 429         s->step_size = fe->ops.info.frequency_stepsize * 2;
 430         s->max_drift = (fe->ops.info.frequency_stepsize * 2) + 1;
 431         return 0;
 432 }
 433
 434 static int rtl2832_set_frontend(struct dvb_frontend *fe)
 435 {
 436         struct rtl2832_dev *dev = fe->demodulator_priv;
 437         struct i2c_client *client = dev->client;
 438         struct dtv_frontend_properties *c = &fe->dtv_property_cache;
 439         int ret, i, j;
 440         u64 bw_mode, num, num2;
 441         u32 resamp_ratio, cfreq_off_ratio;
 442         static u8 bw_params[3][32] = {
 443         /* 6 MHz bandwidth */
 444                 {
 445                 0xf5, 0xff, 0x15, 0x38, 0x5d, 0x6d, 0x52, 0x07, 0xfa, 0x2f,
 446                 0x53, 0xf5, 0x3f, 0xca, 0x0b, 0x91, 0xea, 0x30, 0x63, 0xb2,
 447                 0x13, 0xda, 0x0b, 0xc4, 0x18, 0x7e, 0x16, 0x66, 0x08, 0x67,
 448                 0x19, 0xe0,
 449                 },
 450
 451         /*  7 MHz bandwidth */
 452                 {
 453                 0xe7, 0xcc, 0xb5, 0xba, 0xe8, 0x2f, 0x67, 0x61, 0x00, 0xaf,
 454                 0x86, 0xf2, 0xbf, 0x59, 0x04, 0x11, 0xb6, 0x33, 0xa4, 0x30,
 455                 0x15, 0x10, 0x0a, 0x42, 0x18, 0xf8, 0x17, 0xd9, 0x07, 0x22,
 456                 0x19, 0x10,
 457                 },
 458
 459         /*  8 MHz bandwidth */
 460                 {
 461                 0x09, 0xf6, 0xd2, 0xa7, 0x9a, 0xc9, 0x27, 0x77, 0x06, 0xbf,
 462                 0xec, 0xf4, 0x4f, 0x0b, 0xfc, 0x01, 0x63, 0x35, 0x54, 0xa7,
 463                 0x16, 0x66, 0x08, 0xb4, 0x19, 0x6e, 0x19, 0x65, 0x05, 0xc8,
 464                 0x19, 0xe0,
 465                 },
 466         };
 467
 468         dev_dbg(&client->dev, "frequency=%u bandwidth_hz=%u inversion=%u\n",
 469                 c->frequency, c->bandwidth_hz, c->inversion);
 470
 471         /* program tuner */
 472         if (fe->ops.tuner_ops.set_params)
 473                 fe->ops.tuner_ops.set_params(fe);
 474
 475         /* PIP mode related */
 476         ret = rtl2832_bulk_write(client, 0x192, "\x00\x0f\xff", 3);
 477         if (ret)
 478                 goto err;
 479
 480         /* If the frontend has get_if_frequency(), use it */
 481         if (fe->ops.tuner_ops.get_if_frequency) {
 482                 u32 if_freq;
 483
 484                 ret = fe->ops.tuner_ops.get_if_frequency(fe, &if_freq);
 485                 if (ret)
 486                         goto err;
 487
 488                 ret = rtl2832_set_if(fe, if_freq);
 489                 if (ret)
 490                         goto err;
 491         }
 492
 493         switch (c->bandwidth_hz) {
 494         case 6000000:
 495                 i = 0;
 496                 bw_mode = 48000000;
 497                 break;
 498         case 7000000:
 499                 i = 1;
 500                 bw_mode = 56000000;
 501                 break;
 502         case 8000000:
 503                 i = 2;
 504                 bw_mode = 64000000;
 505                 break;
 506         default:
 507                 dev_err(&client->dev, "invalid bandwidth_hz %u\n",
 508                         c->bandwidth_hz);
 509                 ret = -EINVAL;
 510                 goto err;
 511         }
 512
 513         for (j = 0; j < sizeof(bw_params[0]); j++) {
 514                 ret = rtl2832_bulk_write(client, 0x11c + j, &bw_params[i][j], 1);
 515                 if (ret)
 516                         goto err;
 517         }
 518
 519         /* calculate and set resample ratio
 520         * RSAMP_RATIO = floor(CrystalFreqHz * 7 * pow(2, 22)
 521         *       / ConstWithBandwidthMode)
 522         */
 523         num = dev->pdata->clk * 7;
 524         num *= 0x400000;
 525         num = div_u64(num, bw_mode);
 526         resamp_ratio =  num & 0x3ffffff;
 527         ret = rtl2832_wr_demod_reg(dev, DVBT_RSAMP_RATIO, resamp_ratio);
 528         if (ret)
 529                 goto err;
 530
 531         /* calculate and set cfreq off ratio
 532         * CFREQ_OFF_RATIO = - floor(ConstWithBandwidthMode * pow(2, 20)
 533         *       / (CrystalFreqHz * 7))
 534         */
 535         num = bw_mode << 20;
 536         num2 = dev->pdata->clk * 7;
 537         num = div_u64(num, num2);
 538         num = -num;
 539         cfreq_off_ratio = num & 0xfffff;
 540         ret = rtl2832_wr_demod_reg(dev, DVBT_CFREQ_OFF_RATIO, cfreq_off_ratio);
 541         if (ret)
 542                 goto err;
 543
 544         /* soft reset */
 545         ret = rtl2832_wr_demod_reg(dev, DVBT_SOFT_RST, 0x1);
 546         if (ret)
 547                 goto err;
 548
 549         ret = rtl2832_wr_demod_reg(dev, DVBT_SOFT_RST, 0x0);
 550         if (ret)
 551                 goto err;
 552
 553         return 0;
 554 err:
 555         dev_dbg(&client->dev, "failed=%d\n", ret);
 556         return ret;
 557 }
 558
 559 static int rtl2832_get_frontend(struct dvb_frontend *fe)
 560 {
 561         struct rtl2832_dev *dev = fe->demodulator_priv;
 562         struct i2c_client *client = dev->client;
 563         struct dtv_frontend_properties *c = &fe->dtv_property_cache;
 564         int ret;
 565         u8 buf[3];
 566
 567         if (dev->sleeping)
 568                 return 0;
 569
 570         ret = rtl2832_bulk_read(client, 0x33c, buf, 2);
 571         if (ret)
 572                 goto err;
 573
 574         ret = rtl2832_bulk_read(client, 0x351, &buf[2], 1);
 575         if (ret)
 576                 goto err;
 577
 578         dev_dbg(&client->dev, "TPS=%*ph\n", 3, buf);
 579
 580         switch ((buf[0] >> 2) & 3) {
 581         case 0:
 582                 c->modulation = QPSK;
 583                 break;
 584         case 1:
 585                 c->modulation = QAM_16;
 586                 break;
 587         case 2:
 588                 c->modulation = QAM_64;
 589                 break;
 590         }
 591
 592         switch ((buf[2] >> 2) & 1) {
 593         case 0:
 594                 c->transmission_mode = TRANSMISSION_MODE_2K;
 595                 break;
 596         case 1:
 597                 c->transmission_mode = TRANSMISSION_MODE_8K;
 598         }
 599
 600         switch ((buf[2] >> 0) & 3) {
 601         case 0:
 602                 c->guard_interval = GUARD_INTERVAL_1_32;
 603                 break;
 604         case 1:
 605                 c->guard_interval = GUARD_INTERVAL_1_16;
 606                 break;
 607         case 2:
 608                 c->guard_interval = GUARD_INTERVAL_1_8;
 609                 break;
 610         case 3:
 611                 c->guard_interval = GUARD_INTERVAL_1_4;
 612                 break;
 613         }
 614
 615         switch ((buf[0] >> 4) & 7) {
 616         case 0:
 617                 c->hierarchy = HIERARCHY_NONE;
 618                 break;
 619         case 1:
 620                 c->hierarchy = HIERARCHY_1;
 621                 break;
 622         case 2:
 623                 c->hierarchy = HIERARCHY_2;
 624                 break;
 625         case 3:
 626                 c->hierarchy = HIERARCHY_4;
 627                 break;
 628         }
 629
 630         switch ((buf[1] >> 3) & 7) {
 631         case 0:
 632                 c->code_rate_HP = FEC_1_2;
 633                 break;
 634         case 1:
 635                 c->code_rate_HP = FEC_2_3;
 636                 break;
 637         case 2:
 638                 c->code_rate_HP = FEC_3_4;
 639                 break;
 640         case 3:
 641                 c->code_rate_HP = FEC_5_6;
 642                 break;
 643         case 4:
 644                 c->code_rate_HP = FEC_7_8;
 645                 break;
 646         }
 647
 648         switch ((buf[1] >> 0) & 7) {
 649         case 0:
 650                 c->code_rate_LP = FEC_1_2;
 651                 break;
 652         case 1:
 653                 c->code_rate_LP = FEC_2_3;
 654                 break;
 655         case 2:
 656                 c->code_rate_LP = FEC_3_4;
 657                 break;
 658         case 3:
 659                 c->code_rate_LP = FEC_5_6;
 660                 break;
 661         case 4:
 662                 c->code_rate_LP = FEC_7_8;
 663                 break;
 664         }
 665
 666         return 0;
 667 err:
 668         dev_dbg(&client->dev, "failed=%d\n", ret);
 669         return ret;
 670 }
 671
 672 static int rtl2832_read_status(struct dvb_frontend *fe, fe_status_t *status)
 673 {
 674         struct rtl2832_dev *dev = fe->demodulator_priv;
 675         struct i2c_client *client = dev->client;
 676         int ret;
 677         u32 tmp;
 678
 679         dev_dbg(&client->dev, "\n");
 680
 681         *status = 0;
 682         if (dev->sleeping)
 683                 return 0;
 684
 685         ret = rtl2832_rd_demod_reg(dev, DVBT_FSM_STAGE, &tmp);
 686         if (ret)
 687                 goto err;
 688
 689         if (tmp == 11) {
 690                 *status |= FE_HAS_SIGNAL | FE_HAS_CARRIER |
 691                                 FE_HAS_VITERBI | FE_HAS_SYNC | FE_HAS_LOCK;
 692         } else if (tmp == 10) {
 693                 *status |= FE_HAS_SIGNAL | FE_HAS_CARRIER |
 694                                 FE_HAS_VITERBI;
 695         }
 696
 697         dev->fe_status = *status;
 698         return 0;
 699 err:
 700         dev_dbg(&client->dev, "failed=%d\n", ret);
 701         return ret;
 702 }
 703
 704 static int rtl2832_read_snr(struct dvb_frontend *fe, u16 *snr)
 705 {
 706         struct dtv_frontend_properties *c = &fe->dtv_property_cache;
 707
 708         /* report SNR in resolution of 0.1 dB */
 709         if (c->cnr.stat[0].scale == FE_SCALE_DECIBEL)
 710                 *snr = div_s64(c->cnr.stat[0].svalue, 100);
 711         else
 712                 *snr = 0;
 713
 714         return 0;
 715 }
 716
 717 static int rtl2832_read_ber(struct dvb_frontend *fe, u32 *ber)
 718 {
 719         struct rtl2832_dev *dev = fe->demodulator_priv;
 720
 721         *ber = (dev->post_bit_error - dev->post_bit_error_prev);
 722         dev->post_bit_error_prev = dev->post_bit_error;
 723
 724         return 0;
 725 }
 726
 727 static void rtl2832_stat_work(struct work_struct *work)
 728 {
 729         struct rtl2832_dev *dev = container_of(work, struct rtl2832_dev, stat_work.work);
 730         struct i2c_client *client = dev->client;
 731         struct dtv_frontend_properties *c = &dev->fe.dtv_property_cache;
 732         int ret, tmp;
 733         u8 u8tmp, buf[2];
 734         u16 u16tmp;
 735
 736         dev_dbg(&client->dev, "\n");
 737
 738         /* signal strength */
 739         if (dev->fe_status & FE_HAS_SIGNAL) {
 740                 /* read digital AGC */
 741                 ret = rtl2832_bulk_read(client, 0x305, &u8tmp, 1);
 742                 if (ret)
 743                         goto err;
 744
 745                 dev_dbg(&client->dev, "digital agc=%02x", u8tmp);
 746
 747                 u8tmp = ~u8tmp;
 748                 u16tmp = u8tmp << 8 | u8tmp << 0;
 749
 750                 c->strength.stat[0].scale = FE_SCALE_RELATIVE;
 751                 c->strength.stat[0].uvalue = u16tmp;
 752         } else {
 753                 c->strength.stat[0].scale = FE_SCALE_NOT_AVAILABLE;
 754         }
 755
 756         /* CNR */
 757         if (dev->fe_status & FE_HAS_VITERBI) {
 758                 unsigned hierarchy, constellation;
 759                 #define CONSTELLATION_NUM 3
 760                 #define HIERARCHY_NUM 4
 761                 static const u32 constant[CONSTELLATION_NUM][HIERARCHY_NUM] = {
 762                         {85387325, 85387325, 85387325, 85387325},
 763                         {86676178, 86676178, 87167949, 87795660},
 764                         {87659938, 87659938, 87885178, 88241743},
 765                 };
 766
 767                 ret = rtl2832_bulk_read(client, 0x33c, &u8tmp, 1);
 768                 if (ret)
 769                         goto err;
 770
 771                 constellation = (u8tmp >> 2) & 0x03; /* [3:2] */
 772                 if (constellation > CONSTELLATION_NUM - 1)
 773                         goto err_schedule_delayed_work;
 774
 775                 hierarchy = (u8tmp >> 4) & 0x07; /* [6:4] */
 776                 if (hierarchy > HIERARCHY_NUM - 1)
 777                         goto err_schedule_delayed_work;
 778
 779                 ret = rtl2832_bulk_read(client, 0x40c, buf, 2);
 780                 if (ret)
 781                         goto err;
 782
 783                 u16tmp = buf[0] << 8 | buf[1] << 0;
 784                 if (u16tmp)
 785                         tmp = (constant[constellation][hierarchy] -
 786                                intlog10(u16tmp)) / ((1 << 24) / 10000);
 787                 else
 788                         tmp = 0;
 789
 790                 dev_dbg(&client->dev, "cnr raw=%u\n", u16tmp);
 791
 792                 c->cnr.stat[0].scale = FE_SCALE_DECIBEL;
 793                 c->cnr.stat[0].svalue = tmp;
 794         } else {
 795                 c->cnr.stat[0].scale = FE_SCALE_NOT_AVAILABLE;
 796         }
 797
 798         /* BER */
 799         if (dev->fe_status & FE_HAS_LOCK) {
 800                 ret = rtl2832_bulk_read(client, 0x34e, buf, 2);
 801                 if (ret)
 802                         goto err;
 803
 804                 u16tmp = buf[0] << 8 | buf[1] << 0;
 805                 dev->post_bit_error += u16tmp;
 806                 dev->post_bit_count += 1000000;
 807
 808                 dev_dbg(&client->dev, "ber errors=%u total=1000000\n", u16tmp);
 809
 810                 c->post_bit_error.stat[0].scale = FE_SCALE_COUNTER;
 811                 c->post_bit_error.stat[0].uvalue = dev->post_bit_error;
 812                 c->post_bit_count.stat[0].scale = FE_SCALE_COUNTER;
 813                 c->post_bit_count.stat[0].uvalue = dev->post_bit_count;
 814         } else {
 815                 c->post_bit_error.stat[0].scale = FE_SCALE_NOT_AVAILABLE;
 816                 c->post_bit_count.stat[0].scale = FE_SCALE_NOT_AVAILABLE;
 817         }
 818
 819 err_schedule_delayed_work:
 820         schedule_delayed_work(&dev->stat_work, msecs_to_jiffies(2000));
 821         return;
 822 err:
 823         dev_dbg(&client->dev, "failed=%d\n", ret);
 824 }
 825
 826 /*
 827  * I2C gate/mux/repeater logic
 828  * We must use unlocked __i2c_transfer() here (through regmap) because of I2C
 829  * adapter lock is already taken by tuner driver.
 830  * There is delay mechanism to avoid unneeded I2C gate open / close. Gate close
 831  * is delayed here a little bit in order to see if there is sequence of I2C
 832  * messages sent to same I2C bus.
 833  */
 834 static void rtl2832_i2c_gate_work(struct work_struct *work)
 835 {
 836         struct rtl2832_dev *dev = container_of(work, struct rtl2832_dev, i2c_gate_work.work);
 837         struct i2c_client *client = dev->client;
 838         int ret;
 839
 840         /* close gate */
 841         ret = rtl2832_update_bits(dev->client, 0x101, 0x08, 0x00);
 842         if (ret)
 843                 goto err;
 844
 845         return;
 846 err:
 847         dev_dbg(&client->dev, "failed=%d\n", ret);
 848 }
 849
 850 static int rtl2832_select(struct i2c_adapter *adap, void *mux_priv, u32 chan_id)
 851 {
 852         struct rtl2832_dev *dev = mux_priv;
 853         struct i2c_client *client = dev->client;
 854         int ret;
 855
 856         /* terminate possible gate closing */
 857         cancel_delayed_work(&dev->i2c_gate_work);
 858
 859         /*
 860          * chan_id 1 is muxed adapter demod provides and chan_id 0 is demod
 861          * itself. We need open gate when request is for chan_id 1. On that case
 862          * I2C adapter lock is already taken and due to that we will use
 863          * regmap_update_bits() which does not lock again I2C adapter.
 864          */
 865         if (chan_id == 1)
 866                 ret = regmap_update_bits(dev->regmap, 0x101, 0x08, 0x08);
 867         else
 868                 ret = rtl2832_update_bits(dev->client, 0x101, 0x08, 0x00);
 869         if (ret)
 870                 goto err;
 871
 872         return 0;
 873 err:
 874         dev_dbg(&client->dev, "failed=%d\n", ret);
 875         return ret;
 876 }
 877
 878 static int rtl2832_deselect(struct i2c_adapter *adap, void *mux_priv,
 879                             u32 chan_id)
 880 {
 881         struct rtl2832_dev *dev = mux_priv;
 882
 883         schedule_delayed_work(&dev->i2c_gate_work, usecs_to_jiffies(100));
 884         return 0;
 885 }
 886
 887 static struct dvb_frontend_ops rtl2832_ops = {
 888         .delsys = { SYS_DVBT },
 889         .info = {
 890                 .name = "Realtek RTL2832 (DVB-T)",
 891                 .frequency_min    = 174000000,
 892                 .frequency_max    = 862000000,
 893                 .frequency_stepsize = 166667,
 894                 .caps = FE_CAN_FEC_1_2 |
 895                         FE_CAN_FEC_2_3 |
 896                         FE_CAN_FEC_3_4 |
 897                         FE_CAN_FEC_5_6 |
 898                         FE_CAN_FEC_7_8 |
 899                         FE_CAN_FEC_AUTO |
 900                         FE_CAN_QPSK |
 901                         FE_CAN_QAM_16 |
 902                         FE_CAN_QAM_64 |
 903                         FE_CAN_QAM_AUTO |
 904                         FE_CAN_TRANSMISSION_MODE_AUTO |
 905                         FE_CAN_GUARD_INTERVAL_AUTO |
 906                         FE_CAN_HIERARCHY_AUTO |
 907                         FE_CAN_RECOVER |
 908                         FE_CAN_MUTE_TS
 909          },
 910
 911         .init = rtl2832_init,
 912         .sleep = rtl2832_sleep,
 913
 914         .get_tune_settings = rtl2832_get_tune_settings,
 915
 916         .set_frontend = rtl2832_set_frontend,
 917         .get_frontend = rtl2832_get_frontend,
 918
 919         .read_status = rtl2832_read_status,
 920         .read_snr = rtl2832_read_snr,
 921         .read_ber = rtl2832_read_ber,
 922 };
 923
 924 static bool rtl2832_volatile_reg(struct device *dev, unsigned int reg)
 925 {
 926         switch (reg) {
 927         case 0x305:
 928         case 0x33c:
 929         case 0x34e:
 930         case 0x351:
 931         case 0x40c ... 0x40d:
 932                 return true;
 933         default:
 934                 break;
 935         }
 936
 937         return false;
 938 }
 939
 940 /*
 941  * We implement own I2C access routines for regmap in order to get manual access
 942  * to I2C adapter lock, which is needed for I2C mux adapter.
 943  */
 944 static int rtl2832_regmap_read(void *context, const void *reg_buf,
 945                                size_t reg_size, void *val_buf, size_t val_size)
 946 {
 947         struct i2c_client *client = context;
 948         int ret;
 949         struct i2c_msg msg[2] = {
 950                 {
 951                         .addr = client->addr,
 952                         .flags = 0,
 953                         .len = reg_size,
 954                         .buf = (u8 *)reg_buf,
 955                 }, {
 956                         .addr = client->addr,
 957                         .flags = I2C_M_RD,
 958                         .len = val_size,
 959                         .buf = val_buf,
 960                 }
 961         };
 962
 963         ret = __i2c_transfer(client->adapter, msg, 2);
 964         if (ret != 2) {
 965                 dev_warn(&client->dev, "i2c reg read failed %d\n", ret);
 966                 if (ret >= 0)
 967                         ret = -EREMOTEIO;
 968                 return ret;
 969         }
 970         return 0;
 971 }
 972
 973 static int rtl2832_regmap_write(void *context, const void *data, size_t count)
 974 {
 975         struct i2c_client *client = context;
 976         int ret;
 977         struct i2c_msg msg[1] = {
 978                 {
 979                         .addr = client->addr,
 980                         .flags = 0,
 981                         .len = count,
 982                         .buf = (u8 *)data,
 983                 }
 984         };
 985
 986         ret = __i2c_transfer(client->adapter, msg, 1);
 987         if (ret != 1) {
 988                 dev_warn(&client->dev, "i2c reg write failed %d\n", ret);
 989                 if (ret >= 0)
 990                         ret = -EREMOTEIO;
 991                 return ret;
 992         }
 993         return 0;
 994 }
 995
 996 static int rtl2832_regmap_gather_write(void *context, const void *reg,
 997                                        size_t reg_len, const void *val,
 998                                        size_t val_len)
 999 {
1000         struct i2c_client *client = context;
1001         int ret;
1002         u8 buf[256];
1003         struct i2c_msg msg[1] = {
1004                 {
1005                         .addr = client->addr,
1006                         .flags = 0,
1007                         .len = 1 + val_len,
1008                         .buf = buf,
1009                 }
1010         };
1011
1012         buf[0] = *(u8 const *)reg;
1013         memcpy(&buf[1], val, val_len);
1014
1015         ret = __i2c_transfer(client->adapter, msg, 1);
1016         if (ret != 1) {
1017                 dev_warn(&client->dev, "i2c reg write failed %d\n", ret);
1018                 if (ret >= 0)
1019                         ret = -EREMOTEIO;
1020                 return ret;
1021         }
1022         return 0;
1023 }
1024
1025 static struct dvb_frontend *rtl2832_get_dvb_frontend(struct i2c_client *client)
1026 {
1027         struct rtl2832_dev *dev = i2c_get_clientdata(client);
1028
1029         dev_dbg(&client->dev, "\n");
1030         return &dev->fe;
1031 }
1032
1033 static struct i2c_adapter *rtl2832_get_i2c_adapter(struct i2c_client *client)
1034 {
1035         struct rtl2832_dev *dev = i2c_get_clientdata(client);
1036
1037         dev_dbg(&client->dev, "\n");
1038         return dev->i2c_adapter_tuner;
1039 }
1040
1041 static int rtl2832_enable_slave_ts(struct i2c_client *client)
1042 {
1043         struct rtl2832_dev *dev = i2c_get_clientdata(client);
1044         int ret;
1045
1046         dev_dbg(&client->dev, "\n");
1047
1048         ret = rtl2832_bulk_write(client, 0x10c, "\x5f\xff", 2);
1049         if (ret)
1050                 goto err;
1051
1052         ret = rtl2832_wr_demod_reg(dev, DVBT_PIP_ON, 0x1);
1053         if (ret)
1054                 goto err;
1055
1056         ret = rtl2832_bulk_write(client, 0x0bc, "\x18", 1);
1057         if (ret)
1058                 goto err;
1059
1060         ret = rtl2832_bulk_write(client, 0x022, "\x01", 1);
1061         if (ret)
1062                 goto err;
1063
1064         ret = rtl2832_bulk_write(client, 0x026, "\x1f", 1);
1065         if (ret)
1066                 goto err;
1067
1068         ret = rtl2832_bulk_write(client, 0x027, "\xff", 1);
1069         if (ret)
1070                 goto err;
1071
1072         ret = rtl2832_bulk_write(client, 0x192, "\x7f\xf7\xff", 3);
1073         if (ret)
1074                 goto err;
1075
1076         /* soft reset */
1077         ret = rtl2832_wr_demod_reg(dev, DVBT_SOFT_RST, 0x1);
1078         if (ret)
1079                 goto err;
1080
1081         ret = rtl2832_wr_demod_reg(dev, DVBT_SOFT_RST, 0x0);
1082         if (ret)
1083                 goto err;
1084
1085         return 0;
1086 err:
1087         dev_dbg(&client->dev, "failed=%d\n", ret);
1088         return ret;
1089 }
1090
1091 static int rtl2832_pid_filter_ctrl(struct dvb_frontend *fe, int onoff)
1092 {
1093         struct rtl2832_dev *dev = fe->demodulator_priv;
1094         struct i2c_client *client = dev->client;
1095         int ret;
1096         u8 u8tmp;
1097
1098         dev_dbg(&client->dev, "onoff=%d\n", onoff);
1099
1100         /* enable / disable PID filter */
1101         if (onoff)
1102                 u8tmp = 0x80;
1103         else
1104                 u8tmp = 0x00;
1105
1106         ret = rtl2832_update_bits(client, 0x061, 0xc0, u8tmp);
1107         if (ret)
1108                 goto err;
1109
1110         return 0;
1111 err:
1112         dev_dbg(&client->dev, "failed=%d\n", ret);
1113         return ret;
1114 }
1115
1116 static int rtl2832_pid_filter(struct dvb_frontend *fe, u8 index, u16 pid,
1117                               int onoff)
1118 {
1119         struct rtl2832_dev *dev = fe->demodulator_priv;
1120         struct i2c_client *client = dev->client;
1121         int ret;
1122         u8 buf[4];
1123
1124         dev_dbg(&client->dev, "index=%d pid=%04x onoff=%d\n",
1125                 index, pid, onoff);
1126
1127         /* skip invalid PIDs (0x2000) */
1128         if (pid > 0x1fff || index > 32)
1129                 return 0;
1130
1131         if (onoff)
1132                 set_bit(index, &dev->filters);
1133         else
1134                 clear_bit(index, &dev->filters);
1135
1136         /* enable / disable PIDs */
1137         buf[0] = (dev->filters >>  0) & 0xff;
1138         buf[1] = (dev->filters >>  8) & 0xff;
1139         buf[2] = (dev->filters >> 16) & 0xff;
1140         buf[3] = (dev->filters >> 24) & 0xff;
1141         ret = rtl2832_bulk_write(client, 0x062, buf, 4);
1142         if (ret)
1143                 goto err;
1144
1145         /* add PID */
1146         buf[0] = (pid >> 8) & 0xff;
1147         buf[1] = (pid >> 0) & 0xff;
1148         ret = rtl2832_bulk_write(client, 0x066 + 2 * index, buf, 2);
1149         if (ret)
1150                 goto err;
1151
1152         return 0;
1153 err:
1154         dev_dbg(&client->dev, "failed=%d\n", ret);
1155         return ret;
1156 }
1157
1158 static int rtl2832_probe(struct i2c_client *client,
1159                 const struct i2c_device_id *id)
1160 {
1161         struct rtl2832_platform_data *pdata = client->dev.platform_data;
1162         struct i2c_adapter *i2c = client->adapter;
1163         struct rtl2832_dev *dev;
1164         int ret;
1165         u8 tmp;
1166         static const struct regmap_bus regmap_bus = {
1167                 .read = rtl2832_regmap_read,
1168                 .write = rtl2832_regmap_write,
1169                 .gather_write = rtl2832_regmap_gather_write,
1170                 .val_format_endian_default = REGMAP_ENDIAN_NATIVE,
1171         };
1172         static const struct regmap_range_cfg regmap_range_cfg[] = {
1173                 {
1174                         .selector_reg     = 0x00,
1175                         .selector_mask    = 0xff,
1176                         .selector_shift   = 0,
1177                         .window_start     = 0,
1178                         .window_len       = 0x100,
1179                         .range_min        = 0 * 0x100,
1180                         .range_max        = 5 * 0x100,
1181                 },
1182         };
1183         static const struct regmap_config regmap_config = {
1184                 .reg_bits    =  8,
1185                 .val_bits    =  8,
1186                 .volatile_reg = rtl2832_volatile_reg,
1187                 .max_register = 5 * 0x100,
1188                 .ranges = regmap_range_cfg,
1189                 .num_ranges = ARRAY_SIZE(regmap_range_cfg),
1190                 .cache_type = REGCACHE_RBTREE,
1191         };
1192
1193         dev_dbg(&client->dev, "\n");
1194
1195         /* allocate memory for the internal state */
1196         dev = kzalloc(sizeof(struct rtl2832_dev), GFP_KERNEL);
1197         if (dev == NULL) {
1198                 ret = -ENOMEM;
1199                 goto err;
1200         }
1201
1202         /* setup the state */
1203         i2c_set_clientdata(client, dev);
1204         dev->client = client;
1205         dev->pdata = client->dev.platform_data;
1206         dev->sleeping = true;
1207         INIT_DELAYED_WORK(&dev->i2c_gate_work, rtl2832_i2c_gate_work);
1208         INIT_DELAYED_WORK(&dev->stat_work, rtl2832_stat_work);
1209         /* create regmap */
1210         dev->regmap = regmap_init(&client->dev, &regmap_bus, client,
1211                                   &regmap_config);
1212         if (IS_ERR(dev->regmap)) {
1213                 ret = PTR_ERR(dev->regmap);
1214                 goto err_kfree;
1215         }
1216         /* create muxed i2c adapter for demod itself */
1217         dev->i2c_adapter = i2c_add_mux_adapter(i2c, &i2c->dev, dev, 0, 0, 0,
1218                         rtl2832_select, NULL);
1219         if (dev->i2c_adapter == NULL) {
1220                 ret = -ENODEV;
1221                 goto err_regmap_exit;
1222         }
1223
1224         /* check if the demod is there */
1225         ret = rtl2832_bulk_read(client, 0x000, &tmp, 1);
1226         if (ret)
1227                 goto err_i2c_del_mux_adapter;
1228
1229         /* create muxed i2c adapter for demod tuner bus */
1230         dev->i2c_adapter_tuner = i2c_add_mux_adapter(i2c, &i2c->dev, dev,
1231                         0, 1, 0, rtl2832_select, rtl2832_deselect);
1232         if (dev->i2c_adapter_tuner == NULL) {
1233                 ret = -ENODEV;
1234                 goto err_i2c_del_mux_adapter;
1235         }
1236
1237         /* create dvb_frontend */
1238         memcpy(&dev->fe.ops, &rtl2832_ops, sizeof(struct dvb_frontend_ops));
1239         dev->fe.demodulator_priv = dev;
1240
1241         /* setup callbacks */
1242         pdata->get_dvb_frontend = rtl2832_get_dvb_frontend;
1243         pdata->get_i2c_adapter = rtl2832_get_i2c_adapter;
1244         pdata->enable_slave_ts = rtl2832_enable_slave_ts;
1245         pdata->pid_filter = rtl2832_pid_filter;
1246         pdata->pid_filter_ctrl = rtl2832_pid_filter_ctrl;
1247         pdata->bulk_read = rtl2832_bulk_read;
1248         pdata->bulk_write = rtl2832_bulk_write;
1249         pdata->update_bits = rtl2832_update_bits;
1250
1251         dev_info(&client->dev, "Realtek RTL2832 successfully attached\n");
1252         return 0;
1253 err_i2c_del_mux_adapter:
1254         i2c_del_mux_adapter(dev->i2c_adapter);
1255 err_regmap_exit:
1256         regmap_exit(dev->regmap);
1257 err_kfree:
1258         kfree(dev);
1259 err:
1260         dev_dbg(&client->dev, "failed=%d\n", ret);
1261         return ret;
1262 }
1263
1264 static int rtl2832_remove(struct i2c_client *client)
1265 {
1266         struct rtl2832_dev *dev = i2c_get_clientdata(client);
1267
1268         dev_dbg(&client->dev, "\n");
1269
1270         cancel_delayed_work_sync(&dev->i2c_gate_work);
1271
1272         i2c_del_mux_adapter(dev->i2c_adapter_tuner);
1273
1274         i2c_del_mux_adapter(dev->i2c_adapter);
1275
1276         regmap_exit(dev->regmap);
1277
1278         kfree(dev);
1279
1280         return 0;
1281 }
1282
1283 static const struct i2c_device_id rtl2832_id_table[] = {
1284         {"rtl2832", 0},
1285         {}
1286 };
1287 MODULE_DEVICE_TABLE(i2c, rtl2832_id_table);
1288
1289 static struct i2c_driver rtl2832_driver = {
1290         .driver = {
1291                 .owner  = THIS_MODULE,
1292                 .name   = "rtl2832",
1293         },
1294         .probe          = rtl2832_probe,
1295         .remove         = rtl2832_remove,
1296         .id_table       = rtl2832_id_table,
1297 };
1298
1299 module_i2c_driver(rtl2832_driver);
1300
1301 MODULE_AUTHOR("Thomas Mair <mair.thomas86@gmail.com>");
1302 MODULE_DESCRIPTION("Realtek RTL2832 DVB-T demodulator driver");
1303 MODULE_LICENSE("GPL");