drivers/media/dvb-frontends/rtl2832.c

   1 /*
   2  * Realtek RTL2832 DVB-T demodulator driver
   3  *
   4  * Copyright (C) 2012 Thomas Mair <thomas.mair86@gmail.com>
   5  * Copyright (C) 2012-2014 Antti Palosaari <crope@iki.fi>
   6  *
   7  *      This program is free software; you can redistribute it and/or modify
   8  *      it under the terms of the GNU General Public License as published by
   9  *      the Free Software Foundation; either version 2 of the License, or
  10  *      (at your option) any later version.
  11  *
  12  *      This program is distributed in the hope that it will be useful,
  13  *      but WITHOUT ANY WARRANTY; without even the implied warranty of
  14  *      MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  15  *      GNU General Public License for more details.
  16  *
  17  *      You should have received a copy of the GNU General Public License along
  18  *      with this program; if not, write to the Free Software Foundation, Inc.,
  19  *      51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
  20  */
  21
  22 #include "rtl2832_priv.h"
  23
  24 #define REG_MASK(b) (BIT(b + 1) - 1)
  25
  26 static const struct rtl2832_reg_entry registers[] = {
  27         [DVBT_SOFT_RST]         = {0x101,  2, 2},
  28         [DVBT_IIC_REPEAT]       = {0x101,  3, 3},
  29         [DVBT_TR_WAIT_MIN_8K]   = {0x188, 11, 2},
  30         [DVBT_RSD_BER_FAIL_VAL] = {0x18f, 15, 0},
  31         [DVBT_EN_BK_TRK]        = {0x1a6,  7, 7},
  32         [DVBT_AD_EN_REG]        = {0x008,  7, 7},
  33         [DVBT_AD_EN_REG1]       = {0x008,  6, 6},
  34         [DVBT_EN_BBIN]          = {0x1b1,  0, 0},
  35         [DVBT_MGD_THD0]         = {0x195,  7, 0},
  36         [DVBT_MGD_THD1]         = {0x196,  7, 0},
  37         [DVBT_MGD_THD2]         = {0x197,  7, 0},
  38         [DVBT_MGD_THD3]         = {0x198,  7, 0},
  39         [DVBT_MGD_THD4]         = {0x199,  7, 0},
  40         [DVBT_MGD_THD5]         = {0x19a,  7, 0},
  41         [DVBT_MGD_THD6]         = {0x19b,  7, 0},
  42         [DVBT_MGD_THD7]         = {0x19c,  7, 0},
  43         [DVBT_EN_CACQ_NOTCH]    = {0x161,  4, 4},
  44         [DVBT_AD_AV_REF]        = {0x009,  6, 0},
  45         [DVBT_REG_PI]           = {0x00a,  2, 0},
  46         [DVBT_PIP_ON]           = {0x021,  3, 3},
  47         [DVBT_SCALE1_B92]       = {0x292,  7, 0},
  48         [DVBT_SCALE1_B93]       = {0x293,  7, 0},
  49         [DVBT_SCALE1_BA7]       = {0x2a7,  7, 0},
  50         [DVBT_SCALE1_BA9]       = {0x2a9,  7, 0},
  51         [DVBT_SCALE1_BAA]       = {0x2aa,  7, 0},
  52         [DVBT_SCALE1_BAB]       = {0x2ab,  7, 0},
  53         [DVBT_SCALE1_BAC]       = {0x2ac,  7, 0},
  54         [DVBT_SCALE1_BB0]       = {0x2b0,  7, 0},
  55         [DVBT_SCALE1_BB1]       = {0x2b1,  7, 0},
  56         [DVBT_KB_P1]            = {0x164,  3, 1},
  57         [DVBT_KB_P2]            = {0x164,  6, 4},
  58         [DVBT_KB_P3]            = {0x165,  2, 0},
  59         [DVBT_OPT_ADC_IQ]       = {0x006,  5, 4},
  60         [DVBT_AD_AVI]           = {0x009,  1, 0},
  61         [DVBT_AD_AVQ]           = {0x009,  3, 2},
  62         [DVBT_K1_CR_STEP12]     = {0x2ad,  9, 4},
  63         [DVBT_TRK_KS_P2]        = {0x16f,  2, 0},
  64         [DVBT_TRK_KS_I2]        = {0x170,  5, 3},
  65         [DVBT_TR_THD_SET2]      = {0x172,  3, 0},
  66         [DVBT_TRK_KC_P2]        = {0x173,  5, 3},
  67         [DVBT_TRK_KC_I2]        = {0x175,  2, 0},
  68         [DVBT_CR_THD_SET2]      = {0x176,  7, 6},
  69         [DVBT_PSET_IFFREQ]      = {0x119, 21, 0},
  70         [DVBT_SPEC_INV]         = {0x115,  0, 0},
  71         [DVBT_RSAMP_RATIO]      = {0x19f, 27, 2},
  72         [DVBT_CFREQ_OFF_RATIO]  = {0x19d, 23, 4},
  73         [DVBT_FSM_STAGE]        = {0x351,  6, 3},
  74         [DVBT_RX_CONSTEL]       = {0x33c,  3, 2},
  75         [DVBT_RX_HIER]          = {0x33c,  6, 4},
  76         [DVBT_RX_C_RATE_LP]     = {0x33d,  2, 0},
  77         [DVBT_RX_C_RATE_HP]     = {0x33d,  5, 3},
  78         [DVBT_GI_IDX]           = {0x351,  1, 0},
  79         [DVBT_FFT_MODE_IDX]     = {0x351,  2, 2},
  80         [DVBT_RSD_BER_EST]      = {0x34e, 15, 0},
  81         [DVBT_CE_EST_EVM]       = {0x40c, 15, 0},
  82         [DVBT_RF_AGC_VAL]       = {0x35b, 13, 0},
  83         [DVBT_IF_AGC_VAL]       = {0x359, 13, 0},
  84         [DVBT_DAGC_VAL]         = {0x305,  7, 0},
  85         [DVBT_SFREQ_OFF]        = {0x318, 13, 0},
  86         [DVBT_CFREQ_OFF]        = {0x35f, 17, 0},
  87         [DVBT_POLAR_RF_AGC]     = {0x00e,  1, 1},
  88         [DVBT_POLAR_IF_AGC]     = {0x00e,  0, 0},
  89         [DVBT_AAGC_HOLD]        = {0x104,  5, 5},
  90         [DVBT_EN_RF_AGC]        = {0x104,  6, 6},
  91         [DVBT_EN_IF_AGC]        = {0x104,  7, 7},
  92         [DVBT_IF_AGC_MIN]       = {0x108,  7, 0},
  93         [DVBT_IF_AGC_MAX]       = {0x109,  7, 0},
  94         [DVBT_RF_AGC_MIN]       = {0x10a,  7, 0},
  95         [DVBT_RF_AGC_MAX]       = {0x10b,  7, 0},
  96         [DVBT_IF_AGC_MAN]       = {0x10c,  6, 6},
  97         [DVBT_IF_AGC_MAN_VAL]   = {0x10c, 13, 0},
  98         [DVBT_RF_AGC_MAN]       = {0x10e,  6, 6},
  99         [DVBT_RF_AGC_MAN_VAL]   = {0x10e, 13, 0},
 100         [DVBT_DAGC_TRG_VAL]     = {0x112,  7, 0},
 101         [DVBT_AGC_TARG_VAL_0]   = {0x102,  0, 0},
 102         [DVBT_AGC_TARG_VAL_8_1] = {0x103,  7, 0},
 103         [DVBT_AAGC_LOOP_GAIN]   = {0x1c7,  5, 1},
 104         [DVBT_LOOP_GAIN2_3_0]   = {0x104,  4, 1},
 105         [DVBT_LOOP_GAIN2_4]     = {0x105,  7, 7},
 106         [DVBT_LOOP_GAIN3]       = {0x1c8,  4, 0},
 107         [DVBT_VTOP1]            = {0x106,  5, 0},
 108         [DVBT_VTOP2]            = {0x1c9,  5, 0},
 109         [DVBT_VTOP3]            = {0x1ca,  5, 0},
 110         [DVBT_KRF1]             = {0x1cb,  7, 0},
 111         [DVBT_KRF2]             = {0x107,  7, 0},
 112         [DVBT_KRF3]             = {0x1cd,  7, 0},
 113         [DVBT_KRF4]             = {0x1ce,  7, 0},
 114         [DVBT_EN_GI_PGA]        = {0x1e5,  0, 0},
 115         [DVBT_THD_LOCK_UP]      = {0x1d9,  8, 0},
 116         [DVBT_THD_LOCK_DW]      = {0x1db,  8, 0},
 117         [DVBT_THD_UP1]          = {0x1dd,  7, 0},
 118         [DVBT_THD_DW1]          = {0x1de,  7, 0},
 119         [DVBT_INTER_CNT_LEN]    = {0x1d8,  3, 0},
 120         [DVBT_GI_PGA_STATE]     = {0x1e6,  3, 3},
 121         [DVBT_EN_AGC_PGA]       = {0x1d7,  0, 0},
 122         [DVBT_CKOUTPAR]         = {0x17b,  5, 5},
 123         [DVBT_CKOUT_PWR]        = {0x17b,  6, 6},
 124         [DVBT_SYNC_DUR]         = {0x17b,  7, 7},
 125         [DVBT_ERR_DUR]          = {0x17c,  0, 0},
 126         [DVBT_SYNC_LVL]         = {0x17c,  1, 1},
 127         [DVBT_ERR_LVL]          = {0x17c,  2, 2},
 128         [DVBT_VAL_LVL]          = {0x17c,  3, 3},
 129         [DVBT_SERIAL]           = {0x17c,  4, 4},
 130         [DVBT_SER_LSB]          = {0x17c,  5, 5},
 131         [DVBT_CDIV_PH0]         = {0x17d,  3, 0},
 132         [DVBT_CDIV_PH1]         = {0x17d,  7, 4},
 133         [DVBT_MPEG_IO_OPT_2_2]  = {0x006,  7, 7},
 134         [DVBT_MPEG_IO_OPT_1_0]  = {0x007,  7, 6},
 135         [DVBT_CKOUTPAR_PIP]     = {0x0b7,  4, 4},
 136         [DVBT_CKOUT_PWR_PIP]    = {0x0b7,  3, 3},
 137         [DVBT_SYNC_LVL_PIP]     = {0x0b7,  2, 2},
 138         [DVBT_ERR_LVL_PIP]      = {0x0b7,  1, 1},
 139         [DVBT_VAL_LVL_PIP]      = {0x0b7,  0, 0},
 140         [DVBT_CKOUTPAR_PID]     = {0x0b9,  4, 4},
 141         [DVBT_CKOUT_PWR_PID]    = {0x0b9,  3, 3},
 142         [DVBT_SYNC_LVL_PID]     = {0x0b9,  2, 2},
 143         [DVBT_ERR_LVL_PID]      = {0x0b9,  1, 1},
 144         [DVBT_VAL_LVL_PID]      = {0x0b9,  0, 0},
 145         [DVBT_SM_PASS]          = {0x193, 11, 0},
 146         [DVBT_AD7_SETTING]      = {0x011, 15, 0},
 147         [DVBT_RSSI_R]           = {0x301,  6, 0},
 148         [DVBT_ACI_DET_IND]      = {0x312,  0, 0},
 149         [DVBT_REG_MON]          = {0x00d,  1, 0},
 150         [DVBT_REG_MONSEL]       = {0x00d,  2, 2},
 151         [DVBT_REG_GPE]          = {0x00d,  7, 7},
 152         [DVBT_REG_GPO]          = {0x010,  0, 0},
 153         [DVBT_REG_4MSEL]        = {0x013,  0, 0},
 154 };
 155
 156 /* Our regmap is bypassing I2C adapter lock, thus we do it! */
 157 int rtl2832_bulk_write(struct i2c_client *client, unsigned int reg,
 158                        const void *val, size_t val_count)
 159 {
 160         struct rtl2832_dev *dev = i2c_get_clientdata(client);
 161         int ret;
 162
 163         i2c_lock_adapter(client->adapter);
 164         ret = regmap_bulk_write(dev->regmap, reg, val, val_count);
 165         i2c_unlock_adapter(client->adapter);
 166         return ret;
 167 }
 168
 169 int rtl2832_update_bits(struct i2c_client *client, unsigned int reg,
 170                         unsigned int mask, unsigned int val)
 171 {
 172         struct rtl2832_dev *dev = i2c_get_clientdata(client);
 173         int ret;
 174
 175         i2c_lock_adapter(client->adapter);
 176         ret = regmap_update_bits(dev->regmap, reg, mask, val);
 177         i2c_unlock_adapter(client->adapter);
 178         return ret;
 179 }
 180
 181 int rtl2832_bulk_read(struct i2c_client *client, unsigned int reg, void *val,
 182                       size_t val_count)
 183 {
 184         struct rtl2832_dev *dev = i2c_get_clientdata(client);
 185         int ret;
 186
 187         i2c_lock_adapter(client->adapter);
 188         ret = regmap_bulk_read(dev->regmap, reg, val, val_count);
 189         i2c_unlock_adapter(client->adapter);
 190         return ret;
 191 }
 192
 193 static int rtl2832_rd_demod_reg(struct rtl2832_dev *dev, int reg, u32 *val)
 194 {
 195         struct i2c_client *client = dev->client;
 196         int ret, i;
 197         u16 reg_start_addr;
 198         u8 msb, lsb, reading[4], len;
 199         u32 reading_tmp, mask;
 200
 201         reg_start_addr = registers[reg].start_address;
 202         msb = registers[reg].msb;
 203         lsb = registers[reg].lsb;
 204         len = (msb >> 3) + 1;
 205         mask = REG_MASK(msb - lsb);
 206
 207         ret = rtl2832_bulk_read(client, reg_start_addr, reading, len);
 208         if (ret)
 209                 goto err;
 210
 211         reading_tmp = 0;
 212         for (i = 0; i < len; i++)
 213                 reading_tmp |= reading[i] << ((len - 1 - i) * 8);
 214
 215         *val = (reading_tmp >> lsb) & mask;
 216
 217         return 0;
 218 err:
 219         dev_dbg(&client->dev, "failed=%d\n", ret);
 220         return ret;
 221 }
 222
 223 static int rtl2832_wr_demod_reg(struct rtl2832_dev *dev, int reg, u32 val)
 224 {
 225         struct i2c_client *client = dev->client;
 226         int ret, i;
 227         u16 reg_start_addr;
 228         u8 msb, lsb, reading[4], writing[4], len;
 229         u32 reading_tmp, writing_tmp, mask;
 230
 231         reg_start_addr = registers[reg].start_address;
 232         msb = registers[reg].msb;
 233         lsb = registers[reg].lsb;
 234         len = (msb >> 3) + 1;
 235         mask = REG_MASK(msb - lsb);
 236
 237         ret = rtl2832_bulk_read(client, reg_start_addr, reading, len);
 238         if (ret)
 239                 goto err;
 240
 241         reading_tmp = 0;
 242         for (i = 0; i < len; i++)
 243                 reading_tmp |= reading[i] << ((len - 1 - i) * 8);
 244
 245         writing_tmp = reading_tmp & ~(mask << lsb);
 246         writing_tmp |= ((val & mask) << lsb);
 247
 248         for (i = 0; i < len; i++)
 249                 writing[i] = (writing_tmp >> ((len - 1 - i) * 8)) & 0xff;
 250
 251         ret = rtl2832_bulk_write(client, reg_start_addr, writing, len);
 252         if (ret)
 253                 goto err;
 254
 255         return 0;
 256 err:
 257         dev_dbg(&client->dev, "failed=%d\n", ret);
 258         return ret;
 259 }
 260
 261 static int rtl2832_set_if(struct dvb_frontend *fe, u32 if_freq)
 262 {
 263         struct rtl2832_dev *dev = fe->demodulator_priv;
 264         struct i2c_client *client = dev->client;
 265         int ret;
 266         u64 pset_iffreq;
 267         u8 en_bbin = (if_freq == 0 ? 0x1 : 0x0);
 268
 269         /*
 270         * PSET_IFFREQ = - floor((IfFreqHz % CrystalFreqHz) * pow(2, 22)
 271         *               / CrystalFreqHz)
 272         */
 273         pset_iffreq = if_freq % dev->pdata->clk;
 274         pset_iffreq *= 0x400000;
 275         pset_iffreq = div_u64(pset_iffreq, dev->pdata->clk);
 276         pset_iffreq = -pset_iffreq;
 277         pset_iffreq = pset_iffreq & 0x3fffff;
 278         dev_dbg(&client->dev, "if_frequency=%d pset_iffreq=%08x\n",
 279                 if_freq, (unsigned)pset_iffreq);
 280
 281         ret = rtl2832_wr_demod_reg(dev, DVBT_EN_BBIN, en_bbin);
 282         if (ret)
 283                 goto err;
 284
 285         ret = rtl2832_wr_demod_reg(dev, DVBT_PSET_IFFREQ, pset_iffreq);
 286         if (ret)
 287                 goto err;
 288
 289         return 0;
 290 err:
 291         dev_dbg(&client->dev, "failed=%d\n", ret);
 292         return ret;
 293 }
 294
 295 static int rtl2832_init(struct dvb_frontend *fe)
 296 {
 297         struct rtl2832_dev *dev = fe->demodulator_priv;
 298         struct i2c_client *client = dev->client;
 299         struct dtv_frontend_properties *c = &dev->fe.dtv_property_cache;
 300         const struct rtl2832_reg_value *init;
 301         int i, ret, len;
 302         /* initialization values for the demodulator registers */
 303         struct rtl2832_reg_value rtl2832_initial_regs[] = {
 304                 {DVBT_AD_EN_REG,                0x1},
 305                 {DVBT_AD_EN_REG1,               0x1},
 306                 {DVBT_RSD_BER_FAIL_VAL,         0x2800},
 307                 {DVBT_MGD_THD0,                 0x10},
 308                 {DVBT_MGD_THD1,                 0x20},
 309                 {DVBT_MGD_THD2,                 0x20},
 310                 {DVBT_MGD_THD3,                 0x40},
 311                 {DVBT_MGD_THD4,                 0x22},
 312                 {DVBT_MGD_THD5,                 0x32},
 313                 {DVBT_MGD_THD6,                 0x37},
 314                 {DVBT_MGD_THD7,                 0x39},
 315                 {DVBT_EN_BK_TRK,                0x0},
 316                 {DVBT_EN_CACQ_NOTCH,            0x0},
 317                 {DVBT_AD_AV_REF,                0x2a},
 318                 {DVBT_REG_PI,                   0x6},
 319                 {DVBT_PIP_ON,                   0x0},
 320                 {DVBT_CDIV_PH0,                 0x8},
 321                 {DVBT_CDIV_PH1,                 0x8},
 322                 {DVBT_SCALE1_B92,               0x4},
 323                 {DVBT_SCALE1_B93,               0xb0},
 324                 {DVBT_SCALE1_BA7,               0x78},
 325                 {DVBT_SCALE1_BA9,               0x28},
 326                 {DVBT_SCALE1_BAA,               0x59},
 327                 {DVBT_SCALE1_BAB,               0x83},
 328                 {DVBT_SCALE1_BAC,               0xd4},
 329                 {DVBT_SCALE1_BB0,               0x65},
 330                 {DVBT_SCALE1_BB1,               0x43},
 331                 {DVBT_KB_P1,                    0x1},
 332                 {DVBT_KB_P2,                    0x4},
 333                 {DVBT_KB_P3,                    0x7},
 334                 {DVBT_K1_CR_STEP12,             0xa},
 335                 {DVBT_REG_GPE,                  0x1},
 336                 {DVBT_SERIAL,                   0x0},
 337                 {DVBT_CDIV_PH0,                 0x9},
 338                 {DVBT_CDIV_PH1,                 0x9},
 339                 {DVBT_MPEG_IO_OPT_2_2,          0x0},
 340                 {DVBT_MPEG_IO_OPT_1_0,          0x0},
 341                 {DVBT_TRK_KS_P2,                0x4},
 342                 {DVBT_TRK_KS_I2,                0x7},
 343                 {DVBT_TR_THD_SET2,              0x6},
 344                 {DVBT_TRK_KC_I2,                0x5},
 345                 {DVBT_CR_THD_SET2,              0x1},
 346         };
 347
 348         dev_dbg(&client->dev, "\n");
 349
 350         for (i = 0; i < ARRAY_SIZE(rtl2832_initial_regs); i++) {
 351                 ret = rtl2832_wr_demod_reg(dev, rtl2832_initial_regs[i].reg,
 352                         rtl2832_initial_regs[i].value);
 353                 if (ret)
 354                         goto err;
 355         }
 356
 357         /* load tuner specific settings */
 358         dev_dbg(&client->dev, "load settings for tuner=%02x\n",
 359                 dev->pdata->tuner);
 360         switch (dev->pdata->tuner) {
 361         case RTL2832_TUNER_FC0012:
 362         case RTL2832_TUNER_FC0013:
 363                 len = ARRAY_SIZE(rtl2832_tuner_init_fc0012);
 364                 init = rtl2832_tuner_init_fc0012;
 365                 break;
 366         case RTL2832_TUNER_TUA9001:
 367                 len = ARRAY_SIZE(rtl2832_tuner_init_tua9001);
 368                 init = rtl2832_tuner_init_tua9001;
 369                 break;
 370         case RTL2832_TUNER_E4000:
 371                 len = ARRAY_SIZE(rtl2832_tuner_init_e4000);
 372                 init = rtl2832_tuner_init_e4000;
 373                 break;
 374         case RTL2832_TUNER_R820T:
 375         case RTL2832_TUNER_R828D:
 376                 len = ARRAY_SIZE(rtl2832_tuner_init_r820t);
 377                 init = rtl2832_tuner_init_r820t;
 378                 break;
 379         default:
 380                 ret = -EINVAL;
 381                 goto err;
 382         }
 383
 384         for (i = 0; i < len; i++) {
 385                 ret = rtl2832_wr_demod_reg(dev, init[i].reg, init[i].value);
 386                 if (ret)
 387                         goto err;
 388         }
 389
 390         /* init stats here in order signal app which stats are supported */
 391         c->strength.len = 1;
 392         c->strength.stat[0].scale = FE_SCALE_NOT_AVAILABLE;
 393         c->cnr.len = 1;
 394         c->cnr.stat[0].scale = FE_SCALE_NOT_AVAILABLE;
 395         c->post_bit_error.len = 1;
 396         c->post_bit_error.stat[0].scale = FE_SCALE_NOT_AVAILABLE;
 397         c->post_bit_count.len = 1;
 398         c->post_bit_count.stat[0].scale = FE_SCALE_NOT_AVAILABLE;
 399         /* start statistics polling */
 400         schedule_delayed_work(&dev->stat_work, msecs_to_jiffies(2000));
 401         dev->sleeping = false;
 402
 403         return 0;
 404 err:
 405         dev_dbg(&client->dev, "failed=%d\n", ret);
 406         return ret;
 407 }
 408
 409 static int rtl2832_sleep(struct dvb_frontend *fe)
 410 {
 411         struct rtl2832_dev *dev = fe->demodulator_priv;
 412         struct i2c_client *client = dev->client;
 413         int ret;
 414
 415         dev_dbg(&client->dev, "\n");
 416
 417         dev->sleeping = true;
 418         /* stop statistics polling */
 419         cancel_delayed_work_sync(&dev->stat_work);
 420         dev->fe_status = 0;
 421
 422         ret = rtl2832_wr_demod_reg(dev, DVBT_SOFT_RST, 0x1);
 423         if (ret)
 424                 goto err;
 425
 426         return 0;
 427 err:
 428         dev_dbg(&client->dev, "failed=%d\n", ret);
 429         return ret;
 430 }
 431
 432 static int rtl2832_get_tune_settings(struct dvb_frontend *fe,
 433         struct dvb_frontend_tune_settings *s)
 434 {
 435         struct rtl2832_dev *dev = fe->demodulator_priv;
 436         struct i2c_client *client = dev->client;
 437
 438         dev_dbg(&client->dev, "\n");
 439         s->min_delay_ms = 1000;
 440         s->step_size = fe->ops.info.frequency_stepsize * 2;
 441         s->max_drift = (fe->ops.info.frequency_stepsize * 2) + 1;
 442         return 0;
 443 }
 444
 445 static int rtl2832_set_frontend(struct dvb_frontend *fe)
 446 {
 447         struct rtl2832_dev *dev = fe->demodulator_priv;
 448         struct i2c_client *client = dev->client;
 449         struct dtv_frontend_properties *c = &fe->dtv_property_cache;
 450         int ret, i, j;
 451         u64 bw_mode, num, num2;
 452         u32 resamp_ratio, cfreq_off_ratio;
 453         static u8 bw_params[3][32] = {
 454         /* 6 MHz bandwidth */
 455                 {
 456                 0xf5, 0xff, 0x15, 0x38, 0x5d, 0x6d, 0x52, 0x07, 0xfa, 0x2f,
 457                 0x53, 0xf5, 0x3f, 0xca, 0x0b, 0x91, 0xea, 0x30, 0x63, 0xb2,
 458                 0x13, 0xda, 0x0b, 0xc4, 0x18, 0x7e, 0x16, 0x66, 0x08, 0x67,
 459                 0x19, 0xe0,
 460                 },
 461
 462         /*  7 MHz bandwidth */
 463                 {
 464                 0xe7, 0xcc, 0xb5, 0xba, 0xe8, 0x2f, 0x67, 0x61, 0x00, 0xaf,
 465                 0x86, 0xf2, 0xbf, 0x59, 0x04, 0x11, 0xb6, 0x33, 0xa4, 0x30,
 466                 0x15, 0x10, 0x0a, 0x42, 0x18, 0xf8, 0x17, 0xd9, 0x07, 0x22,
 467                 0x19, 0x10,
 468                 },
 469
 470         /*  8 MHz bandwidth */
 471                 {
 472                 0x09, 0xf6, 0xd2, 0xa7, 0x9a, 0xc9, 0x27, 0x77, 0x06, 0xbf,
 473                 0xec, 0xf4, 0x4f, 0x0b, 0xfc, 0x01, 0x63, 0x35, 0x54, 0xa7,
 474                 0x16, 0x66, 0x08, 0xb4, 0x19, 0x6e, 0x19, 0x65, 0x05, 0xc8,
 475                 0x19, 0xe0,
 476                 },
 477         };
 478
 479         dev_dbg(&client->dev, "frequency=%u bandwidth_hz=%u inversion=%u\n",
 480                 c->frequency, c->bandwidth_hz, c->inversion);
 481
 482         /* program tuner */
 483         if (fe->ops.tuner_ops.set_params)
 484                 fe->ops.tuner_ops.set_params(fe);
 485
 486         /* PIP mode related */
 487         ret = rtl2832_bulk_write(client, 0x192, "\x00\x0f\xff", 3);
 488         if (ret)
 489                 goto err;
 490
 491         /* If the frontend has get_if_frequency(), use it */
 492         if (fe->ops.tuner_ops.get_if_frequency) {
 493                 u32 if_freq;
 494
 495                 ret = fe->ops.tuner_ops.get_if_frequency(fe, &if_freq);
 496                 if (ret)
 497                         goto err;
 498
 499                 ret = rtl2832_set_if(fe, if_freq);
 500                 if (ret)
 501                         goto err;
 502         }
 503
 504         switch (c->bandwidth_hz) {
 505         case 6000000:
 506                 i = 0;
 507                 bw_mode = 48000000;
 508                 break;
 509         case 7000000:
 510                 i = 1;
 511                 bw_mode = 56000000;
 512                 break;
 513         case 8000000:
 514                 i = 2;
 515                 bw_mode = 64000000;
 516                 break;
 517         default:
 518                 dev_err(&client->dev, "invalid bandwidth_hz %u\n",
 519                         c->bandwidth_hz);
 520                 ret = -EINVAL;
 521                 goto err;
 522         }
 523
 524         for (j = 0; j < sizeof(bw_params[0]); j++) {
 525                 ret = rtl2832_bulk_write(client, 0x11c + j, &bw_params[i][j], 1);
 526                 if (ret)
 527                         goto err;
 528         }
 529
 530         /* calculate and set resample ratio
 531         * RSAMP_RATIO = floor(CrystalFreqHz * 7 * pow(2, 22)
 532         *       / ConstWithBandwidthMode)
 533         */
 534         num = dev->pdata->clk * 7;
 535         num *= 0x400000;
 536         num = div_u64(num, bw_mode);
 537         resamp_ratio =  num & 0x3ffffff;
 538         ret = rtl2832_wr_demod_reg(dev, DVBT_RSAMP_RATIO, resamp_ratio);
 539         if (ret)
 540                 goto err;
 541
 542         /* calculate and set cfreq off ratio
 543         * CFREQ_OFF_RATIO = - floor(ConstWithBandwidthMode * pow(2, 20)
 544         *       / (CrystalFreqHz * 7))
 545         */
 546         num = bw_mode << 20;
 547         num2 = dev->pdata->clk * 7;
 548         num = div_u64(num, num2);
 549         num = -num;
 550         cfreq_off_ratio = num & 0xfffff;
 551         ret = rtl2832_wr_demod_reg(dev, DVBT_CFREQ_OFF_RATIO, cfreq_off_ratio);
 552         if (ret)
 553                 goto err;
 554
 555         /* soft reset */
 556         ret = rtl2832_wr_demod_reg(dev, DVBT_SOFT_RST, 0x1);
 557         if (ret)
 558                 goto err;
 559
 560         ret = rtl2832_wr_demod_reg(dev, DVBT_SOFT_RST, 0x0);
 561         if (ret)
 562                 goto err;
 563
 564         return 0;
 565 err:
 566         dev_dbg(&client->dev, "failed=%d\n", ret);
 567         return ret;
 568 }
 569
 570 static int rtl2832_get_frontend(struct dvb_frontend *fe)
 571 {
 572         struct rtl2832_dev *dev = fe->demodulator_priv;
 573         struct i2c_client *client = dev->client;
 574         struct dtv_frontend_properties *c = &fe->dtv_property_cache;
 575         int ret;
 576         u8 buf[3];
 577
 578         if (dev->sleeping)
 579                 return 0;
 580
 581         ret = rtl2832_bulk_read(client, 0x33c, buf, 2);
 582         if (ret)
 583                 goto err;
 584
 585         ret = rtl2832_bulk_read(client, 0x351, &buf[2], 1);
 586         if (ret)
 587                 goto err;
 588
 589         dev_dbg(&client->dev, "TPS=%*ph\n", 3, buf);
 590
 591         switch ((buf[0] >> 2) & 3) {
 592         case 0:
 593                 c->modulation = QPSK;
 594                 break;
 595         case 1:
 596                 c->modulation = QAM_16;
 597                 break;
 598         case 2:
 599                 c->modulation = QAM_64;
 600                 break;
 601         }
 602
 603         switch ((buf[2] >> 2) & 1) {
 604         case 0:
 605                 c->transmission_mode = TRANSMISSION_MODE_2K;
 606                 break;
 607         case 1:
 608                 c->transmission_mode = TRANSMISSION_MODE_8K;
 609         }
 610
 611         switch ((buf[2] >> 0) & 3) {
 612         case 0:
 613                 c->guard_interval = GUARD_INTERVAL_1_32;
 614                 break;
 615         case 1:
 616                 c->guard_interval = GUARD_INTERVAL_1_16;
 617                 break;
 618         case 2:
 619                 c->guard_interval = GUARD_INTERVAL_1_8;
 620                 break;
 621         case 3:
 622                 c->guard_interval = GUARD_INTERVAL_1_4;
 623                 break;
 624         }
 625
 626         switch ((buf[0] >> 4) & 7) {
 627         case 0:
 628                 c->hierarchy = HIERARCHY_NONE;
 629                 break;
 630         case 1:
 631                 c->hierarchy = HIERARCHY_1;
 632                 break;
 633         case 2:
 634                 c->hierarchy = HIERARCHY_2;
 635                 break;
 636         case 3:
 637                 c->hierarchy = HIERARCHY_4;
 638                 break;
 639         }
 640
 641         switch ((buf[1] >> 3) & 7) {
 642         case 0:
 643                 c->code_rate_HP = FEC_1_2;
 644                 break;
 645         case 1:
 646                 c->code_rate_HP = FEC_2_3;
 647                 break;
 648         case 2:
 649                 c->code_rate_HP = FEC_3_4;
 650                 break;
 651         case 3:
 652                 c->code_rate_HP = FEC_5_6;
 653                 break;
 654         case 4:
 655                 c->code_rate_HP = FEC_7_8;
 656                 break;
 657         }
 658
 659         switch ((buf[1] >> 0) & 7) {
 660         case 0:
 661                 c->code_rate_LP = FEC_1_2;
 662                 break;
 663         case 1:
 664                 c->code_rate_LP = FEC_2_3;
 665                 break;
 666         case 2:
 667                 c->code_rate_LP = FEC_3_4;
 668                 break;
 669         case 3:
 670                 c->code_rate_LP = FEC_5_6;
 671                 break;
 672         case 4:
 673                 c->code_rate_LP = FEC_7_8;
 674                 break;
 675         }
 676
 677         return 0;
 678 err:
 679         dev_dbg(&client->dev, "failed=%d\n", ret);
 680         return ret;
 681 }
 682
 683 static int rtl2832_read_status(struct dvb_frontend *fe, fe_status_t *status)
 684 {
 685         struct rtl2832_dev *dev = fe->demodulator_priv;
 686         struct i2c_client *client = dev->client;
 687         int ret;
 688         u32 tmp;
 689
 690         dev_dbg(&client->dev, "\n");
 691
 692         *status = 0;
 693         if (dev->sleeping)
 694                 return 0;
 695
 696         ret = rtl2832_rd_demod_reg(dev, DVBT_FSM_STAGE, &tmp);
 697         if (ret)
 698                 goto err;
 699
 700         if (tmp == 11) {
 701                 *status |= FE_HAS_SIGNAL | FE_HAS_CARRIER |
 702                                 FE_HAS_VITERBI | FE_HAS_SYNC | FE_HAS_LOCK;
 703         } else if (tmp == 10) {
 704                 *status |= FE_HAS_SIGNAL | FE_HAS_CARRIER |
 705                                 FE_HAS_VITERBI;
 706         }
 707
 708         dev->fe_status = *status;
 709         return 0;
 710 err:
 711         dev_dbg(&client->dev, "failed=%d\n", ret);
 712         return ret;
 713 }
 714
 715 static int rtl2832_read_snr(struct dvb_frontend *fe, u16 *snr)
 716 {
 717         struct dtv_frontend_properties *c = &fe->dtv_property_cache;
 718
 719         /* report SNR in resolution of 0.1 dB */
 720         if (c->cnr.stat[0].scale == FE_SCALE_DECIBEL)
 721                 *snr = div_s64(c->cnr.stat[0].svalue, 100);
 722         else
 723                 *snr = 0;
 724
 725         return 0;
 726 }
 727
 728 static int rtl2832_read_ber(struct dvb_frontend *fe, u32 *ber)
 729 {
 730         struct rtl2832_dev *dev = fe->demodulator_priv;
 731
 732         *ber = (dev->post_bit_error - dev->post_bit_error_prev);
 733         dev->post_bit_error_prev = dev->post_bit_error;
 734
 735         return 0;
 736 }
 737
 738 static void rtl2832_stat_work(struct work_struct *work)
 739 {
 740         struct rtl2832_dev *dev = container_of(work, struct rtl2832_dev, stat_work.work);
 741         struct i2c_client *client = dev->client;
 742         struct dtv_frontend_properties *c = &dev->fe.dtv_property_cache;
 743         int ret, tmp;
 744         u8 u8tmp, buf[2];
 745         u16 u16tmp;
 746
 747         dev_dbg(&client->dev, "\n");
 748
 749         /* signal strength */
 750         if (dev->fe_status & FE_HAS_SIGNAL) {
 751                 /* read digital AGC */
 752                 ret = rtl2832_bulk_read(client, 0x305, &u8tmp, 1);
 753                 if (ret)
 754                         goto err;
 755
 756                 dev_dbg(&client->dev, "digital agc=%02x", u8tmp);
 757
 758                 u8tmp = ~u8tmp;
 759                 u16tmp = u8tmp << 8 | u8tmp << 0;
 760
 761                 c->strength.stat[0].scale = FE_SCALE_RELATIVE;
 762                 c->strength.stat[0].uvalue = u16tmp;
 763         } else {
 764                 c->strength.stat[0].scale = FE_SCALE_NOT_AVAILABLE;
 765         }
 766
 767         /* CNR */
 768         if (dev->fe_status & FE_HAS_VITERBI) {
 769                 unsigned hierarchy, constellation;
 770                 #define CONSTELLATION_NUM 3
 771                 #define HIERARCHY_NUM 4
 772                 static const u32 constant[CONSTELLATION_NUM][HIERARCHY_NUM] = {
 773                         {85387325, 85387325, 85387325, 85387325},
 774                         {86676178, 86676178, 87167949, 87795660},
 775                         {87659938, 87659938, 87885178, 88241743},
 776                 };
 777
 778                 ret = rtl2832_bulk_read(client, 0x33c, &u8tmp, 1);
 779                 if (ret)
 780                         goto err;
 781
 782                 constellation = (u8tmp >> 2) & 0x03; /* [3:2] */
 783                 if (constellation > CONSTELLATION_NUM - 1)
 784                         goto err_schedule_delayed_work;
 785
 786                 hierarchy = (u8tmp >> 4) & 0x07; /* [6:4] */
 787                 if (hierarchy > HIERARCHY_NUM - 1)
 788                         goto err_schedule_delayed_work;
 789
 790                 ret = rtl2832_bulk_read(client, 0x40c, buf, 2);
 791                 if (ret)
 792                         goto err;
 793
 794                 u16tmp = buf[0] << 8 | buf[1] << 0;
 795                 if (u16tmp)
 796                         tmp = (constant[constellation][hierarchy] -
 797                                intlog10(u16tmp)) / ((1 << 24) / 10000);
 798                 else
 799                         tmp = 0;
 800
 801                 dev_dbg(&client->dev, "cnr raw=%u\n", u16tmp);
 802
 803                 c->cnr.stat[0].scale = FE_SCALE_DECIBEL;
 804                 c->cnr.stat[0].svalue = tmp;
 805         } else {
 806                 c->cnr.stat[0].scale = FE_SCALE_NOT_AVAILABLE;
 807         }
 808
 809         /* BER */
 810         if (dev->fe_status & FE_HAS_LOCK) {
 811                 ret = rtl2832_bulk_read(client, 0x34e, buf, 2);
 812                 if (ret)
 813                         goto err;
 814
 815                 u16tmp = buf[0] << 8 | buf[1] << 0;
 816                 dev->post_bit_error += u16tmp;
 817                 dev->post_bit_count += 1000000;
 818
 819                 dev_dbg(&client->dev, "ber errors=%u total=1000000\n", u16tmp);
 820
 821                 c->post_bit_error.stat[0].scale = FE_SCALE_COUNTER;
 822                 c->post_bit_error.stat[0].uvalue = dev->post_bit_error;
 823                 c->post_bit_count.stat[0].scale = FE_SCALE_COUNTER;
 824                 c->post_bit_count.stat[0].uvalue = dev->post_bit_count;
 825         } else {
 826                 c->post_bit_error.stat[0].scale = FE_SCALE_NOT_AVAILABLE;
 827                 c->post_bit_count.stat[0].scale = FE_SCALE_NOT_AVAILABLE;
 828         }
 829
 830 err_schedule_delayed_work:
 831         schedule_delayed_work(&dev->stat_work, msecs_to_jiffies(2000));
 832         return;
 833 err:
 834         dev_dbg(&client->dev, "failed=%d\n", ret);
 835 }
 836
 837 /*
 838  * I2C gate/mux/repeater logic
 839  * We must use unlocked __i2c_transfer() here (through regmap) because of I2C
 840  * adapter lock is already taken by tuner driver.
 841  * There is delay mechanism to avoid unneeded I2C gate open / close. Gate close
 842  * is delayed here a little bit in order to see if there is sequence of I2C
 843  * messages sent to same I2C bus.
 844  */
 845 static void rtl2832_i2c_gate_work(struct work_struct *work)
 846 {
 847         struct rtl2832_dev *dev = container_of(work, struct rtl2832_dev, i2c_gate_work.work);
 848         struct i2c_client *client = dev->client;
 849         int ret;
 850
 851         /* close gate */
 852         ret = rtl2832_update_bits(dev->client, 0x101, 0x08, 0x00);
 853         if (ret)
 854                 goto err;
 855
 856         return;
 857 err:
 858         dev_dbg(&client->dev, "failed=%d\n", ret);
 859 }
 860
 861 static int rtl2832_select(struct i2c_adapter *adap, void *mux_priv, u32 chan_id)
 862 {
 863         struct rtl2832_dev *dev = mux_priv;
 864         struct i2c_client *client = dev->client;
 865         int ret;
 866
 867         /* terminate possible gate closing */
 868         cancel_delayed_work(&dev->i2c_gate_work);
 869
 870         /*
 871          * chan_id 1 is muxed adapter demod provides and chan_id 0 is demod
 872          * itself. We need open gate when request is for chan_id 1. On that case
 873          * I2C adapter lock is already taken and due to that we will use
 874          * regmap_update_bits() which does not lock again I2C adapter.
 875          */
 876         if (chan_id == 1)
 877                 ret = regmap_update_bits(dev->regmap, 0x101, 0x08, 0x08);
 878         else
 879                 ret = rtl2832_update_bits(dev->client, 0x101, 0x08, 0x00);
 880         if (ret)
 881                 goto err;
 882
 883         return 0;
 884 err:
 885         dev_dbg(&client->dev, "failed=%d\n", ret);
 886         return ret;
 887 }
 888
 889 static int rtl2832_deselect(struct i2c_adapter *adap, void *mux_priv,
 890                             u32 chan_id)
 891 {
 892         struct rtl2832_dev *dev = mux_priv;
 893
 894         schedule_delayed_work(&dev->i2c_gate_work, usecs_to_jiffies(100));
 895         return 0;
 896 }
 897
 898 static struct dvb_frontend_ops rtl2832_ops = {
 899         .delsys = { SYS_DVBT },
 900         .info = {
 901                 .name = "Realtek RTL2832 (DVB-T)",
 902                 .frequency_min    = 174000000,
 903                 .frequency_max    = 862000000,
 904                 .frequency_stepsize = 166667,
 905                 .caps = FE_CAN_FEC_1_2 |
 906                         FE_CAN_FEC_2_3 |
 907                         FE_CAN_FEC_3_4 |
 908                         FE_CAN_FEC_5_6 |
 909                         FE_CAN_FEC_7_8 |
 910                         FE_CAN_FEC_AUTO |
 911                         FE_CAN_QPSK |
 912                         FE_CAN_QAM_16 |
 913                         FE_CAN_QAM_64 |
 914                         FE_CAN_QAM_AUTO |
 915                         FE_CAN_TRANSMISSION_MODE_AUTO |
 916                         FE_CAN_GUARD_INTERVAL_AUTO |
 917                         FE_CAN_HIERARCHY_AUTO |
 918                         FE_CAN_RECOVER |
 919                         FE_CAN_MUTE_TS
 920          },
 921
 922         .init = rtl2832_init,
 923         .sleep = rtl2832_sleep,
 924
 925         .get_tune_settings = rtl2832_get_tune_settings,
 926
 927         .set_frontend = rtl2832_set_frontend,
 928         .get_frontend = rtl2832_get_frontend,
 929
 930         .read_status = rtl2832_read_status,
 931         .read_snr = rtl2832_read_snr,
 932         .read_ber = rtl2832_read_ber,
 933 };
 934
 935 static bool rtl2832_volatile_reg(struct device *dev, unsigned int reg)
 936 {
 937         switch (reg) {
 938         case 0x305:
 939         case 0x33c:
 940         case 0x34e:
 941         case 0x351:
 942         case 0x40c ... 0x40d:
 943                 return true;
 944         default:
 945                 break;
 946         }
 947
 948         return false;
 949 }
 950
 951 /*
 952  * We implement own I2C access routines for regmap in order to get manual access
 953  * to I2C adapter lock, which is needed for I2C mux adapter.
 954  */
 955 static int rtl2832_regmap_read(void *context, const void *reg_buf,
 956                                size_t reg_size, void *val_buf, size_t val_size)
 957 {
 958         struct i2c_client *client = context;
 959         int ret;
 960         struct i2c_msg msg[2] = {
 961                 {
 962                         .addr = client->addr,
 963                         .flags = 0,
 964                         .len = reg_size,
 965                         .buf = (u8 *)reg_buf,
 966                 }, {
 967                         .addr = client->addr,
 968                         .flags = I2C_M_RD,
 969                         .len = val_size,
 970                         .buf = val_buf,
 971                 }
 972         };
 973
 974         ret = __i2c_transfer(client->adapter, msg, 2);
 975         if (ret != 2) {
 976                 dev_warn(&client->dev, "i2c reg read failed %d\n", ret);
 977                 if (ret >= 0)
 978                         ret = -EREMOTEIO;
 979                 return ret;
 980         }
 981         return 0;
 982 }
 983
 984 static int rtl2832_regmap_write(void *context, const void *data, size_t count)
 985 {
 986         struct i2c_client *client = context;
 987         int ret;
 988         struct i2c_msg msg[1] = {
 989                 {
 990                         .addr = client->addr,
 991                         .flags = 0,
 992                         .len = count,
 993                         .buf = (u8 *)data,
 994                 }
 995         };
 996
 997         ret = __i2c_transfer(client->adapter, msg, 1);
 998         if (ret != 1) {
 999                 dev_warn(&client->dev, "i2c reg write failed %d\n", ret);
1000                 if (ret >= 0)
1001                         ret = -EREMOTEIO;
1002                 return ret;
1003         }
1004         return 0;
1005 }
1006
1007 static int rtl2832_regmap_gather_write(void *context, const void *reg,
1008                                        size_t reg_len, const void *val,
1009                                        size_t val_len)
1010 {
1011         struct i2c_client *client = context;
1012         int ret;
1013         u8 buf[256];
1014         struct i2c_msg msg[1] = {
1015                 {
1016                         .addr = client->addr,
1017                         .flags = 0,
1018                         .len = 1 + val_len,
1019                         .buf = buf,
1020                 }
1021         };
1022
1023         buf[0] = *(u8 const *)reg;
1024         memcpy(&buf[1], val, val_len);
1025
1026         ret = __i2c_transfer(client->adapter, msg, 1);
1027         if (ret != 1) {
1028                 dev_warn(&client->dev, "i2c reg write failed %d\n", ret);
1029                 if (ret >= 0)
1030                         ret = -EREMOTEIO;
1031                 return ret;
1032         }
1033         return 0;
1034 }
1035
1036 static struct dvb_frontend *rtl2832_get_dvb_frontend(struct i2c_client *client)
1037 {
1038         struct rtl2832_dev *dev = i2c_get_clientdata(client);
1039
1040         dev_dbg(&client->dev, "\n");
1041         return &dev->fe;
1042 }
1043
1044 static struct i2c_adapter *rtl2832_get_i2c_adapter(struct i2c_client *client)
1045 {
1046         struct rtl2832_dev *dev = i2c_get_clientdata(client);
1047
1048         dev_dbg(&client->dev, "\n");
1049         return dev->i2c_adapter_tuner;
1050 }
1051
1052 static int rtl2832_enable_slave_ts(struct i2c_client *client)
1053 {
1054         struct rtl2832_dev *dev = i2c_get_clientdata(client);
1055         int ret;
1056
1057         dev_dbg(&client->dev, "\n");
1058
1059         ret = rtl2832_bulk_write(client, 0x10c, "\x5f\xff", 2);
1060         if (ret)
1061                 goto err;
1062
1063         ret = rtl2832_wr_demod_reg(dev, DVBT_PIP_ON, 0x1);
1064         if (ret)
1065                 goto err;
1066
1067         ret = rtl2832_bulk_write(client, 0x0bc, "\x18", 1);
1068         if (ret)
1069                 goto err;
1070
1071         ret = rtl2832_bulk_write(client, 0x022, "\x01", 1);
1072         if (ret)
1073                 goto err;
1074
1075         ret = rtl2832_bulk_write(client, 0x026, "\x1f", 1);
1076         if (ret)
1077                 goto err;
1078
1079         ret = rtl2832_bulk_write(client, 0x027, "\xff", 1);
1080         if (ret)
1081                 goto err;
1082
1083         ret = rtl2832_bulk_write(client, 0x192, "\x7f\xf7\xff", 3);
1084         if (ret)
1085                 goto err;
1086
1087         /* soft reset */
1088         ret = rtl2832_wr_demod_reg(dev, DVBT_SOFT_RST, 0x1);
1089         if (ret)
1090                 goto err;
1091
1092         ret = rtl2832_wr_demod_reg(dev, DVBT_SOFT_RST, 0x0);
1093         if (ret)
1094                 goto err;
1095
1096         return 0;
1097 err:
1098         dev_dbg(&client->dev, "failed=%d\n", ret);
1099         return ret;
1100 }
1101
1102 static int rtl2832_pid_filter_ctrl(struct dvb_frontend *fe, int onoff)
1103 {
1104         struct rtl2832_dev *dev = fe->demodulator_priv;
1105         struct i2c_client *client = dev->client;
1106         int ret;
1107         u8 u8tmp;
1108
1109         dev_dbg(&client->dev, "onoff=%d\n", onoff);
1110
1111         /* enable / disable PID filter */
1112         if (onoff)
1113                 u8tmp = 0x80;
1114         else
1115                 u8tmp = 0x00;
1116
1117         ret = rtl2832_update_bits(client, 0x061, 0xc0, u8tmp);
1118         if (ret)
1119                 goto err;
1120
1121         return 0;
1122 err:
1123         dev_dbg(&client->dev, "failed=%d\n", ret);
1124         return ret;
1125 }
1126
1127 static int rtl2832_pid_filter(struct dvb_frontend *fe, u8 index, u16 pid,
1128                               int onoff)
1129 {
1130         struct rtl2832_dev *dev = fe->demodulator_priv;
1131         struct i2c_client *client = dev->client;
1132         int ret;
1133         u8 buf[4];
1134
1135         dev_dbg(&client->dev, "index=%d pid=%04x onoff=%d\n",
1136                 index, pid, onoff);
1137
1138         /* skip invalid PIDs (0x2000) */
1139         if (pid > 0x1fff || index > 32)
1140                 return 0;
1141
1142         if (onoff)
1143                 set_bit(index, &dev->filters);
1144         else
1145                 clear_bit(index, &dev->filters);
1146
1147         /* enable / disable PIDs */
1148         buf[0] = (dev->filters >>  0) & 0xff;
1149         buf[1] = (dev->filters >>  8) & 0xff;
1150         buf[2] = (dev->filters >> 16) & 0xff;
1151         buf[3] = (dev->filters >> 24) & 0xff;
1152         ret = rtl2832_bulk_write(client, 0x062, buf, 4);
1153         if (ret)
1154                 goto err;
1155
1156         /* add PID */
1157         buf[0] = (pid >> 8) & 0xff;
1158         buf[1] = (pid >> 0) & 0xff;
1159         ret = rtl2832_bulk_write(client, 0x066 + 2 * index, buf, 2);
1160         if (ret)
1161                 goto err;
1162
1163         return 0;
1164 err:
1165         dev_dbg(&client->dev, "failed=%d\n", ret);
1166         return ret;
1167 }
1168
1169 static int rtl2832_probe(struct i2c_client *client,
1170                 const struct i2c_device_id *id)
1171 {
1172         struct rtl2832_platform_data *pdata = client->dev.platform_data;
1173         struct i2c_adapter *i2c = client->adapter;
1174         struct rtl2832_dev *dev;
1175         int ret;
1176         u8 tmp;
1177         static const struct regmap_bus regmap_bus = {
1178                 .read = rtl2832_regmap_read,
1179                 .write = rtl2832_regmap_write,
1180                 .gather_write = rtl2832_regmap_gather_write,
1181                 .val_format_endian_default = REGMAP_ENDIAN_NATIVE,
1182         };
1183         static const struct regmap_range_cfg regmap_range_cfg[] = {
1184                 {
1185                         .selector_reg     = 0x00,
1186                         .selector_mask    = 0xff,
1187                         .selector_shift   = 0,
1188                         .window_start     = 0,
1189                         .window_len       = 0x100,
1190                         .range_min        = 0 * 0x100,
1191                         .range_max        = 5 * 0x100,
1192                 },
1193         };
1194         static const struct regmap_config regmap_config = {
1195                 .reg_bits    =  8,
1196                 .val_bits    =  8,
1197                 .volatile_reg = rtl2832_volatile_reg,
1198                 .max_register = 5 * 0x100,
1199                 .ranges = regmap_range_cfg,
1200                 .num_ranges = ARRAY_SIZE(regmap_range_cfg),
1201                 .cache_type = REGCACHE_RBTREE,
1202         };
1203
1204         dev_dbg(&client->dev, "\n");
1205
1206         /* allocate memory for the internal state */
1207         dev = kzalloc(sizeof(struct rtl2832_dev), GFP_KERNEL);
1208         if (dev == NULL) {
1209                 ret = -ENOMEM;
1210                 goto err;
1211         }
1212
1213         /* setup the state */
1214         i2c_set_clientdata(client, dev);
1215         dev->client = client;
1216         dev->pdata = client->dev.platform_data;
1217         dev->sleeping = true;
1218         INIT_DELAYED_WORK(&dev->i2c_gate_work, rtl2832_i2c_gate_work);
1219         INIT_DELAYED_WORK(&dev->stat_work, rtl2832_stat_work);
1220         /* create regmap */
1221         dev->regmap = regmap_init(&client->dev, &regmap_bus, client,
1222                                   &regmap_config);
1223         if (IS_ERR(dev->regmap)) {
1224                 ret = PTR_ERR(dev->regmap);
1225                 goto err_kfree;
1226         }
1227         /* create muxed i2c adapter for demod itself */
1228         dev->i2c_adapter = i2c_add_mux_adapter(i2c, &i2c->dev, dev, 0, 0, 0,
1229                         rtl2832_select, NULL);
1230         if (dev->i2c_adapter == NULL) {
1231                 ret = -ENODEV;
1232                 goto err_regmap_exit;
1233         }
1234
1235         /* check if the demod is there */
1236         ret = rtl2832_bulk_read(client, 0x000, &tmp, 1);
1237         if (ret)
1238                 goto err_i2c_del_mux_adapter;
1239
1240         /* create muxed i2c adapter for demod tuner bus */
1241         dev->i2c_adapter_tuner = i2c_add_mux_adapter(i2c, &i2c->dev, dev,
1242                         0, 1, 0, rtl2832_select, rtl2832_deselect);
1243         if (dev->i2c_adapter_tuner == NULL) {
1244                 ret = -ENODEV;
1245                 goto err_i2c_del_mux_adapter;
1246         }
1247
1248         /* create dvb_frontend */
1249         memcpy(&dev->fe.ops, &rtl2832_ops, sizeof(struct dvb_frontend_ops));
1250         dev->fe.demodulator_priv = dev;
1251
1252         /* setup callbacks */
1253         pdata->get_dvb_frontend = rtl2832_get_dvb_frontend;
1254         pdata->get_i2c_adapter = rtl2832_get_i2c_adapter;
1255         pdata->enable_slave_ts = rtl2832_enable_slave_ts;
1256         pdata->pid_filter = rtl2832_pid_filter;
1257         pdata->pid_filter_ctrl = rtl2832_pid_filter_ctrl;
1258         pdata->bulk_read = rtl2832_bulk_read;
1259         pdata->bulk_write = rtl2832_bulk_write;
1260         pdata->update_bits = rtl2832_update_bits;
1261
1262         dev_info(&client->dev, "Realtek RTL2832 successfully attached\n");
1263         return 0;
1264 err_i2c_del_mux_adapter:
1265         i2c_del_mux_adapter(dev->i2c_adapter);
1266 err_regmap_exit:
1267         regmap_exit(dev->regmap);
1268 err_kfree:
1269         kfree(dev);
1270 err:
1271         dev_dbg(&client->dev, "failed=%d\n", ret);
1272         return ret;
1273 }
1274
1275 static int rtl2832_remove(struct i2c_client *client)
1276 {
1277         struct rtl2832_dev *dev = i2c_get_clientdata(client);
1278
1279         dev_dbg(&client->dev, "\n");
1280
1281         cancel_delayed_work_sync(&dev->i2c_gate_work);
1282
1283         i2c_del_mux_adapter(dev->i2c_adapter_tuner);
1284
1285         i2c_del_mux_adapter(dev->i2c_adapter);
1286
1287         regmap_exit(dev->regmap);
1288
1289         kfree(dev);
1290
1291         return 0;
1292 }
1293
1294 static const struct i2c_device_id rtl2832_id_table[] = {
1295         {"rtl2832", 0},
1296         {}
1297 };
1298 MODULE_DEVICE_TABLE(i2c, rtl2832_id_table);
1299
1300 static struct i2c_driver rtl2832_driver = {
1301         .driver = {
1302                 .owner  = THIS_MODULE,
1303                 .name   = "rtl2832",
1304         },
1305         .probe          = rtl2832_probe,
1306         .remove         = rtl2832_remove,
1307         .id_table       = rtl2832_id_table,
1308 };
1309
1310 module_i2c_driver(rtl2832_driver);
1311
1312 MODULE_AUTHOR("Thomas Mair <mair.thomas86@gmail.com>");
1313 MODULE_AUTHOR("Antti Palosaari <crope@iki.fi>");
1314 MODULE_DESCRIPTION("Realtek RTL2832 DVB-T demodulator driver");
1315 MODULE_LICENSE("GPL");