2 * SMI PCIe driver for DVBSky cards.
4 * Copyright (C) 2014 Max nibble <nibble.max@gmail.com>
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
18 #include "m88ds3103.h"
19 #include "m88ts2022.h"
20 #include "m88rs6000t.h"
24 DVB_DEFINE_MOD_OPT_ADAPTER_NR(adapter_nr);
26 static int smi_hw_init(struct smi_dev *dev)
28 u32 port_mux, port_ctrl, int_stat;
31 port_mux = smi_read(MUX_MODE_CTRL);
32 port_mux &= ~(rbPaMSMask);
33 port_mux |= rbPaMSDtvNoGpio;
34 port_mux &= ~(rbPbMSMask);
35 port_mux |= rbPbMSDtvNoGpio;
36 port_mux &= ~(0x0f0000);
38 smi_write(MUX_MODE_CTRL, port_mux);
40 /* set DTV register.*/
42 port_ctrl = smi_read(VIDEO_CTRL_STATUS_A);
44 smi_write(VIDEO_CTRL_STATUS_A, port_ctrl);
45 port_ctrl = smi_read(MPEG2_CTRL_A);
48 smi_write(MPEG2_CTRL_A, port_ctrl);
50 port_ctrl = smi_read(VIDEO_CTRL_STATUS_B);
52 smi_write(VIDEO_CTRL_STATUS_B, port_ctrl);
53 port_ctrl = smi_read(MPEG2_CTRL_B);
56 smi_write(MPEG2_CTRL_B, port_ctrl);
58 /* disable and clear interrupt.*/
59 smi_write(MSI_INT_ENA_CLR, ALL_INT);
60 int_stat = smi_read(MSI_INT_STATUS);
61 smi_write(MSI_INT_STATUS_CLR, int_stat);
64 smi_clear(PERIPHERAL_CTRL, 0x0303);
66 smi_set(PERIPHERAL_CTRL, 0x0101);
71 static void smi_i2c_cfg(struct smi_dev *dev, u32 sw_ctl)
75 dwCtrl = smi_read(sw_ctl);
76 dwCtrl &= ~0x18; /* disable output.*/
77 dwCtrl |= 0x21; /* reset and software mode.*/
80 smi_write(sw_ctl, dwCtrl);
82 dwCtrl = smi_read(sw_ctl);
84 smi_write(sw_ctl, dwCtrl);
87 static void smi_i2c_setsda(struct smi_dev *dev, int state, u32 sw_ctl)
91 smi_clear(sw_ctl, SW_I2C_MSK_DAT_EN);
93 smi_clear(sw_ctl, SW_I2C_MSK_DAT_OUT);
95 smi_set(sw_ctl, SW_I2C_MSK_DAT_EN);
99 static void smi_i2c_setscl(void *data, int state, u32 sw_ctl)
101 struct smi_dev *dev = data;
105 smi_clear(sw_ctl, SW_I2C_MSK_CLK_EN);
107 smi_clear(sw_ctl, SW_I2C_MSK_CLK_OUT);
109 smi_set(sw_ctl, SW_I2C_MSK_CLK_EN);
113 static int smi_i2c_getsda(void *data, u32 sw_ctl)
115 struct smi_dev *dev = data;
117 smi_clear(sw_ctl, SW_I2C_MSK_DAT_EN);
119 return (smi_read(sw_ctl) & SW_I2C_MSK_DAT_IN) ? 1 : 0;
122 static int smi_i2c_getscl(void *data, u32 sw_ctl)
124 struct smi_dev *dev = data;
126 smi_clear(sw_ctl, SW_I2C_MSK_CLK_EN);
128 return (smi_read(sw_ctl) & SW_I2C_MSK_CLK_IN) ? 1 : 0;
131 static void smi_i2c0_setsda(void *data, int state)
133 struct smi_dev *dev = data;
135 smi_i2c_setsda(dev, state, I2C_A_SW_CTL);
138 static void smi_i2c0_setscl(void *data, int state)
140 struct smi_dev *dev = data;
142 smi_i2c_setscl(dev, state, I2C_A_SW_CTL);
145 static int smi_i2c0_getsda(void *data)
147 struct smi_dev *dev = data;
149 return smi_i2c_getsda(dev, I2C_A_SW_CTL);
152 static int smi_i2c0_getscl(void *data)
154 struct smi_dev *dev = data;
156 return smi_i2c_getscl(dev, I2C_A_SW_CTL);
159 static void smi_i2c1_setsda(void *data, int state)
161 struct smi_dev *dev = data;
163 smi_i2c_setsda(dev, state, I2C_B_SW_CTL);
166 static void smi_i2c1_setscl(void *data, int state)
168 struct smi_dev *dev = data;
170 smi_i2c_setscl(dev, state, I2C_B_SW_CTL);
173 static int smi_i2c1_getsda(void *data)
175 struct smi_dev *dev = data;
177 return smi_i2c_getsda(dev, I2C_B_SW_CTL);
180 static int smi_i2c1_getscl(void *data)
182 struct smi_dev *dev = data;
184 return smi_i2c_getscl(dev, I2C_B_SW_CTL);
187 static int smi_i2c_init(struct smi_dev *dev)
192 smi_i2c_cfg(dev, I2C_A_SW_CTL);
193 i2c_set_adapdata(&dev->i2c_bus[0], dev);
194 strcpy(dev->i2c_bus[0].name, "SMI-I2C0");
195 dev->i2c_bus[0].owner = THIS_MODULE;
196 dev->i2c_bus[0].dev.parent = &dev->pci_dev->dev;
197 dev->i2c_bus[0].algo_data = &dev->i2c_bit[0];
198 dev->i2c_bit[0].data = dev;
199 dev->i2c_bit[0].setsda = smi_i2c0_setsda;
200 dev->i2c_bit[0].setscl = smi_i2c0_setscl;
201 dev->i2c_bit[0].getsda = smi_i2c0_getsda;
202 dev->i2c_bit[0].getscl = smi_i2c0_getscl;
203 dev->i2c_bit[0].udelay = 12;
204 dev->i2c_bit[0].timeout = 10;
205 /* Raise SCL and SDA */
206 smi_i2c0_setsda(dev, 1);
207 smi_i2c0_setscl(dev, 1);
209 ret = i2c_bit_add_bus(&dev->i2c_bus[0]);
214 smi_i2c_cfg(dev, I2C_B_SW_CTL);
215 i2c_set_adapdata(&dev->i2c_bus[1], dev);
216 strcpy(dev->i2c_bus[1].name, "SMI-I2C1");
217 dev->i2c_bus[1].owner = THIS_MODULE;
218 dev->i2c_bus[1].dev.parent = &dev->pci_dev->dev;
219 dev->i2c_bus[1].algo_data = &dev->i2c_bit[1];
220 dev->i2c_bit[1].data = dev;
221 dev->i2c_bit[1].setsda = smi_i2c1_setsda;
222 dev->i2c_bit[1].setscl = smi_i2c1_setscl;
223 dev->i2c_bit[1].getsda = smi_i2c1_getsda;
224 dev->i2c_bit[1].getscl = smi_i2c1_getscl;
225 dev->i2c_bit[1].udelay = 12;
226 dev->i2c_bit[1].timeout = 10;
227 /* Raise SCL and SDA */
228 smi_i2c1_setsda(dev, 1);
229 smi_i2c1_setscl(dev, 1);
231 ret = i2c_bit_add_bus(&dev->i2c_bus[1]);
233 i2c_del_adapter(&dev->i2c_bus[0]);
238 static void smi_i2c_exit(struct smi_dev *dev)
240 i2c_del_adapter(&dev->i2c_bus[0]);
241 i2c_del_adapter(&dev->i2c_bus[1]);
244 static int smi_read_eeprom(struct i2c_adapter *i2c, u16 reg, u8 *data, u16 size)
247 u8 b0[2] = { (reg >> 8) & 0xff, reg & 0xff };
249 struct i2c_msg msg[] = {
250 { .addr = 0x50, .flags = 0,
251 .buf = b0, .len = 2 },
252 { .addr = 0x50, .flags = I2C_M_RD,
253 .buf = data, .len = size }
256 ret = i2c_transfer(i2c, msg, 2);
259 dev_err(&i2c->dev, "%s: reg=0x%x (error=%d)\n",
266 /* ts port interrupt operations */
267 static void smi_port_disableInterrupt(struct smi_port *port)
269 struct smi_dev *dev = port->dev;
271 smi_write(MSI_INT_ENA_CLR,
272 (port->_dmaInterruptCH0 | port->_dmaInterruptCH1));
275 static void smi_port_enableInterrupt(struct smi_port *port)
277 struct smi_dev *dev = port->dev;
279 smi_write(MSI_INT_ENA_SET,
280 (port->_dmaInterruptCH0 | port->_dmaInterruptCH1));
283 static void smi_port_clearInterrupt(struct smi_port *port)
285 struct smi_dev *dev = port->dev;
287 smi_write(MSI_INT_STATUS_CLR,
288 (port->_dmaInterruptCH0 | port->_dmaInterruptCH1));
291 /* tasklet handler: DMA data to dmx.*/
292 static void smi_dma_xfer(unsigned long data)
294 struct smi_port *port = (struct smi_port *) data;
295 struct smi_dev *dev = port->dev;
296 u32 intr_status, finishedData, dmaManagement;
297 u8 dmaChan0State, dmaChan1State;
299 intr_status = port->_int_status;
300 dmaManagement = smi_read(port->DMA_MANAGEMENT);
301 dmaChan0State = (u8)((dmaManagement & 0x00000030) >> 4);
302 dmaChan1State = (u8)((dmaManagement & 0x00300000) >> 20);
304 /* CH-0 DMA interrupt.*/
305 if ((intr_status & port->_dmaInterruptCH0) && (dmaChan0State == 0x01)) {
306 dev_dbg(&dev->pci_dev->dev,
307 "Port[%d]-DMA CH0 engine complete successful !\n",
309 finishedData = smi_read(port->DMA_CHAN0_TRANS_STATE);
310 finishedData &= 0x003FFFFF;
311 /* value of DMA_PORT0_CHAN0_TRANS_STATE register [21:0]
312 * indicate dma total transfer length and
313 * zero of [21:0] indicate dma total transfer length
314 * equal to 0x400000 (4MB)*/
315 if (finishedData == 0)
316 finishedData = 0x00400000;
317 if (finishedData != SMI_TS_DMA_BUF_SIZE) {
318 dev_dbg(&dev->pci_dev->dev,
319 "DMA CH0 engine complete length mismatched, finish data=%d !\n",
322 dvb_dmx_swfilter_packets(&port->demux,
323 port->cpu_addr[0], (finishedData / 188));
324 /*dvb_dmx_swfilter(&port->demux,
325 port->cpu_addr[0], finishedData);*/
327 /* CH-1 DMA interrupt.*/
328 if ((intr_status & port->_dmaInterruptCH1) && (dmaChan1State == 0x01)) {
329 dev_dbg(&dev->pci_dev->dev,
330 "Port[%d]-DMA CH1 engine complete successful !\n",
332 finishedData = smi_read(port->DMA_CHAN1_TRANS_STATE);
333 finishedData &= 0x003FFFFF;
334 /* value of DMA_PORT0_CHAN0_TRANS_STATE register [21:0]
335 * indicate dma total transfer length and
336 * zero of [21:0] indicate dma total transfer length
337 * equal to 0x400000 (4MB)*/
338 if (finishedData == 0)
339 finishedData = 0x00400000;
340 if (finishedData != SMI_TS_DMA_BUF_SIZE) {
341 dev_dbg(&dev->pci_dev->dev,
342 "DMA CH1 engine complete length mismatched, finish data=%d !\n",
345 dvb_dmx_swfilter_packets(&port->demux,
346 port->cpu_addr[1], (finishedData / 188));
347 /*dvb_dmx_swfilter(&port->demux,
348 port->cpu_addr[1], finishedData);*/
351 if (intr_status & port->_dmaInterruptCH0)
352 dmaManagement |= 0x00000002;
353 if (intr_status & port->_dmaInterruptCH1)
354 dmaManagement |= 0x00020000;
355 smi_write(port->DMA_MANAGEMENT, dmaManagement);
356 /* Re-enable interrupts */
357 smi_port_enableInterrupt(port);
360 static void smi_port_dma_free(struct smi_port *port)
362 if (port->cpu_addr[0]) {
363 pci_free_consistent(port->dev->pci_dev, SMI_TS_DMA_BUF_SIZE,
364 port->cpu_addr[0], port->dma_addr[0]);
365 port->cpu_addr[0] = NULL;
367 if (port->cpu_addr[1]) {
368 pci_free_consistent(port->dev->pci_dev, SMI_TS_DMA_BUF_SIZE,
369 port->cpu_addr[1], port->dma_addr[1]);
370 port->cpu_addr[1] = NULL;
374 static int smi_port_init(struct smi_port *port, int dmaChanUsed)
376 dev_dbg(&port->dev->pci_dev->dev,
377 "%s, port %d, dmaused %d\n", __func__, port->idx, dmaChanUsed);
379 if (port->idx == 0) {
381 port->_dmaInterruptCH0 = dmaChanUsed & 0x01;
382 port->_dmaInterruptCH1 = dmaChanUsed & 0x02;
384 port->DMA_CHAN0_ADDR_LOW = DMA_PORTA_CHAN0_ADDR_LOW;
385 port->DMA_CHAN0_ADDR_HI = DMA_PORTA_CHAN0_ADDR_HI;
386 port->DMA_CHAN0_TRANS_STATE = DMA_PORTA_CHAN0_TRANS_STATE;
387 port->DMA_CHAN0_CONTROL = DMA_PORTA_CHAN0_CONTROL;
388 port->DMA_CHAN1_ADDR_LOW = DMA_PORTA_CHAN1_ADDR_LOW;
389 port->DMA_CHAN1_ADDR_HI = DMA_PORTA_CHAN1_ADDR_HI;
390 port->DMA_CHAN1_TRANS_STATE = DMA_PORTA_CHAN1_TRANS_STATE;
391 port->DMA_CHAN1_CONTROL = DMA_PORTA_CHAN1_CONTROL;
392 port->DMA_MANAGEMENT = DMA_PORTA_MANAGEMENT;
395 port->_dmaInterruptCH0 = (dmaChanUsed << 2) & 0x04;
396 port->_dmaInterruptCH1 = (dmaChanUsed << 2) & 0x08;
398 port->DMA_CHAN0_ADDR_LOW = DMA_PORTB_CHAN0_ADDR_LOW;
399 port->DMA_CHAN0_ADDR_HI = DMA_PORTB_CHAN0_ADDR_HI;
400 port->DMA_CHAN0_TRANS_STATE = DMA_PORTB_CHAN0_TRANS_STATE;
401 port->DMA_CHAN0_CONTROL = DMA_PORTB_CHAN0_CONTROL;
402 port->DMA_CHAN1_ADDR_LOW = DMA_PORTB_CHAN1_ADDR_LOW;
403 port->DMA_CHAN1_ADDR_HI = DMA_PORTB_CHAN1_ADDR_HI;
404 port->DMA_CHAN1_TRANS_STATE = DMA_PORTB_CHAN1_TRANS_STATE;
405 port->DMA_CHAN1_CONTROL = DMA_PORTB_CHAN1_CONTROL;
406 port->DMA_MANAGEMENT = DMA_PORTB_MANAGEMENT;
409 if (port->_dmaInterruptCH0) {
410 port->cpu_addr[0] = pci_alloc_consistent(port->dev->pci_dev,
413 if (!port->cpu_addr[0]) {
414 dev_err(&port->dev->pci_dev->dev,
415 "Port[%d] DMA CH0 memory allocation failed!\n",
421 if (port->_dmaInterruptCH1) {
422 port->cpu_addr[1] = pci_alloc_consistent(port->dev->pci_dev,
425 if (!port->cpu_addr[1]) {
426 dev_err(&port->dev->pci_dev->dev,
427 "Port[%d] DMA CH1 memory allocation failed!\n",
433 smi_port_disableInterrupt(port);
434 tasklet_init(&port->tasklet, smi_dma_xfer, (unsigned long)port);
435 tasklet_disable(&port->tasklet);
439 smi_port_dma_free(port);
443 static void smi_port_exit(struct smi_port *port)
445 smi_port_disableInterrupt(port);
446 tasklet_kill(&port->tasklet);
447 smi_port_dma_free(port);
451 static void smi_port_irq(struct smi_port *port, u32 int_status)
453 u32 port_req_irq = port->_dmaInterruptCH0 | port->_dmaInterruptCH1;
455 if (int_status & port_req_irq) {
456 smi_port_disableInterrupt(port);
457 port->_int_status = int_status;
458 smi_port_clearInterrupt(port);
459 tasklet_schedule(&port->tasklet);
463 static irqreturn_t smi_irq_handler(int irq, void *dev_id)
465 struct smi_dev *dev = dev_id;
466 struct smi_port *port0 = &dev->ts_port[0];
467 struct smi_port *port1 = &dev->ts_port[1];
469 u32 intr_status = smi_read(MSI_INT_STATUS);
473 smi_port_irq(port0, intr_status);
477 smi_port_irq(port1, intr_status);
482 static struct i2c_client *smi_add_i2c_client(struct i2c_adapter *adapter,
483 struct i2c_board_info *info)
485 struct i2c_client *client;
487 request_module(info->type);
488 client = i2c_new_device(adapter, info);
489 if (client == NULL || client->dev.driver == NULL)
490 goto err_add_i2c_client;
492 if (!try_module_get(client->dev.driver->owner)) {
493 i2c_unregister_device(client);
494 goto err_add_i2c_client;
503 static void smi_del_i2c_client(struct i2c_client *client)
505 module_put(client->dev.driver->owner);
506 i2c_unregister_device(client);
509 static const struct m88ds3103_config smi_dvbsky_m88ds3103_cfg = {
514 .ts_mode = M88DS3103_TS_PARALLEL,
522 static int smi_dvbsky_m88ds3103_fe_attach(struct smi_port *port)
525 struct smi_dev *dev = port->dev;
526 struct i2c_adapter *i2c;
527 /* tuner I2C module */
528 struct i2c_adapter *tuner_i2c_adapter;
529 struct i2c_client *tuner_client;
530 struct i2c_board_info tuner_info;
531 struct m88ts2022_config m88ts2022_config = {
534 memset(&tuner_info, 0, sizeof(struct i2c_board_info));
535 i2c = (port->idx == 0) ? &dev->i2c_bus[0] : &dev->i2c_bus[1];
538 port->fe = dvb_attach(m88ds3103_attach,
539 &smi_dvbsky_m88ds3103_cfg, i2c, &tuner_i2c_adapter);
545 m88ts2022_config.fe = port->fe;
546 strlcpy(tuner_info.type, "m88ts2022", I2C_NAME_SIZE);
547 tuner_info.addr = 0x60;
548 tuner_info.platform_data = &m88ts2022_config;
549 tuner_client = smi_add_i2c_client(tuner_i2c_adapter, &tuner_info);
552 goto err_tuner_i2c_device;
555 /* delegate signal strength measurement to tuner */
556 port->fe->ops.read_signal_strength =
557 port->fe->ops.tuner_ops.get_rf_strength;
559 port->i2c_client_tuner = tuner_client;
562 err_tuner_i2c_device:
563 dvb_frontend_detach(port->fe);
567 static const struct m88ds3103_config smi_dvbsky_m88rs6000_cfg = {
571 .ts_mode = M88DS3103_TS_PARALLEL,
579 static int smi_dvbsky_m88rs6000_fe_attach(struct smi_port *port)
582 struct smi_dev *dev = port->dev;
583 struct i2c_adapter *i2c;
584 /* tuner I2C module */
585 struct i2c_adapter *tuner_i2c_adapter;
586 struct i2c_client *tuner_client;
587 struct i2c_board_info tuner_info;
588 struct m88rs6000t_config m88rs6000t_config;
590 memset(&tuner_info, 0, sizeof(struct i2c_board_info));
591 i2c = (port->idx == 0) ? &dev->i2c_bus[0] : &dev->i2c_bus[1];
594 port->fe = dvb_attach(m88ds3103_attach,
595 &smi_dvbsky_m88rs6000_cfg, i2c, &tuner_i2c_adapter);
601 m88rs6000t_config.fe = port->fe;
602 strlcpy(tuner_info.type, "m88rs6000t", I2C_NAME_SIZE);
603 tuner_info.addr = 0x21;
604 tuner_info.platform_data = &m88rs6000t_config;
605 tuner_client = smi_add_i2c_client(tuner_i2c_adapter, &tuner_info);
608 goto err_tuner_i2c_device;
611 /* delegate signal strength measurement to tuner */
612 port->fe->ops.read_signal_strength =
613 port->fe->ops.tuner_ops.get_rf_strength;
615 port->i2c_client_tuner = tuner_client;
618 err_tuner_i2c_device:
619 dvb_frontend_detach(port->fe);
623 static int smi_dvbsky_sit2_fe_attach(struct smi_port *port)
626 struct smi_dev *dev = port->dev;
627 struct i2c_adapter *i2c;
628 struct i2c_adapter *tuner_i2c_adapter;
629 struct i2c_client *client_tuner, *client_demod;
630 struct i2c_board_info client_info;
631 struct si2168_config si2168_config;
632 struct si2157_config si2157_config;
635 i2c = (port->idx == 0) ? &dev->i2c_bus[0] : &dev->i2c_bus[1];
638 memset(&si2168_config, 0, sizeof(si2168_config));
639 si2168_config.i2c_adapter = &tuner_i2c_adapter;
640 si2168_config.fe = &port->fe;
641 si2168_config.ts_mode = SI2168_TS_PARALLEL;
643 memset(&client_info, 0, sizeof(struct i2c_board_info));
644 strlcpy(client_info.type, "si2168", I2C_NAME_SIZE);
645 client_info.addr = 0x64;
646 client_info.platform_data = &si2168_config;
648 client_demod = smi_add_i2c_client(i2c, &client_info);
653 port->i2c_client_demod = client_demod;
656 memset(&si2157_config, 0, sizeof(si2157_config));
657 si2157_config.fe = port->fe;
659 memset(&client_info, 0, sizeof(struct i2c_board_info));
660 strlcpy(client_info.type, "si2157", I2C_NAME_SIZE);
661 client_info.addr = 0x60;
662 client_info.platform_data = &si2157_config;
664 client_tuner = smi_add_i2c_client(tuner_i2c_adapter, &client_info);
666 smi_del_i2c_client(port->i2c_client_demod);
667 port->i2c_client_demod = NULL;
671 port->i2c_client_tuner = client_tuner;
675 static int smi_fe_init(struct smi_port *port)
678 struct smi_dev *dev = port->dev;
679 struct dvb_adapter *adap = &port->dvb_adapter;
682 dev_dbg(&port->dev->pci_dev->dev,
683 "%s: port %d, fe_type = %d\n",
684 __func__, port->idx, port->fe_type);
685 switch (port->fe_type) {
686 case DVBSKY_FE_M88DS3103:
687 ret = smi_dvbsky_m88ds3103_fe_attach(port);
689 case DVBSKY_FE_M88RS6000:
690 ret = smi_dvbsky_m88rs6000_fe_attach(port);
693 ret = smi_dvbsky_sit2_fe_attach(port);
699 /* register dvb frontend */
700 ret = dvb_register_frontend(adap, port->fe);
702 if (port->i2c_client_tuner)
703 smi_del_i2c_client(port->i2c_client_tuner);
704 if (port->i2c_client_demod)
705 smi_del_i2c_client(port->i2c_client_demod);
706 dvb_frontend_detach(port->fe);
710 ret = smi_read_eeprom(&dev->i2c_bus[0], 0xc0, mac_ee, 16);
711 dev_info(&port->dev->pci_dev->dev,
712 "DVBSky SMI PCIe MAC= %pM\n", mac_ee + (port->idx)*8);
713 memcpy(adap->proposed_mac, mac_ee + (port->idx)*8, 6);
717 static void smi_fe_exit(struct smi_port *port)
719 dvb_unregister_frontend(port->fe);
720 /* remove I2C demod and tuner */
721 if (port->i2c_client_tuner)
722 smi_del_i2c_client(port->i2c_client_tuner);
723 if (port->i2c_client_demod)
724 smi_del_i2c_client(port->i2c_client_demod);
725 dvb_frontend_detach(port->fe);
728 static int my_dvb_dmx_ts_card_init(struct dvb_demux *dvbdemux, char *id,
729 int (*start_feed)(struct dvb_demux_feed *),
730 int (*stop_feed)(struct dvb_demux_feed *),
733 dvbdemux->priv = priv;
735 dvbdemux->filternum = 256;
736 dvbdemux->feednum = 256;
737 dvbdemux->start_feed = start_feed;
738 dvbdemux->stop_feed = stop_feed;
739 dvbdemux->write_to_decoder = NULL;
740 dvbdemux->dmx.capabilities = (DMX_TS_FILTERING |
741 DMX_SECTION_FILTERING |
742 DMX_MEMORY_BASED_FILTERING);
743 return dvb_dmx_init(dvbdemux);
746 static int my_dvb_dmxdev_ts_card_init(struct dmxdev *dmxdev,
747 struct dvb_demux *dvbdemux,
748 struct dmx_frontend *hw_frontend,
749 struct dmx_frontend *mem_frontend,
750 struct dvb_adapter *dvb_adapter)
754 dmxdev->filternum = 256;
755 dmxdev->demux = &dvbdemux->dmx;
756 dmxdev->capabilities = 0;
757 ret = dvb_dmxdev_init(dmxdev, dvb_adapter);
761 hw_frontend->source = DMX_FRONTEND_0;
762 dvbdemux->dmx.add_frontend(&dvbdemux->dmx, hw_frontend);
763 mem_frontend->source = DMX_MEMORY_FE;
764 dvbdemux->dmx.add_frontend(&dvbdemux->dmx, mem_frontend);
765 return dvbdemux->dmx.connect_frontend(&dvbdemux->dmx, hw_frontend);
768 static u32 smi_config_DMA(struct smi_port *port)
770 struct smi_dev *dev = port->dev;
771 u32 totalLength = 0, dmaMemPtrLow, dmaMemPtrHi, dmaCtlReg;
772 u8 chanLatencyTimer = 0, dmaChanEnable = 1, dmaTransStart = 1;
773 u32 dmaManagement = 0, tlpTransUnit = DMA_TRANS_UNIT_188;
774 u8 tlpTc = 0, tlpTd = 1, tlpEp = 0, tlpAttr = 0;
777 dmaManagement = smi_read(port->DMA_MANAGEMENT);
778 /* Setup Channel-0 */
779 if (port->_dmaInterruptCH0) {
780 totalLength = SMI_TS_DMA_BUF_SIZE;
781 mem = port->dma_addr[0];
782 dmaMemPtrLow = mem & 0xffffffff;
783 dmaMemPtrHi = mem >> 32;
784 dmaCtlReg = (totalLength) | (tlpTransUnit << 22) | (tlpTc << 25)
785 | (tlpTd << 28) | (tlpEp << 29) | (tlpAttr << 30);
786 dmaManagement |= dmaChanEnable | (dmaTransStart << 1)
787 | (chanLatencyTimer << 8);
788 /* write DMA register, start DMA engine */
789 smi_write(port->DMA_CHAN0_ADDR_LOW, dmaMemPtrLow);
790 smi_write(port->DMA_CHAN0_ADDR_HI, dmaMemPtrHi);
791 smi_write(port->DMA_CHAN0_CONTROL, dmaCtlReg);
793 /* Setup Channel-1 */
794 if (port->_dmaInterruptCH1) {
795 totalLength = SMI_TS_DMA_BUF_SIZE;
796 mem = port->dma_addr[1];
797 dmaMemPtrLow = mem & 0xffffffff;
798 dmaMemPtrHi = mem >> 32;
799 dmaCtlReg = (totalLength) | (tlpTransUnit << 22) | (tlpTc << 25)
800 | (tlpTd << 28) | (tlpEp << 29) | (tlpAttr << 30);
801 dmaManagement |= (dmaChanEnable << 16) | (dmaTransStart << 17)
802 | (chanLatencyTimer << 24);
803 /* write DMA register, start DMA engine */
804 smi_write(port->DMA_CHAN1_ADDR_LOW, dmaMemPtrLow);
805 smi_write(port->DMA_CHAN1_ADDR_HI, dmaMemPtrHi);
806 smi_write(port->DMA_CHAN1_CONTROL, dmaCtlReg);
808 return dmaManagement;
811 static int smi_start_feed(struct dvb_demux_feed *dvbdmxfeed)
813 struct dvb_demux *dvbdmx = dvbdmxfeed->demux;
814 struct smi_port *port = dvbdmx->priv;
815 struct smi_dev *dev = port->dev;
818 if (port->users++ == 0) {
819 dmaManagement = smi_config_DMA(port);
820 smi_port_clearInterrupt(port);
821 smi_port_enableInterrupt(port);
822 smi_write(port->DMA_MANAGEMENT, dmaManagement);
823 tasklet_enable(&port->tasklet);
828 static int smi_stop_feed(struct dvb_demux_feed *dvbdmxfeed)
830 struct dvb_demux *dvbdmx = dvbdmxfeed->demux;
831 struct smi_port *port = dvbdmx->priv;
832 struct smi_dev *dev = port->dev;
837 tasklet_disable(&port->tasklet);
838 smi_port_disableInterrupt(port);
839 smi_clear(port->DMA_MANAGEMENT, 0x30003);
843 static int smi_dvb_init(struct smi_port *port)
846 struct dvb_adapter *adap = &port->dvb_adapter;
847 struct dvb_demux *dvbdemux = &port->demux;
849 dev_dbg(&port->dev->pci_dev->dev,
850 "%s, port %d\n", __func__, port->idx);
852 ret = dvb_register_adapter(adap, "SMI_DVB", THIS_MODULE,
853 &port->dev->pci_dev->dev,
856 dev_err(&port->dev->pci_dev->dev, "Fail to register DVB adapter.\n");
859 ret = my_dvb_dmx_ts_card_init(dvbdemux, "SW demux",
861 smi_stop_feed, port);
863 goto err_del_dvb_register_adapter;
865 ret = my_dvb_dmxdev_ts_card_init(&port->dmxdev, &port->demux,
867 &port->mem_frontend, adap);
869 goto err_del_dvb_dmx;
871 ret = dvb_net_init(adap, &port->dvbnet, port->dmxdev.demux);
873 goto err_del_dvb_dmxdev;
876 dvbdemux->dmx.close(&dvbdemux->dmx);
877 dvbdemux->dmx.remove_frontend(&dvbdemux->dmx, &port->hw_frontend);
878 dvbdemux->dmx.remove_frontend(&dvbdemux->dmx, &port->mem_frontend);
879 dvb_dmxdev_release(&port->dmxdev);
881 dvb_dmx_release(&port->demux);
882 err_del_dvb_register_adapter:
883 dvb_unregister_adapter(&port->dvb_adapter);
887 static void smi_dvb_exit(struct smi_port *port)
889 struct dvb_demux *dvbdemux = &port->demux;
891 dvb_net_release(&port->dvbnet);
893 dvbdemux->dmx.close(&dvbdemux->dmx);
894 dvbdemux->dmx.remove_frontend(&dvbdemux->dmx, &port->hw_frontend);
895 dvbdemux->dmx.remove_frontend(&dvbdemux->dmx, &port->mem_frontend);
896 dvb_dmxdev_release(&port->dmxdev);
897 dvb_dmx_release(&port->demux);
899 dvb_unregister_adapter(&port->dvb_adapter);
902 static int smi_port_attach(struct smi_dev *dev,
903 struct smi_port *port, int index)
909 port->fe_type = (index == 0) ? dev->info->fe_0 : dev->info->fe_1;
910 dmachs = (index == 0) ? dev->info->ts_0 : dev->info->ts_1;
912 ret = smi_port_init(port, dmachs);
916 ret = smi_dvb_init(port);
918 goto err_del_port_init;
920 ret = smi_fe_init(port);
922 goto err_del_dvb_init;
931 static void smi_port_detach(struct smi_port *port)
938 static int smi_probe(struct pci_dev *pdev, const struct pci_device_id *id)
943 if (pci_enable_device(pdev) < 0)
946 dev = kzalloc(sizeof(struct smi_dev), GFP_KERNEL);
949 goto err_pci_disable_device;
953 pci_set_drvdata(pdev, dev);
954 dev->info = (struct smi_cfg_info *) id->driver_data;
955 dev_info(&dev->pci_dev->dev,
956 "card detected: %s\n", dev->info->name);
958 dev->nr = dev->info->type;
959 dev->lmmio = ioremap(pci_resource_start(dev->pci_dev, 0),
960 pci_resource_len(dev->pci_dev, 0));
966 /* should we set to 32bit DMA? */
967 ret = pci_set_dma_mask(pdev, DMA_BIT_MASK(32));
969 goto err_pci_iounmap;
971 pci_set_master(pdev);
973 ret = smi_hw_init(dev);
975 goto err_pci_iounmap;
977 ret = smi_i2c_init(dev);
979 goto err_pci_iounmap;
981 if (dev->info->ts_0) {
982 ret = smi_port_attach(dev, &dev->ts_port[0], 0);
984 goto err_del_i2c_adaptor;
987 if (dev->info->ts_1) {
988 ret = smi_port_attach(dev, &dev->ts_port[1], 1);
990 goto err_del_port0_attach;
993 #ifdef CONFIG_PCI_MSI /* to do msi interrupt.???*/
994 if (pci_msi_enabled())
995 ret = pci_enable_msi(dev->pci_dev);
997 dev_info(&dev->pci_dev->dev, "MSI not available.\n");
1000 ret = request_irq(dev->pci_dev->irq, smi_irq_handler,
1001 IRQF_SHARED, "SMI_PCIE", dev);
1003 goto err_del_port1_attach;
1007 err_del_port1_attach:
1008 if (dev->info->ts_1)
1009 smi_port_detach(&dev->ts_port[1]);
1010 err_del_port0_attach:
1011 if (dev->info->ts_0)
1012 smi_port_detach(&dev->ts_port[0]);
1013 err_del_i2c_adaptor:
1016 iounmap(dev->lmmio);
1018 pci_set_drvdata(pdev, NULL);
1020 err_pci_disable_device:
1021 pci_disable_device(pdev);
1025 static void smi_remove(struct pci_dev *pdev)
1027 struct smi_dev *dev = pci_get_drvdata(pdev);
1029 smi_write(MSI_INT_ENA_CLR, ALL_INT);
1030 free_irq(dev->pci_dev->irq, dev);
1031 #ifdef CONFIG_PCI_MSI
1032 pci_disable_msi(dev->pci_dev);
1034 if (dev->info->ts_1)
1035 smi_port_detach(&dev->ts_port[1]);
1036 if (dev->info->ts_0)
1037 smi_port_detach(&dev->ts_port[0]);
1040 iounmap(dev->lmmio);
1041 pci_set_drvdata(pdev, NULL);
1042 pci_disable_device(pdev);
1047 static struct smi_cfg_info dvbsky_s950_cfg = {
1048 .type = SMI_DVBSKY_S950,
1049 .name = "DVBSky S950 V3",
1050 .ts_0 = SMI_TS_NULL,
1051 .ts_1 = SMI_TS_DMA_BOTH,
1052 .fe_0 = DVBSKY_FE_NULL,
1053 .fe_1 = DVBSKY_FE_M88DS3103,
1056 static struct smi_cfg_info dvbsky_s952_cfg = {
1057 .type = SMI_DVBSKY_S952,
1058 .name = "DVBSky S952 V3",
1059 .ts_0 = SMI_TS_DMA_BOTH,
1060 .ts_1 = SMI_TS_DMA_BOTH,
1061 .fe_0 = DVBSKY_FE_M88RS6000,
1062 .fe_1 = DVBSKY_FE_M88RS6000,
1065 static struct smi_cfg_info dvbsky_t9580_cfg = {
1066 .type = SMI_DVBSKY_T9580,
1067 .name = "DVBSky T9580 V3",
1068 .ts_0 = SMI_TS_DMA_BOTH,
1069 .ts_1 = SMI_TS_DMA_BOTH,
1070 .fe_0 = DVBSKY_FE_SIT2,
1071 .fe_1 = DVBSKY_FE_M88DS3103,
1075 #define SMI_ID(_subvend, _subdev, _driverdata) { \
1076 .vendor = SMI_VID, .device = SMI_PID, \
1077 .subvendor = _subvend, .subdevice = _subdev, \
1078 .driver_data = (unsigned long)&_driverdata }
1080 static const struct pci_device_id smi_id_table[] = {
1081 SMI_ID(0x4254, 0x0550, dvbsky_s950_cfg),
1082 SMI_ID(0x4254, 0x0552, dvbsky_s952_cfg),
1083 SMI_ID(0x4254, 0x5580, dvbsky_t9580_cfg),
1086 MODULE_DEVICE_TABLE(pci, smi_id_table);
1088 static struct pci_driver smipcie_driver = {
1089 .name = "SMI PCIe driver",
1090 .id_table = smi_id_table,
1092 .remove = smi_remove,
1095 module_pci_driver(smipcie_driver);
1097 MODULE_AUTHOR("Max nibble <nibble.max@gmail.com>");
1098 MODULE_DESCRIPTION("SMI PCIe driver");
1099 MODULE_LICENSE("GPL");