2 * tw68 driver common header file
4 * Much of this code is derived from the cx88 and sa7134 drivers, which
5 * were in turn derived from the bt87x driver. The original work was by
6 * Gerd Knorr; more recently the code was enhanced by Mauro Carvalho Chehab,
7 * Hans Verkuil, Andy Walls and many others. Their work is gratefully
8 * acknowledged. Full credit goes to them - any problems within this code
11 * Copyright (C) 2009 William M. Brack
13 * Refactored and updated to the latest v4l core frameworks:
15 * Copyright (C) 2014 Hans Verkuil <hverkuil@xs4all.nl>
17 * This program is free software; you can redistribute it and/or modify
18 * it under the terms of the GNU General Public License as published by
19 * the Free Software Foundation; either version 2 of the License, or
20 * (at your option) any later version.
22 * This program is distributed in the hope that it will be useful,
23 * but WITHOUT ANY WARRANTY; without even the implied warranty of
24 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
25 * GNU General Public License for more details.
28 #include <linux/version.h>
29 #include <linux/pci.h>
30 #include <linux/videodev2.h>
31 #include <linux/notifier.h>
32 #include <linux/delay.h>
33 #include <linux/mutex.h>
36 #include <media/v4l2-common.h>
37 #include <media/v4l2-ioctl.h>
38 #include <media/v4l2-ctrls.h>
39 #include <media/v4l2-device.h>
40 #include <media/videobuf2-dma-sg.h>
46 /* system vendor and device ID's */
47 #define PCI_VENDOR_ID_TECHWELL 0x1797
48 #define PCI_DEVICE_ID_6800 0x6800
49 #define PCI_DEVICE_ID_6801 0x6801
50 #define PCI_DEVICE_ID_AUDIO2 0x6802
51 #define PCI_DEVICE_ID_TS3 0x6803
52 #define PCI_DEVICE_ID_6804 0x6804
53 #define PCI_DEVICE_ID_AUDIO5 0x6805
54 #define PCI_DEVICE_ID_TS6 0x6806
56 /* tw6816 based cards */
57 #define PCI_DEVICE_ID_6816_1 0x6810
58 #define PCI_DEVICE_ID_6816_2 0x6811
59 #define PCI_DEVICE_ID_6816_3 0x6812
60 #define PCI_DEVICE_ID_6816_4 0x6813
62 #define TW68_NORMS ( \
63 V4L2_STD_NTSC | V4L2_STD_PAL | V4L2_STD_SECAM | \
64 V4L2_STD_PAL_M | V4L2_STD_PAL_Nc | V4L2_STD_PAL_60)
66 #define TW68_VID_INTS (TW68_FFERR | TW68_PABORT | TW68_DMAPERR | \
67 TW68_FFOF | TW68_DMAPI)
68 /* TW6800 chips have trouble with these, so we don't set them for that chip */
69 #define TW68_VID_INTSX (TW68_FDMIS | TW68_HLOCK | TW68_VLOCK)
71 #define TW68_I2C_INTS (TW68_SBERR | TW68_SBDONE | TW68_SBERR2 | \
74 enum tw68_decoder_type {
81 /* ----------------------------------------------------------- */
98 u32 h_delay0; /* for TW6800 */
108 /* Techwell specific */
119 /* ----------------------------------------------------------- */
120 /* card configuration */
122 #define TW68_BOARD_NOAUTO UNSET
123 #define TW68_BOARD_UNKNOWN 0
124 #define TW68_BOARD_GENERIC_6802 1
126 #define TW68_MAXBOARDS 16
127 #define TW68_INPUT_MAX 4
129 /* ----------------------------------------------------------- */
130 /* device / file handle status */
132 #define BUFFER_TIMEOUT msecs_to_jiffies(500) /* 0.5 seconds */
134 struct tw68_dev; /* forward delclaration */
136 /* buffer for one video/vbi/ts frame */
138 struct vb2_buffer vb;
139 struct list_head list;
149 u32 fourcc; /* v4l2 format id */
155 /* global device status */
160 struct v4l2_device v4l2_dev;
162 /* various device info */
163 enum tw68_decoder_type vdecoder;
164 struct video_device vdev;
165 struct v4l2_ctrl_handler hdl;
170 unsigned char pci_rev, pci_lat;
174 /* The irq mask to be used will depend upon the chip type */
178 const struct tw68_format *fmt;
179 unsigned width, height;
182 struct vb2_queue vidq;
183 struct list_head active;
186 /* various v4l controls */
187 const struct tw68_tvnorm *tvnorm; /* video */
192 /* ----------------------------------------------------------- */
194 #define tw_readl(reg) readl(dev->lmmio + ((reg) >> 2))
195 #define tw_readb(reg) readb(dev->bmmio + (reg))
196 #define tw_writel(reg, value) writel((value), dev->lmmio + ((reg) >> 2))
197 #define tw_writeb(reg, value) writeb((value), dev->bmmio + (reg))
199 #define tw_andorl(reg, mask, value) \
200 writel((readl(dev->lmmio+((reg)>>2)) & ~(mask)) |\
201 ((value) & (mask)), dev->lmmio+((reg)>>2))
202 #define tw_andorb(reg, mask, value) \
203 writeb((readb(dev->bmmio + (reg)) & ~(mask)) |\
204 ((value) & (mask)), dev->bmmio+(reg))
205 #define tw_setl(reg, bit) tw_andorl((reg), (bit), (bit))
206 #define tw_setb(reg, bit) tw_andorb((reg), (bit), (bit))
207 #define tw_clearl(reg, bit) \
208 writel((readl(dev->lmmio + ((reg) >> 2)) & ~(bit)), \
209 dev->lmmio + ((reg) >> 2))
210 #define tw_clearb(reg, bit) \
211 writeb((readb(dev->bmmio+(reg)) & ~(bit)), \
214 #define tw_wait(us) { udelay(us); }
216 /* ----------------------------------------------------------- */
219 void tw68_set_tvnorm_hw(struct tw68_dev *dev);
221 int tw68_video_init1(struct tw68_dev *dev);
222 int tw68_video_init2(struct tw68_dev *dev, int video_nr);
223 void tw68_irq_video_done(struct tw68_dev *dev, unsigned long status);
224 int tw68_video_start_dma(struct tw68_dev *dev, struct tw68_buf *buf);
226 /* ----------------------------------------------------------- */
229 int tw68_risc_buffer(struct pci_dev *pci, struct tw68_buf *buf,
230 struct scatterlist *sglist, unsigned int top_offset,
231 unsigned int bottom_offset, unsigned int bpl,
232 unsigned int padding, unsigned int lines);