drivers/media/platform/coda/coda-bit.c

   1 /*
   2  * Coda multi-standard codec IP - BIT processor functions
   3  *
   4  * Copyright (C) 2012 Vista Silicon S.L.
   5  *    Javier Martin, <javier.martin@vista-silicon.com>
   6  *    Xavier Duret
   7  * Copyright (C) 2012-2014 Philipp Zabel, Pengutronix
   8  *
   9  * This program is free software; you can redistribute it and/or modify
  10  * it under the terms of the GNU General Public License as published by
  11  * the Free Software Foundation; either version 2 of the License, or
  12  * (at your option) any later version.
  13  */
  14
  15 #include <linux/clk.h>
  16 #include <linux/irqreturn.h>
  17 #include <linux/kernel.h>
  18 #include <linux/log2.h>
  19 #include <linux/platform_device.h>
  20 #include <linux/reset.h>
  21 #include <linux/slab.h>
  22 #include <linux/videodev2.h>
  23
  24 #include <media/v4l2-common.h>
  25 #include <media/v4l2-ctrls.h>
  26 #include <media/v4l2-fh.h>
  27 #include <media/v4l2-mem2mem.h>
  28 #include <media/videobuf2-core.h>
  29 #include <media/videobuf2-dma-contig.h>
  30 #include <media/videobuf2-vmalloc.h>
  31
  32 #include "coda.h"
  33
  34 #define CODA7_PS_BUF_SIZE       0x28000
  35 #define CODA9_PS_SAVE_SIZE      (512 * 1024)
  36
  37 #define CODA_DEFAULT_GAMMA      4096
  38 #define CODA9_DEFAULT_GAMMA     24576   /* 0.75 * 32768 */
  39
  40 static void coda_free_bitstream_buffer(struct coda_ctx *ctx);
  41
  42 static inline int coda_is_initialized(struct coda_dev *dev)
  43 {
  44         return coda_read(dev, CODA_REG_BIT_CUR_PC) != 0;
  45 }
  46
  47 static inline unsigned long coda_isbusy(struct coda_dev *dev)
  48 {
  49         return coda_read(dev, CODA_REG_BIT_BUSY);
  50 }
  51
  52 static int coda_wait_timeout(struct coda_dev *dev)
  53 {
  54         unsigned long timeout = jiffies + msecs_to_jiffies(1000);
  55
  56         while (coda_isbusy(dev)) {
  57                 if (time_after(jiffies, timeout))
  58                         return -ETIMEDOUT;
  59         }
  60         return 0;
  61 }
  62
  63 static void coda_command_async(struct coda_ctx *ctx, int cmd)
  64 {
  65         struct coda_dev *dev = ctx->dev;
  66
  67         if (dev->devtype->product == CODA_960 ||
  68             dev->devtype->product == CODA_7541) {
  69                 /* Restore context related registers to CODA */
  70                 coda_write(dev, ctx->bit_stream_param,
  71                                 CODA_REG_BIT_BIT_STREAM_PARAM);
  72                 coda_write(dev, ctx->frm_dis_flg,
  73                                 CODA_REG_BIT_FRM_DIS_FLG(ctx->reg_idx));
  74                 coda_write(dev, ctx->frame_mem_ctrl,
  75                                 CODA_REG_BIT_FRAME_MEM_CTRL);
  76                 coda_write(dev, ctx->workbuf.paddr, CODA_REG_BIT_WORK_BUF_ADDR);
  77         }
  78
  79         if (dev->devtype->product == CODA_960) {
  80                 coda_write(dev, 1, CODA9_GDI_WPROT_ERR_CLR);
  81                 coda_write(dev, 0, CODA9_GDI_WPROT_RGN_EN);
  82         }
  83
  84         coda_write(dev, CODA_REG_BIT_BUSY_FLAG, CODA_REG_BIT_BUSY);
  85
  86         coda_write(dev, ctx->idx, CODA_REG_BIT_RUN_INDEX);
  87         coda_write(dev, ctx->params.codec_mode, CODA_REG_BIT_RUN_COD_STD);
  88         coda_write(dev, ctx->params.codec_mode_aux, CODA7_REG_BIT_RUN_AUX_STD);
  89
  90         coda_write(dev, cmd, CODA_REG_BIT_RUN_COMMAND);
  91 }
  92
  93 static int coda_command_sync(struct coda_ctx *ctx, int cmd)
  94 {
  95         struct coda_dev *dev = ctx->dev;
  96
  97         coda_command_async(ctx, cmd);
  98         return coda_wait_timeout(dev);
  99 }
 100
 101 int coda_hw_reset(struct coda_ctx *ctx)
 102 {
 103         struct coda_dev *dev = ctx->dev;
 104         unsigned long timeout;
 105         unsigned int idx;
 106         int ret;
 107
 108         if (!dev->rstc)
 109                 return -ENOENT;
 110
 111         idx = coda_read(dev, CODA_REG_BIT_RUN_INDEX);
 112
 113         if (dev->devtype->product == CODA_960) {
 114                 timeout = jiffies + msecs_to_jiffies(100);
 115                 coda_write(dev, 0x11, CODA9_GDI_BUS_CTRL);
 116                 while (coda_read(dev, CODA9_GDI_BUS_STATUS) != 0x77) {
 117                         if (time_after(jiffies, timeout))
 118                                 return -ETIME;
 119                         cpu_relax();
 120                 }
 121         }
 122
 123         ret = reset_control_reset(dev->rstc);
 124         if (ret < 0)
 125                 return ret;
 126
 127         if (dev->devtype->product == CODA_960)
 128                 coda_write(dev, 0x00, CODA9_GDI_BUS_CTRL);
 129         coda_write(dev, CODA_REG_BIT_BUSY_FLAG, CODA_REG_BIT_BUSY);
 130         coda_write(dev, CODA_REG_RUN_ENABLE, CODA_REG_BIT_CODE_RUN);
 131         ret = coda_wait_timeout(dev);
 132         coda_write(dev, idx, CODA_REG_BIT_RUN_INDEX);
 133
 134         return ret;
 135 }
 136
 137 static void coda_kfifo_sync_from_device(struct coda_ctx *ctx)
 138 {
 139         struct __kfifo *kfifo = &ctx->bitstream_fifo.kfifo;
 140         struct coda_dev *dev = ctx->dev;
 141         u32 rd_ptr;
 142
 143         rd_ptr = coda_read(dev, CODA_REG_BIT_RD_PTR(ctx->reg_idx));
 144         kfifo->out = (kfifo->in & ~kfifo->mask) |
 145                       (rd_ptr - ctx->bitstream.paddr);
 146         if (kfifo->out > kfifo->in)
 147                 kfifo->out -= kfifo->mask + 1;
 148 }
 149
 150 static void coda_kfifo_sync_to_device_full(struct coda_ctx *ctx)
 151 {
 152         struct __kfifo *kfifo = &ctx->bitstream_fifo.kfifo;
 153         struct coda_dev *dev = ctx->dev;
 154         u32 rd_ptr, wr_ptr;
 155
 156         rd_ptr = ctx->bitstream.paddr + (kfifo->out & kfifo->mask);
 157         coda_write(dev, rd_ptr, CODA_REG_BIT_RD_PTR(ctx->reg_idx));
 158         wr_ptr = ctx->bitstream.paddr + (kfifo->in & kfifo->mask);
 159         coda_write(dev, wr_ptr, CODA_REG_BIT_WR_PTR(ctx->reg_idx));
 160 }
 161
 162 static void coda_kfifo_sync_to_device_write(struct coda_ctx *ctx)
 163 {
 164         struct __kfifo *kfifo = &ctx->bitstream_fifo.kfifo;
 165         struct coda_dev *dev = ctx->dev;
 166         u32 wr_ptr;
 167
 168         wr_ptr = ctx->bitstream.paddr + (kfifo->in & kfifo->mask);
 169         coda_write(dev, wr_ptr, CODA_REG_BIT_WR_PTR(ctx->reg_idx));
 170 }
 171
 172 static int coda_bitstream_queue(struct coda_ctx *ctx,
 173                                 struct vb2_buffer *src_buf)
 174 {
 175         u32 src_size = vb2_get_plane_payload(src_buf, 0);
 176         u32 n;
 177
 178         n = kfifo_in(&ctx->bitstream_fifo, vb2_plane_vaddr(src_buf, 0),
 179                      src_size);
 180         if (n < src_size)
 181                 return -ENOSPC;
 182
 183         dma_sync_single_for_device(&ctx->dev->plat_dev->dev,
 184                                    ctx->bitstream.paddr, ctx->bitstream.size,
 185                                    DMA_TO_DEVICE);
 186
 187         src_buf->v4l2_buf.sequence = ctx->qsequence++;
 188
 189         return 0;
 190 }
 191
 192 static bool coda_bitstream_try_queue(struct coda_ctx *ctx,
 193                                      struct vb2_buffer *src_buf)
 194 {
 195         int ret;
 196
 197         if (coda_get_bitstream_payload(ctx) +
 198             vb2_get_plane_payload(src_buf, 0) + 512 >= ctx->bitstream.size)
 199                 return false;
 200
 201         if (vb2_plane_vaddr(src_buf, 0) == NULL) {
 202                 v4l2_err(&ctx->dev->v4l2_dev, "trying to queue empty buffer\n");
 203                 return true;
 204         }
 205
 206         ret = coda_bitstream_queue(ctx, src_buf);
 207         if (ret < 0) {
 208                 v4l2_err(&ctx->dev->v4l2_dev, "bitstream buffer overflow\n");
 209                 return false;
 210         }
 211         /* Sync read pointer to device */
 212         if (ctx == v4l2_m2m_get_curr_priv(ctx->dev->m2m_dev))
 213                 coda_kfifo_sync_to_device_write(ctx);
 214
 215         ctx->hold = false;
 216
 217         return true;
 218 }
 219
 220 void coda_fill_bitstream(struct coda_ctx *ctx)
 221 {
 222         struct vb2_buffer *src_buf;
 223         struct coda_buffer_meta *meta;
 224         u32 start;
 225
 226         while (v4l2_m2m_num_src_bufs_ready(ctx->fh.m2m_ctx) > 0) {
 227                 /*
 228                  * Only queue a single JPEG into the bitstream buffer, except
 229                  * to increase payload over 512 bytes or if in hold state.
 230                  */
 231                 if (ctx->codec->src_fourcc == V4L2_PIX_FMT_JPEG &&
 232                     (coda_get_bitstream_payload(ctx) >= 512) && !ctx->hold)
 233                         break;
 234
 235                 src_buf = v4l2_m2m_next_src_buf(ctx->fh.m2m_ctx);
 236
 237                 /* Drop frames that do not start/end with a SOI/EOI markers */
 238                 if (ctx->codec->src_fourcc == V4L2_PIX_FMT_JPEG &&
 239                     !coda_jpeg_check_buffer(ctx, src_buf)) {
 240                         v4l2_err(&ctx->dev->v4l2_dev,
 241                                  "dropping invalid JPEG frame\n");
 242                         src_buf = v4l2_m2m_src_buf_remove(ctx->fh.m2m_ctx);
 243                         v4l2_m2m_buf_done(src_buf, VB2_BUF_STATE_ERROR);
 244                         continue;
 245                 }
 246
 247                 /* Buffer start position */
 248                 start = ctx->bitstream_fifo.kfifo.in &
 249                         ctx->bitstream_fifo.kfifo.mask;
 250
 251                 if (coda_bitstream_try_queue(ctx, src_buf)) {
 252                         /*
 253                          * Source buffer is queued in the bitstream ringbuffer;
 254                          * queue the timestamp and mark source buffer as done
 255                          */
 256                         src_buf = v4l2_m2m_src_buf_remove(ctx->fh.m2m_ctx);
 257
 258                         meta = kmalloc(sizeof(*meta), GFP_KERNEL);
 259                         if (meta) {
 260                                 meta->sequence = src_buf->v4l2_buf.sequence;
 261                                 meta->timecode = src_buf->v4l2_buf.timecode;
 262                                 meta->timestamp = src_buf->v4l2_buf.timestamp;
 263                                 meta->start = start;
 264                                 meta->end = ctx->bitstream_fifo.kfifo.in &
 265                                             ctx->bitstream_fifo.kfifo.mask;
 266                                 list_add_tail(&meta->list,
 267                                               &ctx->buffer_meta_list);
 268                         }
 269
 270                         v4l2_m2m_buf_done(src_buf, VB2_BUF_STATE_DONE);
 271                 } else {
 272                         break;
 273                 }
 274         }
 275 }
 276
 277 void coda_bit_stream_end_flag(struct coda_ctx *ctx)
 278 {
 279         struct coda_dev *dev = ctx->dev;
 280
 281         ctx->bit_stream_param |= CODA_BIT_STREAM_END_FLAG;
 282
 283         /* If this context is currently running, update the hardware flag */
 284         if ((dev->devtype->product == CODA_960) &&
 285             coda_isbusy(dev) &&
 286             (ctx->idx == coda_read(dev, CODA_REG_BIT_RUN_INDEX))) {
 287                 coda_write(dev, ctx->bit_stream_param,
 288                            CODA_REG_BIT_BIT_STREAM_PARAM);
 289         }
 290 }
 291
 292 static void coda_parabuf_write(struct coda_ctx *ctx, int index, u32 value)
 293 {
 294         struct coda_dev *dev = ctx->dev;
 295         u32 *p = ctx->parabuf.vaddr;
 296
 297         if (dev->devtype->product == CODA_DX6)
 298                 p[index] = value;
 299         else
 300                 p[index ^ 1] = value;
 301 }
 302
 303 static void coda_free_framebuffers(struct coda_ctx *ctx)
 304 {
 305         int i;
 306
 307         for (i = 0; i < CODA_MAX_FRAMEBUFFERS; i++)
 308                 coda_free_aux_buf(ctx->dev, &ctx->internal_frames[i]);
 309 }
 310
 311 static int coda_alloc_framebuffers(struct coda_ctx *ctx,
 312                                    struct coda_q_data *q_data, u32 fourcc)
 313 {
 314         struct coda_dev *dev = ctx->dev;
 315         int width, height;
 316         dma_addr_t paddr;
 317         int ysize;
 318         int ret;
 319         int i;
 320
 321         if (ctx->codec && (ctx->codec->src_fourcc == V4L2_PIX_FMT_H264 ||
 322              ctx->codec->dst_fourcc == V4L2_PIX_FMT_H264)) {
 323                 width = round_up(q_data->width, 16);
 324                 height = round_up(q_data->height, 16);
 325         } else {
 326                 width = round_up(q_data->width, 8);
 327                 height = q_data->height;
 328         }
 329         ysize = width * height;
 330
 331         /* Allocate frame buffers */
 332         for (i = 0; i < ctx->num_internal_frames; i++) {
 333                 size_t size;
 334                 char *name;
 335
 336                 size = ysize + ysize / 2;
 337                 if (ctx->codec->src_fourcc == V4L2_PIX_FMT_H264 &&
 338                     dev->devtype->product != CODA_DX6)
 339                         size += ysize / 4;
 340                 name = kasprintf(GFP_KERNEL, "fb%d", i);
 341                 ret = coda_alloc_context_buf(ctx, &ctx->internal_frames[i],
 342                                              size, name);
 343                 kfree(name);
 344                 if (ret < 0) {
 345                         coda_free_framebuffers(ctx);
 346                         return ret;
 347                 }
 348         }
 349
 350         /* Register frame buffers in the parameter buffer */
 351         for (i = 0; i < ctx->num_internal_frames; i++) {
 352                 paddr = ctx->internal_frames[i].paddr;
 353                 /* Start addresses of Y, Cb, Cr planes */
 354                 coda_parabuf_write(ctx, i * 3 + 0, paddr);
 355                 coda_parabuf_write(ctx, i * 3 + 1, paddr + ysize);
 356                 coda_parabuf_write(ctx, i * 3 + 2, paddr + ysize + ysize / 4);
 357
 358                 /* mvcol buffer for h.264 */
 359                 if (ctx->codec->src_fourcc == V4L2_PIX_FMT_H264 &&
 360                     dev->devtype->product != CODA_DX6)
 361                         coda_parabuf_write(ctx, 96 + i,
 362                                            ctx->internal_frames[i].paddr +
 363                                            ysize + ysize/4 + ysize/4);
 364         }
 365
 366         /* mvcol buffer for mpeg4 */
 367         if ((dev->devtype->product != CODA_DX6) &&
 368             (ctx->codec->src_fourcc == V4L2_PIX_FMT_MPEG4))
 369                 coda_parabuf_write(ctx, 97, ctx->internal_frames[i].paddr +
 370                                             ysize + ysize/4 + ysize/4);
 371
 372         return 0;
 373 }
 374
 375 static void coda_free_context_buffers(struct coda_ctx *ctx)
 376 {
 377         struct coda_dev *dev = ctx->dev;
 378
 379         coda_free_aux_buf(dev, &ctx->slicebuf);
 380         coda_free_aux_buf(dev, &ctx->psbuf);
 381         if (dev->devtype->product != CODA_DX6)
 382                 coda_free_aux_buf(dev, &ctx->workbuf);
 383 }
 384
 385 static int coda_alloc_context_buffers(struct coda_ctx *ctx,
 386                                       struct coda_q_data *q_data)
 387 {
 388         struct coda_dev *dev = ctx->dev;
 389         size_t size;
 390         int ret;
 391
 392         if (dev->devtype->product == CODA_DX6)
 393                 return 0;
 394
 395         if (!ctx->slicebuf.vaddr && q_data->fourcc == V4L2_PIX_FMT_H264) {
 396                 /* worst case slice size */
 397                 size = (DIV_ROUND_UP(q_data->width, 16) *
 398                         DIV_ROUND_UP(q_data->height, 16)) * 3200 / 8 + 512;
 399                 ret = coda_alloc_context_buf(ctx, &ctx->slicebuf, size,
 400                                              "slicebuf");
 401                 if (ret < 0) {
 402                         v4l2_err(&dev->v4l2_dev,
 403                                  "failed to allocate %d byte slice buffer",
 404                                  ctx->slicebuf.size);
 405                         return ret;
 406                 }
 407         }
 408
 409         if (!ctx->psbuf.vaddr && dev->devtype->product == CODA_7541) {
 410                 ret = coda_alloc_context_buf(ctx, &ctx->psbuf,
 411                                              CODA7_PS_BUF_SIZE, "psbuf");
 412                 if (ret < 0) {
 413                         v4l2_err(&dev->v4l2_dev,
 414                                  "failed to allocate psmem buffer");
 415                         goto err;
 416                 }
 417         }
 418
 419         if (!ctx->workbuf.vaddr) {
 420                 size = dev->devtype->workbuf_size;
 421                 if (dev->devtype->product == CODA_960 &&
 422                     q_data->fourcc == V4L2_PIX_FMT_H264)
 423                         size += CODA9_PS_SAVE_SIZE;
 424                 ret = coda_alloc_context_buf(ctx, &ctx->workbuf, size,
 425                                              "workbuf");
 426                 if (ret < 0) {
 427                         v4l2_err(&dev->v4l2_dev,
 428                                  "failed to allocate %d byte context buffer",
 429                                  ctx->workbuf.size);
 430                         goto err;
 431                 }
 432         }
 433
 434         return 0;
 435
 436 err:
 437         coda_free_context_buffers(ctx);
 438         return ret;
 439 }
 440
 441 static int coda_encode_header(struct coda_ctx *ctx, struct vb2_buffer *buf,
 442                               int header_code, u8 *header, int *size)
 443 {
 444         struct coda_dev *dev = ctx->dev;
 445         size_t bufsize;
 446         int ret;
 447         int i;
 448
 449         if (dev->devtype->product == CODA_960)
 450                 memset(vb2_plane_vaddr(buf, 0), 0, 64);
 451
 452         coda_write(dev, vb2_dma_contig_plane_dma_addr(buf, 0),
 453                    CODA_CMD_ENC_HEADER_BB_START);
 454         bufsize = vb2_plane_size(buf, 0);
 455         if (dev->devtype->product == CODA_960)
 456                 bufsize /= 1024;
 457         coda_write(dev, bufsize, CODA_CMD_ENC_HEADER_BB_SIZE);
 458         coda_write(dev, header_code, CODA_CMD_ENC_HEADER_CODE);
 459         ret = coda_command_sync(ctx, CODA_COMMAND_ENCODE_HEADER);
 460         if (ret < 0) {
 461                 v4l2_err(&dev->v4l2_dev, "CODA_COMMAND_ENCODE_HEADER timeout\n");
 462                 return ret;
 463         }
 464
 465         if (dev->devtype->product == CODA_960) {
 466                 for (i = 63; i > 0; i--)
 467                         if (((char *)vb2_plane_vaddr(buf, 0))[i] != 0)
 468                                 break;
 469                 *size = i + 1;
 470         } else {
 471                 *size = coda_read(dev, CODA_REG_BIT_WR_PTR(ctx->reg_idx)) -
 472                         coda_read(dev, CODA_CMD_ENC_HEADER_BB_START);
 473         }
 474         memcpy(header, vb2_plane_vaddr(buf, 0), *size);
 475
 476         return 0;
 477 }
 478
 479 static phys_addr_t coda_iram_alloc(struct coda_iram_info *iram, size_t size)
 480 {
 481         phys_addr_t ret;
 482
 483         size = round_up(size, 1024);
 484         if (size > iram->remaining)
 485                 return 0;
 486         iram->remaining -= size;
 487
 488         ret = iram->next_paddr;
 489         iram->next_paddr += size;
 490
 491         return ret;
 492 }
 493
 494 static void coda_setup_iram(struct coda_ctx *ctx)
 495 {
 496         struct coda_iram_info *iram_info = &ctx->iram_info;
 497         struct coda_dev *dev = ctx->dev;
 498         int w64, w128;
 499         int mb_width;
 500         int dbk_bits;
 501         int bit_bits;
 502         int ip_bits;
 503
 504         memset(iram_info, 0, sizeof(*iram_info));
 505         iram_info->next_paddr = dev->iram.paddr;
 506         iram_info->remaining = dev->iram.size;
 507
 508         if (!dev->iram.vaddr)
 509                 return;
 510
 511         switch (dev->devtype->product) {
 512         case CODA_7541:
 513                 dbk_bits = CODA7_USE_HOST_DBK_ENABLE | CODA7_USE_DBK_ENABLE;
 514                 bit_bits = CODA7_USE_HOST_BIT_ENABLE | CODA7_USE_BIT_ENABLE;
 515                 ip_bits = CODA7_USE_HOST_IP_ENABLE | CODA7_USE_IP_ENABLE;
 516                 break;
 517         case CODA_960:
 518                 dbk_bits = CODA9_USE_HOST_DBK_ENABLE | CODA9_USE_DBK_ENABLE;
 519                 bit_bits = CODA9_USE_HOST_BIT_ENABLE | CODA7_USE_BIT_ENABLE;
 520                 ip_bits = CODA9_USE_HOST_IP_ENABLE | CODA7_USE_IP_ENABLE;
 521                 break;
 522         default: /* CODA_DX6 */
 523                 return;
 524         }
 525
 526         if (ctx->inst_type == CODA_INST_ENCODER) {
 527                 struct coda_q_data *q_data_src;
 528
 529                 q_data_src = get_q_data(ctx, V4L2_BUF_TYPE_VIDEO_OUTPUT);
 530                 mb_width = DIV_ROUND_UP(q_data_src->width, 16);
 531                 w128 = mb_width * 128;
 532                 w64 = mb_width * 64;
 533
 534                 /* Prioritize in case IRAM is too small for everything */
 535                 if (dev->devtype->product == CODA_7541) {
 536                         iram_info->search_ram_size = round_up(mb_width * 16 *
 537                                                               36 + 2048, 1024);
 538                         iram_info->search_ram_paddr = coda_iram_alloc(iram_info,
 539                                                 iram_info->search_ram_size);
 540                         if (!iram_info->search_ram_paddr) {
 541                                 pr_err("IRAM is smaller than the search ram size\n");
 542                                 goto out;
 543                         }
 544                         iram_info->axi_sram_use |= CODA7_USE_HOST_ME_ENABLE |
 545                                                    CODA7_USE_ME_ENABLE;
 546                 }
 547
 548                 /* Only H.264BP and H.263P3 are considered */
 549                 iram_info->buf_dbk_y_use = coda_iram_alloc(iram_info, w64);
 550                 iram_info->buf_dbk_c_use = coda_iram_alloc(iram_info, w64);
 551                 if (!iram_info->buf_dbk_c_use)
 552                         goto out;
 553                 iram_info->axi_sram_use |= dbk_bits;
 554
 555                 iram_info->buf_bit_use = coda_iram_alloc(iram_info, w128);
 556                 if (!iram_info->buf_bit_use)
 557                         goto out;
 558                 iram_info->axi_sram_use |= bit_bits;
 559
 560                 iram_info->buf_ip_ac_dc_use = coda_iram_alloc(iram_info, w128);
 561                 if (!iram_info->buf_ip_ac_dc_use)
 562                         goto out;
 563                 iram_info->axi_sram_use |= ip_bits;
 564
 565                 /* OVL and BTP disabled for encoder */
 566         } else if (ctx->inst_type == CODA_INST_DECODER) {
 567                 struct coda_q_data *q_data_dst;
 568
 569                 q_data_dst = get_q_data(ctx, V4L2_BUF_TYPE_VIDEO_CAPTURE);
 570                 mb_width = DIV_ROUND_UP(q_data_dst->width, 16);
 571                 w128 = mb_width * 128;
 572
 573                 iram_info->buf_dbk_y_use = coda_iram_alloc(iram_info, w128);
 574                 iram_info->buf_dbk_c_use = coda_iram_alloc(iram_info, w128);
 575                 if (!iram_info->buf_dbk_c_use)
 576                         goto out;
 577                 iram_info->axi_sram_use |= dbk_bits;
 578
 579                 iram_info->buf_bit_use = coda_iram_alloc(iram_info, w128);
 580                 if (!iram_info->buf_bit_use)
 581                         goto out;
 582                 iram_info->axi_sram_use |= bit_bits;
 583
 584                 iram_info->buf_ip_ac_dc_use = coda_iram_alloc(iram_info, w128);
 585                 if (!iram_info->buf_ip_ac_dc_use)
 586                         goto out;
 587                 iram_info->axi_sram_use |= ip_bits;
 588
 589                 /* OVL and BTP unused as there is no VC1 support yet */
 590         }
 591
 592 out:
 593         if (!(iram_info->axi_sram_use & CODA7_USE_HOST_IP_ENABLE))
 594                 v4l2_dbg(1, coda_debug, &ctx->dev->v4l2_dev,
 595                          "IRAM smaller than needed\n");
 596
 597         if (dev->devtype->product == CODA_7541) {
 598                 /* TODO - Enabling these causes picture errors on CODA7541 */
 599                 if (ctx->inst_type == CODA_INST_DECODER) {
 600                         /* fw 1.4.50 */
 601                         iram_info->axi_sram_use &= ~(CODA7_USE_HOST_IP_ENABLE |
 602                                                      CODA7_USE_IP_ENABLE);
 603                 } else {
 604                         /* fw 13.4.29 */
 605                         iram_info->axi_sram_use &= ~(CODA7_USE_HOST_IP_ENABLE |
 606                                                      CODA7_USE_HOST_DBK_ENABLE |
 607                                                      CODA7_USE_IP_ENABLE |
 608                                                      CODA7_USE_DBK_ENABLE);
 609                 }
 610         }
 611 }
 612
 613 static u32 coda_supported_firmwares[] = {
 614         CODA_FIRMWARE_VERNUM(CODA_DX6, 2, 2, 5),
 615         CODA_FIRMWARE_VERNUM(CODA_7541, 1, 4, 50),
 616         CODA_FIRMWARE_VERNUM(CODA_960, 2, 1, 5),
 617 };
 618
 619 static bool coda_firmware_supported(u32 vernum)
 620 {
 621         int i;
 622
 623         for (i = 0; i < ARRAY_SIZE(coda_supported_firmwares); i++)
 624                 if (vernum == coda_supported_firmwares[i])
 625                         return true;
 626         return false;
 627 }
 628
 629 int coda_check_firmware(struct coda_dev *dev)
 630 {
 631         u16 product, major, minor, release;
 632         u32 data;
 633         int ret;
 634
 635         ret = clk_prepare_enable(dev->clk_per);
 636         if (ret)
 637                 goto err_clk_per;
 638
 639         ret = clk_prepare_enable(dev->clk_ahb);
 640         if (ret)
 641                 goto err_clk_ahb;
 642
 643         coda_write(dev, 0, CODA_CMD_FIRMWARE_VERNUM);
 644         coda_write(dev, CODA_REG_BIT_BUSY_FLAG, CODA_REG_BIT_BUSY);
 645         coda_write(dev, 0, CODA_REG_BIT_RUN_INDEX);
 646         coda_write(dev, 0, CODA_REG_BIT_RUN_COD_STD);
 647         coda_write(dev, CODA_COMMAND_FIRMWARE_GET, CODA_REG_BIT_RUN_COMMAND);
 648         if (coda_wait_timeout(dev)) {
 649                 v4l2_err(&dev->v4l2_dev, "firmware get command error\n");
 650                 ret = -EIO;
 651                 goto err_run_cmd;
 652         }
 653
 654         if (dev->devtype->product == CODA_960) {
 655                 data = coda_read(dev, CODA9_CMD_FIRMWARE_CODE_REV);
 656                 v4l2_info(&dev->v4l2_dev, "Firmware code revision: %d\n",
 657                           data);
 658         }
 659
 660         /* Check we are compatible with the loaded firmware */
 661         data = coda_read(dev, CODA_CMD_FIRMWARE_VERNUM);
 662         product = CODA_FIRMWARE_PRODUCT(data);
 663         major = CODA_FIRMWARE_MAJOR(data);
 664         minor = CODA_FIRMWARE_MINOR(data);
 665         release = CODA_FIRMWARE_RELEASE(data);
 666
 667         clk_disable_unprepare(dev->clk_per);
 668         clk_disable_unprepare(dev->clk_ahb);
 669
 670         if (product != dev->devtype->product) {
 671                 v4l2_err(&dev->v4l2_dev,
 672                          "Wrong firmware. Hw: %s, Fw: %s, Version: %u.%u.%u\n",
 673                          coda_product_name(dev->devtype->product),
 674                          coda_product_name(product), major, minor, release);
 675                 return -EINVAL;
 676         }
 677
 678         v4l2_info(&dev->v4l2_dev, "Initialized %s.\n",
 679                   coda_product_name(product));
 680
 681         if (coda_firmware_supported(data)) {
 682                 v4l2_info(&dev->v4l2_dev, "Firmware version: %u.%u.%u\n",
 683                           major, minor, release);
 684         } else {
 685                 v4l2_warn(&dev->v4l2_dev,
 686                           "Unsupported firmware version: %u.%u.%u\n",
 687                           major, minor, release);
 688         }
 689
 690         return 0;
 691
 692 err_run_cmd:
 693         clk_disable_unprepare(dev->clk_ahb);
 694 err_clk_ahb:
 695         clk_disable_unprepare(dev->clk_per);
 696 err_clk_per:
 697         return ret;
 698 }
 699
 700 /*
 701  * Encoder context operations
 702  */
 703
 704 static int coda_encoder_reqbufs(struct coda_ctx *ctx,
 705                                 struct v4l2_requestbuffers *rb)
 706 {
 707         struct coda_q_data *q_data_src;
 708         int ret;
 709
 710         if (rb->type != V4L2_BUF_TYPE_VIDEO_OUTPUT)
 711                 return 0;
 712
 713         if (rb->count) {
 714                 q_data_src = get_q_data(ctx, V4L2_BUF_TYPE_VIDEO_OUTPUT);
 715                 ret = coda_alloc_context_buffers(ctx, q_data_src);
 716                 if (ret < 0)
 717                         return ret;
 718         } else {
 719                 coda_free_context_buffers(ctx);
 720         }
 721
 722         return 0;
 723 }
 724
 725 static int coda_start_encoding(struct coda_ctx *ctx)
 726 {
 727         struct coda_dev *dev = ctx->dev;
 728         struct v4l2_device *v4l2_dev = &dev->v4l2_dev;
 729         struct coda_q_data *q_data_src, *q_data_dst;
 730         u32 bitstream_buf, bitstream_size;
 731         struct vb2_buffer *buf;
 732         int gamma, ret, value;
 733         u32 dst_fourcc;
 734         int num_fb;
 735         u32 stride;
 736
 737         q_data_src = get_q_data(ctx, V4L2_BUF_TYPE_VIDEO_OUTPUT);
 738         q_data_dst = get_q_data(ctx, V4L2_BUF_TYPE_VIDEO_CAPTURE);
 739         dst_fourcc = q_data_dst->fourcc;
 740
 741         buf = v4l2_m2m_next_dst_buf(ctx->fh.m2m_ctx);
 742         bitstream_buf = vb2_dma_contig_plane_dma_addr(buf, 0);
 743         bitstream_size = q_data_dst->sizeimage;
 744
 745         if (!coda_is_initialized(dev)) {
 746                 v4l2_err(v4l2_dev, "coda is not initialized.\n");
 747                 return -EFAULT;
 748         }
 749
 750         if (dst_fourcc == V4L2_PIX_FMT_JPEG) {
 751                 if (!ctx->params.jpeg_qmat_tab[0])
 752                         ctx->params.jpeg_qmat_tab[0] = kmalloc(64, GFP_KERNEL);
 753                 if (!ctx->params.jpeg_qmat_tab[1])
 754                         ctx->params.jpeg_qmat_tab[1] = kmalloc(64, GFP_KERNEL);
 755                 coda_set_jpeg_compression_quality(ctx, ctx->params.jpeg_quality);
 756         }
 757
 758         mutex_lock(&dev->coda_mutex);
 759
 760         coda_write(dev, ctx->parabuf.paddr, CODA_REG_BIT_PARA_BUF_ADDR);
 761         coda_write(dev, bitstream_buf, CODA_REG_BIT_RD_PTR(ctx->reg_idx));
 762         coda_write(dev, bitstream_buf, CODA_REG_BIT_WR_PTR(ctx->reg_idx));
 763         switch (dev->devtype->product) {
 764         case CODA_DX6:
 765                 coda_write(dev, CODADX6_STREAM_BUF_DYNALLOC_EN |
 766                         CODADX6_STREAM_BUF_PIC_RESET, CODA_REG_BIT_STREAM_CTRL);
 767                 break;
 768         case CODA_960:
 769                 coda_write(dev, 0, CODA9_GDI_WPROT_RGN_EN);
 770                 /* fallthrough */
 771         case CODA_7541:
 772                 coda_write(dev, CODA7_STREAM_BUF_DYNALLOC_EN |
 773                         CODA7_STREAM_BUF_PIC_RESET, CODA_REG_BIT_STREAM_CTRL);
 774                 break;
 775         }
 776
 777         ctx->frame_mem_ctrl &= ~CODA_FRAME_CHROMA_INTERLEAVE;
 778         if (q_data_src->fourcc == V4L2_PIX_FMT_NV12)
 779                 ctx->frame_mem_ctrl |= CODA_FRAME_CHROMA_INTERLEAVE;
 780         coda_write(dev, ctx->frame_mem_ctrl, CODA_REG_BIT_FRAME_MEM_CTRL);
 781
 782         if (dev->devtype->product == CODA_DX6) {
 783                 /* Configure the coda */
 784                 coda_write(dev, dev->iram.paddr,
 785                            CODADX6_REG_BIT_SEARCH_RAM_BASE_ADDR);
 786         }
 787
 788         /* Could set rotation here if needed */
 789         value = 0;
 790         switch (dev->devtype->product) {
 791         case CODA_DX6:
 792                 value = (q_data_src->width & CODADX6_PICWIDTH_MASK)
 793                         << CODADX6_PICWIDTH_OFFSET;
 794                 value |= (q_data_src->height & CODADX6_PICHEIGHT_MASK)
 795                          << CODA_PICHEIGHT_OFFSET;
 796                 break;
 797         case CODA_7541:
 798                 if (dst_fourcc == V4L2_PIX_FMT_H264) {
 799                         value = (round_up(q_data_src->width, 16) &
 800                                  CODA7_PICWIDTH_MASK) << CODA7_PICWIDTH_OFFSET;
 801                         value |= (round_up(q_data_src->height, 16) &
 802                                  CODA7_PICHEIGHT_MASK) << CODA_PICHEIGHT_OFFSET;
 803                         break;
 804                 }
 805                 /* fallthrough */
 806         case CODA_960:
 807                 value = (q_data_src->width & CODA7_PICWIDTH_MASK)
 808                         << CODA7_PICWIDTH_OFFSET;
 809                 value |= (q_data_src->height & CODA7_PICHEIGHT_MASK)
 810                          << CODA_PICHEIGHT_OFFSET;
 811         }
 812         coda_write(dev, value, CODA_CMD_ENC_SEQ_SRC_SIZE);
 813         if (dst_fourcc == V4L2_PIX_FMT_JPEG)
 814                 ctx->params.framerate = 0;
 815         coda_write(dev, ctx->params.framerate,
 816                    CODA_CMD_ENC_SEQ_SRC_F_RATE);
 817
 818         ctx->params.codec_mode = ctx->codec->mode;
 819         switch (dst_fourcc) {
 820         case V4L2_PIX_FMT_MPEG4:
 821                 if (dev->devtype->product == CODA_960)
 822                         coda_write(dev, CODA9_STD_MPEG4,
 823                                    CODA_CMD_ENC_SEQ_COD_STD);
 824                 else
 825                         coda_write(dev, CODA_STD_MPEG4,
 826                                    CODA_CMD_ENC_SEQ_COD_STD);
 827                 coda_write(dev, 0, CODA_CMD_ENC_SEQ_MP4_PARA);
 828                 break;
 829         case V4L2_PIX_FMT_H264:
 830                 if (dev->devtype->product == CODA_960)
 831                         coda_write(dev, CODA9_STD_H264,
 832                                    CODA_CMD_ENC_SEQ_COD_STD);
 833                 else
 834                         coda_write(dev, CODA_STD_H264,
 835                                    CODA_CMD_ENC_SEQ_COD_STD);
 836                 if (ctx->params.h264_deblk_enabled) {
 837                         value = ((ctx->params.h264_deblk_alpha &
 838                                   CODA_264PARAM_DEBLKFILTEROFFSETALPHA_MASK) <<
 839                                  CODA_264PARAM_DEBLKFILTEROFFSETALPHA_OFFSET) |
 840                                 ((ctx->params.h264_deblk_beta &
 841                                   CODA_264PARAM_DEBLKFILTEROFFSETBETA_MASK) <<
 842                                  CODA_264PARAM_DEBLKFILTEROFFSETBETA_OFFSET);
 843                 } else {
 844                         value = 1 << CODA_264PARAM_DISABLEDEBLK_OFFSET;
 845                 }
 846                 coda_write(dev, value, CODA_CMD_ENC_SEQ_264_PARA);
 847                 break;
 848         case V4L2_PIX_FMT_JPEG:
 849                 coda_write(dev, 0, CODA_CMD_ENC_SEQ_JPG_PARA);
 850                 coda_write(dev, ctx->params.jpeg_restart_interval,
 851                                 CODA_CMD_ENC_SEQ_JPG_RST_INTERVAL);
 852                 coda_write(dev, 0, CODA_CMD_ENC_SEQ_JPG_THUMB_EN);
 853                 coda_write(dev, 0, CODA_CMD_ENC_SEQ_JPG_THUMB_SIZE);
 854                 coda_write(dev, 0, CODA_CMD_ENC_SEQ_JPG_THUMB_OFFSET);
 855
 856                 coda_jpeg_write_tables(ctx);
 857                 break;
 858         default:
 859                 v4l2_err(v4l2_dev,
 860                          "dst format (0x%08x) invalid.\n", dst_fourcc);
 861                 ret = -EINVAL;
 862                 goto out;
 863         }
 864
 865         /*
 866          * slice mode and GOP size registers are used for thumb size/offset
 867          * in JPEG mode
 868          */
 869         if (dst_fourcc != V4L2_PIX_FMT_JPEG) {
 870                 switch (ctx->params.slice_mode) {
 871                 case V4L2_MPEG_VIDEO_MULTI_SLICE_MODE_SINGLE:
 872                         value = 0;
 873                         break;
 874                 case V4L2_MPEG_VIDEO_MULTI_SICE_MODE_MAX_MB:
 875                         value  = (ctx->params.slice_max_mb &
 876                                   CODA_SLICING_SIZE_MASK)
 877                                  << CODA_SLICING_SIZE_OFFSET;
 878                         value |= (1 & CODA_SLICING_UNIT_MASK)
 879                                  << CODA_SLICING_UNIT_OFFSET;
 880                         value |=  1 & CODA_SLICING_MODE_MASK;
 881                         break;
 882                 case V4L2_MPEG_VIDEO_MULTI_SICE_MODE_MAX_BYTES:
 883                         value  = (ctx->params.slice_max_bits &
 884                                   CODA_SLICING_SIZE_MASK)
 885                                  << CODA_SLICING_SIZE_OFFSET;
 886                         value |= (0 & CODA_SLICING_UNIT_MASK)
 887                                  << CODA_SLICING_UNIT_OFFSET;
 888                         value |=  1 & CODA_SLICING_MODE_MASK;
 889                         break;
 890                 }
 891                 coda_write(dev, value, CODA_CMD_ENC_SEQ_SLICE_MODE);
 892                 value = ctx->params.gop_size & CODA_GOP_SIZE_MASK;
 893                 coda_write(dev, value, CODA_CMD_ENC_SEQ_GOP_SIZE);
 894         }
 895
 896         if (ctx->params.bitrate) {
 897                 /* Rate control enabled */
 898                 value = (ctx->params.bitrate & CODA_RATECONTROL_BITRATE_MASK)
 899                         << CODA_RATECONTROL_BITRATE_OFFSET;
 900                 value |=  1 & CODA_RATECONTROL_ENABLE_MASK;
 901                 if (dev->devtype->product == CODA_960)
 902                         value |= BIT(31); /* disable autoskip */
 903         } else {
 904                 value = 0;
 905         }
 906         coda_write(dev, value, CODA_CMD_ENC_SEQ_RC_PARA);
 907
 908         coda_write(dev, 0, CODA_CMD_ENC_SEQ_RC_BUF_SIZE);
 909         coda_write(dev, ctx->params.intra_refresh,
 910                    CODA_CMD_ENC_SEQ_INTRA_REFRESH);
 911
 912         coda_write(dev, bitstream_buf, CODA_CMD_ENC_SEQ_BB_START);
 913         coda_write(dev, bitstream_size / 1024, CODA_CMD_ENC_SEQ_BB_SIZE);
 914
 915
 916         value = 0;
 917         if (dev->devtype->product == CODA_960)
 918                 gamma = CODA9_DEFAULT_GAMMA;
 919         else
 920                 gamma = CODA_DEFAULT_GAMMA;
 921         if (gamma > 0) {
 922                 coda_write(dev, (gamma & CODA_GAMMA_MASK) << CODA_GAMMA_OFFSET,
 923                            CODA_CMD_ENC_SEQ_RC_GAMMA);
 924         }
 925
 926         if (ctx->params.h264_min_qp || ctx->params.h264_max_qp) {
 927                 coda_write(dev,
 928                            ctx->params.h264_min_qp << CODA_QPMIN_OFFSET |
 929                            ctx->params.h264_max_qp << CODA_QPMAX_OFFSET,
 930                            CODA_CMD_ENC_SEQ_RC_QP_MIN_MAX);
 931         }
 932         if (dev->devtype->product == CODA_960) {
 933                 if (ctx->params.h264_max_qp)
 934                         value |= 1 << CODA9_OPTION_RCQPMAX_OFFSET;
 935                 if (CODA_DEFAULT_GAMMA > 0)
 936                         value |= 1 << CODA9_OPTION_GAMMA_OFFSET;
 937         } else {
 938                 if (CODA_DEFAULT_GAMMA > 0) {
 939                         if (dev->devtype->product == CODA_DX6)
 940                                 value |= 1 << CODADX6_OPTION_GAMMA_OFFSET;
 941                         else
 942                                 value |= 1 << CODA7_OPTION_GAMMA_OFFSET;
 943                 }
 944                 if (ctx->params.h264_min_qp)
 945                         value |= 1 << CODA7_OPTION_RCQPMIN_OFFSET;
 946                 if (ctx->params.h264_max_qp)
 947                         value |= 1 << CODA7_OPTION_RCQPMAX_OFFSET;
 948         }
 949         coda_write(dev, value, CODA_CMD_ENC_SEQ_OPTION);
 950
 951         coda_write(dev, 0, CODA_CMD_ENC_SEQ_RC_INTERVAL_MODE);
 952
 953         coda_setup_iram(ctx);
 954
 955         if (dst_fourcc == V4L2_PIX_FMT_H264) {
 956                 switch (dev->devtype->product) {
 957                 case CODA_DX6:
 958                         value = FMO_SLICE_SAVE_BUF_SIZE << 7;
 959                         coda_write(dev, value, CODADX6_CMD_ENC_SEQ_FMO);
 960                         break;
 961                 case CODA_7541:
 962                         coda_write(dev, ctx->iram_info.search_ram_paddr,
 963                                         CODA7_CMD_ENC_SEQ_SEARCH_BASE);
 964                         coda_write(dev, ctx->iram_info.search_ram_size,
 965                                         CODA7_CMD_ENC_SEQ_SEARCH_SIZE);
 966                         break;
 967                 case CODA_960:
 968                         coda_write(dev, 0, CODA9_CMD_ENC_SEQ_ME_OPTION);
 969                         coda_write(dev, 0, CODA9_CMD_ENC_SEQ_INTRA_WEIGHT);
 970                 }
 971         }
 972
 973         ret = coda_command_sync(ctx, CODA_COMMAND_SEQ_INIT);
 974         if (ret < 0) {
 975                 v4l2_err(v4l2_dev, "CODA_COMMAND_SEQ_INIT timeout\n");
 976                 goto out;
 977         }
 978
 979         if (coda_read(dev, CODA_RET_ENC_SEQ_SUCCESS) == 0) {
 980                 v4l2_err(v4l2_dev, "CODA_COMMAND_SEQ_INIT failed\n");
 981                 ret = -EFAULT;
 982                 goto out;
 983         }
 984
 985         if (dst_fourcc != V4L2_PIX_FMT_JPEG) {
 986                 if (dev->devtype->product == CODA_960)
 987                         ctx->num_internal_frames = 4;
 988                 else
 989                         ctx->num_internal_frames = 2;
 990                 ret = coda_alloc_framebuffers(ctx, q_data_src, dst_fourcc);
 991                 if (ret < 0) {
 992                         v4l2_err(v4l2_dev, "failed to allocate framebuffers\n");
 993                         goto out;
 994                 }
 995                 num_fb = 2;
 996                 stride = q_data_src->bytesperline;
 997         } else {
 998                 ctx->num_internal_frames = 0;
 999                 num_fb = 0;
1000                 stride = 0;
1001         }
1002         coda_write(dev, num_fb, CODA_CMD_SET_FRAME_BUF_NUM);
1003         coda_write(dev, stride, CODA_CMD_SET_FRAME_BUF_STRIDE);
1004
1005         if (dev->devtype->product == CODA_7541) {
1006                 coda_write(dev, q_data_src->bytesperline,
1007                                 CODA7_CMD_SET_FRAME_SOURCE_BUF_STRIDE);
1008         }
1009         if (dev->devtype->product != CODA_DX6) {
1010                 coda_write(dev, ctx->iram_info.buf_bit_use,
1011                                 CODA7_CMD_SET_FRAME_AXI_BIT_ADDR);
1012                 coda_write(dev, ctx->iram_info.buf_ip_ac_dc_use,
1013                                 CODA7_CMD_SET_FRAME_AXI_IPACDC_ADDR);
1014                 coda_write(dev, ctx->iram_info.buf_dbk_y_use,
1015                                 CODA7_CMD_SET_FRAME_AXI_DBKY_ADDR);
1016                 coda_write(dev, ctx->iram_info.buf_dbk_c_use,
1017                                 CODA7_CMD_SET_FRAME_AXI_DBKC_ADDR);
1018                 coda_write(dev, ctx->iram_info.buf_ovl_use,
1019                                 CODA7_CMD_SET_FRAME_AXI_OVL_ADDR);
1020                 if (dev->devtype->product == CODA_960) {
1021                         coda_write(dev, ctx->iram_info.buf_btp_use,
1022                                         CODA9_CMD_SET_FRAME_AXI_BTP_ADDR);
1023
1024                         /* FIXME */
1025                         coda_write(dev, ctx->internal_frames[2].paddr,
1026                                    CODA9_CMD_SET_FRAME_SUBSAMP_A);
1027                         coda_write(dev, ctx->internal_frames[3].paddr,
1028                                    CODA9_CMD_SET_FRAME_SUBSAMP_B);
1029                 }
1030         }
1031
1032         ret = coda_command_sync(ctx, CODA_COMMAND_SET_FRAME_BUF);
1033         if (ret < 0) {
1034                 v4l2_err(v4l2_dev, "CODA_COMMAND_SET_FRAME_BUF timeout\n");
1035                 goto out;
1036         }
1037
1038         /* Save stream headers */
1039         buf = v4l2_m2m_next_dst_buf(ctx->fh.m2m_ctx);
1040         switch (dst_fourcc) {
1041         case V4L2_PIX_FMT_H264:
1042                 /*
1043                  * Get SPS in the first frame and copy it to an
1044                  * intermediate buffer.
1045                  */
1046                 ret = coda_encode_header(ctx, buf, CODA_HEADER_H264_SPS,
1047                                          &ctx->vpu_header[0][0],
1048                                          &ctx->vpu_header_size[0]);
1049                 if (ret < 0)
1050                         goto out;
1051
1052                 /*
1053                  * Get PPS in the first frame and copy it to an
1054                  * intermediate buffer.
1055                  */
1056                 ret = coda_encode_header(ctx, buf, CODA_HEADER_H264_PPS,
1057                                          &ctx->vpu_header[1][0],
1058                                          &ctx->vpu_header_size[1]);
1059                 if (ret < 0)
1060                         goto out;
1061
1062                 /*
1063                  * Length of H.264 headers is variable and thus it might not be
1064                  * aligned for the coda to append the encoded frame. In that is
1065                  * the case a filler NAL must be added to header 2.
1066                  */
1067                 ctx->vpu_header_size[2] = coda_h264_padding(
1068                                         (ctx->vpu_header_size[0] +
1069                                          ctx->vpu_header_size[1]),
1070                                          ctx->vpu_header[2]);
1071                 break;
1072         case V4L2_PIX_FMT_MPEG4:
1073                 /*
1074                  * Get VOS in the first frame and copy it to an
1075                  * intermediate buffer
1076                  */
1077                 ret = coda_encode_header(ctx, buf, CODA_HEADER_MP4V_VOS,
1078                                          &ctx->vpu_header[0][0],
1079                                          &ctx->vpu_header_size[0]);
1080                 if (ret < 0)
1081                         goto out;
1082
1083                 ret = coda_encode_header(ctx, buf, CODA_HEADER_MP4V_VIS,
1084                                          &ctx->vpu_header[1][0],
1085                                          &ctx->vpu_header_size[1]);
1086                 if (ret < 0)
1087                         goto out;
1088
1089                 ret = coda_encode_header(ctx, buf, CODA_HEADER_MP4V_VOL,
1090                                          &ctx->vpu_header[2][0],
1091                                          &ctx->vpu_header_size[2]);
1092                 if (ret < 0)
1093                         goto out;
1094                 break;
1095         default:
1096                 /* No more formats need to save headers at the moment */
1097                 break;
1098         }
1099
1100 out:
1101         mutex_unlock(&dev->coda_mutex);
1102         return ret;
1103 }
1104
1105 static int coda_prepare_encode(struct coda_ctx *ctx)
1106 {
1107         struct coda_q_data *q_data_src, *q_data_dst;
1108         struct vb2_buffer *src_buf, *dst_buf;
1109         struct coda_dev *dev = ctx->dev;
1110         int force_ipicture;
1111         int quant_param = 0;
1112         u32 pic_stream_buffer_addr, pic_stream_buffer_size;
1113         u32 rot_mode = 0;
1114         u32 dst_fourcc;
1115         u32 reg;
1116
1117         src_buf = v4l2_m2m_next_src_buf(ctx->fh.m2m_ctx);
1118         dst_buf = v4l2_m2m_next_dst_buf(ctx->fh.m2m_ctx);
1119         q_data_src = get_q_data(ctx, V4L2_BUF_TYPE_VIDEO_OUTPUT);
1120         q_data_dst = get_q_data(ctx, V4L2_BUF_TYPE_VIDEO_CAPTURE);
1121         dst_fourcc = q_data_dst->fourcc;
1122
1123         src_buf->v4l2_buf.sequence = ctx->osequence;
1124         dst_buf->v4l2_buf.sequence = ctx->osequence;
1125         ctx->osequence++;
1126
1127         /*
1128          * Workaround coda firmware BUG that only marks the first
1129          * frame as IDR. This is a problem for some decoders that can't
1130          * recover when a frame is lost.
1131          */
1132         if (src_buf->v4l2_buf.sequence % ctx->params.gop_size) {
1133                 src_buf->v4l2_buf.flags |= V4L2_BUF_FLAG_PFRAME;
1134                 src_buf->v4l2_buf.flags &= ~V4L2_BUF_FLAG_KEYFRAME;
1135         } else {
1136                 src_buf->v4l2_buf.flags |= V4L2_BUF_FLAG_KEYFRAME;
1137                 src_buf->v4l2_buf.flags &= ~V4L2_BUF_FLAG_PFRAME;
1138         }
1139
1140         if (dev->devtype->product == CODA_960)
1141                 coda_set_gdi_regs(ctx);
1142
1143         /*
1144          * Copy headers at the beginning of the first frame for H.264 only.
1145          * In MPEG4 they are already copied by the coda.
1146          */
1147         if (src_buf->v4l2_buf.sequence == 0) {
1148                 pic_stream_buffer_addr =
1149                         vb2_dma_contig_plane_dma_addr(dst_buf, 0) +
1150                         ctx->vpu_header_size[0] +
1151                         ctx->vpu_header_size[1] +
1152                         ctx->vpu_header_size[2];
1153                 pic_stream_buffer_size = q_data_dst->sizeimage -
1154                         ctx->vpu_header_size[0] -
1155                         ctx->vpu_header_size[1] -
1156                         ctx->vpu_header_size[2];
1157                 memcpy(vb2_plane_vaddr(dst_buf, 0),
1158                        &ctx->vpu_header[0][0], ctx->vpu_header_size[0]);
1159                 memcpy(vb2_plane_vaddr(dst_buf, 0) + ctx->vpu_header_size[0],
1160                        &ctx->vpu_header[1][0], ctx->vpu_header_size[1]);
1161                 memcpy(vb2_plane_vaddr(dst_buf, 0) + ctx->vpu_header_size[0] +
1162                         ctx->vpu_header_size[1], &ctx->vpu_header[2][0],
1163                         ctx->vpu_header_size[2]);
1164         } else {
1165                 pic_stream_buffer_addr =
1166                         vb2_dma_contig_plane_dma_addr(dst_buf, 0);
1167                 pic_stream_buffer_size = q_data_dst->sizeimage;
1168         }
1169
1170         if (src_buf->v4l2_buf.flags & V4L2_BUF_FLAG_KEYFRAME) {
1171                 force_ipicture = 1;
1172                 switch (dst_fourcc) {
1173                 case V4L2_PIX_FMT_H264:
1174                         quant_param = ctx->params.h264_intra_qp;
1175                         break;
1176                 case V4L2_PIX_FMT_MPEG4:
1177                         quant_param = ctx->params.mpeg4_intra_qp;
1178                         break;
1179                 case V4L2_PIX_FMT_JPEG:
1180                         quant_param = 30;
1181                         break;
1182                 default:
1183                         v4l2_warn(&ctx->dev->v4l2_dev,
1184                                 "cannot set intra qp, fmt not supported\n");
1185                         break;
1186                 }
1187         } else {
1188                 force_ipicture = 0;
1189                 switch (dst_fourcc) {
1190                 case V4L2_PIX_FMT_H264:
1191                         quant_param = ctx->params.h264_inter_qp;
1192                         break;
1193                 case V4L2_PIX_FMT_MPEG4:
1194                         quant_param = ctx->params.mpeg4_inter_qp;
1195                         break;
1196                 default:
1197                         v4l2_warn(&ctx->dev->v4l2_dev,
1198                                 "cannot set inter qp, fmt not supported\n");
1199                         break;
1200                 }
1201         }
1202
1203         /* submit */
1204         if (ctx->params.rot_mode)
1205                 rot_mode = CODA_ROT_MIR_ENABLE | ctx->params.rot_mode;
1206         coda_write(dev, rot_mode, CODA_CMD_ENC_PIC_ROT_MODE);
1207         coda_write(dev, quant_param, CODA_CMD_ENC_PIC_QS);
1208
1209         if (dev->devtype->product == CODA_960) {
1210                 coda_write(dev, 4/*FIXME: 0*/, CODA9_CMD_ENC_PIC_SRC_INDEX);
1211                 coda_write(dev, q_data_src->width, CODA9_CMD_ENC_PIC_SRC_STRIDE);
1212                 coda_write(dev, 0, CODA9_CMD_ENC_PIC_SUB_FRAME_SYNC);
1213
1214                 reg = CODA9_CMD_ENC_PIC_SRC_ADDR_Y;
1215         } else {
1216                 reg = CODA_CMD_ENC_PIC_SRC_ADDR_Y;
1217         }
1218         coda_write_base(ctx, q_data_src, src_buf, reg);
1219
1220         coda_write(dev, force_ipicture << 1 & 0x2,
1221                    CODA_CMD_ENC_PIC_OPTION);
1222
1223         coda_write(dev, pic_stream_buffer_addr, CODA_CMD_ENC_PIC_BB_START);
1224         coda_write(dev, pic_stream_buffer_size / 1024,
1225                    CODA_CMD_ENC_PIC_BB_SIZE);
1226
1227         if (!ctx->streamon_out) {
1228                 /* After streamoff on the output side, set stream end flag */
1229                 ctx->bit_stream_param |= CODA_BIT_STREAM_END_FLAG;
1230                 coda_write(dev, ctx->bit_stream_param,
1231                            CODA_REG_BIT_BIT_STREAM_PARAM);
1232         }
1233
1234         if (dev->devtype->product != CODA_DX6)
1235                 coda_write(dev, ctx->iram_info.axi_sram_use,
1236                                 CODA7_REG_BIT_AXI_SRAM_USE);
1237
1238         coda_command_async(ctx, CODA_COMMAND_PIC_RUN);
1239
1240         return 0;
1241 }
1242
1243 static void coda_finish_encode(struct coda_ctx *ctx)
1244 {
1245         struct vb2_buffer *src_buf, *dst_buf;
1246         struct coda_dev *dev = ctx->dev;
1247         u32 wr_ptr, start_ptr;
1248
1249         src_buf = v4l2_m2m_src_buf_remove(ctx->fh.m2m_ctx);
1250         dst_buf = v4l2_m2m_next_dst_buf(ctx->fh.m2m_ctx);
1251
1252         /* Get results from the coda */
1253         start_ptr = coda_read(dev, CODA_CMD_ENC_PIC_BB_START);
1254         wr_ptr = coda_read(dev, CODA_REG_BIT_WR_PTR(ctx->reg_idx));
1255
1256         /* Calculate bytesused field */
1257         if (dst_buf->v4l2_buf.sequence == 0) {
1258                 vb2_set_plane_payload(dst_buf, 0, wr_ptr - start_ptr +
1259                                         ctx->vpu_header_size[0] +
1260                                         ctx->vpu_header_size[1] +
1261                                         ctx->vpu_header_size[2]);
1262         } else {
1263                 vb2_set_plane_payload(dst_buf, 0, wr_ptr - start_ptr);
1264         }
1265
1266         v4l2_dbg(1, coda_debug, &ctx->dev->v4l2_dev, "frame size = %u\n",
1267                  wr_ptr - start_ptr);
1268
1269         coda_read(dev, CODA_RET_ENC_PIC_SLICE_NUM);
1270         coda_read(dev, CODA_RET_ENC_PIC_FLAG);
1271
1272         if (coda_read(dev, CODA_RET_ENC_PIC_TYPE) == 0) {
1273                 dst_buf->v4l2_buf.flags |= V4L2_BUF_FLAG_KEYFRAME;
1274                 dst_buf->v4l2_buf.flags &= ~V4L2_BUF_FLAG_PFRAME;
1275         } else {
1276                 dst_buf->v4l2_buf.flags |= V4L2_BUF_FLAG_PFRAME;
1277                 dst_buf->v4l2_buf.flags &= ~V4L2_BUF_FLAG_KEYFRAME;
1278         }
1279
1280         dst_buf->v4l2_buf.timestamp = src_buf->v4l2_buf.timestamp;
1281         dst_buf->v4l2_buf.flags &= ~V4L2_BUF_FLAG_TSTAMP_SRC_MASK;
1282         dst_buf->v4l2_buf.flags |=
1283                 src_buf->v4l2_buf.flags & V4L2_BUF_FLAG_TSTAMP_SRC_MASK;
1284         dst_buf->v4l2_buf.timecode = src_buf->v4l2_buf.timecode;
1285
1286         v4l2_m2m_buf_done(src_buf, VB2_BUF_STATE_DONE);
1287
1288         dst_buf = v4l2_m2m_dst_buf_remove(ctx->fh.m2m_ctx);
1289         v4l2_m2m_buf_done(dst_buf, VB2_BUF_STATE_DONE);
1290
1291         ctx->gopcounter--;
1292         if (ctx->gopcounter < 0)
1293                 ctx->gopcounter = ctx->params.gop_size - 1;
1294
1295         v4l2_dbg(1, coda_debug, &dev->v4l2_dev,
1296                 "job finished: encoding frame (%d) (%s)\n",
1297                 dst_buf->v4l2_buf.sequence,
1298                 (dst_buf->v4l2_buf.flags & V4L2_BUF_FLAG_KEYFRAME) ?
1299                 "KEYFRAME" : "PFRAME");
1300 }
1301
1302 static void coda_seq_end_work(struct work_struct *work)
1303 {
1304         struct coda_ctx *ctx = container_of(work, struct coda_ctx, seq_end_work);
1305         struct coda_dev *dev = ctx->dev;
1306
1307         mutex_lock(&ctx->buffer_mutex);
1308         mutex_lock(&dev->coda_mutex);
1309
1310         v4l2_dbg(1, coda_debug, &dev->v4l2_dev,
1311                  "%d: %s: sent command 'SEQ_END' to coda\n", ctx->idx,
1312                  __func__);
1313         if (coda_command_sync(ctx, CODA_COMMAND_SEQ_END)) {
1314                 v4l2_err(&dev->v4l2_dev,
1315                          "CODA_COMMAND_SEQ_END failed\n");
1316         }
1317
1318         kfifo_init(&ctx->bitstream_fifo,
1319                 ctx->bitstream.vaddr, ctx->bitstream.size);
1320
1321         coda_free_framebuffers(ctx);
1322
1323         mutex_unlock(&dev->coda_mutex);
1324         mutex_unlock(&ctx->buffer_mutex);
1325 }
1326
1327 static void coda_bit_release(struct coda_ctx *ctx)
1328 {
1329         mutex_lock(&ctx->buffer_mutex);
1330         coda_free_framebuffers(ctx);
1331         coda_free_context_buffers(ctx);
1332         coda_free_bitstream_buffer(ctx);
1333         mutex_unlock(&ctx->buffer_mutex);
1334 }
1335
1336 const struct coda_context_ops coda_bit_encode_ops = {
1337         .queue_init = coda_encoder_queue_init,
1338         .reqbufs = coda_encoder_reqbufs,
1339         .start_streaming = coda_start_encoding,
1340         .prepare_run = coda_prepare_encode,
1341         .finish_run = coda_finish_encode,
1342         .seq_end_work = coda_seq_end_work,
1343         .release = coda_bit_release,
1344 };
1345
1346 /*
1347  * Decoder context operations
1348  */
1349
1350 static int coda_alloc_bitstream_buffer(struct coda_ctx *ctx,
1351                                        struct coda_q_data *q_data)
1352 {
1353         if (ctx->bitstream.vaddr)
1354                 return 0;
1355
1356         ctx->bitstream.size = roundup_pow_of_two(q_data->sizeimage * 2);
1357         ctx->bitstream.vaddr = dma_alloc_writecombine(
1358                         &ctx->dev->plat_dev->dev, ctx->bitstream.size,
1359                         &ctx->bitstream.paddr, GFP_KERNEL);
1360         if (!ctx->bitstream.vaddr) {
1361                 v4l2_err(&ctx->dev->v4l2_dev,
1362                          "failed to allocate bitstream ringbuffer");
1363                 return -ENOMEM;
1364         }
1365         kfifo_init(&ctx->bitstream_fifo,
1366                    ctx->bitstream.vaddr, ctx->bitstream.size);
1367
1368         return 0;
1369 }
1370
1371 static void coda_free_bitstream_buffer(struct coda_ctx *ctx)
1372 {
1373         if (ctx->bitstream.vaddr == NULL)
1374                 return;
1375
1376         dma_free_writecombine(&ctx->dev->plat_dev->dev, ctx->bitstream.size,
1377                               ctx->bitstream.vaddr, ctx->bitstream.paddr);
1378         ctx->bitstream.vaddr = NULL;
1379         kfifo_init(&ctx->bitstream_fifo, NULL, 0);
1380 }
1381
1382 static int coda_decoder_reqbufs(struct coda_ctx *ctx,
1383                                 struct v4l2_requestbuffers *rb)
1384 {
1385         struct coda_q_data *q_data_src;
1386         int ret;
1387
1388         if (rb->type != V4L2_BUF_TYPE_VIDEO_OUTPUT)
1389                 return 0;
1390
1391         if (rb->count) {
1392                 q_data_src = get_q_data(ctx, V4L2_BUF_TYPE_VIDEO_OUTPUT);
1393                 ret = coda_alloc_context_buffers(ctx, q_data_src);
1394                 if (ret < 0)
1395                         return ret;
1396                 ret = coda_alloc_bitstream_buffer(ctx, q_data_src);
1397                 if (ret < 0) {
1398                         coda_free_context_buffers(ctx);
1399                         return ret;
1400                 }
1401         } else {
1402                 coda_free_bitstream_buffer(ctx);
1403                 coda_free_context_buffers(ctx);
1404         }
1405
1406         return 0;
1407 }
1408
1409 static int __coda_start_decoding(struct coda_ctx *ctx)
1410 {
1411         struct coda_q_data *q_data_src, *q_data_dst;
1412         u32 bitstream_buf, bitstream_size;
1413         struct coda_dev *dev = ctx->dev;
1414         int width, height;
1415         u32 src_fourcc, dst_fourcc;
1416         u32 val;
1417         int ret;
1418
1419         /* Start decoding */
1420         q_data_src = get_q_data(ctx, V4L2_BUF_TYPE_VIDEO_OUTPUT);
1421         q_data_dst = get_q_data(ctx, V4L2_BUF_TYPE_VIDEO_CAPTURE);
1422         bitstream_buf = ctx->bitstream.paddr;
1423         bitstream_size = ctx->bitstream.size;
1424         src_fourcc = q_data_src->fourcc;
1425         dst_fourcc = q_data_dst->fourcc;
1426
1427         coda_write(dev, ctx->parabuf.paddr, CODA_REG_BIT_PARA_BUF_ADDR);
1428
1429         /* Update coda bitstream read and write pointers from kfifo */
1430         coda_kfifo_sync_to_device_full(ctx);
1431
1432         ctx->frame_mem_ctrl &= ~CODA_FRAME_CHROMA_INTERLEAVE;
1433         if (dst_fourcc == V4L2_PIX_FMT_NV12)
1434                 ctx->frame_mem_ctrl |= CODA_FRAME_CHROMA_INTERLEAVE;
1435         coda_write(dev, ctx->frame_mem_ctrl, CODA_REG_BIT_FRAME_MEM_CTRL);
1436
1437         ctx->display_idx = -1;
1438         ctx->frm_dis_flg = 0;
1439         coda_write(dev, 0, CODA_REG_BIT_FRM_DIS_FLG(ctx->reg_idx));
1440
1441         coda_write(dev, CODA_BIT_DEC_SEQ_INIT_ESCAPE,
1442                         CODA_REG_BIT_BIT_STREAM_PARAM);
1443
1444         coda_write(dev, bitstream_buf, CODA_CMD_DEC_SEQ_BB_START);
1445         coda_write(dev, bitstream_size / 1024, CODA_CMD_DEC_SEQ_BB_SIZE);
1446         val = 0;
1447         if ((dev->devtype->product == CODA_7541) ||
1448             (dev->devtype->product == CODA_960))
1449                 val |= CODA_REORDER_ENABLE;
1450         if (ctx->codec->src_fourcc == V4L2_PIX_FMT_JPEG)
1451                 val |= CODA_NO_INT_ENABLE;
1452         coda_write(dev, val, CODA_CMD_DEC_SEQ_OPTION);
1453
1454         ctx->params.codec_mode = ctx->codec->mode;
1455         if (dev->devtype->product == CODA_960 &&
1456             src_fourcc == V4L2_PIX_FMT_MPEG4)
1457                 ctx->params.codec_mode_aux = CODA_MP4_AUX_MPEG4;
1458         else
1459                 ctx->params.codec_mode_aux = 0;
1460         if (src_fourcc == V4L2_PIX_FMT_H264) {
1461                 if (dev->devtype->product == CODA_7541) {
1462                         coda_write(dev, ctx->psbuf.paddr,
1463                                         CODA_CMD_DEC_SEQ_PS_BB_START);
1464                         coda_write(dev, (CODA7_PS_BUF_SIZE / 1024),
1465                                         CODA_CMD_DEC_SEQ_PS_BB_SIZE);
1466                 }
1467                 if (dev->devtype->product == CODA_960) {
1468                         coda_write(dev, 0, CODA_CMD_DEC_SEQ_X264_MV_EN);
1469                         coda_write(dev, 512, CODA_CMD_DEC_SEQ_SPP_CHUNK_SIZE);
1470                 }
1471         }
1472         if (dev->devtype->product != CODA_960)
1473                 coda_write(dev, 0, CODA_CMD_DEC_SEQ_SRC_SIZE);
1474
1475         if (coda_command_sync(ctx, CODA_COMMAND_SEQ_INIT)) {
1476                 v4l2_err(&dev->v4l2_dev, "CODA_COMMAND_SEQ_INIT timeout\n");
1477                 coda_write(dev, 0, CODA_REG_BIT_BIT_STREAM_PARAM);
1478                 return -ETIMEDOUT;
1479         }
1480
1481         /* Update kfifo out pointer from coda bitstream read pointer */
1482         coda_kfifo_sync_from_device(ctx);
1483
1484         coda_write(dev, 0, CODA_REG_BIT_BIT_STREAM_PARAM);
1485
1486         if (coda_read(dev, CODA_RET_DEC_SEQ_SUCCESS) == 0) {
1487                 v4l2_err(&dev->v4l2_dev,
1488                         "CODA_COMMAND_SEQ_INIT failed, error code = %d\n",
1489                         coda_read(dev, CODA_RET_DEC_SEQ_ERR_REASON));
1490                 return -EAGAIN;
1491         }
1492
1493         val = coda_read(dev, CODA_RET_DEC_SEQ_SRC_SIZE);
1494         if (dev->devtype->product == CODA_DX6) {
1495                 width = (val >> CODADX6_PICWIDTH_OFFSET) & CODADX6_PICWIDTH_MASK;
1496                 height = val & CODADX6_PICHEIGHT_MASK;
1497         } else {
1498                 width = (val >> CODA7_PICWIDTH_OFFSET) & CODA7_PICWIDTH_MASK;
1499                 height = val & CODA7_PICHEIGHT_MASK;
1500         }
1501
1502         if (width > q_data_dst->bytesperline || height > q_data_dst->height) {
1503                 v4l2_err(&dev->v4l2_dev, "stream is %dx%d, not %dx%d\n",
1504                          width, height, q_data_dst->bytesperline,
1505                          q_data_dst->height);
1506                 return -EINVAL;
1507         }
1508
1509         width = round_up(width, 16);
1510         height = round_up(height, 16);
1511
1512         v4l2_dbg(1, coda_debug, &dev->v4l2_dev, "%s instance %d now: %dx%d\n",
1513                  __func__, ctx->idx, width, height);
1514
1515         ctx->num_internal_frames = coda_read(dev, CODA_RET_DEC_SEQ_FRAME_NEED);
1516         if (ctx->num_internal_frames > CODA_MAX_FRAMEBUFFERS) {
1517                 v4l2_err(&dev->v4l2_dev,
1518                          "not enough framebuffers to decode (%d < %d)\n",
1519                          CODA_MAX_FRAMEBUFFERS, ctx->num_internal_frames);
1520                 return -EINVAL;
1521         }
1522
1523         if (src_fourcc == V4L2_PIX_FMT_H264) {
1524                 u32 left_right;
1525                 u32 top_bottom;
1526
1527                 left_right = coda_read(dev, CODA_RET_DEC_SEQ_CROP_LEFT_RIGHT);
1528                 top_bottom = coda_read(dev, CODA_RET_DEC_SEQ_CROP_TOP_BOTTOM);
1529
1530                 q_data_dst->rect.left = (left_right >> 10) & 0x3ff;
1531                 q_data_dst->rect.top = (top_bottom >> 10) & 0x3ff;
1532                 q_data_dst->rect.width = width - q_data_dst->rect.left -
1533                                          (left_right & 0x3ff);
1534                 q_data_dst->rect.height = height - q_data_dst->rect.top -
1535                                           (top_bottom & 0x3ff);
1536         }
1537
1538         ret = coda_alloc_framebuffers(ctx, q_data_dst, src_fourcc);
1539         if (ret < 0) {
1540                 v4l2_err(&dev->v4l2_dev, "failed to allocate framebuffers\n");
1541                 return ret;
1542         }
1543
1544         /* Tell the decoder how many frame buffers we allocated. */
1545         coda_write(dev, ctx->num_internal_frames, CODA_CMD_SET_FRAME_BUF_NUM);
1546         coda_write(dev, width, CODA_CMD_SET_FRAME_BUF_STRIDE);
1547
1548         if (dev->devtype->product != CODA_DX6) {
1549                 /* Set secondary AXI IRAM */
1550                 coda_setup_iram(ctx);
1551
1552                 coda_write(dev, ctx->iram_info.buf_bit_use,
1553                                 CODA7_CMD_SET_FRAME_AXI_BIT_ADDR);
1554                 coda_write(dev, ctx->iram_info.buf_ip_ac_dc_use,
1555                                 CODA7_CMD_SET_FRAME_AXI_IPACDC_ADDR);
1556                 coda_write(dev, ctx->iram_info.buf_dbk_y_use,
1557                                 CODA7_CMD_SET_FRAME_AXI_DBKY_ADDR);
1558                 coda_write(dev, ctx->iram_info.buf_dbk_c_use,
1559                                 CODA7_CMD_SET_FRAME_AXI_DBKC_ADDR);
1560                 coda_write(dev, ctx->iram_info.buf_ovl_use,
1561                                 CODA7_CMD_SET_FRAME_AXI_OVL_ADDR);
1562                 if (dev->devtype->product == CODA_960)
1563                         coda_write(dev, ctx->iram_info.buf_btp_use,
1564                                         CODA9_CMD_SET_FRAME_AXI_BTP_ADDR);
1565         }
1566
1567         if (dev->devtype->product == CODA_960) {
1568                 int cbb_size, crb_size;
1569
1570                 coda_write(dev, -1, CODA9_CMD_SET_FRAME_DELAY);
1571                 /* Luma 2x0 page, 2x6 cache, chroma 2x0 page, 2x4 cache size */
1572                 coda_write(dev, 0x20262024, CODA9_CMD_SET_FRAME_CACHE_SIZE);
1573
1574                 if (dst_fourcc == V4L2_PIX_FMT_NV12) {
1575                         cbb_size = 0;
1576                         crb_size = 16;
1577                 } else {
1578                         cbb_size = 8;
1579                         crb_size = 8;
1580                 }
1581                 coda_write(dev, 2 << CODA9_CACHE_PAGEMERGE_OFFSET |
1582                                 32 << CODA9_CACHE_LUMA_BUFFER_SIZE_OFFSET |
1583                                 cbb_size << CODA9_CACHE_CB_BUFFER_SIZE_OFFSET |
1584                                 crb_size << CODA9_CACHE_CR_BUFFER_SIZE_OFFSET,
1585                                 CODA9_CMD_SET_FRAME_CACHE_CONFIG);
1586         }
1587
1588         if (src_fourcc == V4L2_PIX_FMT_H264) {
1589                 coda_write(dev, ctx->slicebuf.paddr,
1590                                 CODA_CMD_SET_FRAME_SLICE_BB_START);
1591                 coda_write(dev, ctx->slicebuf.size / 1024,
1592                                 CODA_CMD_SET_FRAME_SLICE_BB_SIZE);
1593         }
1594
1595         if (dev->devtype->product == CODA_7541) {
1596                 int max_mb_x = 1920 / 16;
1597                 int max_mb_y = 1088 / 16;
1598                 int max_mb_num = max_mb_x * max_mb_y;
1599
1600                 coda_write(dev, max_mb_num << 16 | max_mb_x << 8 | max_mb_y,
1601                                 CODA7_CMD_SET_FRAME_MAX_DEC_SIZE);
1602         } else if (dev->devtype->product == CODA_960) {
1603                 int max_mb_x = 1920 / 16;
1604                 int max_mb_y = 1088 / 16;
1605                 int max_mb_num = max_mb_x * max_mb_y;
1606
1607                 coda_write(dev, max_mb_num << 16 | max_mb_x << 8 | max_mb_y,
1608                                 CODA9_CMD_SET_FRAME_MAX_DEC_SIZE);
1609         }
1610
1611         if (coda_command_sync(ctx, CODA_COMMAND_SET_FRAME_BUF)) {
1612                 v4l2_err(&ctx->dev->v4l2_dev,
1613                          "CODA_COMMAND_SET_FRAME_BUF timeout\n");
1614                 return -ETIMEDOUT;
1615         }
1616
1617         return 0;
1618 }
1619
1620 static int coda_start_decoding(struct coda_ctx *ctx)
1621 {
1622         struct coda_dev *dev = ctx->dev;
1623         int ret;
1624
1625         mutex_lock(&dev->coda_mutex);
1626         ret = __coda_start_decoding(ctx);
1627         mutex_unlock(&dev->coda_mutex);
1628
1629         return ret;
1630 }
1631
1632 static int coda_prepare_decode(struct coda_ctx *ctx)
1633 {
1634         struct vb2_buffer *dst_buf;
1635         struct coda_dev *dev = ctx->dev;
1636         struct coda_q_data *q_data_dst;
1637         struct coda_buffer_meta *meta;
1638         u32 reg_addr, reg_stride;
1639
1640         dst_buf = v4l2_m2m_next_dst_buf(ctx->fh.m2m_ctx);
1641         q_data_dst = get_q_data(ctx, V4L2_BUF_TYPE_VIDEO_CAPTURE);
1642
1643         /* Try to copy source buffer contents into the bitstream ringbuffer */
1644         mutex_lock(&ctx->bitstream_mutex);
1645         coda_fill_bitstream(ctx);
1646         mutex_unlock(&ctx->bitstream_mutex);
1647
1648         if (coda_get_bitstream_payload(ctx) < 512 &&
1649             (!(ctx->bit_stream_param & CODA_BIT_STREAM_END_FLAG))) {
1650                 v4l2_dbg(1, coda_debug, &dev->v4l2_dev,
1651                          "bitstream payload: %d, skipping\n",
1652                          coda_get_bitstream_payload(ctx));
1653                 v4l2_m2m_job_finish(ctx->dev->m2m_dev, ctx->fh.m2m_ctx);
1654                 return -EAGAIN;
1655         }
1656
1657         /* Run coda_start_decoding (again) if not yet initialized */
1658         if (!ctx->initialized) {
1659                 int ret = __coda_start_decoding(ctx);
1660
1661                 if (ret < 0) {
1662                         v4l2_err(&dev->v4l2_dev, "failed to start decoding\n");
1663                         v4l2_m2m_job_finish(ctx->dev->m2m_dev, ctx->fh.m2m_ctx);
1664                         return -EAGAIN;
1665                 } else {
1666                         ctx->initialized = 1;
1667                 }
1668         }
1669
1670         if (dev->devtype->product == CODA_960)
1671                 coda_set_gdi_regs(ctx);
1672
1673         if (dev->devtype->product == CODA_960) {
1674                 /*
1675                  * The CODA960 seems to have an internal list of buffers with
1676                  * 64 entries that includes the registered frame buffers as
1677                  * well as the rotator buffer output.
1678                  * ROT_INDEX needs to be < 0x40, but > ctx->num_internal_frames.
1679                  */
1680                 coda_write(dev, CODA_MAX_FRAMEBUFFERS + dst_buf->v4l2_buf.index,
1681                                 CODA9_CMD_DEC_PIC_ROT_INDEX);
1682
1683                 reg_addr = CODA9_CMD_DEC_PIC_ROT_ADDR_Y;
1684                 reg_stride = CODA9_CMD_DEC_PIC_ROT_STRIDE;
1685         } else {
1686                 reg_addr = CODA_CMD_DEC_PIC_ROT_ADDR_Y;
1687                 reg_stride = CODA_CMD_DEC_PIC_ROT_STRIDE;
1688         }
1689         coda_write_base(ctx, q_data_dst, dst_buf, reg_addr);
1690         coda_write(dev, q_data_dst->bytesperline, reg_stride);
1691
1692         coda_write(dev, CODA_ROT_MIR_ENABLE | ctx->params.rot_mode,
1693                         CODA_CMD_DEC_PIC_ROT_MODE);
1694
1695         switch (dev->devtype->product) {
1696         case CODA_DX6:
1697                 /* TBD */
1698         case CODA_7541:
1699                 coda_write(dev, CODA_PRE_SCAN_EN, CODA_CMD_DEC_PIC_OPTION);
1700                 break;
1701         case CODA_960:
1702                 /* 'hardcode to use interrupt disable mode'? */
1703                 coda_write(dev, (1 << 10), CODA_CMD_DEC_PIC_OPTION);
1704                 break;
1705         }
1706
1707         coda_write(dev, 0, CODA_CMD_DEC_PIC_SKIP_NUM);
1708
1709         coda_write(dev, 0, CODA_CMD_DEC_PIC_BB_START);
1710         coda_write(dev, 0, CODA_CMD_DEC_PIC_START_BYTE);
1711
1712         if (dev->devtype->product != CODA_DX6)
1713                 coda_write(dev, ctx->iram_info.axi_sram_use,
1714                                 CODA7_REG_BIT_AXI_SRAM_USE);
1715
1716         meta = list_first_entry_or_null(&ctx->buffer_meta_list,
1717                                         struct coda_buffer_meta, list);
1718
1719         if (meta && ctx->codec->src_fourcc == V4L2_PIX_FMT_JPEG) {
1720
1721                 /* If this is the last buffer in the bitstream, add padding */
1722                 if (meta->end == (ctx->bitstream_fifo.kfifo.in &
1723                                   ctx->bitstream_fifo.kfifo.mask)) {
1724                         static unsigned char buf[512];
1725                         unsigned int pad;
1726
1727                         /* Pad to multiple of 256 and then add 256 more */
1728                         pad = ((0 - meta->end) & 0xff) + 256;
1729
1730                         memset(buf, 0xff, sizeof(buf));
1731
1732                         kfifo_in(&ctx->bitstream_fifo, buf, pad);
1733                 }
1734         }
1735
1736         coda_kfifo_sync_to_device_full(ctx);
1737
1738         /* Clear decode success flag */
1739         coda_write(dev, 0, CODA_RET_DEC_PIC_SUCCESS);
1740
1741         coda_command_async(ctx, CODA_COMMAND_PIC_RUN);
1742
1743         return 0;
1744 }
1745
1746 static void coda_finish_decode(struct coda_ctx *ctx)
1747 {
1748         struct coda_dev *dev = ctx->dev;
1749         struct coda_q_data *q_data_src;
1750         struct coda_q_data *q_data_dst;
1751         struct vb2_buffer *dst_buf;
1752         struct coda_buffer_meta *meta;
1753         unsigned long payload;
1754         int width, height;
1755         int decoded_idx;
1756         int display_idx;
1757         u32 src_fourcc;
1758         int success;
1759         u32 err_mb;
1760         u32 val;
1761
1762         /* Update kfifo out pointer from coda bitstream read pointer */
1763         coda_kfifo_sync_from_device(ctx);
1764
1765         /*
1766          * in stream-end mode, the read pointer can overshoot the write pointer
1767          * by up to 512 bytes
1768          */
1769         if (ctx->bit_stream_param & CODA_BIT_STREAM_END_FLAG) {
1770                 if (coda_get_bitstream_payload(ctx) >= ctx->bitstream.size - 512)
1771                         kfifo_init(&ctx->bitstream_fifo,
1772                                 ctx->bitstream.vaddr, ctx->bitstream.size);
1773         }
1774
1775         q_data_src = get_q_data(ctx, V4L2_BUF_TYPE_VIDEO_OUTPUT);
1776         src_fourcc = q_data_src->fourcc;
1777
1778         val = coda_read(dev, CODA_RET_DEC_PIC_SUCCESS);
1779         if (val != 1)
1780                 pr_err("DEC_PIC_SUCCESS = %d\n", val);
1781
1782         success = val & 0x1;
1783         if (!success)
1784                 v4l2_err(&dev->v4l2_dev, "decode failed\n");
1785
1786         if (src_fourcc == V4L2_PIX_FMT_H264) {
1787                 if (val & (1 << 3))
1788                         v4l2_err(&dev->v4l2_dev,
1789                                  "insufficient PS buffer space (%d bytes)\n",
1790                                  ctx->psbuf.size);
1791                 if (val & (1 << 2))
1792                         v4l2_err(&dev->v4l2_dev,
1793                                  "insufficient slice buffer space (%d bytes)\n",
1794                                  ctx->slicebuf.size);
1795         }
1796
1797         val = coda_read(dev, CODA_RET_DEC_PIC_SIZE);
1798         width = (val >> 16) & 0xffff;
1799         height = val & 0xffff;
1800
1801         q_data_dst = get_q_data(ctx, V4L2_BUF_TYPE_VIDEO_CAPTURE);
1802
1803         /* frame crop information */
1804         if (src_fourcc == V4L2_PIX_FMT_H264) {
1805                 u32 left_right;
1806                 u32 top_bottom;
1807
1808                 left_right = coda_read(dev, CODA_RET_DEC_PIC_CROP_LEFT_RIGHT);
1809                 top_bottom = coda_read(dev, CODA_RET_DEC_PIC_CROP_TOP_BOTTOM);
1810
1811                 if (left_right == 0xffffffff && top_bottom == 0xffffffff) {
1812                         /* Keep current crop information */
1813                 } else {
1814                         struct v4l2_rect *rect = &q_data_dst->rect;
1815
1816                         rect->left = left_right >> 16 & 0xffff;
1817                         rect->top = top_bottom >> 16 & 0xffff;
1818                         rect->width = width - rect->left -
1819                                       (left_right & 0xffff);
1820                         rect->height = height - rect->top -
1821                                        (top_bottom & 0xffff);
1822                 }
1823         } else {
1824                 /* no cropping */
1825         }
1826
1827         err_mb = coda_read(dev, CODA_RET_DEC_PIC_ERR_MB);
1828         if (err_mb > 0)
1829                 v4l2_err(&dev->v4l2_dev,
1830                          "errors in %d macroblocks\n", err_mb);
1831
1832         if (dev->devtype->product == CODA_7541) {
1833                 val = coda_read(dev, CODA_RET_DEC_PIC_OPTION);
1834                 if (val == 0) {
1835                         /* not enough bitstream data */
1836                         v4l2_dbg(1, coda_debug, &dev->v4l2_dev,
1837                                  "prescan failed: %d\n", val);
1838                         ctx->hold = true;
1839                         return;
1840                 }
1841         }
1842
1843         ctx->frm_dis_flg = coda_read(dev,
1844                                      CODA_REG_BIT_FRM_DIS_FLG(ctx->reg_idx));
1845
1846         /*
1847          * The previous display frame was copied out by the rotator,
1848          * now it can be overwritten again
1849          */
1850         if (ctx->display_idx >= 0 &&
1851             ctx->display_idx < ctx->num_internal_frames) {
1852                 ctx->frm_dis_flg &= ~(1 << ctx->display_idx);
1853                 coda_write(dev, ctx->frm_dis_flg,
1854                                 CODA_REG_BIT_FRM_DIS_FLG(ctx->reg_idx));
1855         }
1856
1857         /*
1858          * The index of the last decoded frame, not necessarily in
1859          * display order, and the index of the next display frame.
1860          * The latter could have been decoded in a previous run.
1861          */
1862         decoded_idx = coda_read(dev, CODA_RET_DEC_PIC_CUR_IDX);
1863         display_idx = coda_read(dev, CODA_RET_DEC_PIC_FRAME_IDX);
1864
1865         if (decoded_idx == -1) {
1866                 /* no frame was decoded, but we might have a display frame */
1867                 if (display_idx >= 0 && display_idx < ctx->num_internal_frames)
1868                         ctx->sequence_offset++;
1869                 else if (ctx->display_idx < 0)
1870                         ctx->hold = true;
1871         } else if (decoded_idx == -2) {
1872                 /* no frame was decoded, we still return remaining buffers */
1873         } else if (decoded_idx < 0 || decoded_idx >= ctx->num_internal_frames) {
1874                 v4l2_err(&dev->v4l2_dev,
1875                          "decoded frame index out of range: %d\n", decoded_idx);
1876         } else {
1877                 val = coda_read(dev, CODA_RET_DEC_PIC_FRAME_NUM) - 1;
1878                 val -= ctx->sequence_offset;
1879                 mutex_lock(&ctx->bitstream_mutex);
1880                 if (!list_empty(&ctx->buffer_meta_list)) {
1881                         meta = list_first_entry(&ctx->buffer_meta_list,
1882                                               struct coda_buffer_meta, list);
1883                         list_del(&meta->list);
1884                         if (val != (meta->sequence & 0xffff)) {
1885                                 v4l2_err(&dev->v4l2_dev,
1886                                          "sequence number mismatch (%d(%d) != %d)\n",
1887                                          val, ctx->sequence_offset,
1888                                          meta->sequence);
1889                         }
1890                         ctx->frame_metas[decoded_idx] = *meta;
1891                         kfree(meta);
1892                 } else {
1893                         v4l2_err(&dev->v4l2_dev, "empty timestamp list!\n");
1894                         memset(&ctx->frame_metas[decoded_idx], 0,
1895                                sizeof(struct coda_buffer_meta));
1896                         ctx->frame_metas[decoded_idx].sequence = val;
1897                         ctx->sequence_offset++;
1898                 }
1899                 mutex_unlock(&ctx->bitstream_mutex);
1900
1901                 val = coda_read(dev, CODA_RET_DEC_PIC_TYPE) & 0x7;
1902                 if (val == 0)
1903                         ctx->frame_types[decoded_idx] = V4L2_BUF_FLAG_KEYFRAME;
1904                 else if (val == 1)
1905                         ctx->frame_types[decoded_idx] = V4L2_BUF_FLAG_PFRAME;
1906                 else
1907                         ctx->frame_types[decoded_idx] = V4L2_BUF_FLAG_BFRAME;
1908
1909                 ctx->frame_errors[decoded_idx] = err_mb;
1910         }
1911
1912         if (display_idx == -1) {
1913                 /*
1914                  * no more frames to be decoded, but there could still
1915                  * be rotator output to dequeue
1916                  */
1917                 ctx->hold = true;
1918         } else if (display_idx == -3) {
1919                 /* possibly prescan failure */
1920         } else if (display_idx < 0 || display_idx >= ctx->num_internal_frames) {
1921                 v4l2_err(&dev->v4l2_dev,
1922                          "presentation frame index out of range: %d\n",
1923                          display_idx);
1924         }
1925
1926         /* If a frame was copied out, return it */
1927         if (ctx->display_idx >= 0 &&
1928             ctx->display_idx < ctx->num_internal_frames) {
1929                 dst_buf = v4l2_m2m_dst_buf_remove(ctx->fh.m2m_ctx);
1930                 dst_buf->v4l2_buf.sequence = ctx->osequence++;
1931
1932                 dst_buf->v4l2_buf.flags &= ~(V4L2_BUF_FLAG_KEYFRAME |
1933                                              V4L2_BUF_FLAG_PFRAME |
1934                                              V4L2_BUF_FLAG_BFRAME);
1935                 dst_buf->v4l2_buf.flags |= ctx->frame_types[ctx->display_idx];
1936                 meta = &ctx->frame_metas[ctx->display_idx];
1937                 dst_buf->v4l2_buf.timecode = meta->timecode;
1938                 dst_buf->v4l2_buf.timestamp = meta->timestamp;
1939
1940                 switch (q_data_dst->fourcc) {
1941                 case V4L2_PIX_FMT_YUV420:
1942                 case V4L2_PIX_FMT_YVU420:
1943                 case V4L2_PIX_FMT_NV12:
1944                 default:
1945                         payload = width * height * 3 / 2;
1946                         break;
1947                 case V4L2_PIX_FMT_YUV422P:
1948                         payload = width * height * 2;
1949                         break;
1950                 }
1951                 vb2_set_plane_payload(dst_buf, 0, payload);
1952
1953                 v4l2_m2m_buf_done(dst_buf, ctx->frame_errors[display_idx] ?
1954                                   VB2_BUF_STATE_ERROR : VB2_BUF_STATE_DONE);
1955
1956                 v4l2_dbg(1, coda_debug, &dev->v4l2_dev,
1957                         "job finished: decoding frame (%d) (%s)\n",
1958                         dst_buf->v4l2_buf.sequence,
1959                         (dst_buf->v4l2_buf.flags & V4L2_BUF_FLAG_KEYFRAME) ?
1960                         "KEYFRAME" : "PFRAME");
1961         } else {
1962                 v4l2_dbg(1, coda_debug, &dev->v4l2_dev,
1963                         "job finished: no frame decoded\n");
1964         }
1965
1966         /* The rotator will copy the current display frame next time */
1967         ctx->display_idx = display_idx;
1968 }
1969
1970 const struct coda_context_ops coda_bit_decode_ops = {
1971         .queue_init = coda_decoder_queue_init,
1972         .reqbufs = coda_decoder_reqbufs,
1973         .start_streaming = coda_start_decoding,
1974         .prepare_run = coda_prepare_decode,
1975         .finish_run = coda_finish_decode,
1976         .seq_end_work = coda_seq_end_work,
1977         .release = coda_bit_release,
1978 };
1979
1980 irqreturn_t coda_irq_handler(int irq, void *data)
1981 {
1982         struct coda_dev *dev = data;
1983         struct coda_ctx *ctx;
1984
1985         /* read status register to attend the IRQ */
1986         coda_read(dev, CODA_REG_BIT_INT_STATUS);
1987         coda_write(dev, CODA_REG_BIT_INT_CLEAR_SET,
1988                       CODA_REG_BIT_INT_CLEAR);
1989
1990         ctx = v4l2_m2m_get_curr_priv(dev->m2m_dev);
1991         if (ctx == NULL) {
1992                 v4l2_err(&dev->v4l2_dev,
1993                          "Instance released before the end of transaction\n");
1994                 mutex_unlock(&dev->coda_mutex);
1995                 return IRQ_HANDLED;
1996         }
1997
1998         if (ctx->aborting) {
1999                 v4l2_dbg(1, coda_debug, &ctx->dev->v4l2_dev,
2000                          "task has been aborted\n");
2001         }
2002
2003         if (coda_isbusy(ctx->dev)) {
2004                 v4l2_dbg(1, coda_debug, &ctx->dev->v4l2_dev,
2005                          "coda is still busy!!!!\n");
2006                 return IRQ_NONE;
2007         }
2008
2009         complete(&ctx->completion);
2010
2011         return IRQ_HANDLED;
2012 }