6 * Copyright (C) 2006-2010 Nokia Corporation
7 * Copyright (C) 2007-2009 Texas Instruments, Inc.
9 * Contacts: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
10 * Sakari Ailus <sakari.ailus@iki.fi>
13 * Laurent Pinchart <laurent.pinchart@ideasonboard.com>
14 * Sakari Ailus <sakari.ailus@iki.fi>
15 * David Cohen <dacohen@gmail.com>
16 * Stanimir Varbanov <svarbanov@mm-sol.com>
17 * Vimarsh Zutshi <vimarsh.zutshi@gmail.com>
18 * Tuukka Toivonen <tuukkat76@gmail.com>
19 * Sergio Aguirre <saaguirre@ti.com>
20 * Antti Koskipaa <akoskipa@gmail.com>
21 * Ivan T. Ivanov <iivanov@mm-sol.com>
22 * RaniSuneela <r-m@ti.com>
23 * Atanas Filipov <afilipov@mm-sol.com>
24 * Gjorgji Rosikopulos <grosikopulos@mm-sol.com>
25 * Hiroshi DOYU <hiroshi.doyu@nokia.com>
26 * Nayden Kanchev <nkanchev@mm-sol.com>
27 * Phil Carmody <ext-phil.2.carmody@nokia.com>
28 * Artem Bityutskiy <artem.bityutskiy@nokia.com>
29 * Dominic Curran <dcurran@ti.com>
30 * Ilkka Myllyperkio <ilkka.myllyperkio@sofica.fi>
31 * Pallavi Kulkarni <p-kulkarni@ti.com>
32 * Vaibhav Hiremath <hvaibhav@ti.com>
33 * Mohit Jalori <mjalori@ti.com>
34 * Sameer Venkatraman <sameerv@ti.com>
35 * Senthilvadivu Guruswamy <svadivu@ti.com>
36 * Thara Gopinath <thara@ti.com>
37 * Toni Leinonen <toni.leinonen@nokia.com>
38 * Troy Laramy <t-laramy@ti.com>
40 * This program is free software; you can redistribute it and/or modify
41 * it under the terms of the GNU General Public License version 2 as
42 * published by the Free Software Foundation.
44 * This program is distributed in the hope that it will be useful, but
45 * WITHOUT ANY WARRANTY; without even the implied warranty of
46 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
47 * General Public License for more details.
49 * You should have received a copy of the GNU General Public License
50 * along with this program; if not, write to the Free Software
51 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA
55 #include <asm/cacheflush.h>
57 #include <linux/clk.h>
58 #include <linux/clkdev.h>
59 #include <linux/delay.h>
60 #include <linux/device.h>
61 #include <linux/dma-mapping.h>
62 #include <linux/i2c.h>
63 #include <linux/interrupt.h>
64 #include <linux/module.h>
65 #include <linux/omap-iommu.h>
66 #include <linux/platform_device.h>
67 #include <linux/regulator/consumer.h>
68 #include <linux/slab.h>
69 #include <linux/sched.h>
70 #include <linux/vmalloc.h>
72 #include <media/v4l2-common.h>
73 #include <media/v4l2-device.h>
78 #include "isppreview.h"
79 #include "ispresizer.h"
85 static unsigned int autoidle;
86 module_param(autoidle, int, 0444);
87 MODULE_PARM_DESC(autoidle, "Enable OMAP3ISP AUTOIDLE support");
89 static void isp_save_ctx(struct isp_device *isp);
91 static void isp_restore_ctx(struct isp_device *isp);
93 static const struct isp_res_mapping isp_res_maps[] = {
95 .isp_rev = ISP_REVISION_2_0,
96 .map = 1 << OMAP3_ISP_IOMEM_MAIN |
97 1 << OMAP3_ISP_IOMEM_CCP2 |
98 1 << OMAP3_ISP_IOMEM_CCDC |
99 1 << OMAP3_ISP_IOMEM_HIST |
100 1 << OMAP3_ISP_IOMEM_H3A |
101 1 << OMAP3_ISP_IOMEM_PREV |
102 1 << OMAP3_ISP_IOMEM_RESZ |
103 1 << OMAP3_ISP_IOMEM_SBL |
104 1 << OMAP3_ISP_IOMEM_CSI2A_REGS1 |
105 1 << OMAP3_ISP_IOMEM_CSIPHY2 |
106 1 << OMAP3_ISP_IOMEM_343X_CONTROL_CSIRXFE,
109 .isp_rev = ISP_REVISION_15_0,
110 .map = 1 << OMAP3_ISP_IOMEM_MAIN |
111 1 << OMAP3_ISP_IOMEM_CCP2 |
112 1 << OMAP3_ISP_IOMEM_CCDC |
113 1 << OMAP3_ISP_IOMEM_HIST |
114 1 << OMAP3_ISP_IOMEM_H3A |
115 1 << OMAP3_ISP_IOMEM_PREV |
116 1 << OMAP3_ISP_IOMEM_RESZ |
117 1 << OMAP3_ISP_IOMEM_SBL |
118 1 << OMAP3_ISP_IOMEM_CSI2A_REGS1 |
119 1 << OMAP3_ISP_IOMEM_CSIPHY2 |
120 1 << OMAP3_ISP_IOMEM_CSI2A_REGS2 |
121 1 << OMAP3_ISP_IOMEM_CSI2C_REGS1 |
122 1 << OMAP3_ISP_IOMEM_CSIPHY1 |
123 1 << OMAP3_ISP_IOMEM_CSI2C_REGS2 |
124 1 << OMAP3_ISP_IOMEM_3630_CONTROL_CAMERA_PHY_CTRL,
128 /* Structure for saving/restoring ISP module registers */
129 static struct isp_reg isp_reg_list[] = {
130 {OMAP3_ISP_IOMEM_MAIN, ISP_SYSCONFIG, 0},
131 {OMAP3_ISP_IOMEM_MAIN, ISP_CTRL, 0},
132 {OMAP3_ISP_IOMEM_MAIN, ISP_TCTRL_CTRL, 0},
137 * omap3isp_flush - Post pending L3 bus writes by doing a register readback
138 * @isp: OMAP3 ISP device
140 * In order to force posting of pending writes, we need to write and
141 * readback the same register, in this case the revision register.
143 * See this link for reference:
144 * http://www.mail-archive.com/linux-omap@vger.kernel.org/msg08149.html
146 void omap3isp_flush(struct isp_device *isp)
148 isp_reg_writel(isp, 0, OMAP3_ISP_IOMEM_MAIN, ISP_REVISION);
149 isp_reg_readl(isp, OMAP3_ISP_IOMEM_MAIN, ISP_REVISION);
152 /* -----------------------------------------------------------------------------
156 #define to_isp_xclk(_hw) container_of(_hw, struct isp_xclk, hw)
158 static void isp_xclk_update(struct isp_xclk *xclk, u32 divider)
162 isp_reg_clr_set(xclk->isp, OMAP3_ISP_IOMEM_MAIN, ISP_TCTRL_CTRL,
163 ISPTCTRL_CTRL_DIVA_MASK,
164 divider << ISPTCTRL_CTRL_DIVA_SHIFT);
167 isp_reg_clr_set(xclk->isp, OMAP3_ISP_IOMEM_MAIN, ISP_TCTRL_CTRL,
168 ISPTCTRL_CTRL_DIVB_MASK,
169 divider << ISPTCTRL_CTRL_DIVB_SHIFT);
174 static int isp_xclk_prepare(struct clk_hw *hw)
176 struct isp_xclk *xclk = to_isp_xclk(hw);
178 omap3isp_get(xclk->isp);
183 static void isp_xclk_unprepare(struct clk_hw *hw)
185 struct isp_xclk *xclk = to_isp_xclk(hw);
187 omap3isp_put(xclk->isp);
190 static int isp_xclk_enable(struct clk_hw *hw)
192 struct isp_xclk *xclk = to_isp_xclk(hw);
195 spin_lock_irqsave(&xclk->lock, flags);
196 isp_xclk_update(xclk, xclk->divider);
197 xclk->enabled = true;
198 spin_unlock_irqrestore(&xclk->lock, flags);
203 static void isp_xclk_disable(struct clk_hw *hw)
205 struct isp_xclk *xclk = to_isp_xclk(hw);
208 spin_lock_irqsave(&xclk->lock, flags);
209 isp_xclk_update(xclk, 0);
210 xclk->enabled = false;
211 spin_unlock_irqrestore(&xclk->lock, flags);
214 static unsigned long isp_xclk_recalc_rate(struct clk_hw *hw,
215 unsigned long parent_rate)
217 struct isp_xclk *xclk = to_isp_xclk(hw);
219 return parent_rate / xclk->divider;
222 static u32 isp_xclk_calc_divider(unsigned long *rate, unsigned long parent_rate)
226 if (*rate >= parent_rate) {
228 return ISPTCTRL_CTRL_DIV_BYPASS;
231 divider = DIV_ROUND_CLOSEST(parent_rate, *rate);
232 if (divider >= ISPTCTRL_CTRL_DIV_BYPASS)
233 divider = ISPTCTRL_CTRL_DIV_BYPASS - 1;
235 *rate = parent_rate / divider;
239 static long isp_xclk_round_rate(struct clk_hw *hw, unsigned long rate,
240 unsigned long *parent_rate)
242 isp_xclk_calc_divider(&rate, *parent_rate);
246 static int isp_xclk_set_rate(struct clk_hw *hw, unsigned long rate,
247 unsigned long parent_rate)
249 struct isp_xclk *xclk = to_isp_xclk(hw);
253 divider = isp_xclk_calc_divider(&rate, parent_rate);
255 spin_lock_irqsave(&xclk->lock, flags);
257 xclk->divider = divider;
259 isp_xclk_update(xclk, divider);
261 spin_unlock_irqrestore(&xclk->lock, flags);
263 dev_dbg(xclk->isp->dev, "%s: cam_xclk%c set to %lu Hz (div %u)\n",
264 __func__, xclk->id == ISP_XCLK_A ? 'a' : 'b', rate, divider);
268 static const struct clk_ops isp_xclk_ops = {
269 .prepare = isp_xclk_prepare,
270 .unprepare = isp_xclk_unprepare,
271 .enable = isp_xclk_enable,
272 .disable = isp_xclk_disable,
273 .recalc_rate = isp_xclk_recalc_rate,
274 .round_rate = isp_xclk_round_rate,
275 .set_rate = isp_xclk_set_rate,
278 static const char *isp_xclk_parent_name = "cam_mclk";
280 static const struct clk_init_data isp_xclk_init_data = {
282 .ops = &isp_xclk_ops,
283 .parent_names = &isp_xclk_parent_name,
287 static int isp_xclk_init(struct isp_device *isp)
289 struct isp_platform_data *pdata = isp->pdata;
290 struct clk_init_data init;
293 for (i = 0; i < ARRAY_SIZE(isp->xclks); ++i)
294 isp->xclks[i].clk = ERR_PTR(-EINVAL);
296 for (i = 0; i < ARRAY_SIZE(isp->xclks); ++i) {
297 struct isp_xclk *xclk = &isp->xclks[i];
300 xclk->id = i == 0 ? ISP_XCLK_A : ISP_XCLK_B;
302 spin_lock_init(&xclk->lock);
304 init.name = i == 0 ? "cam_xclka" : "cam_xclkb";
305 init.ops = &isp_xclk_ops;
306 init.parent_names = &isp_xclk_parent_name;
307 init.num_parents = 1;
309 xclk->hw.init = &init;
311 * The first argument is NULL in order to avoid circular
312 * reference, as this driver takes reference on the
313 * sensor subdevice modules and the sensors would take
314 * reference on this module through clk_get().
316 xclk->clk = clk_register(NULL, &xclk->hw);
317 if (IS_ERR(xclk->clk))
318 return PTR_ERR(xclk->clk);
320 if (pdata->xclks[i].con_id == NULL &&
321 pdata->xclks[i].dev_id == NULL)
324 xclk->lookup = kzalloc(sizeof(*xclk->lookup), GFP_KERNEL);
325 if (xclk->lookup == NULL)
328 xclk->lookup->con_id = pdata->xclks[i].con_id;
329 xclk->lookup->dev_id = pdata->xclks[i].dev_id;
330 xclk->lookup->clk = xclk->clk;
332 clkdev_add(xclk->lookup);
338 static void isp_xclk_cleanup(struct isp_device *isp)
342 for (i = 0; i < ARRAY_SIZE(isp->xclks); ++i) {
343 struct isp_xclk *xclk = &isp->xclks[i];
345 if (!IS_ERR(xclk->clk))
346 clk_unregister(xclk->clk);
349 clkdev_drop(xclk->lookup);
353 /* -----------------------------------------------------------------------------
358 * isp_enable_interrupts - Enable ISP interrupts.
359 * @isp: OMAP3 ISP device
361 static void isp_enable_interrupts(struct isp_device *isp)
363 static const u32 irq = IRQ0ENABLE_CSIA_IRQ
364 | IRQ0ENABLE_CSIB_IRQ
365 | IRQ0ENABLE_CCDC_LSC_PREF_ERR_IRQ
366 | IRQ0ENABLE_CCDC_LSC_DONE_IRQ
367 | IRQ0ENABLE_CCDC_VD0_IRQ
368 | IRQ0ENABLE_CCDC_VD1_IRQ
369 | IRQ0ENABLE_HS_VS_IRQ
370 | IRQ0ENABLE_HIST_DONE_IRQ
371 | IRQ0ENABLE_H3A_AWB_DONE_IRQ
372 | IRQ0ENABLE_H3A_AF_DONE_IRQ
373 | IRQ0ENABLE_PRV_DONE_IRQ
374 | IRQ0ENABLE_RSZ_DONE_IRQ;
376 isp_reg_writel(isp, irq, OMAP3_ISP_IOMEM_MAIN, ISP_IRQ0STATUS);
377 isp_reg_writel(isp, irq, OMAP3_ISP_IOMEM_MAIN, ISP_IRQ0ENABLE);
381 * isp_disable_interrupts - Disable ISP interrupts.
382 * @isp: OMAP3 ISP device
384 static void isp_disable_interrupts(struct isp_device *isp)
386 isp_reg_writel(isp, 0, OMAP3_ISP_IOMEM_MAIN, ISP_IRQ0ENABLE);
390 * isp_core_init - ISP core settings
391 * @isp: OMAP3 ISP device
392 * @idle: Consider idle state.
394 * Set the power settings for the ISP and SBL bus and configure the HS/VS
397 * We need to configure the HS/VS interrupt source before interrupts get
398 * enabled, as the sensor might be free-running and the ISP default setting
399 * (HS edge) would put an unnecessary burden on the CPU.
401 static void isp_core_init(struct isp_device *isp, int idle)
404 ((idle ? ISP_SYSCONFIG_MIDLEMODE_SMARTSTANDBY :
405 ISP_SYSCONFIG_MIDLEMODE_FORCESTANDBY) <<
406 ISP_SYSCONFIG_MIDLEMODE_SHIFT) |
407 ((isp->revision == ISP_REVISION_15_0) ?
408 ISP_SYSCONFIG_AUTOIDLE : 0),
409 OMAP3_ISP_IOMEM_MAIN, ISP_SYSCONFIG);
412 (isp->autoidle ? ISPCTRL_SBL_AUTOIDLE : 0) |
413 ISPCTRL_SYNC_DETECT_VSRISE,
414 OMAP3_ISP_IOMEM_MAIN, ISP_CTRL);
418 * Configure the bridge and lane shifter. Valid inputs are
420 * CCDC_INPUT_PARALLEL: Parallel interface
421 * CCDC_INPUT_CSI2A: CSI2a receiver
422 * CCDC_INPUT_CCP2B: CCP2b receiver
423 * CCDC_INPUT_CSI2C: CSI2c receiver
425 * The bridge and lane shifter are configured according to the selected input
426 * and the ISP platform data.
428 void omap3isp_configure_bridge(struct isp_device *isp,
429 enum ccdc_input_entity input,
430 const struct isp_parallel_platform_data *pdata,
431 unsigned int shift, unsigned int bridge)
435 ispctrl_val = isp_reg_readl(isp, OMAP3_ISP_IOMEM_MAIN, ISP_CTRL);
436 ispctrl_val &= ~ISPCTRL_SHIFT_MASK;
437 ispctrl_val &= ~ISPCTRL_PAR_CLK_POL_INV;
438 ispctrl_val &= ~ISPCTRL_PAR_SER_CLK_SEL_MASK;
439 ispctrl_val &= ~ISPCTRL_PAR_BRIDGE_MASK;
440 ispctrl_val |= bridge;
443 case CCDC_INPUT_PARALLEL:
444 ispctrl_val |= ISPCTRL_PAR_SER_CLK_SEL_PARALLEL;
445 ispctrl_val |= pdata->clk_pol << ISPCTRL_PAR_CLK_POL_SHIFT;
446 shift += pdata->data_lane_shift * 2;
449 case CCDC_INPUT_CSI2A:
450 ispctrl_val |= ISPCTRL_PAR_SER_CLK_SEL_CSIA;
453 case CCDC_INPUT_CCP2B:
454 ispctrl_val |= ISPCTRL_PAR_SER_CLK_SEL_CSIB;
457 case CCDC_INPUT_CSI2C:
458 ispctrl_val |= ISPCTRL_PAR_SER_CLK_SEL_CSIC;
465 ispctrl_val |= ((shift/2) << ISPCTRL_SHIFT_SHIFT) & ISPCTRL_SHIFT_MASK;
467 isp_reg_writel(isp, ispctrl_val, OMAP3_ISP_IOMEM_MAIN, ISP_CTRL);
470 void omap3isp_hist_dma_done(struct isp_device *isp)
472 if (omap3isp_ccdc_busy(&isp->isp_ccdc) ||
473 omap3isp_stat_pcr_busy(&isp->isp_hist)) {
474 /* Histogram cannot be enabled in this frame anymore */
475 atomic_set(&isp->isp_hist.buf_err, 1);
476 dev_dbg(isp->dev, "hist: Out of synchronization with "
477 "CCDC. Ignoring next buffer.\n");
481 static inline void isp_isr_dbg(struct isp_device *isp, u32 irqstatus)
483 static const char *name[] = {
502 "CCDC_LSC_PREFETCH_COMPLETED",
503 "CCDC_LSC_PREFETCH_ERROR",
519 dev_dbg(isp->dev, "ISP IRQ: ");
521 for (i = 0; i < ARRAY_SIZE(name); i++) {
522 if ((1 << i) & irqstatus)
523 printk(KERN_CONT "%s ", name[i]);
525 printk(KERN_CONT "\n");
528 static void isp_isr_sbl(struct isp_device *isp)
530 struct device *dev = isp->dev;
531 struct isp_pipeline *pipe;
535 * Handle shared buffer logic overflows for video buffers.
536 * ISPSBL_PCR_CCDCPRV_2_RSZ_OVF can be safely ignored.
538 sbl_pcr = isp_reg_readl(isp, OMAP3_ISP_IOMEM_SBL, ISPSBL_PCR);
539 isp_reg_writel(isp, sbl_pcr, OMAP3_ISP_IOMEM_SBL, ISPSBL_PCR);
540 sbl_pcr &= ~ISPSBL_PCR_CCDCPRV_2_RSZ_OVF;
543 dev_dbg(dev, "SBL overflow (PCR = 0x%08x)\n", sbl_pcr);
545 if (sbl_pcr & ISPSBL_PCR_CSIB_WBL_OVF) {
546 pipe = to_isp_pipeline(&isp->isp_ccp2.subdev.entity);
551 if (sbl_pcr & ISPSBL_PCR_CSIA_WBL_OVF) {
552 pipe = to_isp_pipeline(&isp->isp_csi2a.subdev.entity);
557 if (sbl_pcr & ISPSBL_PCR_CCDC_WBL_OVF) {
558 pipe = to_isp_pipeline(&isp->isp_ccdc.subdev.entity);
563 if (sbl_pcr & ISPSBL_PCR_PRV_WBL_OVF) {
564 pipe = to_isp_pipeline(&isp->isp_prev.subdev.entity);
569 if (sbl_pcr & (ISPSBL_PCR_RSZ1_WBL_OVF
570 | ISPSBL_PCR_RSZ2_WBL_OVF
571 | ISPSBL_PCR_RSZ3_WBL_OVF
572 | ISPSBL_PCR_RSZ4_WBL_OVF)) {
573 pipe = to_isp_pipeline(&isp->isp_res.subdev.entity);
578 if (sbl_pcr & ISPSBL_PCR_H3A_AF_WBL_OVF)
579 omap3isp_stat_sbl_overflow(&isp->isp_af);
581 if (sbl_pcr & ISPSBL_PCR_H3A_AEAWB_WBL_OVF)
582 omap3isp_stat_sbl_overflow(&isp->isp_aewb);
586 * isp_isr - Interrupt Service Routine for Camera ISP module.
587 * @irq: Not used currently.
588 * @_isp: Pointer to the OMAP3 ISP device
590 * Handles the corresponding callback if plugged in.
592 static irqreturn_t isp_isr(int irq, void *_isp)
594 static const u32 ccdc_events = IRQ0STATUS_CCDC_LSC_PREF_ERR_IRQ |
595 IRQ0STATUS_CCDC_LSC_DONE_IRQ |
596 IRQ0STATUS_CCDC_VD0_IRQ |
597 IRQ0STATUS_CCDC_VD1_IRQ |
598 IRQ0STATUS_HS_VS_IRQ;
599 struct isp_device *isp = _isp;
602 irqstatus = isp_reg_readl(isp, OMAP3_ISP_IOMEM_MAIN, ISP_IRQ0STATUS);
603 isp_reg_writel(isp, irqstatus, OMAP3_ISP_IOMEM_MAIN, ISP_IRQ0STATUS);
607 if (irqstatus & IRQ0STATUS_CSIA_IRQ)
608 omap3isp_csi2_isr(&isp->isp_csi2a);
610 if (irqstatus & IRQ0STATUS_CSIB_IRQ)
611 omap3isp_ccp2_isr(&isp->isp_ccp2);
613 if (irqstatus & IRQ0STATUS_CCDC_VD0_IRQ) {
614 if (isp->isp_ccdc.output & CCDC_OUTPUT_PREVIEW)
615 omap3isp_preview_isr_frame_sync(&isp->isp_prev);
616 if (isp->isp_ccdc.output & CCDC_OUTPUT_RESIZER)
617 omap3isp_resizer_isr_frame_sync(&isp->isp_res);
618 omap3isp_stat_isr_frame_sync(&isp->isp_aewb);
619 omap3isp_stat_isr_frame_sync(&isp->isp_af);
620 omap3isp_stat_isr_frame_sync(&isp->isp_hist);
623 if (irqstatus & ccdc_events)
624 omap3isp_ccdc_isr(&isp->isp_ccdc, irqstatus & ccdc_events);
626 if (irqstatus & IRQ0STATUS_PRV_DONE_IRQ) {
627 if (isp->isp_prev.output & PREVIEW_OUTPUT_RESIZER)
628 omap3isp_resizer_isr_frame_sync(&isp->isp_res);
629 omap3isp_preview_isr(&isp->isp_prev);
632 if (irqstatus & IRQ0STATUS_RSZ_DONE_IRQ)
633 omap3isp_resizer_isr(&isp->isp_res);
635 if (irqstatus & IRQ0STATUS_H3A_AWB_DONE_IRQ)
636 omap3isp_stat_isr(&isp->isp_aewb);
638 if (irqstatus & IRQ0STATUS_H3A_AF_DONE_IRQ)
639 omap3isp_stat_isr(&isp->isp_af);
641 if (irqstatus & IRQ0STATUS_HIST_DONE_IRQ)
642 omap3isp_stat_isr(&isp->isp_hist);
646 #if defined(DEBUG) && defined(ISP_ISR_DEBUG)
647 isp_isr_dbg(isp, irqstatus);
653 /* -----------------------------------------------------------------------------
654 * Pipeline power management
656 * Entities must be powered up when part of a pipeline that contains at least
657 * one open video device node.
659 * To achieve this use the entity use_count field to track the number of users.
660 * For entities corresponding to video device nodes the use_count field stores
661 * the users count of the node. For entities corresponding to subdevs the
662 * use_count field stores the total number of users of all video device nodes
665 * The omap3isp_pipeline_pm_use() function must be called in the open() and
666 * close() handlers of video device nodes. It increments or decrements the use
667 * count of all subdev entities in the pipeline.
669 * To react to link management on powered pipelines, the link setup notification
670 * callback updates the use count of all entities in the source and sink sides
675 * isp_pipeline_pm_use_count - Count the number of users of a pipeline
676 * @entity: The entity
678 * Return the total number of users of all video device nodes in the pipeline.
680 static int isp_pipeline_pm_use_count(struct media_entity *entity)
682 struct media_entity_graph graph;
685 media_entity_graph_walk_start(&graph, entity);
687 while ((entity = media_entity_graph_walk_next(&graph))) {
688 if (media_entity_type(entity) == MEDIA_ENT_T_DEVNODE)
689 use += entity->use_count;
696 * isp_pipeline_pm_power_one - Apply power change to an entity
697 * @entity: The entity
698 * @change: Use count change
700 * Change the entity use count by @change. If the entity is a subdev update its
701 * power state by calling the core::s_power operation when the use count goes
702 * from 0 to != 0 or from != 0 to 0.
704 * Return 0 on success or a negative error code on failure.
706 static int isp_pipeline_pm_power_one(struct media_entity *entity, int change)
708 struct v4l2_subdev *subdev;
711 subdev = media_entity_type(entity) == MEDIA_ENT_T_V4L2_SUBDEV
712 ? media_entity_to_v4l2_subdev(entity) : NULL;
714 if (entity->use_count == 0 && change > 0 && subdev != NULL) {
715 ret = v4l2_subdev_call(subdev, core, s_power, 1);
716 if (ret < 0 && ret != -ENOIOCTLCMD)
720 entity->use_count += change;
721 WARN_ON(entity->use_count < 0);
723 if (entity->use_count == 0 && change < 0 && subdev != NULL)
724 v4l2_subdev_call(subdev, core, s_power, 0);
730 * isp_pipeline_pm_power - Apply power change to all entities in a pipeline
731 * @entity: The entity
732 * @change: Use count change
734 * Walk the pipeline to update the use count and the power state of all non-node
737 * Return 0 on success or a negative error code on failure.
739 static int isp_pipeline_pm_power(struct media_entity *entity, int change)
741 struct media_entity_graph graph;
742 struct media_entity *first = entity;
748 media_entity_graph_walk_start(&graph, entity);
750 while (!ret && (entity = media_entity_graph_walk_next(&graph)))
751 if (media_entity_type(entity) != MEDIA_ENT_T_DEVNODE)
752 ret = isp_pipeline_pm_power_one(entity, change);
757 media_entity_graph_walk_start(&graph, first);
759 while ((first = media_entity_graph_walk_next(&graph))
761 if (media_entity_type(first) != MEDIA_ENT_T_DEVNODE)
762 isp_pipeline_pm_power_one(first, -change);
768 * omap3isp_pipeline_pm_use - Update the use count of an entity
769 * @entity: The entity
770 * @use: Use (1) or stop using (0) the entity
772 * Update the use count of all entities in the pipeline and power entities on or
775 * Return 0 on success or a negative error code on failure. Powering entities
776 * off is assumed to never fail. No failure can occur when the use parameter is
779 int omap3isp_pipeline_pm_use(struct media_entity *entity, int use)
781 int change = use ? 1 : -1;
784 mutex_lock(&entity->parent->graph_mutex);
786 /* Apply use count to node. */
787 entity->use_count += change;
788 WARN_ON(entity->use_count < 0);
790 /* Apply power change to connected non-nodes. */
791 ret = isp_pipeline_pm_power(entity, change);
793 entity->use_count -= change;
795 mutex_unlock(&entity->parent->graph_mutex);
801 * isp_pipeline_link_notify - Link management notification callback
803 * @flags: New link flags that will be applied
804 * @notification: The link's state change notification type (MEDIA_DEV_NOTIFY_*)
806 * React to link management on powered pipelines by updating the use count of
807 * all entities in the source and sink sides of the link. Entities are powered
808 * on or off accordingly.
810 * Return 0 on success or a negative error code on failure. Powering entities
811 * off is assumed to never fail. This function will not fail for disconnection
814 static int isp_pipeline_link_notify(struct media_link *link, u32 flags,
815 unsigned int notification)
817 struct media_entity *source = link->source->entity;
818 struct media_entity *sink = link->sink->entity;
819 int source_use = isp_pipeline_pm_use_count(source);
820 int sink_use = isp_pipeline_pm_use_count(sink);
823 if (notification == MEDIA_DEV_NOTIFY_POST_LINK_CH &&
824 !(link->flags & MEDIA_LNK_FL_ENABLED)) {
825 /* Powering off entities is assumed to never fail. */
826 isp_pipeline_pm_power(source, -sink_use);
827 isp_pipeline_pm_power(sink, -source_use);
831 if (notification == MEDIA_DEV_NOTIFY_POST_LINK_CH &&
832 (flags & MEDIA_LNK_FL_ENABLED)) {
834 ret = isp_pipeline_pm_power(source, sink_use);
838 ret = isp_pipeline_pm_power(sink, source_use);
840 isp_pipeline_pm_power(source, -sink_use);
848 /* -----------------------------------------------------------------------------
849 * Pipeline stream management
853 * isp_pipeline_enable - Enable streaming on a pipeline
854 * @pipe: ISP pipeline
855 * @mode: Stream mode (single shot or continuous)
857 * Walk the entities chain starting at the pipeline output video node and start
858 * all modules in the chain in the given mode.
860 * Return 0 if successful, or the return value of the failed video::s_stream
861 * operation otherwise.
863 static int isp_pipeline_enable(struct isp_pipeline *pipe,
864 enum isp_pipeline_stream_state mode)
866 struct isp_device *isp = pipe->output->isp;
867 struct media_entity *entity;
868 struct media_pad *pad;
869 struct v4l2_subdev *subdev;
873 /* Refuse to start streaming if an entity included in the pipeline has
874 * crashed. This check must be performed before the loop below to avoid
875 * starting entities if the pipeline won't start anyway (those entities
876 * would then likely fail to stop, making the problem worse).
878 if (pipe->entities & isp->crashed)
881 spin_lock_irqsave(&pipe->lock, flags);
882 pipe->state &= ~(ISP_PIPELINE_IDLE_INPUT | ISP_PIPELINE_IDLE_OUTPUT);
883 spin_unlock_irqrestore(&pipe->lock, flags);
885 pipe->do_propagation = false;
887 entity = &pipe->output->video.entity;
889 pad = &entity->pads[0];
890 if (!(pad->flags & MEDIA_PAD_FL_SINK))
893 pad = media_entity_remote_pad(pad);
895 media_entity_type(pad->entity) != MEDIA_ENT_T_V4L2_SUBDEV)
898 entity = pad->entity;
899 subdev = media_entity_to_v4l2_subdev(entity);
901 ret = v4l2_subdev_call(subdev, video, s_stream, mode);
902 if (ret < 0 && ret != -ENOIOCTLCMD)
905 if (subdev == &isp->isp_ccdc.subdev) {
906 v4l2_subdev_call(&isp->isp_aewb.subdev, video,
908 v4l2_subdev_call(&isp->isp_af.subdev, video,
910 v4l2_subdev_call(&isp->isp_hist.subdev, video,
912 pipe->do_propagation = true;
919 static int isp_pipeline_wait_resizer(struct isp_device *isp)
921 return omap3isp_resizer_busy(&isp->isp_res);
924 static int isp_pipeline_wait_preview(struct isp_device *isp)
926 return omap3isp_preview_busy(&isp->isp_prev);
929 static int isp_pipeline_wait_ccdc(struct isp_device *isp)
931 return omap3isp_stat_busy(&isp->isp_af)
932 || omap3isp_stat_busy(&isp->isp_aewb)
933 || omap3isp_stat_busy(&isp->isp_hist)
934 || omap3isp_ccdc_busy(&isp->isp_ccdc);
937 #define ISP_STOP_TIMEOUT msecs_to_jiffies(1000)
939 static int isp_pipeline_wait(struct isp_device *isp,
940 int(*busy)(struct isp_device *isp))
942 unsigned long timeout = jiffies + ISP_STOP_TIMEOUT;
944 while (!time_after(jiffies, timeout)) {
953 * isp_pipeline_disable - Disable streaming on a pipeline
954 * @pipe: ISP pipeline
956 * Walk the entities chain starting at the pipeline output video node and stop
957 * all modules in the chain. Wait synchronously for the modules to be stopped if
960 * Return 0 if all modules have been properly stopped, or -ETIMEDOUT if a module
961 * can't be stopped (in which case a software reset of the ISP is probably
964 static int isp_pipeline_disable(struct isp_pipeline *pipe)
966 struct isp_device *isp = pipe->output->isp;
967 struct media_entity *entity;
968 struct media_pad *pad;
969 struct v4l2_subdev *subdev;
974 * We need to stop all the modules after CCDC first or they'll
975 * never stop since they may not get a full frame from CCDC.
977 entity = &pipe->output->video.entity;
979 pad = &entity->pads[0];
980 if (!(pad->flags & MEDIA_PAD_FL_SINK))
983 pad = media_entity_remote_pad(pad);
985 media_entity_type(pad->entity) != MEDIA_ENT_T_V4L2_SUBDEV)
988 entity = pad->entity;
989 subdev = media_entity_to_v4l2_subdev(entity);
991 if (subdev == &isp->isp_ccdc.subdev) {
992 v4l2_subdev_call(&isp->isp_aewb.subdev,
994 v4l2_subdev_call(&isp->isp_af.subdev,
996 v4l2_subdev_call(&isp->isp_hist.subdev,
1000 v4l2_subdev_call(subdev, video, s_stream, 0);
1002 if (subdev == &isp->isp_res.subdev)
1003 ret = isp_pipeline_wait(isp, isp_pipeline_wait_resizer);
1004 else if (subdev == &isp->isp_prev.subdev)
1005 ret = isp_pipeline_wait(isp, isp_pipeline_wait_preview);
1006 else if (subdev == &isp->isp_ccdc.subdev)
1007 ret = isp_pipeline_wait(isp, isp_pipeline_wait_ccdc);
1011 /* Handle stop failures. An entity that fails to stop can
1012 * usually just be restarted. Flag the stop failure nonetheless
1013 * to trigger an ISP reset the next time the device is released,
1016 * The preview engine is a special case. A failure to stop can
1017 * mean a hardware crash. When that happens the preview engine
1018 * won't respond to read/write operations on the L4 bus anymore,
1019 * resulting in a bus fault and a kernel oops next time it gets
1020 * accessed. Mark it as crashed to prevent pipelines including
1021 * it from being started.
1024 dev_info(isp->dev, "Unable to stop %s\n", subdev->name);
1025 isp->stop_failure = true;
1026 if (subdev == &isp->isp_prev.subdev)
1027 isp->crashed |= 1U << subdev->entity.id;
1028 failure = -ETIMEDOUT;
1036 * omap3isp_pipeline_set_stream - Enable/disable streaming on a pipeline
1037 * @pipe: ISP pipeline
1038 * @state: Stream state (stopped, single shot or continuous)
1040 * Set the pipeline to the given stream state. Pipelines can be started in
1041 * single-shot or continuous mode.
1043 * Return 0 if successful, or the return value of the failed video::s_stream
1044 * operation otherwise. The pipeline state is not updated when the operation
1045 * fails, except when stopping the pipeline.
1047 int omap3isp_pipeline_set_stream(struct isp_pipeline *pipe,
1048 enum isp_pipeline_stream_state state)
1052 if (state == ISP_PIPELINE_STREAM_STOPPED)
1053 ret = isp_pipeline_disable(pipe);
1055 ret = isp_pipeline_enable(pipe, state);
1057 if (ret == 0 || state == ISP_PIPELINE_STREAM_STOPPED)
1058 pipe->stream_state = state;
1064 * omap3isp_pipeline_cancel_stream - Cancel stream on a pipeline
1065 * @pipe: ISP pipeline
1067 * Cancelling a stream mark all buffers on all video nodes in the pipeline as
1068 * erroneous and makes sure no new buffer can be queued. This function is called
1069 * when a fatal error that prevents any further operation on the pipeline
1072 void omap3isp_pipeline_cancel_stream(struct isp_pipeline *pipe)
1075 omap3isp_video_cancel_stream(pipe->input);
1077 omap3isp_video_cancel_stream(pipe->output);
1081 * isp_pipeline_resume - Resume streaming on a pipeline
1082 * @pipe: ISP pipeline
1084 * Resume video output and input and re-enable pipeline.
1086 static void isp_pipeline_resume(struct isp_pipeline *pipe)
1088 int singleshot = pipe->stream_state == ISP_PIPELINE_STREAM_SINGLESHOT;
1090 omap3isp_video_resume(pipe->output, !singleshot);
1092 omap3isp_video_resume(pipe->input, 0);
1093 isp_pipeline_enable(pipe, pipe->stream_state);
1097 * isp_pipeline_suspend - Suspend streaming on a pipeline
1098 * @pipe: ISP pipeline
1102 static void isp_pipeline_suspend(struct isp_pipeline *pipe)
1104 isp_pipeline_disable(pipe);
1108 * isp_pipeline_is_last - Verify if entity has an enabled link to the output
1110 * @me: ISP module's media entity
1112 * Returns 1 if the entity has an enabled link to the output video node or 0
1113 * otherwise. It's true only while pipeline can have no more than one output
1116 static int isp_pipeline_is_last(struct media_entity *me)
1118 struct isp_pipeline *pipe;
1119 struct media_pad *pad;
1123 pipe = to_isp_pipeline(me);
1124 if (pipe->stream_state == ISP_PIPELINE_STREAM_STOPPED)
1126 pad = media_entity_remote_pad(&pipe->output->pad);
1127 return pad->entity == me;
1131 * isp_suspend_module_pipeline - Suspend pipeline to which belongs the module
1132 * @me: ISP module's media entity
1134 * Suspend the whole pipeline if module's entity has an enabled link to the
1135 * output video node. It works only while pipeline can have no more than one
1138 static void isp_suspend_module_pipeline(struct media_entity *me)
1140 if (isp_pipeline_is_last(me))
1141 isp_pipeline_suspend(to_isp_pipeline(me));
1145 * isp_resume_module_pipeline - Resume pipeline to which belongs the module
1146 * @me: ISP module's media entity
1148 * Resume the whole pipeline if module's entity has an enabled link to the
1149 * output video node. It works only while pipeline can have no more than one
1152 static void isp_resume_module_pipeline(struct media_entity *me)
1154 if (isp_pipeline_is_last(me))
1155 isp_pipeline_resume(to_isp_pipeline(me));
1159 * isp_suspend_modules - Suspend ISP submodules.
1160 * @isp: OMAP3 ISP device
1162 * Returns 0 if suspend left in idle state all the submodules properly,
1163 * or returns 1 if a general Reset is required to suspend the submodules.
1165 static int isp_suspend_modules(struct isp_device *isp)
1167 unsigned long timeout;
1169 omap3isp_stat_suspend(&isp->isp_aewb);
1170 omap3isp_stat_suspend(&isp->isp_af);
1171 omap3isp_stat_suspend(&isp->isp_hist);
1172 isp_suspend_module_pipeline(&isp->isp_res.subdev.entity);
1173 isp_suspend_module_pipeline(&isp->isp_prev.subdev.entity);
1174 isp_suspend_module_pipeline(&isp->isp_ccdc.subdev.entity);
1175 isp_suspend_module_pipeline(&isp->isp_csi2a.subdev.entity);
1176 isp_suspend_module_pipeline(&isp->isp_ccp2.subdev.entity);
1178 timeout = jiffies + ISP_STOP_TIMEOUT;
1179 while (omap3isp_stat_busy(&isp->isp_af)
1180 || omap3isp_stat_busy(&isp->isp_aewb)
1181 || omap3isp_stat_busy(&isp->isp_hist)
1182 || omap3isp_preview_busy(&isp->isp_prev)
1183 || omap3isp_resizer_busy(&isp->isp_res)
1184 || omap3isp_ccdc_busy(&isp->isp_ccdc)) {
1185 if (time_after(jiffies, timeout)) {
1186 dev_info(isp->dev, "can't stop modules.\n");
1196 * isp_resume_modules - Resume ISP submodules.
1197 * @isp: OMAP3 ISP device
1199 static void isp_resume_modules(struct isp_device *isp)
1201 omap3isp_stat_resume(&isp->isp_aewb);
1202 omap3isp_stat_resume(&isp->isp_af);
1203 omap3isp_stat_resume(&isp->isp_hist);
1204 isp_resume_module_pipeline(&isp->isp_res.subdev.entity);
1205 isp_resume_module_pipeline(&isp->isp_prev.subdev.entity);
1206 isp_resume_module_pipeline(&isp->isp_ccdc.subdev.entity);
1207 isp_resume_module_pipeline(&isp->isp_csi2a.subdev.entity);
1208 isp_resume_module_pipeline(&isp->isp_ccp2.subdev.entity);
1212 * isp_reset - Reset ISP with a timeout wait for idle.
1213 * @isp: OMAP3 ISP device
1215 static int isp_reset(struct isp_device *isp)
1217 unsigned long timeout = 0;
1220 isp_reg_readl(isp, OMAP3_ISP_IOMEM_MAIN, ISP_SYSCONFIG)
1221 | ISP_SYSCONFIG_SOFTRESET,
1222 OMAP3_ISP_IOMEM_MAIN, ISP_SYSCONFIG);
1223 while (!(isp_reg_readl(isp, OMAP3_ISP_IOMEM_MAIN,
1224 ISP_SYSSTATUS) & 0x1)) {
1225 if (timeout++ > 10000) {
1226 dev_alert(isp->dev, "cannot reset ISP\n");
1232 isp->stop_failure = false;
1238 * isp_save_context - Saves the values of the ISP module registers.
1239 * @isp: OMAP3 ISP device
1240 * @reg_list: Structure containing pairs of register address and value to
1244 isp_save_context(struct isp_device *isp, struct isp_reg *reg_list)
1246 struct isp_reg *next = reg_list;
1248 for (; next->reg != ISP_TOK_TERM; next++)
1249 next->val = isp_reg_readl(isp, next->mmio_range, next->reg);
1253 * isp_restore_context - Restores the values of the ISP module registers.
1254 * @isp: OMAP3 ISP device
1255 * @reg_list: Structure containing pairs of register address and value to
1259 isp_restore_context(struct isp_device *isp, struct isp_reg *reg_list)
1261 struct isp_reg *next = reg_list;
1263 for (; next->reg != ISP_TOK_TERM; next++)
1264 isp_reg_writel(isp, next->val, next->mmio_range, next->reg);
1268 * isp_save_ctx - Saves ISP, CCDC, HIST, H3A, PREV, RESZ & MMU context.
1269 * @isp: OMAP3 ISP device
1271 * Routine for saving the context of each module in the ISP.
1272 * CCDC, HIST, H3A, PREV, RESZ and MMU.
1274 static void isp_save_ctx(struct isp_device *isp)
1276 isp_save_context(isp, isp_reg_list);
1277 omap_iommu_save_ctx(isp->dev);
1281 * isp_restore_ctx - Restores ISP, CCDC, HIST, H3A, PREV, RESZ & MMU context.
1282 * @isp: OMAP3 ISP device
1284 * Routine for restoring the context of each module in the ISP.
1285 * CCDC, HIST, H3A, PREV, RESZ and MMU.
1287 static void isp_restore_ctx(struct isp_device *isp)
1289 isp_restore_context(isp, isp_reg_list);
1290 omap_iommu_restore_ctx(isp->dev);
1291 omap3isp_ccdc_restore_context(isp);
1292 omap3isp_preview_restore_context(isp);
1295 /* -----------------------------------------------------------------------------
1296 * SBL resources management
1298 #define OMAP3_ISP_SBL_READ (OMAP3_ISP_SBL_CSI1_READ | \
1299 OMAP3_ISP_SBL_CCDC_LSC_READ | \
1300 OMAP3_ISP_SBL_PREVIEW_READ | \
1301 OMAP3_ISP_SBL_RESIZER_READ)
1302 #define OMAP3_ISP_SBL_WRITE (OMAP3_ISP_SBL_CSI1_WRITE | \
1303 OMAP3_ISP_SBL_CSI2A_WRITE | \
1304 OMAP3_ISP_SBL_CSI2C_WRITE | \
1305 OMAP3_ISP_SBL_CCDC_WRITE | \
1306 OMAP3_ISP_SBL_PREVIEW_WRITE)
1308 void omap3isp_sbl_enable(struct isp_device *isp, enum isp_sbl_resource res)
1312 isp->sbl_resources |= res;
1314 if (isp->sbl_resources & OMAP3_ISP_SBL_CSI1_READ)
1315 sbl |= ISPCTRL_SBL_SHARED_RPORTA;
1317 if (isp->sbl_resources & OMAP3_ISP_SBL_CCDC_LSC_READ)
1318 sbl |= ISPCTRL_SBL_SHARED_RPORTB;
1320 if (isp->sbl_resources & OMAP3_ISP_SBL_CSI2C_WRITE)
1321 sbl |= ISPCTRL_SBL_SHARED_WPORTC;
1323 if (isp->sbl_resources & OMAP3_ISP_SBL_RESIZER_WRITE)
1324 sbl |= ISPCTRL_SBL_WR0_RAM_EN;
1326 if (isp->sbl_resources & OMAP3_ISP_SBL_WRITE)
1327 sbl |= ISPCTRL_SBL_WR1_RAM_EN;
1329 if (isp->sbl_resources & OMAP3_ISP_SBL_READ)
1330 sbl |= ISPCTRL_SBL_RD_RAM_EN;
1332 isp_reg_set(isp, OMAP3_ISP_IOMEM_MAIN, ISP_CTRL, sbl);
1335 void omap3isp_sbl_disable(struct isp_device *isp, enum isp_sbl_resource res)
1339 isp->sbl_resources &= ~res;
1341 if (!(isp->sbl_resources & OMAP3_ISP_SBL_CSI1_READ))
1342 sbl |= ISPCTRL_SBL_SHARED_RPORTA;
1344 if (!(isp->sbl_resources & OMAP3_ISP_SBL_CCDC_LSC_READ))
1345 sbl |= ISPCTRL_SBL_SHARED_RPORTB;
1347 if (!(isp->sbl_resources & OMAP3_ISP_SBL_CSI2C_WRITE))
1348 sbl |= ISPCTRL_SBL_SHARED_WPORTC;
1350 if (!(isp->sbl_resources & OMAP3_ISP_SBL_RESIZER_WRITE))
1351 sbl |= ISPCTRL_SBL_WR0_RAM_EN;
1353 if (!(isp->sbl_resources & OMAP3_ISP_SBL_WRITE))
1354 sbl |= ISPCTRL_SBL_WR1_RAM_EN;
1356 if (!(isp->sbl_resources & OMAP3_ISP_SBL_READ))
1357 sbl |= ISPCTRL_SBL_RD_RAM_EN;
1359 isp_reg_clr(isp, OMAP3_ISP_IOMEM_MAIN, ISP_CTRL, sbl);
1363 * isp_module_sync_idle - Helper to sync module with its idle state
1364 * @me: ISP submodule's media entity
1365 * @wait: ISP submodule's wait queue for streamoff/interrupt synchronization
1366 * @stopping: flag which tells module wants to stop
1368 * This function checks if ISP submodule needs to wait for next interrupt. If
1369 * yes, makes the caller to sleep while waiting for such event.
1371 int omap3isp_module_sync_idle(struct media_entity *me, wait_queue_head_t *wait,
1374 struct isp_pipeline *pipe = to_isp_pipeline(me);
1376 if (pipe->stream_state == ISP_PIPELINE_STREAM_STOPPED ||
1377 (pipe->stream_state == ISP_PIPELINE_STREAM_SINGLESHOT &&
1378 !isp_pipeline_ready(pipe)))
1382 * atomic_set() doesn't include memory barrier on ARM platform for SMP
1383 * scenario. We'll call it here to avoid race conditions.
1385 atomic_set(stopping, 1);
1389 * If module is the last one, it's writing to memory. In this case,
1390 * it's necessary to check if the module is already paused due to
1391 * DMA queue underrun or if it has to wait for next interrupt to be
1393 * If it isn't the last one, the function won't sleep but *stopping
1394 * will still be set to warn next submodule caller's interrupt the
1395 * module wants to be idle.
1397 if (isp_pipeline_is_last(me)) {
1398 struct isp_video *video = pipe->output;
1399 unsigned long flags;
1400 spin_lock_irqsave(&video->queue->irqlock, flags);
1401 if (video->dmaqueue_flags & ISP_VIDEO_DMAQUEUE_UNDERRUN) {
1402 spin_unlock_irqrestore(&video->queue->irqlock, flags);
1403 atomic_set(stopping, 0);
1407 spin_unlock_irqrestore(&video->queue->irqlock, flags);
1408 if (!wait_event_timeout(*wait, !atomic_read(stopping),
1409 msecs_to_jiffies(1000))) {
1410 atomic_set(stopping, 0);
1420 * omap3isp_module_sync_is_stopping - Helper to verify if module was stopping
1421 * @wait: ISP submodule's wait queue for streamoff/interrupt synchronization
1422 * @stopping: flag which tells module wants to stop
1424 * This function checks if ISP submodule was stopping. In case of yes, it
1425 * notices the caller by setting stopping to 0 and waking up the wait queue.
1426 * Returns 1 if it was stopping or 0 otherwise.
1428 int omap3isp_module_sync_is_stopping(wait_queue_head_t *wait,
1431 if (atomic_cmpxchg(stopping, 1, 0)) {
1439 /* --------------------------------------------------------------------------
1443 #define ISPCTRL_CLKS_MASK (ISPCTRL_H3A_CLK_EN | \
1444 ISPCTRL_HIST_CLK_EN | \
1445 ISPCTRL_RSZ_CLK_EN | \
1446 (ISPCTRL_CCDC_CLK_EN | ISPCTRL_CCDC_RAM_EN) | \
1447 (ISPCTRL_PREV_CLK_EN | ISPCTRL_PREV_RAM_EN))
1449 static void __isp_subclk_update(struct isp_device *isp)
1453 /* AEWB and AF share the same clock. */
1454 if (isp->subclk_resources &
1455 (OMAP3_ISP_SUBCLK_AEWB | OMAP3_ISP_SUBCLK_AF))
1456 clk |= ISPCTRL_H3A_CLK_EN;
1458 if (isp->subclk_resources & OMAP3_ISP_SUBCLK_HIST)
1459 clk |= ISPCTRL_HIST_CLK_EN;
1461 if (isp->subclk_resources & OMAP3_ISP_SUBCLK_RESIZER)
1462 clk |= ISPCTRL_RSZ_CLK_EN;
1464 /* NOTE: For CCDC & Preview submodules, we need to affect internal
1467 if (isp->subclk_resources & OMAP3_ISP_SUBCLK_CCDC)
1468 clk |= ISPCTRL_CCDC_CLK_EN | ISPCTRL_CCDC_RAM_EN;
1470 if (isp->subclk_resources & OMAP3_ISP_SUBCLK_PREVIEW)
1471 clk |= ISPCTRL_PREV_CLK_EN | ISPCTRL_PREV_RAM_EN;
1473 isp_reg_clr_set(isp, OMAP3_ISP_IOMEM_MAIN, ISP_CTRL,
1474 ISPCTRL_CLKS_MASK, clk);
1477 void omap3isp_subclk_enable(struct isp_device *isp,
1478 enum isp_subclk_resource res)
1480 isp->subclk_resources |= res;
1482 __isp_subclk_update(isp);
1485 void omap3isp_subclk_disable(struct isp_device *isp,
1486 enum isp_subclk_resource res)
1488 isp->subclk_resources &= ~res;
1490 __isp_subclk_update(isp);
1494 * isp_enable_clocks - Enable ISP clocks
1495 * @isp: OMAP3 ISP device
1497 * Return 0 if successful, or clk_prepare_enable return value if any of them
1500 static int isp_enable_clocks(struct isp_device *isp)
1505 r = clk_prepare_enable(isp->clock[ISP_CLK_CAM_ICK]);
1507 dev_err(isp->dev, "failed to enable cam_ick clock\n");
1508 goto out_clk_enable_ick;
1510 r = clk_set_rate(isp->clock[ISP_CLK_CAM_MCLK], CM_CAM_MCLK_HZ);
1512 dev_err(isp->dev, "clk_set_rate for cam_mclk failed\n");
1513 goto out_clk_enable_mclk;
1515 r = clk_prepare_enable(isp->clock[ISP_CLK_CAM_MCLK]);
1517 dev_err(isp->dev, "failed to enable cam_mclk clock\n");
1518 goto out_clk_enable_mclk;
1520 rate = clk_get_rate(isp->clock[ISP_CLK_CAM_MCLK]);
1521 if (rate != CM_CAM_MCLK_HZ)
1522 dev_warn(isp->dev, "unexpected cam_mclk rate:\n"
1524 " actual : %ld\n", CM_CAM_MCLK_HZ, rate);
1525 r = clk_prepare_enable(isp->clock[ISP_CLK_CSI2_FCK]);
1527 dev_err(isp->dev, "failed to enable csi2_fck clock\n");
1528 goto out_clk_enable_csi2_fclk;
1532 out_clk_enable_csi2_fclk:
1533 clk_disable_unprepare(isp->clock[ISP_CLK_CAM_MCLK]);
1534 out_clk_enable_mclk:
1535 clk_disable_unprepare(isp->clock[ISP_CLK_CAM_ICK]);
1541 * isp_disable_clocks - Disable ISP clocks
1542 * @isp: OMAP3 ISP device
1544 static void isp_disable_clocks(struct isp_device *isp)
1546 clk_disable_unprepare(isp->clock[ISP_CLK_CAM_ICK]);
1547 clk_disable_unprepare(isp->clock[ISP_CLK_CAM_MCLK]);
1548 clk_disable_unprepare(isp->clock[ISP_CLK_CSI2_FCK]);
1551 static const char *isp_clocks[] = {
1558 static int isp_get_clocks(struct isp_device *isp)
1563 for (i = 0; i < ARRAY_SIZE(isp_clocks); ++i) {
1564 clk = devm_clk_get(isp->dev, isp_clocks[i]);
1566 dev_err(isp->dev, "clk_get %s failed\n", isp_clocks[i]);
1567 return PTR_ERR(clk);
1570 isp->clock[i] = clk;
1577 * omap3isp_get - Acquire the ISP resource.
1579 * Initializes the clocks for the first acquire.
1581 * Increment the reference count on the ISP. If the first reference is taken,
1582 * enable clocks and power-up all submodules.
1584 * Return a pointer to the ISP device structure, or NULL if an error occurred.
1586 static struct isp_device *__omap3isp_get(struct isp_device *isp, bool irq)
1588 struct isp_device *__isp = isp;
1593 mutex_lock(&isp->isp_mutex);
1594 if (isp->ref_count > 0)
1597 if (isp_enable_clocks(isp) < 0) {
1602 /* We don't want to restore context before saving it! */
1603 if (isp->has_context)
1604 isp_restore_ctx(isp);
1607 isp_enable_interrupts(isp);
1612 mutex_unlock(&isp->isp_mutex);
1617 struct isp_device *omap3isp_get(struct isp_device *isp)
1619 return __omap3isp_get(isp, true);
1623 * omap3isp_put - Release the ISP
1625 * Decrement the reference count on the ISP. If the last reference is released,
1626 * power-down all submodules, disable clocks and free temporary buffers.
1628 void omap3isp_put(struct isp_device *isp)
1633 mutex_lock(&isp->isp_mutex);
1634 BUG_ON(isp->ref_count == 0);
1635 if (--isp->ref_count == 0) {
1636 isp_disable_interrupts(isp);
1639 isp->has_context = 1;
1641 /* Reset the ISP if an entity has failed to stop. This is the
1642 * only way to recover from such conditions.
1644 if (isp->crashed || isp->stop_failure)
1646 isp_disable_clocks(isp);
1648 mutex_unlock(&isp->isp_mutex);
1651 /* --------------------------------------------------------------------------
1652 * Platform device driver
1656 * omap3isp_print_status - Prints the values of the ISP Control Module registers
1657 * @isp: OMAP3 ISP device
1659 #define ISP_PRINT_REGISTER(isp, name)\
1660 dev_dbg(isp->dev, "###ISP " #name "=0x%08x\n", \
1661 isp_reg_readl(isp, OMAP3_ISP_IOMEM_MAIN, ISP_##name))
1662 #define SBL_PRINT_REGISTER(isp, name)\
1663 dev_dbg(isp->dev, "###SBL " #name "=0x%08x\n", \
1664 isp_reg_readl(isp, OMAP3_ISP_IOMEM_SBL, ISPSBL_##name))
1666 void omap3isp_print_status(struct isp_device *isp)
1668 dev_dbg(isp->dev, "-------------ISP Register dump--------------\n");
1670 ISP_PRINT_REGISTER(isp, SYSCONFIG);
1671 ISP_PRINT_REGISTER(isp, SYSSTATUS);
1672 ISP_PRINT_REGISTER(isp, IRQ0ENABLE);
1673 ISP_PRINT_REGISTER(isp, IRQ0STATUS);
1674 ISP_PRINT_REGISTER(isp, TCTRL_GRESET_LENGTH);
1675 ISP_PRINT_REGISTER(isp, TCTRL_PSTRB_REPLAY);
1676 ISP_PRINT_REGISTER(isp, CTRL);
1677 ISP_PRINT_REGISTER(isp, TCTRL_CTRL);
1678 ISP_PRINT_REGISTER(isp, TCTRL_FRAME);
1679 ISP_PRINT_REGISTER(isp, TCTRL_PSTRB_DELAY);
1680 ISP_PRINT_REGISTER(isp, TCTRL_STRB_DELAY);
1681 ISP_PRINT_REGISTER(isp, TCTRL_SHUT_DELAY);
1682 ISP_PRINT_REGISTER(isp, TCTRL_PSTRB_LENGTH);
1683 ISP_PRINT_REGISTER(isp, TCTRL_STRB_LENGTH);
1684 ISP_PRINT_REGISTER(isp, TCTRL_SHUT_LENGTH);
1686 SBL_PRINT_REGISTER(isp, PCR);
1687 SBL_PRINT_REGISTER(isp, SDR_REQ_EXP);
1689 dev_dbg(isp->dev, "--------------------------------------------\n");
1695 * Power management support.
1697 * As the ISP can't properly handle an input video stream interruption on a non
1698 * frame boundary, the ISP pipelines need to be stopped before sensors get
1699 * suspended. However, as suspending the sensors can require a running clock,
1700 * which can be provided by the ISP, the ISP can't be completely suspended
1701 * before the sensor.
1703 * To solve this problem power management support is split into prepare/complete
1704 * and suspend/resume operations. The pipelines are stopped in prepare() and the
1705 * ISP clocks get disabled in suspend(). Similarly, the clocks are reenabled in
1706 * resume(), and the the pipelines are restarted in complete().
1708 * TODO: PM dependencies between the ISP and sensors are not modelled explicitly
1711 static int isp_pm_prepare(struct device *dev)
1713 struct isp_device *isp = dev_get_drvdata(dev);
1716 WARN_ON(mutex_is_locked(&isp->isp_mutex));
1718 if (isp->ref_count == 0)
1721 reset = isp_suspend_modules(isp);
1722 isp_disable_interrupts(isp);
1730 static int isp_pm_suspend(struct device *dev)
1732 struct isp_device *isp = dev_get_drvdata(dev);
1734 WARN_ON(mutex_is_locked(&isp->isp_mutex));
1737 isp_disable_clocks(isp);
1742 static int isp_pm_resume(struct device *dev)
1744 struct isp_device *isp = dev_get_drvdata(dev);
1746 if (isp->ref_count == 0)
1749 return isp_enable_clocks(isp);
1752 static void isp_pm_complete(struct device *dev)
1754 struct isp_device *isp = dev_get_drvdata(dev);
1756 if (isp->ref_count == 0)
1759 isp_restore_ctx(isp);
1760 isp_enable_interrupts(isp);
1761 isp_resume_modules(isp);
1766 #define isp_pm_prepare NULL
1767 #define isp_pm_suspend NULL
1768 #define isp_pm_resume NULL
1769 #define isp_pm_complete NULL
1771 #endif /* CONFIG_PM */
1773 static void isp_unregister_entities(struct isp_device *isp)
1775 omap3isp_csi2_unregister_entities(&isp->isp_csi2a);
1776 omap3isp_ccp2_unregister_entities(&isp->isp_ccp2);
1777 omap3isp_ccdc_unregister_entities(&isp->isp_ccdc);
1778 omap3isp_preview_unregister_entities(&isp->isp_prev);
1779 omap3isp_resizer_unregister_entities(&isp->isp_res);
1780 omap3isp_stat_unregister_entities(&isp->isp_aewb);
1781 omap3isp_stat_unregister_entities(&isp->isp_af);
1782 omap3isp_stat_unregister_entities(&isp->isp_hist);
1784 v4l2_device_unregister(&isp->v4l2_dev);
1785 media_device_unregister(&isp->media_dev);
1789 * isp_register_subdev_group - Register a group of subdevices
1790 * @isp: OMAP3 ISP device
1791 * @board_info: I2C subdevs board information array
1793 * Register all I2C subdevices in the board_info array. The array must be
1794 * terminated by a NULL entry, and the first entry must be the sensor.
1796 * Return a pointer to the sensor media entity if it has been successfully
1797 * registered, or NULL otherwise.
1799 static struct v4l2_subdev *
1800 isp_register_subdev_group(struct isp_device *isp,
1801 struct isp_subdev_i2c_board_info *board_info)
1803 struct v4l2_subdev *sensor = NULL;
1806 if (board_info->board_info == NULL)
1809 for (first = 1; board_info->board_info; ++board_info, first = 0) {
1810 struct v4l2_subdev *subdev;
1811 struct i2c_adapter *adapter;
1813 adapter = i2c_get_adapter(board_info->i2c_adapter_id);
1814 if (adapter == NULL) {
1815 dev_err(isp->dev, "%s: Unable to get I2C adapter %d for "
1816 "device %s\n", __func__,
1817 board_info->i2c_adapter_id,
1818 board_info->board_info->type);
1822 subdev = v4l2_i2c_new_subdev_board(&isp->v4l2_dev, adapter,
1823 board_info->board_info, NULL);
1824 if (subdev == NULL) {
1825 dev_err(isp->dev, "%s: Unable to register subdev %s\n",
1826 __func__, board_info->board_info->type);
1837 static int isp_register_entities(struct isp_device *isp)
1839 struct isp_platform_data *pdata = isp->pdata;
1840 struct isp_v4l2_subdevs_group *subdevs;
1843 isp->media_dev.dev = isp->dev;
1844 strlcpy(isp->media_dev.model, "TI OMAP3 ISP",
1845 sizeof(isp->media_dev.model));
1846 isp->media_dev.hw_revision = isp->revision;
1847 isp->media_dev.link_notify = isp_pipeline_link_notify;
1848 ret = media_device_register(&isp->media_dev);
1850 dev_err(isp->dev, "%s: Media device registration failed (%d)\n",
1855 isp->v4l2_dev.mdev = &isp->media_dev;
1856 ret = v4l2_device_register(isp->dev, &isp->v4l2_dev);
1858 dev_err(isp->dev, "%s: V4L2 device registration failed (%d)\n",
1863 /* Register internal entities */
1864 ret = omap3isp_ccp2_register_entities(&isp->isp_ccp2, &isp->v4l2_dev);
1868 ret = omap3isp_csi2_register_entities(&isp->isp_csi2a, &isp->v4l2_dev);
1872 ret = omap3isp_ccdc_register_entities(&isp->isp_ccdc, &isp->v4l2_dev);
1876 ret = omap3isp_preview_register_entities(&isp->isp_prev,
1881 ret = omap3isp_resizer_register_entities(&isp->isp_res, &isp->v4l2_dev);
1885 ret = omap3isp_stat_register_entities(&isp->isp_aewb, &isp->v4l2_dev);
1889 ret = omap3isp_stat_register_entities(&isp->isp_af, &isp->v4l2_dev);
1893 ret = omap3isp_stat_register_entities(&isp->isp_hist, &isp->v4l2_dev);
1897 /* Register external entities */
1898 for (subdevs = pdata->subdevs; subdevs && subdevs->subdevs; ++subdevs) {
1899 struct v4l2_subdev *sensor;
1900 struct media_entity *input;
1905 sensor = isp_register_subdev_group(isp, subdevs->subdevs);
1909 sensor->host_priv = subdevs;
1911 /* Connect the sensor to the correct interface module. Parallel
1912 * sensors are connected directly to the CCDC, while serial
1913 * sensors are connected to the CSI2a, CCP2b or CSI2c receiver
1914 * through CSIPHY1 or CSIPHY2.
1916 switch (subdevs->interface) {
1917 case ISP_INTERFACE_PARALLEL:
1918 input = &isp->isp_ccdc.subdev.entity;
1919 pad = CCDC_PAD_SINK;
1923 case ISP_INTERFACE_CSI2A_PHY2:
1924 input = &isp->isp_csi2a.subdev.entity;
1925 pad = CSI2_PAD_SINK;
1926 flags = MEDIA_LNK_FL_IMMUTABLE
1927 | MEDIA_LNK_FL_ENABLED;
1930 case ISP_INTERFACE_CCP2B_PHY1:
1931 case ISP_INTERFACE_CCP2B_PHY2:
1932 input = &isp->isp_ccp2.subdev.entity;
1933 pad = CCP2_PAD_SINK;
1937 case ISP_INTERFACE_CSI2C_PHY1:
1938 input = &isp->isp_csi2c.subdev.entity;
1939 pad = CSI2_PAD_SINK;
1940 flags = MEDIA_LNK_FL_IMMUTABLE
1941 | MEDIA_LNK_FL_ENABLED;
1945 dev_err(isp->dev, "%s: invalid interface type %u\n",
1946 __func__, subdevs->interface);
1951 for (i = 0; i < sensor->entity.num_pads; i++) {
1952 if (sensor->entity.pads[i].flags & MEDIA_PAD_FL_SOURCE)
1955 if (i == sensor->entity.num_pads) {
1957 "%s: no source pad in external entity\n",
1963 ret = media_entity_create_link(&sensor->entity, i, input, pad,
1969 ret = v4l2_device_register_subdev_nodes(&isp->v4l2_dev);
1973 isp_unregister_entities(isp);
1978 static void isp_cleanup_modules(struct isp_device *isp)
1980 omap3isp_h3a_aewb_cleanup(isp);
1981 omap3isp_h3a_af_cleanup(isp);
1982 omap3isp_hist_cleanup(isp);
1983 omap3isp_resizer_cleanup(isp);
1984 omap3isp_preview_cleanup(isp);
1985 omap3isp_ccdc_cleanup(isp);
1986 omap3isp_ccp2_cleanup(isp);
1987 omap3isp_csi2_cleanup(isp);
1990 static int isp_initialize_modules(struct isp_device *isp)
1994 ret = omap3isp_csiphy_init(isp);
1996 dev_err(isp->dev, "CSI PHY initialization failed\n");
2000 ret = omap3isp_csi2_init(isp);
2002 dev_err(isp->dev, "CSI2 initialization failed\n");
2006 ret = omap3isp_ccp2_init(isp);
2008 dev_err(isp->dev, "CCP2 initialization failed\n");
2012 ret = omap3isp_ccdc_init(isp);
2014 dev_err(isp->dev, "CCDC initialization failed\n");
2018 ret = omap3isp_preview_init(isp);
2020 dev_err(isp->dev, "Preview initialization failed\n");
2024 ret = omap3isp_resizer_init(isp);
2026 dev_err(isp->dev, "Resizer initialization failed\n");
2030 ret = omap3isp_hist_init(isp);
2032 dev_err(isp->dev, "Histogram initialization failed\n");
2036 ret = omap3isp_h3a_aewb_init(isp);
2038 dev_err(isp->dev, "H3A AEWB initialization failed\n");
2039 goto error_h3a_aewb;
2042 ret = omap3isp_h3a_af_init(isp);
2044 dev_err(isp->dev, "H3A AF initialization failed\n");
2048 /* Connect the submodules. */
2049 ret = media_entity_create_link(
2050 &isp->isp_csi2a.subdev.entity, CSI2_PAD_SOURCE,
2051 &isp->isp_ccdc.subdev.entity, CCDC_PAD_SINK, 0);
2055 ret = media_entity_create_link(
2056 &isp->isp_ccp2.subdev.entity, CCP2_PAD_SOURCE,
2057 &isp->isp_ccdc.subdev.entity, CCDC_PAD_SINK, 0);
2061 ret = media_entity_create_link(
2062 &isp->isp_ccdc.subdev.entity, CCDC_PAD_SOURCE_VP,
2063 &isp->isp_prev.subdev.entity, PREV_PAD_SINK, 0);
2067 ret = media_entity_create_link(
2068 &isp->isp_ccdc.subdev.entity, CCDC_PAD_SOURCE_OF,
2069 &isp->isp_res.subdev.entity, RESZ_PAD_SINK, 0);
2073 ret = media_entity_create_link(
2074 &isp->isp_prev.subdev.entity, PREV_PAD_SOURCE,
2075 &isp->isp_res.subdev.entity, RESZ_PAD_SINK, 0);
2079 ret = media_entity_create_link(
2080 &isp->isp_ccdc.subdev.entity, CCDC_PAD_SOURCE_VP,
2081 &isp->isp_aewb.subdev.entity, 0,
2082 MEDIA_LNK_FL_ENABLED | MEDIA_LNK_FL_IMMUTABLE);
2086 ret = media_entity_create_link(
2087 &isp->isp_ccdc.subdev.entity, CCDC_PAD_SOURCE_VP,
2088 &isp->isp_af.subdev.entity, 0,
2089 MEDIA_LNK_FL_ENABLED | MEDIA_LNK_FL_IMMUTABLE);
2093 ret = media_entity_create_link(
2094 &isp->isp_ccdc.subdev.entity, CCDC_PAD_SOURCE_VP,
2095 &isp->isp_hist.subdev.entity, 0,
2096 MEDIA_LNK_FL_ENABLED | MEDIA_LNK_FL_IMMUTABLE);
2103 omap3isp_h3a_af_cleanup(isp);
2105 omap3isp_h3a_aewb_cleanup(isp);
2107 omap3isp_hist_cleanup(isp);
2109 omap3isp_resizer_cleanup(isp);
2111 omap3isp_preview_cleanup(isp);
2113 omap3isp_ccdc_cleanup(isp);
2115 omap3isp_ccp2_cleanup(isp);
2117 omap3isp_csi2_cleanup(isp);
2124 * isp_remove - Remove ISP platform device
2125 * @pdev: Pointer to ISP platform device
2129 static int isp_remove(struct platform_device *pdev)
2131 struct isp_device *isp = platform_get_drvdata(pdev);
2133 isp_unregister_entities(isp);
2134 isp_cleanup_modules(isp);
2135 isp_xclk_cleanup(isp);
2137 __omap3isp_get(isp, false);
2138 iommu_detach_device(isp->domain, &pdev->dev);
2139 iommu_domain_free(isp->domain);
2146 static int isp_map_mem_resource(struct platform_device *pdev,
2147 struct isp_device *isp,
2148 enum isp_mem_resources res)
2150 struct resource *mem;
2152 /* request the mem region for the camera registers */
2154 mem = platform_get_resource(pdev, IORESOURCE_MEM, res);
2156 /* map the region */
2157 isp->mmio_base[res] = devm_ioremap_resource(isp->dev, mem);
2158 if (IS_ERR(isp->mmio_base[res]))
2159 return PTR_ERR(isp->mmio_base[res]);
2161 isp->mmio_base_phys[res] = mem->start;
2167 * isp_probe - Probe ISP platform device
2168 * @pdev: Pointer to ISP platform device
2170 * Returns 0 if successful,
2171 * -ENOMEM if no memory available,
2172 * -ENODEV if no platform device resources found
2173 * or no space for remapping registers,
2174 * -EINVAL if couldn't install ISR,
2175 * or clk_get return error value.
2177 static int isp_probe(struct platform_device *pdev)
2179 struct isp_platform_data *pdata = pdev->dev.platform_data;
2180 struct isp_device *isp;
2187 isp = devm_kzalloc(&pdev->dev, sizeof(*isp), GFP_KERNEL);
2189 dev_err(&pdev->dev, "could not allocate memory\n");
2193 isp->autoidle = autoidle;
2195 mutex_init(&isp->isp_mutex);
2196 spin_lock_init(&isp->stat_lock);
2198 isp->dev = &pdev->dev;
2202 ret = dma_coerce_mask_and_coherent(isp->dev, DMA_BIT_MASK(32));
2206 platform_set_drvdata(pdev, isp);
2209 isp->isp_csiphy1.vdd = devm_regulator_get(&pdev->dev, "VDD_CSIPHY1");
2210 isp->isp_csiphy2.vdd = devm_regulator_get(&pdev->dev, "VDD_CSIPHY2");
2214 * The ISP clock tree is revision-dependent. We thus need to enable ICLK
2215 * manually to read the revision before calling __omap3isp_get().
2217 ret = isp_map_mem_resource(pdev, isp, OMAP3_ISP_IOMEM_MAIN);
2221 ret = isp_get_clocks(isp);
2225 ret = clk_enable(isp->clock[ISP_CLK_CAM_ICK]);
2229 isp->revision = isp_reg_readl(isp, OMAP3_ISP_IOMEM_MAIN, ISP_REVISION);
2230 dev_info(isp->dev, "Revision %d.%d found\n",
2231 (isp->revision & 0xf0) >> 4, isp->revision & 0x0f);
2233 clk_disable(isp->clock[ISP_CLK_CAM_ICK]);
2235 if (__omap3isp_get(isp, false) == NULL) {
2240 ret = isp_reset(isp);
2244 ret = isp_xclk_init(isp);
2248 /* Memory resources */
2249 for (m = 0; m < ARRAY_SIZE(isp_res_maps); m++)
2250 if (isp->revision == isp_res_maps[m].isp_rev)
2253 if (m == ARRAY_SIZE(isp_res_maps)) {
2254 dev_err(isp->dev, "No resource map found for ISP rev %d.%d\n",
2255 (isp->revision & 0xf0) >> 4, isp->revision & 0xf);
2260 for (i = 1; i < OMAP3_ISP_IOMEM_LAST; i++) {
2261 if (isp_res_maps[m].map & 1 << i) {
2262 ret = isp_map_mem_resource(pdev, isp, i);
2268 isp->domain = iommu_domain_alloc(pdev->dev.bus);
2270 dev_err(isp->dev, "can't alloc iommu domain\n");
2275 ret = iommu_attach_device(isp->domain, &pdev->dev);
2277 dev_err(&pdev->dev, "can't attach iommu device: %d\n", ret);
2278 ret = -EPROBE_DEFER;
2283 isp->irq_num = platform_get_irq(pdev, 0);
2284 if (isp->irq_num <= 0) {
2285 dev_err(isp->dev, "No IRQ resource\n");
2290 if (devm_request_irq(isp->dev, isp->irq_num, isp_isr, IRQF_SHARED,
2291 "OMAP3 ISP", isp)) {
2292 dev_err(isp->dev, "Unable to request IRQ\n");
2298 ret = isp_initialize_modules(isp);
2302 ret = isp_register_entities(isp);
2306 isp_core_init(isp, 1);
2312 isp_cleanup_modules(isp);
2314 iommu_detach_device(isp->domain, &pdev->dev);
2316 iommu_domain_free(isp->domain);
2319 isp_xclk_cleanup(isp);
2322 mutex_destroy(&isp->isp_mutex);
2327 static const struct dev_pm_ops omap3isp_pm_ops = {
2328 .prepare = isp_pm_prepare,
2329 .suspend = isp_pm_suspend,
2330 .resume = isp_pm_resume,
2331 .complete = isp_pm_complete,
2334 static struct platform_device_id omap3isp_id_table[] = {
2338 MODULE_DEVICE_TABLE(platform, omap3isp_id_table);
2340 static struct platform_driver omap3isp_driver = {
2342 .remove = isp_remove,
2343 .id_table = omap3isp_id_table,
2345 .owner = THIS_MODULE,
2347 .pm = &omap3isp_pm_ops,
2351 module_platform_driver(omap3isp_driver);
2353 MODULE_AUTHOR("Nokia Corporation");
2354 MODULE_DESCRIPTION("TI OMAP3 ISP driver");
2355 MODULE_LICENSE("GPL");
2356 MODULE_VERSION(ISP_VIDEO_DRIVER_VERSION);