6 * Copyright (C) 2006-2010 Nokia Corporation
7 * Copyright (C) 2007-2009 Texas Instruments, Inc.
9 * Contacts: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
10 * Sakari Ailus <sakari.ailus@iki.fi>
13 * Laurent Pinchart <laurent.pinchart@ideasonboard.com>
14 * Sakari Ailus <sakari.ailus@iki.fi>
15 * David Cohen <dacohen@gmail.com>
16 * Stanimir Varbanov <svarbanov@mm-sol.com>
17 * Vimarsh Zutshi <vimarsh.zutshi@gmail.com>
18 * Tuukka Toivonen <tuukkat76@gmail.com>
19 * Sergio Aguirre <saaguirre@ti.com>
20 * Antti Koskipaa <akoskipa@gmail.com>
21 * Ivan T. Ivanov <iivanov@mm-sol.com>
22 * RaniSuneela <r-m@ti.com>
23 * Atanas Filipov <afilipov@mm-sol.com>
24 * Gjorgji Rosikopulos <grosikopulos@mm-sol.com>
25 * Hiroshi DOYU <hiroshi.doyu@nokia.com>
26 * Nayden Kanchev <nkanchev@mm-sol.com>
27 * Phil Carmody <ext-phil.2.carmody@nokia.com>
28 * Artem Bityutskiy <artem.bityutskiy@nokia.com>
29 * Dominic Curran <dcurran@ti.com>
30 * Ilkka Myllyperkio <ilkka.myllyperkio@sofica.fi>
31 * Pallavi Kulkarni <p-kulkarni@ti.com>
32 * Vaibhav Hiremath <hvaibhav@ti.com>
33 * Mohit Jalori <mjalori@ti.com>
34 * Sameer Venkatraman <sameerv@ti.com>
35 * Senthilvadivu Guruswamy <svadivu@ti.com>
36 * Thara Gopinath <thara@ti.com>
37 * Toni Leinonen <toni.leinonen@nokia.com>
38 * Troy Laramy <t-laramy@ti.com>
40 * This program is free software; you can redistribute it and/or modify
41 * it under the terms of the GNU General Public License version 2 as
42 * published by the Free Software Foundation.
44 * This program is distributed in the hope that it will be useful, but
45 * WITHOUT ANY WARRANTY; without even the implied warranty of
46 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
47 * General Public License for more details.
49 * You should have received a copy of the GNU General Public License
50 * along with this program; if not, write to the Free Software
51 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA
55 #include <asm/cacheflush.h>
57 #include <linux/clk.h>
58 #include <linux/delay.h>
59 #include <linux/device.h>
60 #include <linux/dma-mapping.h>
61 #include <linux/i2c.h>
62 #include <linux/interrupt.h>
63 #include <linux/module.h>
64 #include <linux/omap-iommu.h>
65 #include <linux/platform_device.h>
66 #include <linux/regulator/consumer.h>
67 #include <linux/slab.h>
68 #include <linux/sched.h>
69 #include <linux/vmalloc.h>
71 #include <media/v4l2-common.h>
72 #include <media/v4l2-device.h>
79 #include "isppreview.h"
80 #include "ispresizer.h"
86 static unsigned int autoidle;
87 module_param(autoidle, int, 0444);
88 MODULE_PARM_DESC(autoidle, "Enable OMAP3ISP AUTOIDLE support");
90 static void isp_save_ctx(struct isp_device *isp);
92 static void isp_restore_ctx(struct isp_device *isp);
94 static const struct isp_res_mapping isp_res_maps[] = {
96 .isp_rev = ISP_REVISION_2_0,
97 .map = 1 << OMAP3_ISP_IOMEM_MAIN |
98 1 << OMAP3_ISP_IOMEM_CCP2 |
99 1 << OMAP3_ISP_IOMEM_CCDC |
100 1 << OMAP3_ISP_IOMEM_HIST |
101 1 << OMAP3_ISP_IOMEM_H3A |
102 1 << OMAP3_ISP_IOMEM_PREV |
103 1 << OMAP3_ISP_IOMEM_RESZ |
104 1 << OMAP3_ISP_IOMEM_SBL |
105 1 << OMAP3_ISP_IOMEM_CSI2A_REGS1 |
106 1 << OMAP3_ISP_IOMEM_CSIPHY2 |
107 1 << OMAP3_ISP_IOMEM_343X_CONTROL_CSIRXFE,
110 .isp_rev = ISP_REVISION_15_0,
111 .map = 1 << OMAP3_ISP_IOMEM_MAIN |
112 1 << OMAP3_ISP_IOMEM_CCP2 |
113 1 << OMAP3_ISP_IOMEM_CCDC |
114 1 << OMAP3_ISP_IOMEM_HIST |
115 1 << OMAP3_ISP_IOMEM_H3A |
116 1 << OMAP3_ISP_IOMEM_PREV |
117 1 << OMAP3_ISP_IOMEM_RESZ |
118 1 << OMAP3_ISP_IOMEM_SBL |
119 1 << OMAP3_ISP_IOMEM_CSI2A_REGS1 |
120 1 << OMAP3_ISP_IOMEM_CSIPHY2 |
121 1 << OMAP3_ISP_IOMEM_CSI2A_REGS2 |
122 1 << OMAP3_ISP_IOMEM_CSI2C_REGS1 |
123 1 << OMAP3_ISP_IOMEM_CSIPHY1 |
124 1 << OMAP3_ISP_IOMEM_CSI2C_REGS2 |
125 1 << OMAP3_ISP_IOMEM_3630_CONTROL_CAMERA_PHY_CTRL,
129 /* Structure for saving/restoring ISP module registers */
130 static struct isp_reg isp_reg_list[] = {
131 {OMAP3_ISP_IOMEM_MAIN, ISP_SYSCONFIG, 0},
132 {OMAP3_ISP_IOMEM_MAIN, ISP_CTRL, 0},
133 {OMAP3_ISP_IOMEM_MAIN, ISP_TCTRL_CTRL, 0},
138 * omap3isp_flush - Post pending L3 bus writes by doing a register readback
139 * @isp: OMAP3 ISP device
141 * In order to force posting of pending writes, we need to write and
142 * readback the same register, in this case the revision register.
144 * See this link for reference:
145 * http://www.mail-archive.com/linux-omap@vger.kernel.org/msg08149.html
147 void omap3isp_flush(struct isp_device *isp)
149 isp_reg_writel(isp, 0, OMAP3_ISP_IOMEM_MAIN, ISP_REVISION);
150 isp_reg_readl(isp, OMAP3_ISP_IOMEM_MAIN, ISP_REVISION);
154 * isp_enable_interrupts - Enable ISP interrupts.
155 * @isp: OMAP3 ISP device
157 static void isp_enable_interrupts(struct isp_device *isp)
159 static const u32 irq = IRQ0ENABLE_CSIA_IRQ
160 | IRQ0ENABLE_CSIB_IRQ
161 | IRQ0ENABLE_CCDC_LSC_PREF_ERR_IRQ
162 | IRQ0ENABLE_CCDC_LSC_DONE_IRQ
163 | IRQ0ENABLE_CCDC_VD0_IRQ
164 | IRQ0ENABLE_CCDC_VD1_IRQ
165 | IRQ0ENABLE_HS_VS_IRQ
166 | IRQ0ENABLE_HIST_DONE_IRQ
167 | IRQ0ENABLE_H3A_AWB_DONE_IRQ
168 | IRQ0ENABLE_H3A_AF_DONE_IRQ
169 | IRQ0ENABLE_PRV_DONE_IRQ
170 | IRQ0ENABLE_RSZ_DONE_IRQ;
172 isp_reg_writel(isp, irq, OMAP3_ISP_IOMEM_MAIN, ISP_IRQ0STATUS);
173 isp_reg_writel(isp, irq, OMAP3_ISP_IOMEM_MAIN, ISP_IRQ0ENABLE);
177 * isp_disable_interrupts - Disable ISP interrupts.
178 * @isp: OMAP3 ISP device
180 static void isp_disable_interrupts(struct isp_device *isp)
182 isp_reg_writel(isp, 0, OMAP3_ISP_IOMEM_MAIN, ISP_IRQ0ENABLE);
186 * isp_set_xclk - Configures the specified cam_xclk to the desired frequency.
187 * @isp: OMAP3 ISP device
188 * @xclk: Desired frequency of the clock in Hz. 0 = stable low, 1 is stable high
189 * @xclksel: XCLK to configure (0 = A, 1 = B).
191 * Configures the specified MCLK divisor in the ISP timing control register
192 * (TCTRL_CTRL) to generate the desired xclk clock value.
194 * Divisor = cam_mclk_hz / xclk
196 * Returns the final frequency that is actually being generated
198 static u32 isp_set_xclk(struct isp_device *isp, u32 xclk, u8 xclksel)
202 unsigned long mclk_hz;
204 if (!omap3isp_get(isp))
207 mclk_hz = clk_get_rate(isp->clock[ISP_CLK_CAM_MCLK]);
209 if (xclk >= mclk_hz) {
210 divisor = ISPTCTRL_CTRL_DIV_BYPASS;
211 currentxclk = mclk_hz;
212 } else if (xclk >= 2) {
213 divisor = mclk_hz / xclk;
214 if (divisor >= ISPTCTRL_CTRL_DIV_BYPASS)
215 divisor = ISPTCTRL_CTRL_DIV_BYPASS - 1;
216 currentxclk = mclk_hz / divisor;
224 isp_reg_clr_set(isp, OMAP3_ISP_IOMEM_MAIN, ISP_TCTRL_CTRL,
225 ISPTCTRL_CTRL_DIVA_MASK,
226 divisor << ISPTCTRL_CTRL_DIVA_SHIFT);
227 dev_dbg(isp->dev, "isp_set_xclk(): cam_xclka set to %d Hz\n",
231 isp_reg_clr_set(isp, OMAP3_ISP_IOMEM_MAIN, ISP_TCTRL_CTRL,
232 ISPTCTRL_CTRL_DIVB_MASK,
233 divisor << ISPTCTRL_CTRL_DIVB_SHIFT);
234 dev_dbg(isp->dev, "isp_set_xclk(): cam_xclkb set to %d Hz\n",
240 dev_dbg(isp->dev, "ISP_ERR: isp_set_xclk(): Invalid requested "
241 "xclk. Must be 0 (A) or 1 (B).\n");
245 /* Do we go from stable whatever to clock? */
246 if (divisor >= 2 && isp->xclk_divisor[xclksel - 1] < 2)
248 /* Stopping the clock. */
249 else if (divisor < 2 && isp->xclk_divisor[xclksel - 1] >= 2)
252 isp->xclk_divisor[xclksel - 1] = divisor;
260 * isp_core_init - ISP core settings
261 * @isp: OMAP3 ISP device
262 * @idle: Consider idle state.
264 * Set the power settings for the ISP and SBL bus and cConfigure the HS/VS
267 * We need to configure the HS/VS interrupt source before interrupts get
268 * enabled, as the sensor might be free-running and the ISP default setting
269 * (HS edge) would put an unnecessary burden on the CPU.
271 static void isp_core_init(struct isp_device *isp, int idle)
274 ((idle ? ISP_SYSCONFIG_MIDLEMODE_SMARTSTANDBY :
275 ISP_SYSCONFIG_MIDLEMODE_FORCESTANDBY) <<
276 ISP_SYSCONFIG_MIDLEMODE_SHIFT) |
277 ((isp->revision == ISP_REVISION_15_0) ?
278 ISP_SYSCONFIG_AUTOIDLE : 0),
279 OMAP3_ISP_IOMEM_MAIN, ISP_SYSCONFIG);
282 (isp->autoidle ? ISPCTRL_SBL_AUTOIDLE : 0) |
283 ISPCTRL_SYNC_DETECT_VSRISE,
284 OMAP3_ISP_IOMEM_MAIN, ISP_CTRL);
288 * Configure the bridge and lane shifter. Valid inputs are
290 * CCDC_INPUT_PARALLEL: Parallel interface
291 * CCDC_INPUT_CSI2A: CSI2a receiver
292 * CCDC_INPUT_CCP2B: CCP2b receiver
293 * CCDC_INPUT_CSI2C: CSI2c receiver
295 * The bridge and lane shifter are configured according to the selected input
296 * and the ISP platform data.
298 void omap3isp_configure_bridge(struct isp_device *isp,
299 enum ccdc_input_entity input,
300 const struct isp_parallel_platform_data *pdata,
301 unsigned int shift, unsigned int bridge)
305 ispctrl_val = isp_reg_readl(isp, OMAP3_ISP_IOMEM_MAIN, ISP_CTRL);
306 ispctrl_val &= ~ISPCTRL_SHIFT_MASK;
307 ispctrl_val &= ~ISPCTRL_PAR_CLK_POL_INV;
308 ispctrl_val &= ~ISPCTRL_PAR_SER_CLK_SEL_MASK;
309 ispctrl_val &= ~ISPCTRL_PAR_BRIDGE_MASK;
310 ispctrl_val |= bridge;
313 case CCDC_INPUT_PARALLEL:
314 ispctrl_val |= ISPCTRL_PAR_SER_CLK_SEL_PARALLEL;
315 ispctrl_val |= pdata->clk_pol << ISPCTRL_PAR_CLK_POL_SHIFT;
316 shift += pdata->data_lane_shift * 2;
319 case CCDC_INPUT_CSI2A:
320 ispctrl_val |= ISPCTRL_PAR_SER_CLK_SEL_CSIA;
323 case CCDC_INPUT_CCP2B:
324 ispctrl_val |= ISPCTRL_PAR_SER_CLK_SEL_CSIB;
327 case CCDC_INPUT_CSI2C:
328 ispctrl_val |= ISPCTRL_PAR_SER_CLK_SEL_CSIC;
335 ispctrl_val |= ((shift/2) << ISPCTRL_SHIFT_SHIFT) & ISPCTRL_SHIFT_MASK;
337 isp_reg_writel(isp, ispctrl_val, OMAP3_ISP_IOMEM_MAIN, ISP_CTRL);
340 void omap3isp_hist_dma_done(struct isp_device *isp)
342 if (omap3isp_ccdc_busy(&isp->isp_ccdc) ||
343 omap3isp_stat_pcr_busy(&isp->isp_hist)) {
344 /* Histogram cannot be enabled in this frame anymore */
345 atomic_set(&isp->isp_hist.buf_err, 1);
346 dev_dbg(isp->dev, "hist: Out of synchronization with "
347 "CCDC. Ignoring next buffer.\n");
351 static inline void isp_isr_dbg(struct isp_device *isp, u32 irqstatus)
353 static const char *name[] = {
372 "CCDC_LSC_PREFETCH_COMPLETED",
373 "CCDC_LSC_PREFETCH_ERROR",
389 dev_dbg(isp->dev, "ISP IRQ: ");
391 for (i = 0; i < ARRAY_SIZE(name); i++) {
392 if ((1 << i) & irqstatus)
393 printk(KERN_CONT "%s ", name[i]);
395 printk(KERN_CONT "\n");
398 static void isp_isr_sbl(struct isp_device *isp)
400 struct device *dev = isp->dev;
401 struct isp_pipeline *pipe;
405 * Handle shared buffer logic overflows for video buffers.
406 * ISPSBL_PCR_CCDCPRV_2_RSZ_OVF can be safely ignored.
408 sbl_pcr = isp_reg_readl(isp, OMAP3_ISP_IOMEM_SBL, ISPSBL_PCR);
409 isp_reg_writel(isp, sbl_pcr, OMAP3_ISP_IOMEM_SBL, ISPSBL_PCR);
410 sbl_pcr &= ~ISPSBL_PCR_CCDCPRV_2_RSZ_OVF;
413 dev_dbg(dev, "SBL overflow (PCR = 0x%08x)\n", sbl_pcr);
415 if (sbl_pcr & ISPSBL_PCR_CSIB_WBL_OVF) {
416 pipe = to_isp_pipeline(&isp->isp_ccp2.subdev.entity);
421 if (sbl_pcr & ISPSBL_PCR_CSIA_WBL_OVF) {
422 pipe = to_isp_pipeline(&isp->isp_csi2a.subdev.entity);
427 if (sbl_pcr & ISPSBL_PCR_CCDC_WBL_OVF) {
428 pipe = to_isp_pipeline(&isp->isp_ccdc.subdev.entity);
433 if (sbl_pcr & ISPSBL_PCR_PRV_WBL_OVF) {
434 pipe = to_isp_pipeline(&isp->isp_prev.subdev.entity);
439 if (sbl_pcr & (ISPSBL_PCR_RSZ1_WBL_OVF
440 | ISPSBL_PCR_RSZ2_WBL_OVF
441 | ISPSBL_PCR_RSZ3_WBL_OVF
442 | ISPSBL_PCR_RSZ4_WBL_OVF)) {
443 pipe = to_isp_pipeline(&isp->isp_res.subdev.entity);
448 if (sbl_pcr & ISPSBL_PCR_H3A_AF_WBL_OVF)
449 omap3isp_stat_sbl_overflow(&isp->isp_af);
451 if (sbl_pcr & ISPSBL_PCR_H3A_AEAWB_WBL_OVF)
452 omap3isp_stat_sbl_overflow(&isp->isp_aewb);
456 * isp_isr - Interrupt Service Routine for Camera ISP module.
457 * @irq: Not used currently.
458 * @_isp: Pointer to the OMAP3 ISP device
460 * Handles the corresponding callback if plugged in.
462 * Returns IRQ_HANDLED when IRQ was correctly handled, or IRQ_NONE when the
463 * IRQ wasn't handled.
465 static irqreturn_t isp_isr(int irq, void *_isp)
467 static const u32 ccdc_events = IRQ0STATUS_CCDC_LSC_PREF_ERR_IRQ |
468 IRQ0STATUS_CCDC_LSC_DONE_IRQ |
469 IRQ0STATUS_CCDC_VD0_IRQ |
470 IRQ0STATUS_CCDC_VD1_IRQ |
471 IRQ0STATUS_HS_VS_IRQ;
472 struct isp_device *isp = _isp;
475 irqstatus = isp_reg_readl(isp, OMAP3_ISP_IOMEM_MAIN, ISP_IRQ0STATUS);
476 isp_reg_writel(isp, irqstatus, OMAP3_ISP_IOMEM_MAIN, ISP_IRQ0STATUS);
480 if (irqstatus & IRQ0STATUS_CSIA_IRQ)
481 omap3isp_csi2_isr(&isp->isp_csi2a);
483 if (irqstatus & IRQ0STATUS_CSIB_IRQ)
484 omap3isp_ccp2_isr(&isp->isp_ccp2);
486 if (irqstatus & IRQ0STATUS_CCDC_VD0_IRQ) {
487 if (isp->isp_ccdc.output & CCDC_OUTPUT_PREVIEW)
488 omap3isp_preview_isr_frame_sync(&isp->isp_prev);
489 if (isp->isp_ccdc.output & CCDC_OUTPUT_RESIZER)
490 omap3isp_resizer_isr_frame_sync(&isp->isp_res);
491 omap3isp_stat_isr_frame_sync(&isp->isp_aewb);
492 omap3isp_stat_isr_frame_sync(&isp->isp_af);
493 omap3isp_stat_isr_frame_sync(&isp->isp_hist);
496 if (irqstatus & ccdc_events)
497 omap3isp_ccdc_isr(&isp->isp_ccdc, irqstatus & ccdc_events);
499 if (irqstatus & IRQ0STATUS_PRV_DONE_IRQ) {
500 if (isp->isp_prev.output & PREVIEW_OUTPUT_RESIZER)
501 omap3isp_resizer_isr_frame_sync(&isp->isp_res);
502 omap3isp_preview_isr(&isp->isp_prev);
505 if (irqstatus & IRQ0STATUS_RSZ_DONE_IRQ)
506 omap3isp_resizer_isr(&isp->isp_res);
508 if (irqstatus & IRQ0STATUS_H3A_AWB_DONE_IRQ)
509 omap3isp_stat_isr(&isp->isp_aewb);
511 if (irqstatus & IRQ0STATUS_H3A_AF_DONE_IRQ)
512 omap3isp_stat_isr(&isp->isp_af);
514 if (irqstatus & IRQ0STATUS_HIST_DONE_IRQ)
515 omap3isp_stat_isr(&isp->isp_hist);
519 #if defined(DEBUG) && defined(ISP_ISR_DEBUG)
520 isp_isr_dbg(isp, irqstatus);
526 /* -----------------------------------------------------------------------------
527 * Pipeline power management
529 * Entities must be powered up when part of a pipeline that contains at least
530 * one open video device node.
532 * To achieve this use the entity use_count field to track the number of users.
533 * For entities corresponding to video device nodes the use_count field stores
534 * the users count of the node. For entities corresponding to subdevs the
535 * use_count field stores the total number of users of all video device nodes
538 * The omap3isp_pipeline_pm_use() function must be called in the open() and
539 * close() handlers of video device nodes. It increments or decrements the use
540 * count of all subdev entities in the pipeline.
542 * To react to link management on powered pipelines, the link setup notification
543 * callback updates the use count of all entities in the source and sink sides
548 * isp_pipeline_pm_use_count - Count the number of users of a pipeline
549 * @entity: The entity
551 * Return the total number of users of all video device nodes in the pipeline.
553 static int isp_pipeline_pm_use_count(struct media_entity *entity)
555 struct media_entity_graph graph;
558 media_entity_graph_walk_start(&graph, entity);
560 while ((entity = media_entity_graph_walk_next(&graph))) {
561 if (media_entity_type(entity) == MEDIA_ENT_T_DEVNODE)
562 use += entity->use_count;
569 * isp_pipeline_pm_power_one - Apply power change to an entity
570 * @entity: The entity
571 * @change: Use count change
573 * Change the entity use count by @change. If the entity is a subdev update its
574 * power state by calling the core::s_power operation when the use count goes
575 * from 0 to != 0 or from != 0 to 0.
577 * Return 0 on success or a negative error code on failure.
579 static int isp_pipeline_pm_power_one(struct media_entity *entity, int change)
581 struct v4l2_subdev *subdev;
584 subdev = media_entity_type(entity) == MEDIA_ENT_T_V4L2_SUBDEV
585 ? media_entity_to_v4l2_subdev(entity) : NULL;
587 if (entity->use_count == 0 && change > 0 && subdev != NULL) {
588 ret = v4l2_subdev_call(subdev, core, s_power, 1);
589 if (ret < 0 && ret != -ENOIOCTLCMD)
593 entity->use_count += change;
594 WARN_ON(entity->use_count < 0);
596 if (entity->use_count == 0 && change < 0 && subdev != NULL)
597 v4l2_subdev_call(subdev, core, s_power, 0);
603 * isp_pipeline_pm_power - Apply power change to all entities in a pipeline
604 * @entity: The entity
605 * @change: Use count change
607 * Walk the pipeline to update the use count and the power state of all non-node
610 * Return 0 on success or a negative error code on failure.
612 static int isp_pipeline_pm_power(struct media_entity *entity, int change)
614 struct media_entity_graph graph;
615 struct media_entity *first = entity;
621 media_entity_graph_walk_start(&graph, entity);
623 while (!ret && (entity = media_entity_graph_walk_next(&graph)))
624 if (media_entity_type(entity) != MEDIA_ENT_T_DEVNODE)
625 ret = isp_pipeline_pm_power_one(entity, change);
630 media_entity_graph_walk_start(&graph, first);
632 while ((first = media_entity_graph_walk_next(&graph))
634 if (media_entity_type(first) != MEDIA_ENT_T_DEVNODE)
635 isp_pipeline_pm_power_one(first, -change);
641 * omap3isp_pipeline_pm_use - Update the use count of an entity
642 * @entity: The entity
643 * @use: Use (1) or stop using (0) the entity
645 * Update the use count of all entities in the pipeline and power entities on or
648 * Return 0 on success or a negative error code on failure. Powering entities
649 * off is assumed to never fail. No failure can occur when the use parameter is
652 int omap3isp_pipeline_pm_use(struct media_entity *entity, int use)
654 int change = use ? 1 : -1;
657 mutex_lock(&entity->parent->graph_mutex);
659 /* Apply use count to node. */
660 entity->use_count += change;
661 WARN_ON(entity->use_count < 0);
663 /* Apply power change to connected non-nodes. */
664 ret = isp_pipeline_pm_power(entity, change);
666 entity->use_count -= change;
668 mutex_unlock(&entity->parent->graph_mutex);
674 * isp_pipeline_link_notify - Link management notification callback
675 * @source: Pad at the start of the link
676 * @sink: Pad at the end of the link
677 * @flags: New link flags that will be applied
679 * React to link management on powered pipelines by updating the use count of
680 * all entities in the source and sink sides of the link. Entities are powered
681 * on or off accordingly.
683 * Return 0 on success or a negative error code on failure. Powering entities
684 * off is assumed to never fail. This function will not fail for disconnection
687 static int isp_pipeline_link_notify(struct media_pad *source,
688 struct media_pad *sink, u32 flags)
690 int source_use = isp_pipeline_pm_use_count(source->entity);
691 int sink_use = isp_pipeline_pm_use_count(sink->entity);
694 if (!(flags & MEDIA_LNK_FL_ENABLED)) {
695 /* Powering off entities is assumed to never fail. */
696 isp_pipeline_pm_power(source->entity, -sink_use);
697 isp_pipeline_pm_power(sink->entity, -source_use);
701 ret = isp_pipeline_pm_power(source->entity, sink_use);
705 ret = isp_pipeline_pm_power(sink->entity, source_use);
707 isp_pipeline_pm_power(source->entity, -sink_use);
712 /* -----------------------------------------------------------------------------
713 * Pipeline stream management
717 * isp_pipeline_enable - Enable streaming on a pipeline
718 * @pipe: ISP pipeline
719 * @mode: Stream mode (single shot or continuous)
721 * Walk the entities chain starting at the pipeline output video node and start
722 * all modules in the chain in the given mode.
724 * Return 0 if successful, or the return value of the failed video::s_stream
725 * operation otherwise.
727 static int isp_pipeline_enable(struct isp_pipeline *pipe,
728 enum isp_pipeline_stream_state mode)
730 struct isp_device *isp = pipe->output->isp;
731 struct media_entity *entity;
732 struct media_pad *pad;
733 struct v4l2_subdev *subdev;
737 /* If the preview engine crashed it might not respond to read/write
738 * operations on the L4 bus. This would result in a bus fault and a
739 * kernel oops. Refuse to start streaming in that case. This check must
740 * be performed before the loop below to avoid starting entities if the
741 * pipeline won't start anyway (those entities would then likely fail to
742 * stop, making the problem worse).
744 if ((pipe->entities & isp->crashed) &
745 (1U << isp->isp_prev.subdev.entity.id))
748 spin_lock_irqsave(&pipe->lock, flags);
749 pipe->state &= ~(ISP_PIPELINE_IDLE_INPUT | ISP_PIPELINE_IDLE_OUTPUT);
750 spin_unlock_irqrestore(&pipe->lock, flags);
752 pipe->do_propagation = false;
754 entity = &pipe->output->video.entity;
756 pad = &entity->pads[0];
757 if (!(pad->flags & MEDIA_PAD_FL_SINK))
760 pad = media_entity_remote_source(pad);
762 media_entity_type(pad->entity) != MEDIA_ENT_T_V4L2_SUBDEV)
765 entity = pad->entity;
766 subdev = media_entity_to_v4l2_subdev(entity);
768 ret = v4l2_subdev_call(subdev, video, s_stream, mode);
769 if (ret < 0 && ret != -ENOIOCTLCMD)
772 if (subdev == &isp->isp_ccdc.subdev) {
773 v4l2_subdev_call(&isp->isp_aewb.subdev, video,
775 v4l2_subdev_call(&isp->isp_af.subdev, video,
777 v4l2_subdev_call(&isp->isp_hist.subdev, video,
779 pipe->do_propagation = true;
786 static int isp_pipeline_wait_resizer(struct isp_device *isp)
788 return omap3isp_resizer_busy(&isp->isp_res);
791 static int isp_pipeline_wait_preview(struct isp_device *isp)
793 return omap3isp_preview_busy(&isp->isp_prev);
796 static int isp_pipeline_wait_ccdc(struct isp_device *isp)
798 return omap3isp_stat_busy(&isp->isp_af)
799 || omap3isp_stat_busy(&isp->isp_aewb)
800 || omap3isp_stat_busy(&isp->isp_hist)
801 || omap3isp_ccdc_busy(&isp->isp_ccdc);
804 #define ISP_STOP_TIMEOUT msecs_to_jiffies(1000)
806 static int isp_pipeline_wait(struct isp_device *isp,
807 int(*busy)(struct isp_device *isp))
809 unsigned long timeout = jiffies + ISP_STOP_TIMEOUT;
811 while (!time_after(jiffies, timeout)) {
820 * isp_pipeline_disable - Disable streaming on a pipeline
821 * @pipe: ISP pipeline
823 * Walk the entities chain starting at the pipeline output video node and stop
824 * all modules in the chain. Wait synchronously for the modules to be stopped if
827 * Return 0 if all modules have been properly stopped, or -ETIMEDOUT if a module
828 * can't be stopped (in which case a software reset of the ISP is probably
831 static int isp_pipeline_disable(struct isp_pipeline *pipe)
833 struct isp_device *isp = pipe->output->isp;
834 struct media_entity *entity;
835 struct media_pad *pad;
836 struct v4l2_subdev *subdev;
841 * We need to stop all the modules after CCDC first or they'll
842 * never stop since they may not get a full frame from CCDC.
844 entity = &pipe->output->video.entity;
846 pad = &entity->pads[0];
847 if (!(pad->flags & MEDIA_PAD_FL_SINK))
850 pad = media_entity_remote_source(pad);
852 media_entity_type(pad->entity) != MEDIA_ENT_T_V4L2_SUBDEV)
855 entity = pad->entity;
856 subdev = media_entity_to_v4l2_subdev(entity);
858 if (subdev == &isp->isp_ccdc.subdev) {
859 v4l2_subdev_call(&isp->isp_aewb.subdev,
861 v4l2_subdev_call(&isp->isp_af.subdev,
863 v4l2_subdev_call(&isp->isp_hist.subdev,
867 v4l2_subdev_call(subdev, video, s_stream, 0);
869 if (subdev == &isp->isp_res.subdev)
870 ret = isp_pipeline_wait(isp, isp_pipeline_wait_resizer);
871 else if (subdev == &isp->isp_prev.subdev)
872 ret = isp_pipeline_wait(isp, isp_pipeline_wait_preview);
873 else if (subdev == &isp->isp_ccdc.subdev)
874 ret = isp_pipeline_wait(isp, isp_pipeline_wait_ccdc);
879 dev_info(isp->dev, "Unable to stop %s\n", subdev->name);
880 /* If the entity failed to stopped, assume it has
881 * crashed. Mark it as such, the ISP will be reset when
882 * applications will release it.
884 isp->crashed |= 1U << subdev->entity.id;
885 failure = -ETIMEDOUT;
893 * omap3isp_pipeline_set_stream - Enable/disable streaming on a pipeline
894 * @pipe: ISP pipeline
895 * @state: Stream state (stopped, single shot or continuous)
897 * Set the pipeline to the given stream state. Pipelines can be started in
898 * single-shot or continuous mode.
900 * Return 0 if successful, or the return value of the failed video::s_stream
901 * operation otherwise. The pipeline state is not updated when the operation
902 * fails, except when stopping the pipeline.
904 int omap3isp_pipeline_set_stream(struct isp_pipeline *pipe,
905 enum isp_pipeline_stream_state state)
909 if (state == ISP_PIPELINE_STREAM_STOPPED)
910 ret = isp_pipeline_disable(pipe);
912 ret = isp_pipeline_enable(pipe, state);
914 if (ret == 0 || state == ISP_PIPELINE_STREAM_STOPPED)
915 pipe->stream_state = state;
921 * isp_pipeline_resume - Resume streaming on a pipeline
922 * @pipe: ISP pipeline
924 * Resume video output and input and re-enable pipeline.
926 static void isp_pipeline_resume(struct isp_pipeline *pipe)
928 int singleshot = pipe->stream_state == ISP_PIPELINE_STREAM_SINGLESHOT;
930 omap3isp_video_resume(pipe->output, !singleshot);
932 omap3isp_video_resume(pipe->input, 0);
933 isp_pipeline_enable(pipe, pipe->stream_state);
937 * isp_pipeline_suspend - Suspend streaming on a pipeline
938 * @pipe: ISP pipeline
942 static void isp_pipeline_suspend(struct isp_pipeline *pipe)
944 isp_pipeline_disable(pipe);
948 * isp_pipeline_is_last - Verify if entity has an enabled link to the output
950 * @me: ISP module's media entity
952 * Returns 1 if the entity has an enabled link to the output video node or 0
953 * otherwise. It's true only while pipeline can have no more than one output
956 static int isp_pipeline_is_last(struct media_entity *me)
958 struct isp_pipeline *pipe;
959 struct media_pad *pad;
963 pipe = to_isp_pipeline(me);
964 if (pipe->stream_state == ISP_PIPELINE_STREAM_STOPPED)
966 pad = media_entity_remote_source(&pipe->output->pad);
967 return pad->entity == me;
971 * isp_suspend_module_pipeline - Suspend pipeline to which belongs the module
972 * @me: ISP module's media entity
974 * Suspend the whole pipeline if module's entity has an enabled link to the
975 * output video node. It works only while pipeline can have no more than one
978 static void isp_suspend_module_pipeline(struct media_entity *me)
980 if (isp_pipeline_is_last(me))
981 isp_pipeline_suspend(to_isp_pipeline(me));
985 * isp_resume_module_pipeline - Resume pipeline to which belongs the module
986 * @me: ISP module's media entity
988 * Resume the whole pipeline if module's entity has an enabled link to the
989 * output video node. It works only while pipeline can have no more than one
992 static void isp_resume_module_pipeline(struct media_entity *me)
994 if (isp_pipeline_is_last(me))
995 isp_pipeline_resume(to_isp_pipeline(me));
999 * isp_suspend_modules - Suspend ISP submodules.
1000 * @isp: OMAP3 ISP device
1002 * Returns 0 if suspend left in idle state all the submodules properly,
1003 * or returns 1 if a general Reset is required to suspend the submodules.
1005 static int isp_suspend_modules(struct isp_device *isp)
1007 unsigned long timeout;
1009 omap3isp_stat_suspend(&isp->isp_aewb);
1010 omap3isp_stat_suspend(&isp->isp_af);
1011 omap3isp_stat_suspend(&isp->isp_hist);
1012 isp_suspend_module_pipeline(&isp->isp_res.subdev.entity);
1013 isp_suspend_module_pipeline(&isp->isp_prev.subdev.entity);
1014 isp_suspend_module_pipeline(&isp->isp_ccdc.subdev.entity);
1015 isp_suspend_module_pipeline(&isp->isp_csi2a.subdev.entity);
1016 isp_suspend_module_pipeline(&isp->isp_ccp2.subdev.entity);
1018 timeout = jiffies + ISP_STOP_TIMEOUT;
1019 while (omap3isp_stat_busy(&isp->isp_af)
1020 || omap3isp_stat_busy(&isp->isp_aewb)
1021 || omap3isp_stat_busy(&isp->isp_hist)
1022 || omap3isp_preview_busy(&isp->isp_prev)
1023 || omap3isp_resizer_busy(&isp->isp_res)
1024 || omap3isp_ccdc_busy(&isp->isp_ccdc)) {
1025 if (time_after(jiffies, timeout)) {
1026 dev_info(isp->dev, "can't stop modules.\n");
1036 * isp_resume_modules - Resume ISP submodules.
1037 * @isp: OMAP3 ISP device
1039 static void isp_resume_modules(struct isp_device *isp)
1041 omap3isp_stat_resume(&isp->isp_aewb);
1042 omap3isp_stat_resume(&isp->isp_af);
1043 omap3isp_stat_resume(&isp->isp_hist);
1044 isp_resume_module_pipeline(&isp->isp_res.subdev.entity);
1045 isp_resume_module_pipeline(&isp->isp_prev.subdev.entity);
1046 isp_resume_module_pipeline(&isp->isp_ccdc.subdev.entity);
1047 isp_resume_module_pipeline(&isp->isp_csi2a.subdev.entity);
1048 isp_resume_module_pipeline(&isp->isp_ccp2.subdev.entity);
1052 * isp_reset - Reset ISP with a timeout wait for idle.
1053 * @isp: OMAP3 ISP device
1055 static int isp_reset(struct isp_device *isp)
1057 unsigned long timeout = 0;
1060 isp_reg_readl(isp, OMAP3_ISP_IOMEM_MAIN, ISP_SYSCONFIG)
1061 | ISP_SYSCONFIG_SOFTRESET,
1062 OMAP3_ISP_IOMEM_MAIN, ISP_SYSCONFIG);
1063 while (!(isp_reg_readl(isp, OMAP3_ISP_IOMEM_MAIN,
1064 ISP_SYSSTATUS) & 0x1)) {
1065 if (timeout++ > 10000) {
1066 dev_alert(isp->dev, "cannot reset ISP\n");
1077 * isp_save_context - Saves the values of the ISP module registers.
1078 * @isp: OMAP3 ISP device
1079 * @reg_list: Structure containing pairs of register address and value to
1083 isp_save_context(struct isp_device *isp, struct isp_reg *reg_list)
1085 struct isp_reg *next = reg_list;
1087 for (; next->reg != ISP_TOK_TERM; next++)
1088 next->val = isp_reg_readl(isp, next->mmio_range, next->reg);
1092 * isp_restore_context - Restores the values of the ISP module registers.
1093 * @isp: OMAP3 ISP device
1094 * @reg_list: Structure containing pairs of register address and value to
1098 isp_restore_context(struct isp_device *isp, struct isp_reg *reg_list)
1100 struct isp_reg *next = reg_list;
1102 for (; next->reg != ISP_TOK_TERM; next++)
1103 isp_reg_writel(isp, next->val, next->mmio_range, next->reg);
1107 * isp_save_ctx - Saves ISP, CCDC, HIST, H3A, PREV, RESZ & MMU context.
1108 * @isp: OMAP3 ISP device
1110 * Routine for saving the context of each module in the ISP.
1111 * CCDC, HIST, H3A, PREV, RESZ and MMU.
1113 static void isp_save_ctx(struct isp_device *isp)
1115 isp_save_context(isp, isp_reg_list);
1116 omap_iommu_save_ctx(isp->dev);
1120 * isp_restore_ctx - Restores ISP, CCDC, HIST, H3A, PREV, RESZ & MMU context.
1121 * @isp: OMAP3 ISP device
1123 * Routine for restoring the context of each module in the ISP.
1124 * CCDC, HIST, H3A, PREV, RESZ and MMU.
1126 static void isp_restore_ctx(struct isp_device *isp)
1128 isp_restore_context(isp, isp_reg_list);
1129 omap_iommu_restore_ctx(isp->dev);
1130 omap3isp_ccdc_restore_context(isp);
1131 omap3isp_preview_restore_context(isp);
1134 /* -----------------------------------------------------------------------------
1135 * SBL resources management
1137 #define OMAP3_ISP_SBL_READ (OMAP3_ISP_SBL_CSI1_READ | \
1138 OMAP3_ISP_SBL_CCDC_LSC_READ | \
1139 OMAP3_ISP_SBL_PREVIEW_READ | \
1140 OMAP3_ISP_SBL_RESIZER_READ)
1141 #define OMAP3_ISP_SBL_WRITE (OMAP3_ISP_SBL_CSI1_WRITE | \
1142 OMAP3_ISP_SBL_CSI2A_WRITE | \
1143 OMAP3_ISP_SBL_CSI2C_WRITE | \
1144 OMAP3_ISP_SBL_CCDC_WRITE | \
1145 OMAP3_ISP_SBL_PREVIEW_WRITE)
1147 void omap3isp_sbl_enable(struct isp_device *isp, enum isp_sbl_resource res)
1151 isp->sbl_resources |= res;
1153 if (isp->sbl_resources & OMAP3_ISP_SBL_CSI1_READ)
1154 sbl |= ISPCTRL_SBL_SHARED_RPORTA;
1156 if (isp->sbl_resources & OMAP3_ISP_SBL_CCDC_LSC_READ)
1157 sbl |= ISPCTRL_SBL_SHARED_RPORTB;
1159 if (isp->sbl_resources & OMAP3_ISP_SBL_CSI2C_WRITE)
1160 sbl |= ISPCTRL_SBL_SHARED_WPORTC;
1162 if (isp->sbl_resources & OMAP3_ISP_SBL_RESIZER_WRITE)
1163 sbl |= ISPCTRL_SBL_WR0_RAM_EN;
1165 if (isp->sbl_resources & OMAP3_ISP_SBL_WRITE)
1166 sbl |= ISPCTRL_SBL_WR1_RAM_EN;
1168 if (isp->sbl_resources & OMAP3_ISP_SBL_READ)
1169 sbl |= ISPCTRL_SBL_RD_RAM_EN;
1171 isp_reg_set(isp, OMAP3_ISP_IOMEM_MAIN, ISP_CTRL, sbl);
1174 void omap3isp_sbl_disable(struct isp_device *isp, enum isp_sbl_resource res)
1178 isp->sbl_resources &= ~res;
1180 if (!(isp->sbl_resources & OMAP3_ISP_SBL_CSI1_READ))
1181 sbl |= ISPCTRL_SBL_SHARED_RPORTA;
1183 if (!(isp->sbl_resources & OMAP3_ISP_SBL_CCDC_LSC_READ))
1184 sbl |= ISPCTRL_SBL_SHARED_RPORTB;
1186 if (!(isp->sbl_resources & OMAP3_ISP_SBL_CSI2C_WRITE))
1187 sbl |= ISPCTRL_SBL_SHARED_WPORTC;
1189 if (!(isp->sbl_resources & OMAP3_ISP_SBL_RESIZER_WRITE))
1190 sbl |= ISPCTRL_SBL_WR0_RAM_EN;
1192 if (!(isp->sbl_resources & OMAP3_ISP_SBL_WRITE))
1193 sbl |= ISPCTRL_SBL_WR1_RAM_EN;
1195 if (!(isp->sbl_resources & OMAP3_ISP_SBL_READ))
1196 sbl |= ISPCTRL_SBL_RD_RAM_EN;
1198 isp_reg_clr(isp, OMAP3_ISP_IOMEM_MAIN, ISP_CTRL, sbl);
1202 * isp_module_sync_idle - Helper to sync module with its idle state
1203 * @me: ISP submodule's media entity
1204 * @wait: ISP submodule's wait queue for streamoff/interrupt synchronization
1205 * @stopping: flag which tells module wants to stop
1207 * This function checks if ISP submodule needs to wait for next interrupt. If
1208 * yes, makes the caller to sleep while waiting for such event.
1210 int omap3isp_module_sync_idle(struct media_entity *me, wait_queue_head_t *wait,
1213 struct isp_pipeline *pipe = to_isp_pipeline(me);
1215 if (pipe->stream_state == ISP_PIPELINE_STREAM_STOPPED ||
1216 (pipe->stream_state == ISP_PIPELINE_STREAM_SINGLESHOT &&
1217 !isp_pipeline_ready(pipe)))
1221 * atomic_set() doesn't include memory barrier on ARM platform for SMP
1222 * scenario. We'll call it here to avoid race conditions.
1224 atomic_set(stopping, 1);
1228 * If module is the last one, it's writing to memory. In this case,
1229 * it's necessary to check if the module is already paused due to
1230 * DMA queue underrun or if it has to wait for next interrupt to be
1232 * If it isn't the last one, the function won't sleep but *stopping
1233 * will still be set to warn next submodule caller's interrupt the
1234 * module wants to be idle.
1236 if (isp_pipeline_is_last(me)) {
1237 struct isp_video *video = pipe->output;
1238 unsigned long flags;
1239 spin_lock_irqsave(&video->queue->irqlock, flags);
1240 if (video->dmaqueue_flags & ISP_VIDEO_DMAQUEUE_UNDERRUN) {
1241 spin_unlock_irqrestore(&video->queue->irqlock, flags);
1242 atomic_set(stopping, 0);
1246 spin_unlock_irqrestore(&video->queue->irqlock, flags);
1247 if (!wait_event_timeout(*wait, !atomic_read(stopping),
1248 msecs_to_jiffies(1000))) {
1249 atomic_set(stopping, 0);
1259 * omap3isp_module_sync_is_stopped - Helper to verify if module was stopping
1260 * @wait: ISP submodule's wait queue for streamoff/interrupt synchronization
1261 * @stopping: flag which tells module wants to stop
1263 * This function checks if ISP submodule was stopping. In case of yes, it
1264 * notices the caller by setting stopping to 0 and waking up the wait queue.
1265 * Returns 1 if it was stopping or 0 otherwise.
1267 int omap3isp_module_sync_is_stopping(wait_queue_head_t *wait,
1270 if (atomic_cmpxchg(stopping, 1, 0)) {
1278 /* --------------------------------------------------------------------------
1282 #define ISPCTRL_CLKS_MASK (ISPCTRL_H3A_CLK_EN | \
1283 ISPCTRL_HIST_CLK_EN | \
1284 ISPCTRL_RSZ_CLK_EN | \
1285 (ISPCTRL_CCDC_CLK_EN | ISPCTRL_CCDC_RAM_EN) | \
1286 (ISPCTRL_PREV_CLK_EN | ISPCTRL_PREV_RAM_EN))
1288 static void __isp_subclk_update(struct isp_device *isp)
1292 /* AEWB and AF share the same clock. */
1293 if (isp->subclk_resources &
1294 (OMAP3_ISP_SUBCLK_AEWB | OMAP3_ISP_SUBCLK_AF))
1295 clk |= ISPCTRL_H3A_CLK_EN;
1297 if (isp->subclk_resources & OMAP3_ISP_SUBCLK_HIST)
1298 clk |= ISPCTRL_HIST_CLK_EN;
1300 if (isp->subclk_resources & OMAP3_ISP_SUBCLK_RESIZER)
1301 clk |= ISPCTRL_RSZ_CLK_EN;
1303 /* NOTE: For CCDC & Preview submodules, we need to affect internal
1306 if (isp->subclk_resources & OMAP3_ISP_SUBCLK_CCDC)
1307 clk |= ISPCTRL_CCDC_CLK_EN | ISPCTRL_CCDC_RAM_EN;
1309 if (isp->subclk_resources & OMAP3_ISP_SUBCLK_PREVIEW)
1310 clk |= ISPCTRL_PREV_CLK_EN | ISPCTRL_PREV_RAM_EN;
1312 isp_reg_clr_set(isp, OMAP3_ISP_IOMEM_MAIN, ISP_CTRL,
1313 ISPCTRL_CLKS_MASK, clk);
1316 void omap3isp_subclk_enable(struct isp_device *isp,
1317 enum isp_subclk_resource res)
1319 isp->subclk_resources |= res;
1321 __isp_subclk_update(isp);
1324 void omap3isp_subclk_disable(struct isp_device *isp,
1325 enum isp_subclk_resource res)
1327 isp->subclk_resources &= ~res;
1329 __isp_subclk_update(isp);
1333 * isp_enable_clocks - Enable ISP clocks
1334 * @isp: OMAP3 ISP device
1336 * Return 0 if successful, or clk_prepare_enable return value if any of them
1339 static int isp_enable_clocks(struct isp_device *isp)
1346 * cam_mclk clock chain:
1347 * dpll4 -> dpll4_m5 -> dpll4_m5x2 -> cam_mclk
1349 * In OMAP3630 dpll4_m5x2 != 2 x dpll4_m5 but both are
1350 * set to the same value. Hence the rate set for dpll4_m5
1351 * has to be twice of what is set on OMAP3430 to get
1352 * the required value for cam_mclk
1354 divisor = isp->revision == ISP_REVISION_15_0 ? 1 : 2;
1356 r = clk_prepare_enable(isp->clock[ISP_CLK_CAM_ICK]);
1358 dev_err(isp->dev, "failed to enable cam_ick clock\n");
1359 goto out_clk_enable_ick;
1361 r = clk_set_rate(isp->clock[ISP_CLK_DPLL4_M5_CK],
1362 CM_CAM_MCLK_HZ/divisor);
1364 dev_err(isp->dev, "clk_set_rate for dpll4_m5_ck failed\n");
1365 goto out_clk_enable_mclk;
1367 r = clk_prepare_enable(isp->clock[ISP_CLK_CAM_MCLK]);
1369 dev_err(isp->dev, "failed to enable cam_mclk clock\n");
1370 goto out_clk_enable_mclk;
1372 rate = clk_get_rate(isp->clock[ISP_CLK_CAM_MCLK]);
1373 if (rate != CM_CAM_MCLK_HZ)
1374 dev_warn(isp->dev, "unexpected cam_mclk rate:\n"
1376 " actual : %ld\n", CM_CAM_MCLK_HZ, rate);
1377 r = clk_prepare_enable(isp->clock[ISP_CLK_CSI2_FCK]);
1379 dev_err(isp->dev, "failed to enable csi2_fck clock\n");
1380 goto out_clk_enable_csi2_fclk;
1384 out_clk_enable_csi2_fclk:
1385 clk_disable_unprepare(isp->clock[ISP_CLK_CAM_MCLK]);
1386 out_clk_enable_mclk:
1387 clk_disable_unprepare(isp->clock[ISP_CLK_CAM_ICK]);
1393 * isp_disable_clocks - Disable ISP clocks
1394 * @isp: OMAP3 ISP device
1396 static void isp_disable_clocks(struct isp_device *isp)
1398 clk_disable_unprepare(isp->clock[ISP_CLK_CAM_ICK]);
1399 clk_disable_unprepare(isp->clock[ISP_CLK_CAM_MCLK]);
1400 clk_disable_unprepare(isp->clock[ISP_CLK_CSI2_FCK]);
1403 static const char *isp_clocks[] = {
1411 static void isp_put_clocks(struct isp_device *isp)
1415 for (i = 0; i < ARRAY_SIZE(isp_clocks); ++i) {
1416 if (isp->clock[i]) {
1417 clk_put(isp->clock[i]);
1418 isp->clock[i] = NULL;
1423 static int isp_get_clocks(struct isp_device *isp)
1428 for (i = 0; i < ARRAY_SIZE(isp_clocks); ++i) {
1429 clk = clk_get(isp->dev, isp_clocks[i]);
1431 dev_err(isp->dev, "clk_get %s failed\n", isp_clocks[i]);
1432 isp_put_clocks(isp);
1433 return PTR_ERR(clk);
1436 isp->clock[i] = clk;
1443 * omap3isp_get - Acquire the ISP resource.
1445 * Initializes the clocks for the first acquire.
1447 * Increment the reference count on the ISP. If the first reference is taken,
1448 * enable clocks and power-up all submodules.
1450 * Return a pointer to the ISP device structure, or NULL if an error occurred.
1452 static struct isp_device *__omap3isp_get(struct isp_device *isp, bool irq)
1454 struct isp_device *__isp = isp;
1459 mutex_lock(&isp->isp_mutex);
1460 if (isp->ref_count > 0)
1463 if (isp_enable_clocks(isp) < 0) {
1468 /* We don't want to restore context before saving it! */
1469 if (isp->has_context)
1470 isp_restore_ctx(isp);
1473 isp_enable_interrupts(isp);
1478 mutex_unlock(&isp->isp_mutex);
1483 struct isp_device *omap3isp_get(struct isp_device *isp)
1485 return __omap3isp_get(isp, true);
1489 * omap3isp_put - Release the ISP
1491 * Decrement the reference count on the ISP. If the last reference is released,
1492 * power-down all submodules, disable clocks and free temporary buffers.
1494 void omap3isp_put(struct isp_device *isp)
1499 mutex_lock(&isp->isp_mutex);
1500 BUG_ON(isp->ref_count == 0);
1501 if (--isp->ref_count == 0) {
1502 isp_disable_interrupts(isp);
1505 isp->has_context = 1;
1507 /* Reset the ISP if an entity has failed to stop. This is the
1508 * only way to recover from such conditions.
1512 isp_disable_clocks(isp);
1514 mutex_unlock(&isp->isp_mutex);
1517 /* --------------------------------------------------------------------------
1518 * Platform device driver
1522 * omap3isp_print_status - Prints the values of the ISP Control Module registers
1523 * @isp: OMAP3 ISP device
1525 #define ISP_PRINT_REGISTER(isp, name)\
1526 dev_dbg(isp->dev, "###ISP " #name "=0x%08x\n", \
1527 isp_reg_readl(isp, OMAP3_ISP_IOMEM_MAIN, ISP_##name))
1528 #define SBL_PRINT_REGISTER(isp, name)\
1529 dev_dbg(isp->dev, "###SBL " #name "=0x%08x\n", \
1530 isp_reg_readl(isp, OMAP3_ISP_IOMEM_SBL, ISPSBL_##name))
1532 void omap3isp_print_status(struct isp_device *isp)
1534 dev_dbg(isp->dev, "-------------ISP Register dump--------------\n");
1536 ISP_PRINT_REGISTER(isp, SYSCONFIG);
1537 ISP_PRINT_REGISTER(isp, SYSSTATUS);
1538 ISP_PRINT_REGISTER(isp, IRQ0ENABLE);
1539 ISP_PRINT_REGISTER(isp, IRQ0STATUS);
1540 ISP_PRINT_REGISTER(isp, TCTRL_GRESET_LENGTH);
1541 ISP_PRINT_REGISTER(isp, TCTRL_PSTRB_REPLAY);
1542 ISP_PRINT_REGISTER(isp, CTRL);
1543 ISP_PRINT_REGISTER(isp, TCTRL_CTRL);
1544 ISP_PRINT_REGISTER(isp, TCTRL_FRAME);
1545 ISP_PRINT_REGISTER(isp, TCTRL_PSTRB_DELAY);
1546 ISP_PRINT_REGISTER(isp, TCTRL_STRB_DELAY);
1547 ISP_PRINT_REGISTER(isp, TCTRL_SHUT_DELAY);
1548 ISP_PRINT_REGISTER(isp, TCTRL_PSTRB_LENGTH);
1549 ISP_PRINT_REGISTER(isp, TCTRL_STRB_LENGTH);
1550 ISP_PRINT_REGISTER(isp, TCTRL_SHUT_LENGTH);
1552 SBL_PRINT_REGISTER(isp, PCR);
1553 SBL_PRINT_REGISTER(isp, SDR_REQ_EXP);
1555 dev_dbg(isp->dev, "--------------------------------------------\n");
1561 * Power management support.
1563 * As the ISP can't properly handle an input video stream interruption on a non
1564 * frame boundary, the ISP pipelines need to be stopped before sensors get
1565 * suspended. However, as suspending the sensors can require a running clock,
1566 * which can be provided by the ISP, the ISP can't be completely suspended
1567 * before the sensor.
1569 * To solve this problem power management support is split into prepare/complete
1570 * and suspend/resume operations. The pipelines are stopped in prepare() and the
1571 * ISP clocks get disabled in suspend(). Similarly, the clocks are reenabled in
1572 * resume(), and the the pipelines are restarted in complete().
1574 * TODO: PM dependencies between the ISP and sensors are not modeled explicitly
1577 static int isp_pm_prepare(struct device *dev)
1579 struct isp_device *isp = dev_get_drvdata(dev);
1582 WARN_ON(mutex_is_locked(&isp->isp_mutex));
1584 if (isp->ref_count == 0)
1587 reset = isp_suspend_modules(isp);
1588 isp_disable_interrupts(isp);
1596 static int isp_pm_suspend(struct device *dev)
1598 struct isp_device *isp = dev_get_drvdata(dev);
1600 WARN_ON(mutex_is_locked(&isp->isp_mutex));
1603 isp_disable_clocks(isp);
1608 static int isp_pm_resume(struct device *dev)
1610 struct isp_device *isp = dev_get_drvdata(dev);
1612 if (isp->ref_count == 0)
1615 return isp_enable_clocks(isp);
1618 static void isp_pm_complete(struct device *dev)
1620 struct isp_device *isp = dev_get_drvdata(dev);
1622 if (isp->ref_count == 0)
1625 isp_restore_ctx(isp);
1626 isp_enable_interrupts(isp);
1627 isp_resume_modules(isp);
1632 #define isp_pm_prepare NULL
1633 #define isp_pm_suspend NULL
1634 #define isp_pm_resume NULL
1635 #define isp_pm_complete NULL
1637 #endif /* CONFIG_PM */
1639 static void isp_unregister_entities(struct isp_device *isp)
1641 omap3isp_csi2_unregister_entities(&isp->isp_csi2a);
1642 omap3isp_ccp2_unregister_entities(&isp->isp_ccp2);
1643 omap3isp_ccdc_unregister_entities(&isp->isp_ccdc);
1644 omap3isp_preview_unregister_entities(&isp->isp_prev);
1645 omap3isp_resizer_unregister_entities(&isp->isp_res);
1646 omap3isp_stat_unregister_entities(&isp->isp_aewb);
1647 omap3isp_stat_unregister_entities(&isp->isp_af);
1648 omap3isp_stat_unregister_entities(&isp->isp_hist);
1650 v4l2_device_unregister(&isp->v4l2_dev);
1651 media_device_unregister(&isp->media_dev);
1655 * isp_register_subdev_group - Register a group of subdevices
1656 * @isp: OMAP3 ISP device
1657 * @board_info: I2C subdevs board information array
1659 * Register all I2C subdevices in the board_info array. The array must be
1660 * terminated by a NULL entry, and the first entry must be the sensor.
1662 * Return a pointer to the sensor media entity if it has been successfully
1663 * registered, or NULL otherwise.
1665 static struct v4l2_subdev *
1666 isp_register_subdev_group(struct isp_device *isp,
1667 struct isp_subdev_i2c_board_info *board_info)
1669 struct v4l2_subdev *sensor = NULL;
1672 if (board_info->board_info == NULL)
1675 for (first = 1; board_info->board_info; ++board_info, first = 0) {
1676 struct v4l2_subdev *subdev;
1677 struct i2c_adapter *adapter;
1679 adapter = i2c_get_adapter(board_info->i2c_adapter_id);
1680 if (adapter == NULL) {
1681 dev_err(isp->dev, "%s: Unable to get I2C adapter %d for "
1682 "device %s\n", __func__,
1683 board_info->i2c_adapter_id,
1684 board_info->board_info->type);
1688 subdev = v4l2_i2c_new_subdev_board(&isp->v4l2_dev, adapter,
1689 board_info->board_info, NULL);
1690 if (subdev == NULL) {
1691 dev_err(isp->dev, "%s: Unable to register subdev %s\n",
1692 __func__, board_info->board_info->type);
1703 static int isp_register_entities(struct isp_device *isp)
1705 struct isp_platform_data *pdata = isp->pdata;
1706 struct isp_v4l2_subdevs_group *subdevs;
1709 isp->media_dev.dev = isp->dev;
1710 strlcpy(isp->media_dev.model, "TI OMAP3 ISP",
1711 sizeof(isp->media_dev.model));
1712 isp->media_dev.hw_revision = isp->revision;
1713 isp->media_dev.link_notify = isp_pipeline_link_notify;
1714 ret = media_device_register(&isp->media_dev);
1716 dev_err(isp->dev, "%s: Media device registration failed (%d)\n",
1721 isp->v4l2_dev.mdev = &isp->media_dev;
1722 ret = v4l2_device_register(isp->dev, &isp->v4l2_dev);
1724 dev_err(isp->dev, "%s: V4L2 device registration failed (%d)\n",
1729 /* Register internal entities */
1730 ret = omap3isp_ccp2_register_entities(&isp->isp_ccp2, &isp->v4l2_dev);
1734 ret = omap3isp_csi2_register_entities(&isp->isp_csi2a, &isp->v4l2_dev);
1738 ret = omap3isp_ccdc_register_entities(&isp->isp_ccdc, &isp->v4l2_dev);
1742 ret = omap3isp_preview_register_entities(&isp->isp_prev,
1747 ret = omap3isp_resizer_register_entities(&isp->isp_res, &isp->v4l2_dev);
1751 ret = omap3isp_stat_register_entities(&isp->isp_aewb, &isp->v4l2_dev);
1755 ret = omap3isp_stat_register_entities(&isp->isp_af, &isp->v4l2_dev);
1759 ret = omap3isp_stat_register_entities(&isp->isp_hist, &isp->v4l2_dev);
1763 /* Register external entities */
1764 for (subdevs = pdata->subdevs; subdevs && subdevs->subdevs; ++subdevs) {
1765 struct v4l2_subdev *sensor;
1766 struct media_entity *input;
1771 sensor = isp_register_subdev_group(isp, subdevs->subdevs);
1775 sensor->host_priv = subdevs;
1777 /* Connect the sensor to the correct interface module. Parallel
1778 * sensors are connected directly to the CCDC, while serial
1779 * sensors are connected to the CSI2a, CCP2b or CSI2c receiver
1780 * through CSIPHY1 or CSIPHY2.
1782 switch (subdevs->interface) {
1783 case ISP_INTERFACE_PARALLEL:
1784 input = &isp->isp_ccdc.subdev.entity;
1785 pad = CCDC_PAD_SINK;
1789 case ISP_INTERFACE_CSI2A_PHY2:
1790 input = &isp->isp_csi2a.subdev.entity;
1791 pad = CSI2_PAD_SINK;
1792 flags = MEDIA_LNK_FL_IMMUTABLE
1793 | MEDIA_LNK_FL_ENABLED;
1796 case ISP_INTERFACE_CCP2B_PHY1:
1797 case ISP_INTERFACE_CCP2B_PHY2:
1798 input = &isp->isp_ccp2.subdev.entity;
1799 pad = CCP2_PAD_SINK;
1803 case ISP_INTERFACE_CSI2C_PHY1:
1804 input = &isp->isp_csi2c.subdev.entity;
1805 pad = CSI2_PAD_SINK;
1806 flags = MEDIA_LNK_FL_IMMUTABLE
1807 | MEDIA_LNK_FL_ENABLED;
1811 dev_err(isp->dev, "%s: invalid interface type %u\n",
1812 __func__, subdevs->interface);
1817 for (i = 0; i < sensor->entity.num_pads; i++) {
1818 if (sensor->entity.pads[i].flags & MEDIA_PAD_FL_SOURCE)
1821 if (i == sensor->entity.num_pads) {
1823 "%s: no source pad in external entity\n",
1829 ret = media_entity_create_link(&sensor->entity, i, input, pad,
1835 ret = v4l2_device_register_subdev_nodes(&isp->v4l2_dev);
1839 isp_unregister_entities(isp);
1844 static void isp_cleanup_modules(struct isp_device *isp)
1846 omap3isp_h3a_aewb_cleanup(isp);
1847 omap3isp_h3a_af_cleanup(isp);
1848 omap3isp_hist_cleanup(isp);
1849 omap3isp_resizer_cleanup(isp);
1850 omap3isp_preview_cleanup(isp);
1851 omap3isp_ccdc_cleanup(isp);
1852 omap3isp_ccp2_cleanup(isp);
1853 omap3isp_csi2_cleanup(isp);
1856 static int isp_initialize_modules(struct isp_device *isp)
1860 ret = omap3isp_csiphy_init(isp);
1862 dev_err(isp->dev, "CSI PHY initialization failed\n");
1866 ret = omap3isp_csi2_init(isp);
1868 dev_err(isp->dev, "CSI2 initialization failed\n");
1872 ret = omap3isp_ccp2_init(isp);
1874 dev_err(isp->dev, "CCP2 initialization failed\n");
1878 ret = omap3isp_ccdc_init(isp);
1880 dev_err(isp->dev, "CCDC initialization failed\n");
1884 ret = omap3isp_preview_init(isp);
1886 dev_err(isp->dev, "Preview initialization failed\n");
1890 ret = omap3isp_resizer_init(isp);
1892 dev_err(isp->dev, "Resizer initialization failed\n");
1896 ret = omap3isp_hist_init(isp);
1898 dev_err(isp->dev, "Histogram initialization failed\n");
1902 ret = omap3isp_h3a_aewb_init(isp);
1904 dev_err(isp->dev, "H3A AEWB initialization failed\n");
1905 goto error_h3a_aewb;
1908 ret = omap3isp_h3a_af_init(isp);
1910 dev_err(isp->dev, "H3A AF initialization failed\n");
1914 /* Connect the submodules. */
1915 ret = media_entity_create_link(
1916 &isp->isp_csi2a.subdev.entity, CSI2_PAD_SOURCE,
1917 &isp->isp_ccdc.subdev.entity, CCDC_PAD_SINK, 0);
1921 ret = media_entity_create_link(
1922 &isp->isp_ccp2.subdev.entity, CCP2_PAD_SOURCE,
1923 &isp->isp_ccdc.subdev.entity, CCDC_PAD_SINK, 0);
1927 ret = media_entity_create_link(
1928 &isp->isp_ccdc.subdev.entity, CCDC_PAD_SOURCE_VP,
1929 &isp->isp_prev.subdev.entity, PREV_PAD_SINK, 0);
1933 ret = media_entity_create_link(
1934 &isp->isp_ccdc.subdev.entity, CCDC_PAD_SOURCE_OF,
1935 &isp->isp_res.subdev.entity, RESZ_PAD_SINK, 0);
1939 ret = media_entity_create_link(
1940 &isp->isp_prev.subdev.entity, PREV_PAD_SOURCE,
1941 &isp->isp_res.subdev.entity, RESZ_PAD_SINK, 0);
1945 ret = media_entity_create_link(
1946 &isp->isp_ccdc.subdev.entity, CCDC_PAD_SOURCE_VP,
1947 &isp->isp_aewb.subdev.entity, 0,
1948 MEDIA_LNK_FL_ENABLED | MEDIA_LNK_FL_IMMUTABLE);
1952 ret = media_entity_create_link(
1953 &isp->isp_ccdc.subdev.entity, CCDC_PAD_SOURCE_VP,
1954 &isp->isp_af.subdev.entity, 0,
1955 MEDIA_LNK_FL_ENABLED | MEDIA_LNK_FL_IMMUTABLE);
1959 ret = media_entity_create_link(
1960 &isp->isp_ccdc.subdev.entity, CCDC_PAD_SOURCE_VP,
1961 &isp->isp_hist.subdev.entity, 0,
1962 MEDIA_LNK_FL_ENABLED | MEDIA_LNK_FL_IMMUTABLE);
1969 omap3isp_h3a_af_cleanup(isp);
1971 omap3isp_h3a_aewb_cleanup(isp);
1973 omap3isp_hist_cleanup(isp);
1975 omap3isp_resizer_cleanup(isp);
1977 omap3isp_preview_cleanup(isp);
1979 omap3isp_ccdc_cleanup(isp);
1981 omap3isp_ccp2_cleanup(isp);
1983 omap3isp_csi2_cleanup(isp);
1990 * isp_remove - Remove ISP platform device
1991 * @pdev: Pointer to ISP platform device
1995 static int __devexit isp_remove(struct platform_device *pdev)
1997 struct isp_device *isp = platform_get_drvdata(pdev);
2000 isp_unregister_entities(isp);
2001 isp_cleanup_modules(isp);
2003 __omap3isp_get(isp, false);
2004 iommu_detach_device(isp->domain, &pdev->dev);
2005 iommu_domain_free(isp->domain);
2009 free_irq(isp->irq_num, isp);
2010 isp_put_clocks(isp);
2012 for (i = 0; i < OMAP3_ISP_IOMEM_LAST; i++) {
2013 if (isp->mmio_base[i]) {
2014 iounmap(isp->mmio_base[i]);
2015 isp->mmio_base[i] = NULL;
2018 if (isp->mmio_base_phys[i]) {
2019 release_mem_region(isp->mmio_base_phys[i],
2021 isp->mmio_base_phys[i] = 0;
2025 regulator_put(isp->isp_csiphy1.vdd);
2026 regulator_put(isp->isp_csiphy2.vdd);
2032 static int isp_map_mem_resource(struct platform_device *pdev,
2033 struct isp_device *isp,
2034 enum isp_mem_resources res)
2036 struct resource *mem;
2038 /* request the mem region for the camera registers */
2040 mem = platform_get_resource(pdev, IORESOURCE_MEM, res);
2042 dev_err(isp->dev, "no mem resource?\n");
2046 if (!request_mem_region(mem->start, resource_size(mem), pdev->name)) {
2048 "cannot reserve camera register I/O region\n");
2051 isp->mmio_base_phys[res] = mem->start;
2052 isp->mmio_size[res] = resource_size(mem);
2054 /* map the region */
2055 isp->mmio_base[res] = ioremap_nocache(isp->mmio_base_phys[res],
2056 isp->mmio_size[res]);
2057 if (!isp->mmio_base[res]) {
2058 dev_err(isp->dev, "cannot map camera register I/O region\n");
2066 * isp_probe - Probe ISP platform device
2067 * @pdev: Pointer to ISP platform device
2069 * Returns 0 if successful,
2070 * -ENOMEM if no memory available,
2071 * -ENODEV if no platform device resources found
2072 * or no space for remapping registers,
2073 * -EINVAL if couldn't install ISR,
2074 * or clk_get return error value.
2076 static int __devinit isp_probe(struct platform_device *pdev)
2078 struct isp_platform_data *pdata = pdev->dev.platform_data;
2079 struct isp_device *isp;
2086 isp = kzalloc(sizeof(*isp), GFP_KERNEL);
2088 dev_err(&pdev->dev, "could not allocate memory\n");
2092 isp->autoidle = autoidle;
2093 isp->platform_cb.set_xclk = isp_set_xclk;
2095 mutex_init(&isp->isp_mutex);
2096 spin_lock_init(&isp->stat_lock);
2098 isp->dev = &pdev->dev;
2102 isp->raw_dmamask = DMA_BIT_MASK(32);
2103 isp->dev->dma_mask = &isp->raw_dmamask;
2104 isp->dev->coherent_dma_mask = DMA_BIT_MASK(32);
2106 platform_set_drvdata(pdev, isp);
2109 isp->isp_csiphy1.vdd = regulator_get(&pdev->dev, "VDD_CSIPHY1");
2110 isp->isp_csiphy2.vdd = regulator_get(&pdev->dev, "VDD_CSIPHY2");
2114 * The ISP clock tree is revision-dependent. We thus need to enable ICLK
2115 * manually to read the revision before calling __omap3isp_get().
2117 ret = isp_map_mem_resource(pdev, isp, OMAP3_ISP_IOMEM_MAIN);
2121 ret = isp_get_clocks(isp);
2125 ret = clk_enable(isp->clock[ISP_CLK_CAM_ICK]);
2129 isp->revision = isp_reg_readl(isp, OMAP3_ISP_IOMEM_MAIN, ISP_REVISION);
2130 dev_info(isp->dev, "Revision %d.%d found\n",
2131 (isp->revision & 0xf0) >> 4, isp->revision & 0x0f);
2133 clk_disable(isp->clock[ISP_CLK_CAM_ICK]);
2135 if (__omap3isp_get(isp, false) == NULL) {
2140 ret = isp_reset(isp);
2144 /* Memory resources */
2145 for (m = 0; m < ARRAY_SIZE(isp_res_maps); m++)
2146 if (isp->revision == isp_res_maps[m].isp_rev)
2149 if (m == ARRAY_SIZE(isp_res_maps)) {
2150 dev_err(isp->dev, "No resource map found for ISP rev %d.%d\n",
2151 (isp->revision & 0xf0) >> 4, isp->revision & 0xf);
2156 for (i = 1; i < OMAP3_ISP_IOMEM_LAST; i++) {
2157 if (isp_res_maps[m].map & 1 << i) {
2158 ret = isp_map_mem_resource(pdev, isp, i);
2164 isp->domain = iommu_domain_alloc(pdev->dev.bus);
2166 dev_err(isp->dev, "can't alloc iommu domain\n");
2171 ret = iommu_attach_device(isp->domain, &pdev->dev);
2173 dev_err(&pdev->dev, "can't attach iommu device: %d\n", ret);
2178 isp->irq_num = platform_get_irq(pdev, 0);
2179 if (isp->irq_num <= 0) {
2180 dev_err(isp->dev, "No IRQ resource\n");
2185 if (request_irq(isp->irq_num, isp_isr, IRQF_SHARED, "OMAP3 ISP", isp)) {
2186 dev_err(isp->dev, "Unable to request IRQ\n");
2192 ret = isp_initialize_modules(isp);
2196 ret = isp_register_entities(isp);
2200 isp_core_init(isp, 1);
2206 isp_cleanup_modules(isp);
2208 free_irq(isp->irq_num, isp);
2210 iommu_detach_device(isp->domain, &pdev->dev);
2212 iommu_domain_free(isp->domain);
2216 isp_put_clocks(isp);
2218 for (i = 0; i < OMAP3_ISP_IOMEM_LAST; i++) {
2219 if (isp->mmio_base[i]) {
2220 iounmap(isp->mmio_base[i]);
2221 isp->mmio_base[i] = NULL;
2224 if (isp->mmio_base_phys[i]) {
2225 release_mem_region(isp->mmio_base_phys[i],
2227 isp->mmio_base_phys[i] = 0;
2230 regulator_put(isp->isp_csiphy2.vdd);
2231 regulator_put(isp->isp_csiphy1.vdd);
2232 platform_set_drvdata(pdev, NULL);
2234 mutex_destroy(&isp->isp_mutex);
2240 static const struct dev_pm_ops omap3isp_pm_ops = {
2241 .prepare = isp_pm_prepare,
2242 .suspend = isp_pm_suspend,
2243 .resume = isp_pm_resume,
2244 .complete = isp_pm_complete,
2247 static struct platform_device_id omap3isp_id_table[] = {
2251 MODULE_DEVICE_TABLE(platform, omap3isp_id_table);
2253 static struct platform_driver omap3isp_driver = {
2255 .remove = __devexit_p(isp_remove),
2256 .id_table = omap3isp_id_table,
2258 .owner = THIS_MODULE,
2260 .pm = &omap3isp_pm_ops,
2264 module_platform_driver(omap3isp_driver);
2266 MODULE_AUTHOR("Nokia Corporation");
2267 MODULE_DESCRIPTION("TI OMAP3 ISP driver");
2268 MODULE_LICENSE("GPL");
2269 MODULE_VERSION(ISP_VIDEO_DRIVER_VERSION);