6 * Copyright (C) 2006-2010 Nokia Corporation
7 * Copyright (C) 2007-2009 Texas Instruments, Inc.
9 * Contacts: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
10 * Sakari Ailus <sakari.ailus@iki.fi>
13 * Laurent Pinchart <laurent.pinchart@ideasonboard.com>
14 * Sakari Ailus <sakari.ailus@iki.fi>
15 * David Cohen <dacohen@gmail.com>
16 * Stanimir Varbanov <svarbanov@mm-sol.com>
17 * Vimarsh Zutshi <vimarsh.zutshi@gmail.com>
18 * Tuukka Toivonen <tuukkat76@gmail.com>
19 * Sergio Aguirre <saaguirre@ti.com>
20 * Antti Koskipaa <akoskipa@gmail.com>
21 * Ivan T. Ivanov <iivanov@mm-sol.com>
22 * RaniSuneela <r-m@ti.com>
23 * Atanas Filipov <afilipov@mm-sol.com>
24 * Gjorgji Rosikopulos <grosikopulos@mm-sol.com>
25 * Hiroshi DOYU <hiroshi.doyu@nokia.com>
26 * Nayden Kanchev <nkanchev@mm-sol.com>
27 * Phil Carmody <ext-phil.2.carmody@nokia.com>
28 * Artem Bityutskiy <artem.bityutskiy@nokia.com>
29 * Dominic Curran <dcurran@ti.com>
30 * Ilkka Myllyperkio <ilkka.myllyperkio@sofica.fi>
31 * Pallavi Kulkarni <p-kulkarni@ti.com>
32 * Vaibhav Hiremath <hvaibhav@ti.com>
33 * Mohit Jalori <mjalori@ti.com>
34 * Sameer Venkatraman <sameerv@ti.com>
35 * Senthilvadivu Guruswamy <svadivu@ti.com>
36 * Thara Gopinath <thara@ti.com>
37 * Toni Leinonen <toni.leinonen@nokia.com>
38 * Troy Laramy <t-laramy@ti.com>
40 * This program is free software; you can redistribute it and/or modify
41 * it under the terms of the GNU General Public License version 2 as
42 * published by the Free Software Foundation.
44 * This program is distributed in the hope that it will be useful, but
45 * WITHOUT ANY WARRANTY; without even the implied warranty of
46 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
47 * General Public License for more details.
49 * You should have received a copy of the GNU General Public License
50 * along with this program; if not, write to the Free Software
51 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA
55 #include <asm/cacheflush.h>
57 #include <linux/clk.h>
58 #include <linux/delay.h>
59 #include <linux/device.h>
60 #include <linux/dma-mapping.h>
61 #include <linux/i2c.h>
62 #include <linux/interrupt.h>
63 #include <linux/module.h>
64 #include <linux/platform_device.h>
65 #include <linux/regulator/consumer.h>
66 #include <linux/slab.h>
67 #include <linux/sched.h>
68 #include <linux/vmalloc.h>
70 #include <media/v4l2-common.h>
71 #include <media/v4l2-device.h>
78 #include "isppreview.h"
79 #include "ispresizer.h"
85 static unsigned int autoidle;
86 module_param(autoidle, int, 0444);
87 MODULE_PARM_DESC(autoidle, "Enable OMAP3ISP AUTOIDLE support");
89 static void isp_save_ctx(struct isp_device *isp);
91 static void isp_restore_ctx(struct isp_device *isp);
93 static const struct isp_res_mapping isp_res_maps[] = {
95 .isp_rev = ISP_REVISION_2_0,
96 .map = 1 << OMAP3_ISP_IOMEM_MAIN |
97 1 << OMAP3_ISP_IOMEM_CCP2 |
98 1 << OMAP3_ISP_IOMEM_CCDC |
99 1 << OMAP3_ISP_IOMEM_HIST |
100 1 << OMAP3_ISP_IOMEM_H3A |
101 1 << OMAP3_ISP_IOMEM_PREV |
102 1 << OMAP3_ISP_IOMEM_RESZ |
103 1 << OMAP3_ISP_IOMEM_SBL |
104 1 << OMAP3_ISP_IOMEM_CSI2A_REGS1 |
105 1 << OMAP3_ISP_IOMEM_CSIPHY2 |
106 1 << OMAP3_ISP_IOMEM_343X_CONTROL_CSIRXFE,
109 .isp_rev = ISP_REVISION_15_0,
110 .map = 1 << OMAP3_ISP_IOMEM_MAIN |
111 1 << OMAP3_ISP_IOMEM_CCP2 |
112 1 << OMAP3_ISP_IOMEM_CCDC |
113 1 << OMAP3_ISP_IOMEM_HIST |
114 1 << OMAP3_ISP_IOMEM_H3A |
115 1 << OMAP3_ISP_IOMEM_PREV |
116 1 << OMAP3_ISP_IOMEM_RESZ |
117 1 << OMAP3_ISP_IOMEM_SBL |
118 1 << OMAP3_ISP_IOMEM_CSI2A_REGS1 |
119 1 << OMAP3_ISP_IOMEM_CSIPHY2 |
120 1 << OMAP3_ISP_IOMEM_CSI2A_REGS2 |
121 1 << OMAP3_ISP_IOMEM_CSI2C_REGS1 |
122 1 << OMAP3_ISP_IOMEM_CSIPHY1 |
123 1 << OMAP3_ISP_IOMEM_CSI2C_REGS2 |
124 1 << OMAP3_ISP_IOMEM_3630_CONTROL_CAMERA_PHY_CTRL,
128 /* Structure for saving/restoring ISP module registers */
129 static struct isp_reg isp_reg_list[] = {
130 {OMAP3_ISP_IOMEM_MAIN, ISP_SYSCONFIG, 0},
131 {OMAP3_ISP_IOMEM_MAIN, ISP_CTRL, 0},
132 {OMAP3_ISP_IOMEM_MAIN, ISP_TCTRL_CTRL, 0},
137 * omap3isp_flush - Post pending L3 bus writes by doing a register readback
138 * @isp: OMAP3 ISP device
140 * In order to force posting of pending writes, we need to write and
141 * readback the same register, in this case the revision register.
143 * See this link for reference:
144 * http://www.mail-archive.com/linux-omap@vger.kernel.org/msg08149.html
146 void omap3isp_flush(struct isp_device *isp)
148 isp_reg_writel(isp, 0, OMAP3_ISP_IOMEM_MAIN, ISP_REVISION);
149 isp_reg_readl(isp, OMAP3_ISP_IOMEM_MAIN, ISP_REVISION);
153 * isp_enable_interrupts - Enable ISP interrupts.
154 * @isp: OMAP3 ISP device
156 static void isp_enable_interrupts(struct isp_device *isp)
158 static const u32 irq = IRQ0ENABLE_CSIA_IRQ
159 | IRQ0ENABLE_CSIB_IRQ
160 | IRQ0ENABLE_CCDC_LSC_PREF_ERR_IRQ
161 | IRQ0ENABLE_CCDC_LSC_DONE_IRQ
162 | IRQ0ENABLE_CCDC_VD0_IRQ
163 | IRQ0ENABLE_CCDC_VD1_IRQ
164 | IRQ0ENABLE_HS_VS_IRQ
165 | IRQ0ENABLE_HIST_DONE_IRQ
166 | IRQ0ENABLE_H3A_AWB_DONE_IRQ
167 | IRQ0ENABLE_H3A_AF_DONE_IRQ
168 | IRQ0ENABLE_PRV_DONE_IRQ
169 | IRQ0ENABLE_RSZ_DONE_IRQ;
171 isp_reg_writel(isp, irq, OMAP3_ISP_IOMEM_MAIN, ISP_IRQ0STATUS);
172 isp_reg_writel(isp, irq, OMAP3_ISP_IOMEM_MAIN, ISP_IRQ0ENABLE);
176 * isp_disable_interrupts - Disable ISP interrupts.
177 * @isp: OMAP3 ISP device
179 static void isp_disable_interrupts(struct isp_device *isp)
181 isp_reg_writel(isp, 0, OMAP3_ISP_IOMEM_MAIN, ISP_IRQ0ENABLE);
185 * isp_set_xclk - Configures the specified cam_xclk to the desired frequency.
186 * @isp: OMAP3 ISP device
187 * @xclk: Desired frequency of the clock in Hz. 0 = stable low, 1 is stable high
188 * @xclksel: XCLK to configure (0 = A, 1 = B).
190 * Configures the specified MCLK divisor in the ISP timing control register
191 * (TCTRL_CTRL) to generate the desired xclk clock value.
193 * Divisor = cam_mclk_hz / xclk
195 * Returns the final frequency that is actually being generated
197 static u32 isp_set_xclk(struct isp_device *isp, u32 xclk, u8 xclksel)
201 unsigned long mclk_hz;
203 if (!omap3isp_get(isp))
206 mclk_hz = clk_get_rate(isp->clock[ISP_CLK_CAM_MCLK]);
208 if (xclk >= mclk_hz) {
209 divisor = ISPTCTRL_CTRL_DIV_BYPASS;
210 currentxclk = mclk_hz;
211 } else if (xclk >= 2) {
212 divisor = mclk_hz / xclk;
213 if (divisor >= ISPTCTRL_CTRL_DIV_BYPASS)
214 divisor = ISPTCTRL_CTRL_DIV_BYPASS - 1;
215 currentxclk = mclk_hz / divisor;
223 isp_reg_clr_set(isp, OMAP3_ISP_IOMEM_MAIN, ISP_TCTRL_CTRL,
224 ISPTCTRL_CTRL_DIVA_MASK,
225 divisor << ISPTCTRL_CTRL_DIVA_SHIFT);
226 dev_dbg(isp->dev, "isp_set_xclk(): cam_xclka set to %d Hz\n",
230 isp_reg_clr_set(isp, OMAP3_ISP_IOMEM_MAIN, ISP_TCTRL_CTRL,
231 ISPTCTRL_CTRL_DIVB_MASK,
232 divisor << ISPTCTRL_CTRL_DIVB_SHIFT);
233 dev_dbg(isp->dev, "isp_set_xclk(): cam_xclkb set to %d Hz\n",
239 dev_dbg(isp->dev, "ISP_ERR: isp_set_xclk(): Invalid requested "
240 "xclk. Must be 0 (A) or 1 (B).\n");
244 /* Do we go from stable whatever to clock? */
245 if (divisor >= 2 && isp->xclk_divisor[xclksel - 1] < 2)
247 /* Stopping the clock. */
248 else if (divisor < 2 && isp->xclk_divisor[xclksel - 1] >= 2)
251 isp->xclk_divisor[xclksel - 1] = divisor;
259 * isp_core_init - ISP core settings
260 * @isp: OMAP3 ISP device
261 * @idle: Consider idle state.
263 * Set the power settings for the ISP and SBL bus and cConfigure the HS/VS
266 * We need to configure the HS/VS interrupt source before interrupts get
267 * enabled, as the sensor might be free-running and the ISP default setting
268 * (HS edge) would put an unnecessary burden on the CPU.
270 static void isp_core_init(struct isp_device *isp, int idle)
273 ((idle ? ISP_SYSCONFIG_MIDLEMODE_SMARTSTANDBY :
274 ISP_SYSCONFIG_MIDLEMODE_FORCESTANDBY) <<
275 ISP_SYSCONFIG_MIDLEMODE_SHIFT) |
276 ((isp->revision == ISP_REVISION_15_0) ?
277 ISP_SYSCONFIG_AUTOIDLE : 0),
278 OMAP3_ISP_IOMEM_MAIN, ISP_SYSCONFIG);
281 (isp->autoidle ? ISPCTRL_SBL_AUTOIDLE : 0) |
282 ISPCTRL_SYNC_DETECT_VSRISE,
283 OMAP3_ISP_IOMEM_MAIN, ISP_CTRL);
287 * Configure the bridge and lane shifter. Valid inputs are
289 * CCDC_INPUT_PARALLEL: Parallel interface
290 * CCDC_INPUT_CSI2A: CSI2a receiver
291 * CCDC_INPUT_CCP2B: CCP2b receiver
292 * CCDC_INPUT_CSI2C: CSI2c receiver
294 * The bridge and lane shifter are configured according to the selected input
295 * and the ISP platform data.
297 void omap3isp_configure_bridge(struct isp_device *isp,
298 enum ccdc_input_entity input,
299 const struct isp_parallel_platform_data *pdata,
300 unsigned int shift, unsigned int bridge)
304 ispctrl_val = isp_reg_readl(isp, OMAP3_ISP_IOMEM_MAIN, ISP_CTRL);
305 ispctrl_val &= ~ISPCTRL_SHIFT_MASK;
306 ispctrl_val &= ~ISPCTRL_PAR_CLK_POL_INV;
307 ispctrl_val &= ~ISPCTRL_PAR_SER_CLK_SEL_MASK;
308 ispctrl_val &= ~ISPCTRL_PAR_BRIDGE_MASK;
309 ispctrl_val |= bridge;
312 case CCDC_INPUT_PARALLEL:
313 ispctrl_val |= ISPCTRL_PAR_SER_CLK_SEL_PARALLEL;
314 ispctrl_val |= pdata->clk_pol << ISPCTRL_PAR_CLK_POL_SHIFT;
315 shift += pdata->data_lane_shift * 2;
318 case CCDC_INPUT_CSI2A:
319 ispctrl_val |= ISPCTRL_PAR_SER_CLK_SEL_CSIA;
322 case CCDC_INPUT_CCP2B:
323 ispctrl_val |= ISPCTRL_PAR_SER_CLK_SEL_CSIB;
326 case CCDC_INPUT_CSI2C:
327 ispctrl_val |= ISPCTRL_PAR_SER_CLK_SEL_CSIC;
334 ispctrl_val |= ((shift/2) << ISPCTRL_SHIFT_SHIFT) & ISPCTRL_SHIFT_MASK;
336 isp_reg_writel(isp, ispctrl_val, OMAP3_ISP_IOMEM_MAIN, ISP_CTRL);
339 void omap3isp_hist_dma_done(struct isp_device *isp)
341 if (omap3isp_ccdc_busy(&isp->isp_ccdc) ||
342 omap3isp_stat_pcr_busy(&isp->isp_hist)) {
343 /* Histogram cannot be enabled in this frame anymore */
344 atomic_set(&isp->isp_hist.buf_err, 1);
345 dev_dbg(isp->dev, "hist: Out of synchronization with "
346 "CCDC. Ignoring next buffer.\n");
350 static inline void isp_isr_dbg(struct isp_device *isp, u32 irqstatus)
352 static const char *name[] = {
371 "CCDC_LSC_PREFETCH_COMPLETED",
372 "CCDC_LSC_PREFETCH_ERROR",
388 dev_dbg(isp->dev, "ISP IRQ: ");
390 for (i = 0; i < ARRAY_SIZE(name); i++) {
391 if ((1 << i) & irqstatus)
392 printk(KERN_CONT "%s ", name[i]);
394 printk(KERN_CONT "\n");
397 static void isp_isr_sbl(struct isp_device *isp)
399 struct device *dev = isp->dev;
400 struct isp_pipeline *pipe;
404 * Handle shared buffer logic overflows for video buffers.
405 * ISPSBL_PCR_CCDCPRV_2_RSZ_OVF can be safely ignored.
407 sbl_pcr = isp_reg_readl(isp, OMAP3_ISP_IOMEM_SBL, ISPSBL_PCR);
408 isp_reg_writel(isp, sbl_pcr, OMAP3_ISP_IOMEM_SBL, ISPSBL_PCR);
409 sbl_pcr &= ~ISPSBL_PCR_CCDCPRV_2_RSZ_OVF;
412 dev_dbg(dev, "SBL overflow (PCR = 0x%08x)\n", sbl_pcr);
414 if (sbl_pcr & ISPSBL_PCR_CSIB_WBL_OVF) {
415 pipe = to_isp_pipeline(&isp->isp_ccp2.subdev.entity);
420 if (sbl_pcr & ISPSBL_PCR_CSIA_WBL_OVF) {
421 pipe = to_isp_pipeline(&isp->isp_csi2a.subdev.entity);
426 if (sbl_pcr & ISPSBL_PCR_CCDC_WBL_OVF) {
427 pipe = to_isp_pipeline(&isp->isp_ccdc.subdev.entity);
432 if (sbl_pcr & ISPSBL_PCR_PRV_WBL_OVF) {
433 pipe = to_isp_pipeline(&isp->isp_prev.subdev.entity);
438 if (sbl_pcr & (ISPSBL_PCR_RSZ1_WBL_OVF
439 | ISPSBL_PCR_RSZ2_WBL_OVF
440 | ISPSBL_PCR_RSZ3_WBL_OVF
441 | ISPSBL_PCR_RSZ4_WBL_OVF)) {
442 pipe = to_isp_pipeline(&isp->isp_res.subdev.entity);
447 if (sbl_pcr & ISPSBL_PCR_H3A_AF_WBL_OVF)
448 omap3isp_stat_sbl_overflow(&isp->isp_af);
450 if (sbl_pcr & ISPSBL_PCR_H3A_AEAWB_WBL_OVF)
451 omap3isp_stat_sbl_overflow(&isp->isp_aewb);
455 * isp_isr - Interrupt Service Routine for Camera ISP module.
456 * @irq: Not used currently.
457 * @_isp: Pointer to the OMAP3 ISP device
459 * Handles the corresponding callback if plugged in.
461 * Returns IRQ_HANDLED when IRQ was correctly handled, or IRQ_NONE when the
462 * IRQ wasn't handled.
464 static irqreturn_t isp_isr(int irq, void *_isp)
466 static const u32 ccdc_events = IRQ0STATUS_CCDC_LSC_PREF_ERR_IRQ |
467 IRQ0STATUS_CCDC_LSC_DONE_IRQ |
468 IRQ0STATUS_CCDC_VD0_IRQ |
469 IRQ0STATUS_CCDC_VD1_IRQ |
470 IRQ0STATUS_HS_VS_IRQ;
471 struct isp_device *isp = _isp;
474 irqstatus = isp_reg_readl(isp, OMAP3_ISP_IOMEM_MAIN, ISP_IRQ0STATUS);
475 isp_reg_writel(isp, irqstatus, OMAP3_ISP_IOMEM_MAIN, ISP_IRQ0STATUS);
479 if (irqstatus & IRQ0STATUS_CSIA_IRQ)
480 omap3isp_csi2_isr(&isp->isp_csi2a);
482 if (irqstatus & IRQ0STATUS_CSIB_IRQ)
483 omap3isp_ccp2_isr(&isp->isp_ccp2);
485 if (irqstatus & IRQ0STATUS_CCDC_VD0_IRQ) {
486 if (isp->isp_ccdc.output & CCDC_OUTPUT_PREVIEW)
487 omap3isp_preview_isr_frame_sync(&isp->isp_prev);
488 if (isp->isp_ccdc.output & CCDC_OUTPUT_RESIZER)
489 omap3isp_resizer_isr_frame_sync(&isp->isp_res);
490 omap3isp_stat_isr_frame_sync(&isp->isp_aewb);
491 omap3isp_stat_isr_frame_sync(&isp->isp_af);
492 omap3isp_stat_isr_frame_sync(&isp->isp_hist);
495 if (irqstatus & ccdc_events)
496 omap3isp_ccdc_isr(&isp->isp_ccdc, irqstatus & ccdc_events);
498 if (irqstatus & IRQ0STATUS_PRV_DONE_IRQ) {
499 if (isp->isp_prev.output & PREVIEW_OUTPUT_RESIZER)
500 omap3isp_resizer_isr_frame_sync(&isp->isp_res);
501 omap3isp_preview_isr(&isp->isp_prev);
504 if (irqstatus & IRQ0STATUS_RSZ_DONE_IRQ)
505 omap3isp_resizer_isr(&isp->isp_res);
507 if (irqstatus & IRQ0STATUS_H3A_AWB_DONE_IRQ)
508 omap3isp_stat_isr(&isp->isp_aewb);
510 if (irqstatus & IRQ0STATUS_H3A_AF_DONE_IRQ)
511 omap3isp_stat_isr(&isp->isp_af);
513 if (irqstatus & IRQ0STATUS_HIST_DONE_IRQ)
514 omap3isp_stat_isr(&isp->isp_hist);
518 #if defined(DEBUG) && defined(ISP_ISR_DEBUG)
519 isp_isr_dbg(isp, irqstatus);
525 /* -----------------------------------------------------------------------------
526 * Pipeline power management
528 * Entities must be powered up when part of a pipeline that contains at least
529 * one open video device node.
531 * To achieve this use the entity use_count field to track the number of users.
532 * For entities corresponding to video device nodes the use_count field stores
533 * the users count of the node. For entities corresponding to subdevs the
534 * use_count field stores the total number of users of all video device nodes
537 * The omap3isp_pipeline_pm_use() function must be called in the open() and
538 * close() handlers of video device nodes. It increments or decrements the use
539 * count of all subdev entities in the pipeline.
541 * To react to link management on powered pipelines, the link setup notification
542 * callback updates the use count of all entities in the source and sink sides
547 * isp_pipeline_pm_use_count - Count the number of users of a pipeline
548 * @entity: The entity
550 * Return the total number of users of all video device nodes in the pipeline.
552 static int isp_pipeline_pm_use_count(struct media_entity *entity)
554 struct media_entity_graph graph;
557 media_entity_graph_walk_start(&graph, entity);
559 while ((entity = media_entity_graph_walk_next(&graph))) {
560 if (media_entity_type(entity) == MEDIA_ENT_T_DEVNODE)
561 use += entity->use_count;
568 * isp_pipeline_pm_power_one - Apply power change to an entity
569 * @entity: The entity
570 * @change: Use count change
572 * Change the entity use count by @change. If the entity is a subdev update its
573 * power state by calling the core::s_power operation when the use count goes
574 * from 0 to != 0 or from != 0 to 0.
576 * Return 0 on success or a negative error code on failure.
578 static int isp_pipeline_pm_power_one(struct media_entity *entity, int change)
580 struct v4l2_subdev *subdev;
583 subdev = media_entity_type(entity) == MEDIA_ENT_T_V4L2_SUBDEV
584 ? media_entity_to_v4l2_subdev(entity) : NULL;
586 if (entity->use_count == 0 && change > 0 && subdev != NULL) {
587 ret = v4l2_subdev_call(subdev, core, s_power, 1);
588 if (ret < 0 && ret != -ENOIOCTLCMD)
592 entity->use_count += change;
593 WARN_ON(entity->use_count < 0);
595 if (entity->use_count == 0 && change < 0 && subdev != NULL)
596 v4l2_subdev_call(subdev, core, s_power, 0);
602 * isp_pipeline_pm_power - Apply power change to all entities in a pipeline
603 * @entity: The entity
604 * @change: Use count change
606 * Walk the pipeline to update the use count and the power state of all non-node
609 * Return 0 on success or a negative error code on failure.
611 static int isp_pipeline_pm_power(struct media_entity *entity, int change)
613 struct media_entity_graph graph;
614 struct media_entity *first = entity;
620 media_entity_graph_walk_start(&graph, entity);
622 while (!ret && (entity = media_entity_graph_walk_next(&graph)))
623 if (media_entity_type(entity) != MEDIA_ENT_T_DEVNODE)
624 ret = isp_pipeline_pm_power_one(entity, change);
629 media_entity_graph_walk_start(&graph, first);
631 while ((first = media_entity_graph_walk_next(&graph))
633 if (media_entity_type(first) != MEDIA_ENT_T_DEVNODE)
634 isp_pipeline_pm_power_one(first, -change);
640 * omap3isp_pipeline_pm_use - Update the use count of an entity
641 * @entity: The entity
642 * @use: Use (1) or stop using (0) the entity
644 * Update the use count of all entities in the pipeline and power entities on or
647 * Return 0 on success or a negative error code on failure. Powering entities
648 * off is assumed to never fail. No failure can occur when the use parameter is
651 int omap3isp_pipeline_pm_use(struct media_entity *entity, int use)
653 int change = use ? 1 : -1;
656 mutex_lock(&entity->parent->graph_mutex);
658 /* Apply use count to node. */
659 entity->use_count += change;
660 WARN_ON(entity->use_count < 0);
662 /* Apply power change to connected non-nodes. */
663 ret = isp_pipeline_pm_power(entity, change);
665 entity->use_count -= change;
667 mutex_unlock(&entity->parent->graph_mutex);
673 * isp_pipeline_link_notify - Link management notification callback
674 * @source: Pad at the start of the link
675 * @sink: Pad at the end of the link
676 * @flags: New link flags that will be applied
678 * React to link management on powered pipelines by updating the use count of
679 * all entities in the source and sink sides of the link. Entities are powered
680 * on or off accordingly.
682 * Return 0 on success or a negative error code on failure. Powering entities
683 * off is assumed to never fail. This function will not fail for disconnection
686 static int isp_pipeline_link_notify(struct media_pad *source,
687 struct media_pad *sink, u32 flags)
689 int source_use = isp_pipeline_pm_use_count(source->entity);
690 int sink_use = isp_pipeline_pm_use_count(sink->entity);
693 if (!(flags & MEDIA_LNK_FL_ENABLED)) {
694 /* Powering off entities is assumed to never fail. */
695 isp_pipeline_pm_power(source->entity, -sink_use);
696 isp_pipeline_pm_power(sink->entity, -source_use);
700 ret = isp_pipeline_pm_power(source->entity, sink_use);
704 ret = isp_pipeline_pm_power(sink->entity, source_use);
706 isp_pipeline_pm_power(source->entity, -sink_use);
711 /* -----------------------------------------------------------------------------
712 * Pipeline stream management
716 * isp_pipeline_enable - Enable streaming on a pipeline
717 * @pipe: ISP pipeline
718 * @mode: Stream mode (single shot or continuous)
720 * Walk the entities chain starting at the pipeline output video node and start
721 * all modules in the chain in the given mode.
723 * Return 0 if successful, or the return value of the failed video::s_stream
724 * operation otherwise.
726 static int isp_pipeline_enable(struct isp_pipeline *pipe,
727 enum isp_pipeline_stream_state mode)
729 struct isp_device *isp = pipe->output->isp;
730 struct media_entity *entity;
731 struct media_pad *pad;
732 struct v4l2_subdev *subdev;
736 /* If the preview engine crashed it might not respond to read/write
737 * operations on the L4 bus. This would result in a bus fault and a
738 * kernel oops. Refuse to start streaming in that case. This check must
739 * be performed before the loop below to avoid starting entities if the
740 * pipeline won't start anyway (those entities would then likely fail to
741 * stop, making the problem worse).
743 if ((pipe->entities & isp->crashed) &
744 (1U << isp->isp_prev.subdev.entity.id))
747 spin_lock_irqsave(&pipe->lock, flags);
748 pipe->state &= ~(ISP_PIPELINE_IDLE_INPUT | ISP_PIPELINE_IDLE_OUTPUT);
749 spin_unlock_irqrestore(&pipe->lock, flags);
751 pipe->do_propagation = false;
753 entity = &pipe->output->video.entity;
755 pad = &entity->pads[0];
756 if (!(pad->flags & MEDIA_PAD_FL_SINK))
759 pad = media_entity_remote_source(pad);
761 media_entity_type(pad->entity) != MEDIA_ENT_T_V4L2_SUBDEV)
764 entity = pad->entity;
765 subdev = media_entity_to_v4l2_subdev(entity);
767 ret = v4l2_subdev_call(subdev, video, s_stream, mode);
768 if (ret < 0 && ret != -ENOIOCTLCMD)
771 if (subdev == &isp->isp_ccdc.subdev) {
772 v4l2_subdev_call(&isp->isp_aewb.subdev, video,
774 v4l2_subdev_call(&isp->isp_af.subdev, video,
776 v4l2_subdev_call(&isp->isp_hist.subdev, video,
778 pipe->do_propagation = true;
785 static int isp_pipeline_wait_resizer(struct isp_device *isp)
787 return omap3isp_resizer_busy(&isp->isp_res);
790 static int isp_pipeline_wait_preview(struct isp_device *isp)
792 return omap3isp_preview_busy(&isp->isp_prev);
795 static int isp_pipeline_wait_ccdc(struct isp_device *isp)
797 return omap3isp_stat_busy(&isp->isp_af)
798 || omap3isp_stat_busy(&isp->isp_aewb)
799 || omap3isp_stat_busy(&isp->isp_hist)
800 || omap3isp_ccdc_busy(&isp->isp_ccdc);
803 #define ISP_STOP_TIMEOUT msecs_to_jiffies(1000)
805 static int isp_pipeline_wait(struct isp_device *isp,
806 int(*busy)(struct isp_device *isp))
808 unsigned long timeout = jiffies + ISP_STOP_TIMEOUT;
810 while (!time_after(jiffies, timeout)) {
819 * isp_pipeline_disable - Disable streaming on a pipeline
820 * @pipe: ISP pipeline
822 * Walk the entities chain starting at the pipeline output video node and stop
823 * all modules in the chain. Wait synchronously for the modules to be stopped if
826 * Return 0 if all modules have been properly stopped, or -ETIMEDOUT if a module
827 * can't be stopped (in which case a software reset of the ISP is probably
830 static int isp_pipeline_disable(struct isp_pipeline *pipe)
832 struct isp_device *isp = pipe->output->isp;
833 struct media_entity *entity;
834 struct media_pad *pad;
835 struct v4l2_subdev *subdev;
840 * We need to stop all the modules after CCDC first or they'll
841 * never stop since they may not get a full frame from CCDC.
843 entity = &pipe->output->video.entity;
845 pad = &entity->pads[0];
846 if (!(pad->flags & MEDIA_PAD_FL_SINK))
849 pad = media_entity_remote_source(pad);
851 media_entity_type(pad->entity) != MEDIA_ENT_T_V4L2_SUBDEV)
854 entity = pad->entity;
855 subdev = media_entity_to_v4l2_subdev(entity);
857 if (subdev == &isp->isp_ccdc.subdev) {
858 v4l2_subdev_call(&isp->isp_aewb.subdev,
860 v4l2_subdev_call(&isp->isp_af.subdev,
862 v4l2_subdev_call(&isp->isp_hist.subdev,
866 v4l2_subdev_call(subdev, video, s_stream, 0);
868 if (subdev == &isp->isp_res.subdev)
869 ret = isp_pipeline_wait(isp, isp_pipeline_wait_resizer);
870 else if (subdev == &isp->isp_prev.subdev)
871 ret = isp_pipeline_wait(isp, isp_pipeline_wait_preview);
872 else if (subdev == &isp->isp_ccdc.subdev)
873 ret = isp_pipeline_wait(isp, isp_pipeline_wait_ccdc);
878 dev_info(isp->dev, "Unable to stop %s\n", subdev->name);
879 /* If the entity failed to stopped, assume it has
880 * crashed. Mark it as such, the ISP will be reset when
881 * applications will release it.
883 isp->crashed |= 1U << subdev->entity.id;
884 failure = -ETIMEDOUT;
892 * omap3isp_pipeline_set_stream - Enable/disable streaming on a pipeline
893 * @pipe: ISP pipeline
894 * @state: Stream state (stopped, single shot or continuous)
896 * Set the pipeline to the given stream state. Pipelines can be started in
897 * single-shot or continuous mode.
899 * Return 0 if successful, or the return value of the failed video::s_stream
900 * operation otherwise. The pipeline state is not updated when the operation
901 * fails, except when stopping the pipeline.
903 int omap3isp_pipeline_set_stream(struct isp_pipeline *pipe,
904 enum isp_pipeline_stream_state state)
908 if (state == ISP_PIPELINE_STREAM_STOPPED)
909 ret = isp_pipeline_disable(pipe);
911 ret = isp_pipeline_enable(pipe, state);
913 if (ret == 0 || state == ISP_PIPELINE_STREAM_STOPPED)
914 pipe->stream_state = state;
920 * isp_pipeline_resume - Resume streaming on a pipeline
921 * @pipe: ISP pipeline
923 * Resume video output and input and re-enable pipeline.
925 static void isp_pipeline_resume(struct isp_pipeline *pipe)
927 int singleshot = pipe->stream_state == ISP_PIPELINE_STREAM_SINGLESHOT;
929 omap3isp_video_resume(pipe->output, !singleshot);
931 omap3isp_video_resume(pipe->input, 0);
932 isp_pipeline_enable(pipe, pipe->stream_state);
936 * isp_pipeline_suspend - Suspend streaming on a pipeline
937 * @pipe: ISP pipeline
941 static void isp_pipeline_suspend(struct isp_pipeline *pipe)
943 isp_pipeline_disable(pipe);
947 * isp_pipeline_is_last - Verify if entity has an enabled link to the output
949 * @me: ISP module's media entity
951 * Returns 1 if the entity has an enabled link to the output video node or 0
952 * otherwise. It's true only while pipeline can have no more than one output
955 static int isp_pipeline_is_last(struct media_entity *me)
957 struct isp_pipeline *pipe;
958 struct media_pad *pad;
962 pipe = to_isp_pipeline(me);
963 if (pipe->stream_state == ISP_PIPELINE_STREAM_STOPPED)
965 pad = media_entity_remote_source(&pipe->output->pad);
966 return pad->entity == me;
970 * isp_suspend_module_pipeline - Suspend pipeline to which belongs the module
971 * @me: ISP module's media entity
973 * Suspend the whole pipeline if module's entity has an enabled link to the
974 * output video node. It works only while pipeline can have no more than one
977 static void isp_suspend_module_pipeline(struct media_entity *me)
979 if (isp_pipeline_is_last(me))
980 isp_pipeline_suspend(to_isp_pipeline(me));
984 * isp_resume_module_pipeline - Resume pipeline to which belongs the module
985 * @me: ISP module's media entity
987 * Resume the whole pipeline if module's entity has an enabled link to the
988 * output video node. It works only while pipeline can have no more than one
991 static void isp_resume_module_pipeline(struct media_entity *me)
993 if (isp_pipeline_is_last(me))
994 isp_pipeline_resume(to_isp_pipeline(me));
998 * isp_suspend_modules - Suspend ISP submodules.
999 * @isp: OMAP3 ISP device
1001 * Returns 0 if suspend left in idle state all the submodules properly,
1002 * or returns 1 if a general Reset is required to suspend the submodules.
1004 static int isp_suspend_modules(struct isp_device *isp)
1006 unsigned long timeout;
1008 omap3isp_stat_suspend(&isp->isp_aewb);
1009 omap3isp_stat_suspend(&isp->isp_af);
1010 omap3isp_stat_suspend(&isp->isp_hist);
1011 isp_suspend_module_pipeline(&isp->isp_res.subdev.entity);
1012 isp_suspend_module_pipeline(&isp->isp_prev.subdev.entity);
1013 isp_suspend_module_pipeline(&isp->isp_ccdc.subdev.entity);
1014 isp_suspend_module_pipeline(&isp->isp_csi2a.subdev.entity);
1015 isp_suspend_module_pipeline(&isp->isp_ccp2.subdev.entity);
1017 timeout = jiffies + ISP_STOP_TIMEOUT;
1018 while (omap3isp_stat_busy(&isp->isp_af)
1019 || omap3isp_stat_busy(&isp->isp_aewb)
1020 || omap3isp_stat_busy(&isp->isp_hist)
1021 || omap3isp_preview_busy(&isp->isp_prev)
1022 || omap3isp_resizer_busy(&isp->isp_res)
1023 || omap3isp_ccdc_busy(&isp->isp_ccdc)) {
1024 if (time_after(jiffies, timeout)) {
1025 dev_info(isp->dev, "can't stop modules.\n");
1035 * isp_resume_modules - Resume ISP submodules.
1036 * @isp: OMAP3 ISP device
1038 static void isp_resume_modules(struct isp_device *isp)
1040 omap3isp_stat_resume(&isp->isp_aewb);
1041 omap3isp_stat_resume(&isp->isp_af);
1042 omap3isp_stat_resume(&isp->isp_hist);
1043 isp_resume_module_pipeline(&isp->isp_res.subdev.entity);
1044 isp_resume_module_pipeline(&isp->isp_prev.subdev.entity);
1045 isp_resume_module_pipeline(&isp->isp_ccdc.subdev.entity);
1046 isp_resume_module_pipeline(&isp->isp_csi2a.subdev.entity);
1047 isp_resume_module_pipeline(&isp->isp_ccp2.subdev.entity);
1051 * isp_reset - Reset ISP with a timeout wait for idle.
1052 * @isp: OMAP3 ISP device
1054 static int isp_reset(struct isp_device *isp)
1056 unsigned long timeout = 0;
1059 isp_reg_readl(isp, OMAP3_ISP_IOMEM_MAIN, ISP_SYSCONFIG)
1060 | ISP_SYSCONFIG_SOFTRESET,
1061 OMAP3_ISP_IOMEM_MAIN, ISP_SYSCONFIG);
1062 while (!(isp_reg_readl(isp, OMAP3_ISP_IOMEM_MAIN,
1063 ISP_SYSSTATUS) & 0x1)) {
1064 if (timeout++ > 10000) {
1065 dev_alert(isp->dev, "cannot reset ISP\n");
1076 * isp_save_context - Saves the values of the ISP module registers.
1077 * @isp: OMAP3 ISP device
1078 * @reg_list: Structure containing pairs of register address and value to
1082 isp_save_context(struct isp_device *isp, struct isp_reg *reg_list)
1084 struct isp_reg *next = reg_list;
1086 for (; next->reg != ISP_TOK_TERM; next++)
1087 next->val = isp_reg_readl(isp, next->mmio_range, next->reg);
1091 * isp_restore_context - Restores the values of the ISP module registers.
1092 * @isp: OMAP3 ISP device
1093 * @reg_list: Structure containing pairs of register address and value to
1097 isp_restore_context(struct isp_device *isp, struct isp_reg *reg_list)
1099 struct isp_reg *next = reg_list;
1101 for (; next->reg != ISP_TOK_TERM; next++)
1102 isp_reg_writel(isp, next->val, next->mmio_range, next->reg);
1106 * isp_save_ctx - Saves ISP, CCDC, HIST, H3A, PREV, RESZ & MMU context.
1107 * @isp: OMAP3 ISP device
1109 * Routine for saving the context of each module in the ISP.
1110 * CCDC, HIST, H3A, PREV, RESZ and MMU.
1112 static void isp_save_ctx(struct isp_device *isp)
1114 isp_save_context(isp, isp_reg_list);
1115 omap_iommu_save_ctx(isp->dev);
1119 * isp_restore_ctx - Restores ISP, CCDC, HIST, H3A, PREV, RESZ & MMU context.
1120 * @isp: OMAP3 ISP device
1122 * Routine for restoring the context of each module in the ISP.
1123 * CCDC, HIST, H3A, PREV, RESZ and MMU.
1125 static void isp_restore_ctx(struct isp_device *isp)
1127 isp_restore_context(isp, isp_reg_list);
1128 omap_iommu_restore_ctx(isp->dev);
1129 omap3isp_ccdc_restore_context(isp);
1130 omap3isp_preview_restore_context(isp);
1133 /* -----------------------------------------------------------------------------
1134 * SBL resources management
1136 #define OMAP3_ISP_SBL_READ (OMAP3_ISP_SBL_CSI1_READ | \
1137 OMAP3_ISP_SBL_CCDC_LSC_READ | \
1138 OMAP3_ISP_SBL_PREVIEW_READ | \
1139 OMAP3_ISP_SBL_RESIZER_READ)
1140 #define OMAP3_ISP_SBL_WRITE (OMAP3_ISP_SBL_CSI1_WRITE | \
1141 OMAP3_ISP_SBL_CSI2A_WRITE | \
1142 OMAP3_ISP_SBL_CSI2C_WRITE | \
1143 OMAP3_ISP_SBL_CCDC_WRITE | \
1144 OMAP3_ISP_SBL_PREVIEW_WRITE)
1146 void omap3isp_sbl_enable(struct isp_device *isp, enum isp_sbl_resource res)
1150 isp->sbl_resources |= res;
1152 if (isp->sbl_resources & OMAP3_ISP_SBL_CSI1_READ)
1153 sbl |= ISPCTRL_SBL_SHARED_RPORTA;
1155 if (isp->sbl_resources & OMAP3_ISP_SBL_CCDC_LSC_READ)
1156 sbl |= ISPCTRL_SBL_SHARED_RPORTB;
1158 if (isp->sbl_resources & OMAP3_ISP_SBL_CSI2C_WRITE)
1159 sbl |= ISPCTRL_SBL_SHARED_WPORTC;
1161 if (isp->sbl_resources & OMAP3_ISP_SBL_RESIZER_WRITE)
1162 sbl |= ISPCTRL_SBL_WR0_RAM_EN;
1164 if (isp->sbl_resources & OMAP3_ISP_SBL_WRITE)
1165 sbl |= ISPCTRL_SBL_WR1_RAM_EN;
1167 if (isp->sbl_resources & OMAP3_ISP_SBL_READ)
1168 sbl |= ISPCTRL_SBL_RD_RAM_EN;
1170 isp_reg_set(isp, OMAP3_ISP_IOMEM_MAIN, ISP_CTRL, sbl);
1173 void omap3isp_sbl_disable(struct isp_device *isp, enum isp_sbl_resource res)
1177 isp->sbl_resources &= ~res;
1179 if (!(isp->sbl_resources & OMAP3_ISP_SBL_CSI1_READ))
1180 sbl |= ISPCTRL_SBL_SHARED_RPORTA;
1182 if (!(isp->sbl_resources & OMAP3_ISP_SBL_CCDC_LSC_READ))
1183 sbl |= ISPCTRL_SBL_SHARED_RPORTB;
1185 if (!(isp->sbl_resources & OMAP3_ISP_SBL_CSI2C_WRITE))
1186 sbl |= ISPCTRL_SBL_SHARED_WPORTC;
1188 if (!(isp->sbl_resources & OMAP3_ISP_SBL_RESIZER_WRITE))
1189 sbl |= ISPCTRL_SBL_WR0_RAM_EN;
1191 if (!(isp->sbl_resources & OMAP3_ISP_SBL_WRITE))
1192 sbl |= ISPCTRL_SBL_WR1_RAM_EN;
1194 if (!(isp->sbl_resources & OMAP3_ISP_SBL_READ))
1195 sbl |= ISPCTRL_SBL_RD_RAM_EN;
1197 isp_reg_clr(isp, OMAP3_ISP_IOMEM_MAIN, ISP_CTRL, sbl);
1201 * isp_module_sync_idle - Helper to sync module with its idle state
1202 * @me: ISP submodule's media entity
1203 * @wait: ISP submodule's wait queue for streamoff/interrupt synchronization
1204 * @stopping: flag which tells module wants to stop
1206 * This function checks if ISP submodule needs to wait for next interrupt. If
1207 * yes, makes the caller to sleep while waiting for such event.
1209 int omap3isp_module_sync_idle(struct media_entity *me, wait_queue_head_t *wait,
1212 struct isp_pipeline *pipe = to_isp_pipeline(me);
1214 if (pipe->stream_state == ISP_PIPELINE_STREAM_STOPPED ||
1215 (pipe->stream_state == ISP_PIPELINE_STREAM_SINGLESHOT &&
1216 !isp_pipeline_ready(pipe)))
1220 * atomic_set() doesn't include memory barrier on ARM platform for SMP
1221 * scenario. We'll call it here to avoid race conditions.
1223 atomic_set(stopping, 1);
1227 * If module is the last one, it's writing to memory. In this case,
1228 * it's necessary to check if the module is already paused due to
1229 * DMA queue underrun or if it has to wait for next interrupt to be
1231 * If it isn't the last one, the function won't sleep but *stopping
1232 * will still be set to warn next submodule caller's interrupt the
1233 * module wants to be idle.
1235 if (isp_pipeline_is_last(me)) {
1236 struct isp_video *video = pipe->output;
1237 unsigned long flags;
1238 spin_lock_irqsave(&video->queue->irqlock, flags);
1239 if (video->dmaqueue_flags & ISP_VIDEO_DMAQUEUE_UNDERRUN) {
1240 spin_unlock_irqrestore(&video->queue->irqlock, flags);
1241 atomic_set(stopping, 0);
1245 spin_unlock_irqrestore(&video->queue->irqlock, flags);
1246 if (!wait_event_timeout(*wait, !atomic_read(stopping),
1247 msecs_to_jiffies(1000))) {
1248 atomic_set(stopping, 0);
1258 * omap3isp_module_sync_is_stopped - Helper to verify if module was stopping
1259 * @wait: ISP submodule's wait queue for streamoff/interrupt synchronization
1260 * @stopping: flag which tells module wants to stop
1262 * This function checks if ISP submodule was stopping. In case of yes, it
1263 * notices the caller by setting stopping to 0 and waking up the wait queue.
1264 * Returns 1 if it was stopping or 0 otherwise.
1266 int omap3isp_module_sync_is_stopping(wait_queue_head_t *wait,
1269 if (atomic_cmpxchg(stopping, 1, 0)) {
1277 /* --------------------------------------------------------------------------
1281 #define ISPCTRL_CLKS_MASK (ISPCTRL_H3A_CLK_EN | \
1282 ISPCTRL_HIST_CLK_EN | \
1283 ISPCTRL_RSZ_CLK_EN | \
1284 (ISPCTRL_CCDC_CLK_EN | ISPCTRL_CCDC_RAM_EN) | \
1285 (ISPCTRL_PREV_CLK_EN | ISPCTRL_PREV_RAM_EN))
1287 static void __isp_subclk_update(struct isp_device *isp)
1291 /* AEWB and AF share the same clock. */
1292 if (isp->subclk_resources &
1293 (OMAP3_ISP_SUBCLK_AEWB | OMAP3_ISP_SUBCLK_AF))
1294 clk |= ISPCTRL_H3A_CLK_EN;
1296 if (isp->subclk_resources & OMAP3_ISP_SUBCLK_HIST)
1297 clk |= ISPCTRL_HIST_CLK_EN;
1299 if (isp->subclk_resources & OMAP3_ISP_SUBCLK_RESIZER)
1300 clk |= ISPCTRL_RSZ_CLK_EN;
1302 /* NOTE: For CCDC & Preview submodules, we need to affect internal
1305 if (isp->subclk_resources & OMAP3_ISP_SUBCLK_CCDC)
1306 clk |= ISPCTRL_CCDC_CLK_EN | ISPCTRL_CCDC_RAM_EN;
1308 if (isp->subclk_resources & OMAP3_ISP_SUBCLK_PREVIEW)
1309 clk |= ISPCTRL_PREV_CLK_EN | ISPCTRL_PREV_RAM_EN;
1311 isp_reg_clr_set(isp, OMAP3_ISP_IOMEM_MAIN, ISP_CTRL,
1312 ISPCTRL_CLKS_MASK, clk);
1315 void omap3isp_subclk_enable(struct isp_device *isp,
1316 enum isp_subclk_resource res)
1318 isp->subclk_resources |= res;
1320 __isp_subclk_update(isp);
1323 void omap3isp_subclk_disable(struct isp_device *isp,
1324 enum isp_subclk_resource res)
1326 isp->subclk_resources &= ~res;
1328 __isp_subclk_update(isp);
1332 * isp_enable_clocks - Enable ISP clocks
1333 * @isp: OMAP3 ISP device
1335 * Return 0 if successful, or clk_enable return value if any of tthem fails.
1337 static int isp_enable_clocks(struct isp_device *isp)
1344 * cam_mclk clock chain:
1345 * dpll4 -> dpll4_m5 -> dpll4_m5x2 -> cam_mclk
1347 * In OMAP3630 dpll4_m5x2 != 2 x dpll4_m5 but both are
1348 * set to the same value. Hence the rate set for dpll4_m5
1349 * has to be twice of what is set on OMAP3430 to get
1350 * the required value for cam_mclk
1352 if (cpu_is_omap3630())
1357 r = clk_enable(isp->clock[ISP_CLK_CAM_ICK]);
1359 dev_err(isp->dev, "clk_enable cam_ick failed\n");
1360 goto out_clk_enable_ick;
1362 r = clk_set_rate(isp->clock[ISP_CLK_DPLL4_M5_CK],
1363 CM_CAM_MCLK_HZ/divisor);
1365 dev_err(isp->dev, "clk_set_rate for dpll4_m5_ck failed\n");
1366 goto out_clk_enable_mclk;
1368 r = clk_enable(isp->clock[ISP_CLK_CAM_MCLK]);
1370 dev_err(isp->dev, "clk_enable cam_mclk failed\n");
1371 goto out_clk_enable_mclk;
1373 rate = clk_get_rate(isp->clock[ISP_CLK_CAM_MCLK]);
1374 if (rate != CM_CAM_MCLK_HZ)
1375 dev_warn(isp->dev, "unexpected cam_mclk rate:\n"
1377 " actual : %ld\n", CM_CAM_MCLK_HZ, rate);
1378 r = clk_enable(isp->clock[ISP_CLK_CSI2_FCK]);
1380 dev_err(isp->dev, "clk_enable csi2_fck failed\n");
1381 goto out_clk_enable_csi2_fclk;
1385 out_clk_enable_csi2_fclk:
1386 clk_disable(isp->clock[ISP_CLK_CAM_MCLK]);
1387 out_clk_enable_mclk:
1388 clk_disable(isp->clock[ISP_CLK_CAM_ICK]);
1394 * isp_disable_clocks - Disable ISP clocks
1395 * @isp: OMAP3 ISP device
1397 static void isp_disable_clocks(struct isp_device *isp)
1399 clk_disable(isp->clock[ISP_CLK_CAM_ICK]);
1400 clk_disable(isp->clock[ISP_CLK_CAM_MCLK]);
1401 clk_disable(isp->clock[ISP_CLK_CSI2_FCK]);
1404 static const char *isp_clocks[] = {
1412 static void isp_put_clocks(struct isp_device *isp)
1416 for (i = 0; i < ARRAY_SIZE(isp_clocks); ++i) {
1417 if (isp->clock[i]) {
1418 clk_put(isp->clock[i]);
1419 isp->clock[i] = NULL;
1424 static int isp_get_clocks(struct isp_device *isp)
1429 for (i = 0; i < ARRAY_SIZE(isp_clocks); ++i) {
1430 clk = clk_get(isp->dev, isp_clocks[i]);
1432 dev_err(isp->dev, "clk_get %s failed\n", isp_clocks[i]);
1433 isp_put_clocks(isp);
1434 return PTR_ERR(clk);
1437 isp->clock[i] = clk;
1444 * omap3isp_get - Acquire the ISP resource.
1446 * Initializes the clocks for the first acquire.
1448 * Increment the reference count on the ISP. If the first reference is taken,
1449 * enable clocks and power-up all submodules.
1451 * Return a pointer to the ISP device structure, or NULL if an error occurred.
1453 static struct isp_device *__omap3isp_get(struct isp_device *isp, bool irq)
1455 struct isp_device *__isp = isp;
1460 mutex_lock(&isp->isp_mutex);
1461 if (isp->ref_count > 0)
1464 if (isp_enable_clocks(isp) < 0) {
1469 /* We don't want to restore context before saving it! */
1470 if (isp->has_context)
1471 isp_restore_ctx(isp);
1474 isp_enable_interrupts(isp);
1479 mutex_unlock(&isp->isp_mutex);
1484 struct isp_device *omap3isp_get(struct isp_device *isp)
1486 return __omap3isp_get(isp, true);
1490 * omap3isp_put - Release the ISP
1492 * Decrement the reference count on the ISP. If the last reference is released,
1493 * power-down all submodules, disable clocks and free temporary buffers.
1495 void omap3isp_put(struct isp_device *isp)
1500 mutex_lock(&isp->isp_mutex);
1501 BUG_ON(isp->ref_count == 0);
1502 if (--isp->ref_count == 0) {
1503 isp_disable_interrupts(isp);
1506 isp->has_context = 1;
1508 /* Reset the ISP if an entity has failed to stop. This is the
1509 * only way to recover from such conditions.
1513 isp_disable_clocks(isp);
1515 mutex_unlock(&isp->isp_mutex);
1518 /* --------------------------------------------------------------------------
1519 * Platform device driver
1523 * omap3isp_print_status - Prints the values of the ISP Control Module registers
1524 * @isp: OMAP3 ISP device
1526 #define ISP_PRINT_REGISTER(isp, name)\
1527 dev_dbg(isp->dev, "###ISP " #name "=0x%08x\n", \
1528 isp_reg_readl(isp, OMAP3_ISP_IOMEM_MAIN, ISP_##name))
1529 #define SBL_PRINT_REGISTER(isp, name)\
1530 dev_dbg(isp->dev, "###SBL " #name "=0x%08x\n", \
1531 isp_reg_readl(isp, OMAP3_ISP_IOMEM_SBL, ISPSBL_##name))
1533 void omap3isp_print_status(struct isp_device *isp)
1535 dev_dbg(isp->dev, "-------------ISP Register dump--------------\n");
1537 ISP_PRINT_REGISTER(isp, SYSCONFIG);
1538 ISP_PRINT_REGISTER(isp, SYSSTATUS);
1539 ISP_PRINT_REGISTER(isp, IRQ0ENABLE);
1540 ISP_PRINT_REGISTER(isp, IRQ0STATUS);
1541 ISP_PRINT_REGISTER(isp, TCTRL_GRESET_LENGTH);
1542 ISP_PRINT_REGISTER(isp, TCTRL_PSTRB_REPLAY);
1543 ISP_PRINT_REGISTER(isp, CTRL);
1544 ISP_PRINT_REGISTER(isp, TCTRL_CTRL);
1545 ISP_PRINT_REGISTER(isp, TCTRL_FRAME);
1546 ISP_PRINT_REGISTER(isp, TCTRL_PSTRB_DELAY);
1547 ISP_PRINT_REGISTER(isp, TCTRL_STRB_DELAY);
1548 ISP_PRINT_REGISTER(isp, TCTRL_SHUT_DELAY);
1549 ISP_PRINT_REGISTER(isp, TCTRL_PSTRB_LENGTH);
1550 ISP_PRINT_REGISTER(isp, TCTRL_STRB_LENGTH);
1551 ISP_PRINT_REGISTER(isp, TCTRL_SHUT_LENGTH);
1553 SBL_PRINT_REGISTER(isp, PCR);
1554 SBL_PRINT_REGISTER(isp, SDR_REQ_EXP);
1556 dev_dbg(isp->dev, "--------------------------------------------\n");
1562 * Power management support.
1564 * As the ISP can't properly handle an input video stream interruption on a non
1565 * frame boundary, the ISP pipelines need to be stopped before sensors get
1566 * suspended. However, as suspending the sensors can require a running clock,
1567 * which can be provided by the ISP, the ISP can't be completely suspended
1568 * before the sensor.
1570 * To solve this problem power management support is split into prepare/complete
1571 * and suspend/resume operations. The pipelines are stopped in prepare() and the
1572 * ISP clocks get disabled in suspend(). Similarly, the clocks are reenabled in
1573 * resume(), and the the pipelines are restarted in complete().
1575 * TODO: PM dependencies between the ISP and sensors are not modeled explicitly
1578 static int isp_pm_prepare(struct device *dev)
1580 struct isp_device *isp = dev_get_drvdata(dev);
1583 WARN_ON(mutex_is_locked(&isp->isp_mutex));
1585 if (isp->ref_count == 0)
1588 reset = isp_suspend_modules(isp);
1589 isp_disable_interrupts(isp);
1597 static int isp_pm_suspend(struct device *dev)
1599 struct isp_device *isp = dev_get_drvdata(dev);
1601 WARN_ON(mutex_is_locked(&isp->isp_mutex));
1604 isp_disable_clocks(isp);
1609 static int isp_pm_resume(struct device *dev)
1611 struct isp_device *isp = dev_get_drvdata(dev);
1613 if (isp->ref_count == 0)
1616 return isp_enable_clocks(isp);
1619 static void isp_pm_complete(struct device *dev)
1621 struct isp_device *isp = dev_get_drvdata(dev);
1623 if (isp->ref_count == 0)
1626 isp_restore_ctx(isp);
1627 isp_enable_interrupts(isp);
1628 isp_resume_modules(isp);
1633 #define isp_pm_prepare NULL
1634 #define isp_pm_suspend NULL
1635 #define isp_pm_resume NULL
1636 #define isp_pm_complete NULL
1638 #endif /* CONFIG_PM */
1640 static void isp_unregister_entities(struct isp_device *isp)
1642 omap3isp_csi2_unregister_entities(&isp->isp_csi2a);
1643 omap3isp_ccp2_unregister_entities(&isp->isp_ccp2);
1644 omap3isp_ccdc_unregister_entities(&isp->isp_ccdc);
1645 omap3isp_preview_unregister_entities(&isp->isp_prev);
1646 omap3isp_resizer_unregister_entities(&isp->isp_res);
1647 omap3isp_stat_unregister_entities(&isp->isp_aewb);
1648 omap3isp_stat_unregister_entities(&isp->isp_af);
1649 omap3isp_stat_unregister_entities(&isp->isp_hist);
1651 v4l2_device_unregister(&isp->v4l2_dev);
1652 media_device_unregister(&isp->media_dev);
1656 * isp_register_subdev_group - Register a group of subdevices
1657 * @isp: OMAP3 ISP device
1658 * @board_info: I2C subdevs board information array
1660 * Register all I2C subdevices in the board_info array. The array must be
1661 * terminated by a NULL entry, and the first entry must be the sensor.
1663 * Return a pointer to the sensor media entity if it has been successfully
1664 * registered, or NULL otherwise.
1666 static struct v4l2_subdev *
1667 isp_register_subdev_group(struct isp_device *isp,
1668 struct isp_subdev_i2c_board_info *board_info)
1670 struct v4l2_subdev *sensor = NULL;
1673 if (board_info->board_info == NULL)
1676 for (first = 1; board_info->board_info; ++board_info, first = 0) {
1677 struct v4l2_subdev *subdev;
1678 struct i2c_adapter *adapter;
1680 adapter = i2c_get_adapter(board_info->i2c_adapter_id);
1681 if (adapter == NULL) {
1682 printk(KERN_ERR "%s: Unable to get I2C adapter %d for "
1683 "device %s\n", __func__,
1684 board_info->i2c_adapter_id,
1685 board_info->board_info->type);
1689 subdev = v4l2_i2c_new_subdev_board(&isp->v4l2_dev, adapter,
1690 board_info->board_info, NULL);
1691 if (subdev == NULL) {
1692 printk(KERN_ERR "%s: Unable to register subdev %s\n",
1693 __func__, board_info->board_info->type);
1704 static int isp_register_entities(struct isp_device *isp)
1706 struct isp_platform_data *pdata = isp->pdata;
1707 struct isp_v4l2_subdevs_group *subdevs;
1710 isp->media_dev.dev = isp->dev;
1711 strlcpy(isp->media_dev.model, "TI OMAP3 ISP",
1712 sizeof(isp->media_dev.model));
1713 isp->media_dev.hw_revision = isp->revision;
1714 isp->media_dev.link_notify = isp_pipeline_link_notify;
1715 ret = media_device_register(&isp->media_dev);
1717 printk(KERN_ERR "%s: Media device registration failed (%d)\n",
1722 isp->v4l2_dev.mdev = &isp->media_dev;
1723 ret = v4l2_device_register(isp->dev, &isp->v4l2_dev);
1725 printk(KERN_ERR "%s: V4L2 device registration failed (%d)\n",
1730 /* Register internal entities */
1731 ret = omap3isp_ccp2_register_entities(&isp->isp_ccp2, &isp->v4l2_dev);
1735 ret = omap3isp_csi2_register_entities(&isp->isp_csi2a, &isp->v4l2_dev);
1739 ret = omap3isp_ccdc_register_entities(&isp->isp_ccdc, &isp->v4l2_dev);
1743 ret = omap3isp_preview_register_entities(&isp->isp_prev,
1748 ret = omap3isp_resizer_register_entities(&isp->isp_res, &isp->v4l2_dev);
1752 ret = omap3isp_stat_register_entities(&isp->isp_aewb, &isp->v4l2_dev);
1756 ret = omap3isp_stat_register_entities(&isp->isp_af, &isp->v4l2_dev);
1760 ret = omap3isp_stat_register_entities(&isp->isp_hist, &isp->v4l2_dev);
1764 /* Register external entities */
1765 for (subdevs = pdata->subdevs; subdevs && subdevs->subdevs; ++subdevs) {
1766 struct v4l2_subdev *sensor;
1767 struct media_entity *input;
1772 sensor = isp_register_subdev_group(isp, subdevs->subdevs);
1776 sensor->host_priv = subdevs;
1778 /* Connect the sensor to the correct interface module. Parallel
1779 * sensors are connected directly to the CCDC, while serial
1780 * sensors are connected to the CSI2a, CCP2b or CSI2c receiver
1781 * through CSIPHY1 or CSIPHY2.
1783 switch (subdevs->interface) {
1784 case ISP_INTERFACE_PARALLEL:
1785 input = &isp->isp_ccdc.subdev.entity;
1786 pad = CCDC_PAD_SINK;
1790 case ISP_INTERFACE_CSI2A_PHY2:
1791 input = &isp->isp_csi2a.subdev.entity;
1792 pad = CSI2_PAD_SINK;
1793 flags = MEDIA_LNK_FL_IMMUTABLE
1794 | MEDIA_LNK_FL_ENABLED;
1797 case ISP_INTERFACE_CCP2B_PHY1:
1798 case ISP_INTERFACE_CCP2B_PHY2:
1799 input = &isp->isp_ccp2.subdev.entity;
1800 pad = CCP2_PAD_SINK;
1804 case ISP_INTERFACE_CSI2C_PHY1:
1805 input = &isp->isp_csi2c.subdev.entity;
1806 pad = CSI2_PAD_SINK;
1807 flags = MEDIA_LNK_FL_IMMUTABLE
1808 | MEDIA_LNK_FL_ENABLED;
1812 printk(KERN_ERR "%s: invalid interface type %u\n",
1813 __func__, subdevs->interface);
1818 for (i = 0; i < sensor->entity.num_pads; i++) {
1819 if (sensor->entity.pads[i].flags & MEDIA_PAD_FL_SOURCE)
1822 if (i == sensor->entity.num_pads) {
1824 "%s: no source pad in external entity\n",
1830 ret = media_entity_create_link(&sensor->entity, i, input, pad,
1836 ret = v4l2_device_register_subdev_nodes(&isp->v4l2_dev);
1840 isp_unregister_entities(isp);
1845 static void isp_cleanup_modules(struct isp_device *isp)
1847 omap3isp_h3a_aewb_cleanup(isp);
1848 omap3isp_h3a_af_cleanup(isp);
1849 omap3isp_hist_cleanup(isp);
1850 omap3isp_resizer_cleanup(isp);
1851 omap3isp_preview_cleanup(isp);
1852 omap3isp_ccdc_cleanup(isp);
1853 omap3isp_ccp2_cleanup(isp);
1854 omap3isp_csi2_cleanup(isp);
1857 static int isp_initialize_modules(struct isp_device *isp)
1861 ret = omap3isp_csiphy_init(isp);
1863 dev_err(isp->dev, "CSI PHY initialization failed\n");
1867 ret = omap3isp_csi2_init(isp);
1869 dev_err(isp->dev, "CSI2 initialization failed\n");
1873 ret = omap3isp_ccp2_init(isp);
1875 dev_err(isp->dev, "CCP2 initialization failed\n");
1879 ret = omap3isp_ccdc_init(isp);
1881 dev_err(isp->dev, "CCDC initialization failed\n");
1885 ret = omap3isp_preview_init(isp);
1887 dev_err(isp->dev, "Preview initialization failed\n");
1891 ret = omap3isp_resizer_init(isp);
1893 dev_err(isp->dev, "Resizer initialization failed\n");
1897 ret = omap3isp_hist_init(isp);
1899 dev_err(isp->dev, "Histogram initialization failed\n");
1903 ret = omap3isp_h3a_aewb_init(isp);
1905 dev_err(isp->dev, "H3A AEWB initialization failed\n");
1906 goto error_h3a_aewb;
1909 ret = omap3isp_h3a_af_init(isp);
1911 dev_err(isp->dev, "H3A AF initialization failed\n");
1915 /* Connect the submodules. */
1916 ret = media_entity_create_link(
1917 &isp->isp_csi2a.subdev.entity, CSI2_PAD_SOURCE,
1918 &isp->isp_ccdc.subdev.entity, CCDC_PAD_SINK, 0);
1922 ret = media_entity_create_link(
1923 &isp->isp_ccp2.subdev.entity, CCP2_PAD_SOURCE,
1924 &isp->isp_ccdc.subdev.entity, CCDC_PAD_SINK, 0);
1928 ret = media_entity_create_link(
1929 &isp->isp_ccdc.subdev.entity, CCDC_PAD_SOURCE_VP,
1930 &isp->isp_prev.subdev.entity, PREV_PAD_SINK, 0);
1934 ret = media_entity_create_link(
1935 &isp->isp_ccdc.subdev.entity, CCDC_PAD_SOURCE_OF,
1936 &isp->isp_res.subdev.entity, RESZ_PAD_SINK, 0);
1940 ret = media_entity_create_link(
1941 &isp->isp_prev.subdev.entity, PREV_PAD_SOURCE,
1942 &isp->isp_res.subdev.entity, RESZ_PAD_SINK, 0);
1946 ret = media_entity_create_link(
1947 &isp->isp_ccdc.subdev.entity, CCDC_PAD_SOURCE_VP,
1948 &isp->isp_aewb.subdev.entity, 0,
1949 MEDIA_LNK_FL_ENABLED | MEDIA_LNK_FL_IMMUTABLE);
1953 ret = media_entity_create_link(
1954 &isp->isp_ccdc.subdev.entity, CCDC_PAD_SOURCE_VP,
1955 &isp->isp_af.subdev.entity, 0,
1956 MEDIA_LNK_FL_ENABLED | MEDIA_LNK_FL_IMMUTABLE);
1960 ret = media_entity_create_link(
1961 &isp->isp_ccdc.subdev.entity, CCDC_PAD_SOURCE_VP,
1962 &isp->isp_hist.subdev.entity, 0,
1963 MEDIA_LNK_FL_ENABLED | MEDIA_LNK_FL_IMMUTABLE);
1970 omap3isp_h3a_af_cleanup(isp);
1972 omap3isp_h3a_aewb_cleanup(isp);
1974 omap3isp_hist_cleanup(isp);
1976 omap3isp_resizer_cleanup(isp);
1978 omap3isp_preview_cleanup(isp);
1980 omap3isp_ccdc_cleanup(isp);
1982 omap3isp_ccp2_cleanup(isp);
1984 omap3isp_csi2_cleanup(isp);
1991 * isp_remove - Remove ISP platform device
1992 * @pdev: Pointer to ISP platform device
1996 static int __devexit isp_remove(struct platform_device *pdev)
1998 struct isp_device *isp = platform_get_drvdata(pdev);
2001 isp_unregister_entities(isp);
2002 isp_cleanup_modules(isp);
2004 __omap3isp_get(isp, false);
2005 iommu_detach_device(isp->domain, &pdev->dev);
2006 iommu_domain_free(isp->domain);
2010 free_irq(isp->irq_num, isp);
2011 isp_put_clocks(isp);
2013 for (i = 0; i < OMAP3_ISP_IOMEM_LAST; i++) {
2014 if (isp->mmio_base[i]) {
2015 iounmap(isp->mmio_base[i]);
2016 isp->mmio_base[i] = NULL;
2019 if (isp->mmio_base_phys[i]) {
2020 release_mem_region(isp->mmio_base_phys[i],
2022 isp->mmio_base_phys[i] = 0;
2026 regulator_put(isp->isp_csiphy1.vdd);
2027 regulator_put(isp->isp_csiphy2.vdd);
2033 static int isp_map_mem_resource(struct platform_device *pdev,
2034 struct isp_device *isp,
2035 enum isp_mem_resources res)
2037 struct resource *mem;
2039 /* request the mem region for the camera registers */
2041 mem = platform_get_resource(pdev, IORESOURCE_MEM, res);
2043 dev_err(isp->dev, "no mem resource?\n");
2047 if (!request_mem_region(mem->start, resource_size(mem), pdev->name)) {
2049 "cannot reserve camera register I/O region\n");
2052 isp->mmio_base_phys[res] = mem->start;
2053 isp->mmio_size[res] = resource_size(mem);
2055 /* map the region */
2056 isp->mmio_base[res] = ioremap_nocache(isp->mmio_base_phys[res],
2057 isp->mmio_size[res]);
2058 if (!isp->mmio_base[res]) {
2059 dev_err(isp->dev, "cannot map camera register I/O region\n");
2067 * isp_probe - Probe ISP platform device
2068 * @pdev: Pointer to ISP platform device
2070 * Returns 0 if successful,
2071 * -ENOMEM if no memory available,
2072 * -ENODEV if no platform device resources found
2073 * or no space for remapping registers,
2074 * -EINVAL if couldn't install ISR,
2075 * or clk_get return error value.
2077 static int __devinit isp_probe(struct platform_device *pdev)
2079 struct isp_platform_data *pdata = pdev->dev.platform_data;
2080 struct isp_device *isp;
2087 isp = kzalloc(sizeof(*isp), GFP_KERNEL);
2089 dev_err(&pdev->dev, "could not allocate memory\n");
2093 isp->autoidle = autoidle;
2094 isp->platform_cb.set_xclk = isp_set_xclk;
2096 mutex_init(&isp->isp_mutex);
2097 spin_lock_init(&isp->stat_lock);
2099 isp->dev = &pdev->dev;
2103 isp->raw_dmamask = DMA_BIT_MASK(32);
2104 isp->dev->dma_mask = &isp->raw_dmamask;
2105 isp->dev->coherent_dma_mask = DMA_BIT_MASK(32);
2107 platform_set_drvdata(pdev, isp);
2110 isp->isp_csiphy1.vdd = regulator_get(&pdev->dev, "VDD_CSIPHY1");
2111 isp->isp_csiphy2.vdd = regulator_get(&pdev->dev, "VDD_CSIPHY2");
2114 ret = isp_map_mem_resource(pdev, isp, OMAP3_ISP_IOMEM_MAIN);
2118 ret = isp_get_clocks(isp);
2122 if (__omap3isp_get(isp, false) == NULL) {
2127 ret = isp_reset(isp);
2131 /* Memory resources */
2132 isp->revision = isp_reg_readl(isp, OMAP3_ISP_IOMEM_MAIN, ISP_REVISION);
2133 dev_info(isp->dev, "Revision %d.%d found\n",
2134 (isp->revision & 0xf0) >> 4, isp->revision & 0x0f);
2136 for (m = 0; m < ARRAY_SIZE(isp_res_maps); m++)
2137 if (isp->revision == isp_res_maps[m].isp_rev)
2140 if (m == ARRAY_SIZE(isp_res_maps)) {
2141 dev_err(isp->dev, "No resource map found for ISP rev %d.%d\n",
2142 (isp->revision & 0xf0) >> 4, isp->revision & 0xf);
2147 for (i = 1; i < OMAP3_ISP_IOMEM_LAST; i++) {
2148 if (isp_res_maps[m].map & 1 << i) {
2149 ret = isp_map_mem_resource(pdev, isp, i);
2155 isp->domain = iommu_domain_alloc(pdev->dev.bus);
2157 dev_err(isp->dev, "can't alloc iommu domain\n");
2162 ret = iommu_attach_device(isp->domain, &pdev->dev);
2164 dev_err(&pdev->dev, "can't attach iommu device: %d\n", ret);
2169 isp->irq_num = platform_get_irq(pdev, 0);
2170 if (isp->irq_num <= 0) {
2171 dev_err(isp->dev, "No IRQ resource\n");
2176 if (request_irq(isp->irq_num, isp_isr, IRQF_SHARED, "OMAP3 ISP", isp)) {
2177 dev_err(isp->dev, "Unable to request IRQ\n");
2183 ret = isp_initialize_modules(isp);
2187 ret = isp_register_entities(isp);
2191 isp_core_init(isp, 1);
2197 isp_cleanup_modules(isp);
2199 free_irq(isp->irq_num, isp);
2201 iommu_detach_device(isp->domain, &pdev->dev);
2203 iommu_domain_free(isp->domain);
2207 isp_put_clocks(isp);
2209 for (i = 0; i < OMAP3_ISP_IOMEM_LAST; i++) {
2210 if (isp->mmio_base[i]) {
2211 iounmap(isp->mmio_base[i]);
2212 isp->mmio_base[i] = NULL;
2215 if (isp->mmio_base_phys[i]) {
2216 release_mem_region(isp->mmio_base_phys[i],
2218 isp->mmio_base_phys[i] = 0;
2221 regulator_put(isp->isp_csiphy2.vdd);
2222 regulator_put(isp->isp_csiphy1.vdd);
2223 platform_set_drvdata(pdev, NULL);
2225 mutex_destroy(&isp->isp_mutex);
2231 static const struct dev_pm_ops omap3isp_pm_ops = {
2232 .prepare = isp_pm_prepare,
2233 .suspend = isp_pm_suspend,
2234 .resume = isp_pm_resume,
2235 .complete = isp_pm_complete,
2238 static struct platform_device_id omap3isp_id_table[] = {
2242 MODULE_DEVICE_TABLE(platform, omap3isp_id_table);
2244 static struct platform_driver omap3isp_driver = {
2246 .remove = __devexit_p(isp_remove),
2247 .id_table = omap3isp_id_table,
2249 .owner = THIS_MODULE,
2251 .pm = &omap3isp_pm_ops,
2255 module_platform_driver(omap3isp_driver);
2257 MODULE_AUTHOR("Nokia Corporation");
2258 MODULE_DESCRIPTION("TI OMAP3 ISP driver");
2259 MODULE_LICENSE("GPL");
2260 MODULE_VERSION(ISP_VIDEO_DRIVER_VERSION);