drivers/media/platform/rockchip-rga/rga.c

   1 /*
   2  * Copyright (C) Fuzhou Rockchip Electronics Co.Ltd
   3  * Author: Jacob Chen <jacob-chen@iotwrt.com>
   4  *
   5  * This software is licensed under the terms of the GNU General Public
   6  * License version 2, as published by the Free Software Foundation, and
   7  * may be copied, distributed, and modified under those terms.
   8  *
   9  * This program is distributed in the hope that it will be useful,
  10  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  11  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  12  * GNU General Public License for more details.
  13  */
  14
  15 #include <linux/clk.h>
  16 #include <linux/debugfs.h>
  17 #include <linux/delay.h>
  18 #include <linux/fs.h>
  19 #include <linux/interrupt.h>
  20 #include <linux/module.h>
  21 #include <linux/of.h>
  22 #include <linux/pm_runtime.h>
  23 #include <linux/reset.h>
  24 #include <linux/sched.h>
  25 #include <linux/slab.h>
  26 #include <linux/timer.h>
  27
  28 #include <linux/platform_device.h>
  29 #include <media/v4l2-device.h>
  30 #include <media/v4l2-event.h>
  31 #include <media/v4l2-ioctl.h>
  32 #include <media/v4l2-mem2mem.h>
  33 #include <media/videobuf2-dma-sg.h>
  34 #include <media/videobuf2-v4l2.h>
  35
  36 #include "rga-hw.h"
  37 #include "rga.h"
  38
  39 static void job_abort(void *prv)
  40 {
  41         struct rga_ctx *ctx = prv;
  42         struct rockchip_rga *rga = ctx->rga;
  43
  44         if (!rga->curr) /* No job currently running */
  45                 return;
  46
  47         wait_event_timeout(rga->irq_queue,
  48                            !rga->curr, msecs_to_jiffies(RGA_TIMEOUT));
  49 }
  50
  51 static void device_run(void *prv)
  52 {
  53         struct rga_ctx *ctx = prv;
  54         struct rockchip_rga *rga = ctx->rga;
  55         struct vb2_buffer *src, *dst;
  56         unsigned long flags;
  57
  58         spin_lock_irqsave(&rga->ctrl_lock, flags);
  59
  60         rga->curr = ctx;
  61
  62         src = v4l2_m2m_next_src_buf(ctx->fh.m2m_ctx);
  63         dst = v4l2_m2m_next_dst_buf(ctx->fh.m2m_ctx);
  64
  65         rga_buf_map(src);
  66         rga_buf_map(dst);
  67
  68         rga_cmd_set(ctx);
  69
  70         rga_start(rga);
  71
  72         spin_unlock_irqrestore(&rga->ctrl_lock, flags);
  73 }
  74
  75 static irqreturn_t rga_isr(int irq, void *prv)
  76 {
  77         struct rockchip_rga *rga = prv;
  78         int intr;
  79
  80         intr = rga_read(rga, RGA_INT) & 0xf;
  81
  82         rga_mod(rga, RGA_INT, intr << 4, 0xf << 4);
  83
  84         if (intr & 0x04) {
  85                 struct vb2_v4l2_buffer *src, *dst;
  86                 struct rga_ctx *ctx = rga->curr;
  87
  88                 WARN_ON(!ctx);
  89
  90                 rga->curr = NULL;
  91
  92                 src = v4l2_m2m_src_buf_remove(ctx->fh.m2m_ctx);
  93                 dst = v4l2_m2m_dst_buf_remove(ctx->fh.m2m_ctx);
  94
  95                 WARN_ON(!src);
  96                 WARN_ON(!dst);
  97
  98                 dst->timecode = src->timecode;
  99                 dst->timestamp = src->timestamp;
 100                 dst->flags &= ~V4L2_BUF_FLAG_TSTAMP_SRC_MASK;
 101                 dst->flags |= src->flags & V4L2_BUF_FLAG_TSTAMP_SRC_MASK;
 102
 103                 v4l2_m2m_buf_done(src, VB2_BUF_STATE_DONE);
 104                 v4l2_m2m_buf_done(dst, VB2_BUF_STATE_DONE);
 105                 v4l2_m2m_job_finish(rga->m2m_dev, ctx->fh.m2m_ctx);
 106
 107                 wake_up(&rga->irq_queue);
 108         }
 109
 110         return IRQ_HANDLED;
 111 }
 112
 113 static struct v4l2_m2m_ops rga_m2m_ops = {
 114         .device_run = device_run,
 115         .job_abort = job_abort,
 116 };
 117
 118 static int
 119 queue_init(void *priv, struct vb2_queue *src_vq, struct vb2_queue *dst_vq)
 120 {
 121         struct rga_ctx *ctx = priv;
 122         int ret;
 123
 124         src_vq->type = V4L2_BUF_TYPE_VIDEO_OUTPUT;
 125         src_vq->io_modes = VB2_MMAP | VB2_DMABUF;
 126         src_vq->drv_priv = ctx;
 127         src_vq->ops = &rga_qops;
 128         src_vq->mem_ops = &vb2_dma_sg_memops;
 129         src_vq->buf_struct_size = sizeof(struct v4l2_m2m_buffer);
 130         src_vq->timestamp_flags = V4L2_BUF_FLAG_TIMESTAMP_COPY;
 131         src_vq->lock = &ctx->rga->mutex;
 132
 133         ret = vb2_queue_init(src_vq);
 134         if (ret)
 135                 return ret;
 136
 137         dst_vq->type = V4L2_BUF_TYPE_VIDEO_CAPTURE;
 138         dst_vq->io_modes = VB2_MMAP | VB2_DMABUF;
 139         dst_vq->drv_priv = ctx;
 140         dst_vq->ops = &rga_qops;
 141         dst_vq->mem_ops = &vb2_dma_sg_memops;
 142         dst_vq->buf_struct_size = sizeof(struct v4l2_m2m_buffer);
 143         dst_vq->timestamp_flags = V4L2_BUF_FLAG_TIMESTAMP_COPY;
 144         dst_vq->lock = &ctx->rga->mutex;
 145
 146         return vb2_queue_init(dst_vq);
 147 }
 148
 149 static int rga_s_ctrl(struct v4l2_ctrl *ctrl)
 150 {
 151         struct rga_ctx *ctx = container_of(ctrl->handler, struct rga_ctx,
 152                                            ctrl_handler);
 153         unsigned long flags;
 154
 155         spin_lock_irqsave(&ctx->rga->ctrl_lock, flags);
 156         switch (ctrl->id) {
 157         case V4L2_CID_PORTER_DUFF_MODE:
 158                 ctx->op = ctrl->val;
 159                 break;
 160         case V4L2_CID_HFLIP:
 161                 ctx->hflip = ctrl->val;
 162                 break;
 163         case V4L2_CID_VFLIP:
 164                 ctx->vflip = ctrl->val;
 165                 break;
 166         case V4L2_CID_ROTATE:
 167                 ctx->rotate = ctrl->val;
 168                 break;
 169         case V4L2_CID_BG_COLOR:
 170                 ctx->fill_color = ctrl->val;
 171                 break;
 172         }
 173         spin_unlock_irqrestore(&ctx->rga->ctrl_lock, flags);
 174         return 0;
 175 }
 176
 177 static const struct v4l2_ctrl_ops rga_ctrl_ops = {
 178         .s_ctrl = rga_s_ctrl,
 179 };
 180
 181 static int rga_setup_ctrls(struct rga_ctx *ctx)
 182 {
 183         struct rockchip_rga *rga = ctx->rga;
 184
 185         v4l2_ctrl_handler_init(&ctx->ctrl_handler, 5);
 186
 187         v4l2_ctrl_new_std_menu(&ctx->ctrl_handler, &rga_ctrl_ops,
 188                                V4L2_CID_PORTER_DUFF_MODE,
 189                                V4L2_PORTER_DUFF_CLEAR, 0,
 190                                V4L2_PORTER_DUFF_SRC);
 191
 192         v4l2_ctrl_new_std(&ctx->ctrl_handler, &rga_ctrl_ops,
 193                           V4L2_CID_HFLIP, 0, 1, 1, 0);
 194
 195         v4l2_ctrl_new_std(&ctx->ctrl_handler, &rga_ctrl_ops,
 196                           V4L2_CID_VFLIP, 0, 1, 1, 0);
 197
 198         v4l2_ctrl_new_std(&ctx->ctrl_handler, &rga_ctrl_ops,
 199                           V4L2_CID_ROTATE, 0, 270, 90, 0);
 200
 201         v4l2_ctrl_new_std(&ctx->ctrl_handler, &rga_ctrl_ops,
 202                           V4L2_CID_BG_COLOR, 0, 0xffffffff, 1, 0);
 203
 204         if (ctx->ctrl_handler.error) {
 205                 int err = ctx->ctrl_handler.error;
 206
 207                 v4l2_err(&rga->v4l2_dev, "%s failed\n", __func__);
 208                 v4l2_ctrl_handler_free(&ctx->ctrl_handler);
 209                 return err;
 210         }
 211
 212         return 0;
 213 }
 214
 215 struct rga_fmt formats[] = {
 216         {
 217                 .fourcc = V4L2_PIX_FMT_ARGB32,
 218                 .color_swap = RGA_COLOR_RB_SWAP,
 219                 .hw_format = RGA_COLOR_FMT_ABGR8888,
 220                 .depth = 32,
 221                 .uv_factor = 1,
 222                 .y_div = 1,
 223                 .x_div = 1,
 224         },
 225         {
 226                 .fourcc = V4L2_PIX_FMT_XRGB32,
 227                 .color_swap = RGA_COLOR_RB_SWAP,
 228                 .hw_format = RGA_COLOR_FMT_XBGR8888,
 229                 .depth = 32,
 230                 .uv_factor = 1,
 231                 .y_div = 1,
 232                 .x_div = 1,
 233         },
 234         {
 235                 .fourcc = V4L2_PIX_FMT_ABGR32,
 236                 .color_swap = RGA_COLOR_ALPHA_SWAP,
 237                 .hw_format = RGA_COLOR_FMT_ABGR8888,
 238                 .depth = 32,
 239                 .uv_factor = 1,
 240                 .y_div = 1,
 241                 .x_div = 1,
 242         },
 243         {
 244                 .fourcc = V4L2_PIX_FMT_XBGR32,
 245                 .color_swap = RGA_COLOR_ALPHA_SWAP,
 246                 .hw_format = RGA_COLOR_FMT_XBGR8888,
 247                 .depth = 32,
 248                 .uv_factor = 1,
 249                 .y_div = 1,
 250                 .x_div = 1,
 251         },
 252         {
 253                 .fourcc = V4L2_PIX_FMT_RGB24,
 254                 .color_swap = RGA_COLOR_RB_SWAP,
 255                 .hw_format = RGA_COLOR_FMT_BGR888,
 256                 .depth = 24,
 257                 .uv_factor = 1,
 258                 .y_div = 1,
 259                 .x_div = 1,
 260         },
 261         {
 262                 .fourcc = V4L2_PIX_FMT_ARGB444,
 263                 .color_swap = RGA_COLOR_RB_SWAP,
 264                 .hw_format = RGA_COLOR_FMT_ABGR4444,
 265                 .depth = 16,
 266                 .uv_factor = 1,
 267                 .y_div = 1,
 268                 .x_div = 1,
 269         },
 270         {
 271                 .fourcc = V4L2_PIX_FMT_ARGB555,
 272                 .color_swap = RGA_COLOR_RB_SWAP,
 273                 .hw_format = RGA_COLOR_FMT_ABGR1555,
 274                 .depth = 16,
 275                 .uv_factor = 1,
 276                 .y_div = 1,
 277                 .x_div = 1,
 278         },
 279         {
 280                 .fourcc = V4L2_PIX_FMT_RGB565,
 281                 .color_swap = RGA_COLOR_RB_SWAP,
 282                 .hw_format = RGA_COLOR_FMT_BGR565,
 283                 .depth = 16,
 284                 .uv_factor = 1,
 285                 .y_div = 1,
 286                 .x_div = 1,
 287         },
 288         {
 289                 .fourcc = V4L2_PIX_FMT_NV21,
 290                 .color_swap = RGA_COLOR_UV_SWAP,
 291                 .hw_format = RGA_COLOR_FMT_YUV420SP,
 292                 .depth = 12,
 293                 .uv_factor = 4,
 294                 .y_div = 2,
 295                 .x_div = 1,
 296         },
 297         {
 298                 .fourcc = V4L2_PIX_FMT_NV61,
 299                 .color_swap = RGA_COLOR_UV_SWAP,
 300                 .hw_format = RGA_COLOR_FMT_YUV422SP,
 301                 .depth = 16,
 302                 .uv_factor = 2,
 303                 .y_div = 1,
 304                 .x_div = 1,
 305         },
 306         {
 307                 .fourcc = V4L2_PIX_FMT_NV12,
 308                 .color_swap = RGA_COLOR_NONE_SWAP,
 309                 .hw_format = RGA_COLOR_FMT_YUV420SP,
 310                 .depth = 12,
 311                 .uv_factor = 4,
 312                 .y_div = 2,
 313                 .x_div = 1,
 314         },
 315         {
 316                 .fourcc = V4L2_PIX_FMT_NV16,
 317                 .color_swap = RGA_COLOR_NONE_SWAP,
 318                 .hw_format = RGA_COLOR_FMT_YUV422SP,
 319                 .depth = 16,
 320                 .uv_factor = 2,
 321                 .y_div = 1,
 322                 .x_div = 1,
 323         },
 324         {
 325                 .fourcc = V4L2_PIX_FMT_YUV420,
 326                 .color_swap = RGA_COLOR_NONE_SWAP,
 327                 .hw_format = RGA_COLOR_FMT_YUV420P,
 328                 .depth = 12,
 329                 .uv_factor = 4,
 330                 .y_div = 2,
 331                 .x_div = 2,
 332         },
 333         {
 334                 .fourcc = V4L2_PIX_FMT_YUV422P,
 335                 .color_swap = RGA_COLOR_NONE_SWAP,
 336                 .hw_format = RGA_COLOR_FMT_YUV422P,
 337                 .depth = 16,
 338                 .uv_factor = 2,
 339                 .y_div = 1,
 340                 .x_div = 2,
 341         },
 342         {
 343                 .fourcc = V4L2_PIX_FMT_YVU420,
 344                 .color_swap = RGA_COLOR_UV_SWAP,
 345                 .hw_format = RGA_COLOR_FMT_YUV420P,
 346                 .depth = 12,
 347                 .uv_factor = 4,
 348                 .y_div = 2,
 349                 .x_div = 2,
 350         },
 351 };
 352
 353 #define NUM_FORMATS ARRAY_SIZE(formats)
 354
 355 struct rga_fmt *rga_fmt_find(struct v4l2_format *f)
 356 {
 357         unsigned int i;
 358
 359         for (i = 0; i < NUM_FORMATS; i++) {
 360                 if (formats[i].fourcc == f->fmt.pix.pixelformat)
 361                         return &formats[i];
 362         }
 363         return NULL;
 364 }
 365
 366 static struct rga_frame def_frame = {
 367         .width = DEFAULT_WIDTH,
 368         .height = DEFAULT_HEIGHT,
 369         .colorspace = V4L2_COLORSPACE_DEFAULT,
 370         .crop.left = 0,
 371         .crop.top = 0,
 372         .crop.width = DEFAULT_WIDTH,
 373         .crop.height = DEFAULT_HEIGHT,
 374         .fmt = &formats[0],
 375 };
 376
 377 struct rga_frame *rga_get_frame(struct rga_ctx *ctx, enum v4l2_buf_type type)
 378 {
 379         switch (type) {
 380         case V4L2_BUF_TYPE_VIDEO_OUTPUT:
 381                 return &ctx->in;
 382         case V4L2_BUF_TYPE_VIDEO_CAPTURE:
 383                 return &ctx->out;
 384         default:
 385                 return ERR_PTR(-EINVAL);
 386         }
 387 }
 388
 389 static int rga_open(struct file *file)
 390 {
 391         struct rockchip_rga *rga = video_drvdata(file);
 392         struct rga_ctx *ctx = NULL;
 393         int ret = 0;
 394
 395         ctx = kzalloc(sizeof(*ctx), GFP_KERNEL);
 396         if (!ctx)
 397                 return -ENOMEM;
 398         ctx->rga = rga;
 399         /* Set default formats */
 400         ctx->in = def_frame;
 401         ctx->out = def_frame;
 402
 403         if (mutex_lock_interruptible(&rga->mutex)) {
 404                 kfree(ctx);
 405                 return -ERESTARTSYS;
 406         }
 407         ctx->fh.m2m_ctx = v4l2_m2m_ctx_init(rga->m2m_dev, ctx, &queue_init);
 408         if (IS_ERR(ctx->fh.m2m_ctx)) {
 409                 ret = PTR_ERR(ctx->fh.m2m_ctx);
 410                 mutex_unlock(&rga->mutex);
 411                 kfree(ctx);
 412                 return ret;
 413         }
 414         v4l2_fh_init(&ctx->fh, video_devdata(file));
 415         file->private_data = &ctx->fh;
 416         v4l2_fh_add(&ctx->fh);
 417
 418         rga_setup_ctrls(ctx);
 419
 420         /* Write the default values to the ctx struct */
 421         v4l2_ctrl_handler_setup(&ctx->ctrl_handler);
 422
 423         ctx->fh.ctrl_handler = &ctx->ctrl_handler;
 424         mutex_unlock(&rga->mutex);
 425
 426         return 0;
 427 }
 428
 429 static int rga_release(struct file *file)
 430 {
 431         struct rga_ctx *ctx =
 432                 container_of(file->private_data, struct rga_ctx, fh);
 433         struct rockchip_rga *rga = ctx->rga;
 434
 435         mutex_lock(&rga->mutex);
 436
 437         v4l2_m2m_ctx_release(ctx->fh.m2m_ctx);
 438
 439         v4l2_ctrl_handler_free(&ctx->ctrl_handler);
 440         v4l2_fh_del(&ctx->fh);
 441         v4l2_fh_exit(&ctx->fh);
 442         kfree(ctx);
 443
 444         mutex_unlock(&rga->mutex);
 445
 446         return 0;
 447 }
 448
 449 static const struct v4l2_file_operations rga_fops = {
 450         .owner = THIS_MODULE,
 451         .open = rga_open,
 452         .release = rga_release,
 453         .poll = v4l2_m2m_fop_poll,
 454         .unlocked_ioctl = video_ioctl2,
 455         .mmap = v4l2_m2m_fop_mmap,
 456 };
 457
 458 static int
 459 vidioc_querycap(struct file *file, void *priv, struct v4l2_capability *cap)
 460 {
 461         strlcpy(cap->driver, RGA_NAME, sizeof(cap->driver));
 462         strlcpy(cap->card, "rockchip rga", sizeof(cap->card));
 463         strlcpy(cap->bus_info, "platform:rga", sizeof(cap->bus_info));
 464
 465         cap->device_caps = V4L2_CAP_VIDEO_M2M | V4L2_CAP_STREAMING;
 466         cap->capabilities = cap->device_caps | V4L2_CAP_DEVICE_CAPS;
 467
 468         return 0;
 469 }
 470
 471 static int vidioc_enum_fmt(struct file *file, void *prv, struct v4l2_fmtdesc *f)
 472 {
 473         struct rga_fmt *fmt;
 474
 475         if (f->index >= NUM_FORMATS)
 476                 return -EINVAL;
 477
 478         fmt = &formats[f->index];
 479         f->pixelformat = fmt->fourcc;
 480
 481         return 0;
 482 }
 483
 484 static int vidioc_g_fmt(struct file *file, void *prv, struct v4l2_format *f)
 485 {
 486         struct rga_ctx *ctx = prv;
 487         struct vb2_queue *vq;
 488         struct rga_frame *frm;
 489
 490         vq = v4l2_m2m_get_vq(ctx->fh.m2m_ctx, f->type);
 491         if (!vq)
 492                 return -EINVAL;
 493         frm = rga_get_frame(ctx, f->type);
 494         if (IS_ERR(frm))
 495                 return PTR_ERR(frm);
 496
 497         f->fmt.pix.width = frm->width;
 498         f->fmt.pix.height = frm->height;
 499         f->fmt.pix.field = V4L2_FIELD_NONE;
 500         f->fmt.pix.pixelformat = frm->fmt->fourcc;
 501         f->fmt.pix.bytesperline = frm->stride;
 502         f->fmt.pix.sizeimage = frm->size;
 503         f->fmt.pix.colorspace = frm->colorspace;
 504
 505         return 0;
 506 }
 507
 508 static int vidioc_try_fmt(struct file *file, void *prv, struct v4l2_format *f)
 509 {
 510         struct rga_fmt *fmt;
 511
 512         fmt = rga_fmt_find(f);
 513         if (!fmt) {
 514                 fmt = &formats[0];
 515                 f->fmt.pix.pixelformat = fmt->fourcc;
 516         }
 517
 518         f->fmt.pix.field = V4L2_FIELD_NONE;
 519
 520         if (f->fmt.pix.width > MAX_WIDTH)
 521                 f->fmt.pix.width = MAX_WIDTH;
 522         if (f->fmt.pix.height > MAX_HEIGHT)
 523                 f->fmt.pix.height = MAX_HEIGHT;
 524
 525         if (f->fmt.pix.width < MIN_WIDTH)
 526                 f->fmt.pix.width = MIN_WIDTH;
 527         if (f->fmt.pix.height < MIN_HEIGHT)
 528                 f->fmt.pix.height = MIN_HEIGHT;
 529
 530         if (fmt->hw_format >= RGA_COLOR_FMT_YUV422SP)
 531                 f->fmt.pix.bytesperline = f->fmt.pix.width;
 532         else
 533                 f->fmt.pix.bytesperline = (f->fmt.pix.width * fmt->depth) >> 3;
 534
 535         f->fmt.pix.sizeimage =
 536                 f->fmt.pix.height * (f->fmt.pix.width * fmt->depth) >> 3;
 537
 538         return 0;
 539 }
 540
 541 static int vidioc_s_fmt(struct file *file, void *prv, struct v4l2_format *f)
 542 {
 543         struct rga_ctx *ctx = prv;
 544         struct rockchip_rga *rga = ctx->rga;
 545         struct vb2_queue *vq;
 546         struct rga_frame *frm;
 547         struct rga_fmt *fmt;
 548         int ret = 0;
 549
 550         /* Adjust all values accordingly to the hardware capabilities
 551          * and chosen format.
 552          */
 553         ret = vidioc_try_fmt(file, prv, f);
 554         if (ret)
 555                 return ret;
 556         vq = v4l2_m2m_get_vq(ctx->fh.m2m_ctx, f->type);
 557         if (vb2_is_busy(vq)) {
 558                 v4l2_err(&rga->v4l2_dev, "queue (%d) bust\n", f->type);
 559                 return -EBUSY;
 560         }
 561         frm = rga_get_frame(ctx, f->type);
 562         if (IS_ERR(frm))
 563                 return PTR_ERR(frm);
 564         fmt = rga_fmt_find(f);
 565         if (!fmt)
 566                 return -EINVAL;
 567         frm->width = f->fmt.pix.width;
 568         frm->height = f->fmt.pix.height;
 569         frm->size = f->fmt.pix.sizeimage;
 570         frm->fmt = fmt;
 571         frm->stride = f->fmt.pix.bytesperline;
 572         frm->colorspace = f->fmt.pix.colorspace;
 573
 574         /* Reset crop settings */
 575         frm->crop.left = 0;
 576         frm->crop.top = 0;
 577         frm->crop.width = frm->width;
 578         frm->crop.height = frm->height;
 579
 580         return 0;
 581 }
 582
 583 static int
 584 vidioc_try_crop(struct rga_ctx *ctx, struct v4l2_selection *s)
 585 {
 586         struct rockchip_rga *rga = ctx->rga;
 587         struct rga_frame *f;
 588
 589         f = rga_get_frame(ctx, s->type);
 590         if (IS_ERR(f))
 591                 return PTR_ERR(f);
 592
 593         switch (s->target) {
 594         case V4L2_SEL_TGT_COMPOSE:
 595                 /*
 596                  * COMPOSE target is only valid for capture buffer type, return
 597                  * error for output buffer type
 598                  */
 599                 if (s->type == V4L2_BUF_TYPE_VIDEO_OUTPUT)
 600                         return -EINVAL;
 601                 break;
 602         case V4L2_SEL_TGT_CROP:
 603                 /*
 604                  * CROP target is only valid for output buffer type, return
 605                  * error for capture buffer type
 606                  */
 607                 if (s->type == V4L2_BUF_TYPE_VIDEO_CAPTURE)
 608                         return -EINVAL;
 609                 break;
 610         /*
 611          * bound and default crop/compose targets are invalid targets to
 612          * try/set
 613          */
 614         default:
 615                 return -EINVAL;
 616         }
 617
 618         if (s->r.top < 0 || s->r.left < 0) {
 619                 v4l2_err(&rga->v4l2_dev,
 620                          "doesn't support negative values for top & left.\n");
 621                 return -EINVAL;
 622         }
 623
 624         if (s->r.left + s->r.width > s->r.width ||
 625             s->r.top + s->r.height > s->r.height ||
 626             s->r.width < MIN_WIDTH || s->r.height < MIN_HEIGHT) {
 627                 v4l2_err(&rga->v4l2_dev, "unsupport crop value.\n");
 628                 return -EINVAL;
 629         }
 630
 631         return 0;
 632 }
 633
 634 static int vidioc_g_selection(struct file *file, void *prv,
 635                               struct v4l2_selection *s)
 636 {
 637         struct rga_ctx *ctx = prv;
 638         struct rga_frame *f;
 639         bool use_frame = false;
 640
 641         f = rga_get_frame(ctx, s->type);
 642         if (IS_ERR(f))
 643                 return PTR_ERR(f);
 644
 645         switch (s->target) {
 646         case V4L2_SEL_TGT_COMPOSE_DEFAULT:
 647         case V4L2_SEL_TGT_COMPOSE_BOUNDS:
 648                 if (s->type == V4L2_BUF_TYPE_VIDEO_OUTPUT)
 649                         return -EINVAL;
 650                 break;
 651         case V4L2_SEL_TGT_CROP_BOUNDS:
 652         case V4L2_SEL_TGT_CROP_DEFAULT:
 653                 if (s->type == V4L2_BUF_TYPE_VIDEO_CAPTURE)
 654                         return -EINVAL;
 655                 break;
 656         case V4L2_SEL_TGT_COMPOSE:
 657                 if (s->type == V4L2_BUF_TYPE_VIDEO_OUTPUT)
 658                         return -EINVAL;
 659                 use_frame = true;
 660                 break;
 661         case V4L2_SEL_TGT_CROP:
 662                 if (s->type == V4L2_BUF_TYPE_VIDEO_CAPTURE)
 663                         return -EINVAL;
 664                 use_frame = true;
 665                 break;
 666         default:
 667                 return -EINVAL;
 668         }
 669
 670         if (use_frame) {
 671                 s->r = f->crop;
 672         } else {
 673                 s->r.left = 0;
 674                 s->r.top = 0;
 675                 s->r.width = f->width;
 676                 s->r.height = f->height;
 677         }
 678
 679         return 0;
 680 }
 681
 682 static int vidioc_s_selection(struct file *file, void *prv,
 683                               struct v4l2_selection *s)
 684 {
 685         struct rga_ctx *ctx = prv;
 686         struct rga_frame *f;
 687         int ret = 0;
 688
 689         ret = vidioc_try_crop(ctx, s);
 690         if (ret)
 691                 return ret;
 692
 693         f = rga_get_frame(ctx, s->type);
 694         if (IS_ERR(f))
 695                 return PTR_ERR(f);
 696
 697         f->crop = s->r;
 698
 699         return ret;
 700 }
 701
 702 static const struct v4l2_ioctl_ops rga_ioctl_ops = {
 703         .vidioc_querycap = vidioc_querycap,
 704
 705         .vidioc_enum_fmt_vid_cap = vidioc_enum_fmt,
 706         .vidioc_g_fmt_vid_cap = vidioc_g_fmt,
 707         .vidioc_try_fmt_vid_cap = vidioc_try_fmt,
 708         .vidioc_s_fmt_vid_cap = vidioc_s_fmt,
 709
 710         .vidioc_enum_fmt_vid_out = vidioc_enum_fmt,
 711         .vidioc_g_fmt_vid_out = vidioc_g_fmt,
 712         .vidioc_try_fmt_vid_out = vidioc_try_fmt,
 713         .vidioc_s_fmt_vid_out = vidioc_s_fmt,
 714
 715         .vidioc_reqbufs = v4l2_m2m_ioctl_reqbufs,
 716         .vidioc_querybuf = v4l2_m2m_ioctl_querybuf,
 717         .vidioc_qbuf = v4l2_m2m_ioctl_qbuf,
 718         .vidioc_dqbuf = v4l2_m2m_ioctl_dqbuf,
 719         .vidioc_prepare_buf = v4l2_m2m_ioctl_prepare_buf,
 720         .vidioc_create_bufs = v4l2_m2m_ioctl_create_bufs,
 721         .vidioc_expbuf = v4l2_m2m_ioctl_expbuf,
 722
 723         .vidioc_subscribe_event = v4l2_ctrl_subscribe_event,
 724         .vidioc_unsubscribe_event = v4l2_event_unsubscribe,
 725
 726         .vidioc_streamon = v4l2_m2m_ioctl_streamon,
 727         .vidioc_streamoff = v4l2_m2m_ioctl_streamoff,
 728
 729         .vidioc_g_selection = vidioc_g_selection,
 730         .vidioc_s_selection = vidioc_s_selection,
 731 };
 732
 733 static struct video_device rga_videodev = {
 734         .name = "rockchip-rga",
 735         .fops = &rga_fops,
 736         .ioctl_ops = &rga_ioctl_ops,
 737         .minor = -1,
 738         .release = video_device_release,
 739         .vfl_dir = VFL_DIR_M2M,
 740 };
 741
 742 static int rga_enable_clocks(struct rockchip_rga *rga)
 743 {
 744         int ret;
 745
 746         ret = clk_prepare_enable(rga->sclk);
 747         if (ret) {
 748                 dev_err(rga->dev, "Cannot enable rga sclk: %d\n", ret);
 749                 return ret;
 750         }
 751
 752         ret = clk_prepare_enable(rga->aclk);
 753         if (ret) {
 754                 dev_err(rga->dev, "Cannot enable rga aclk: %d\n", ret);
 755                 goto err_disable_sclk;
 756         }
 757
 758         ret = clk_prepare_enable(rga->hclk);
 759         if (ret) {
 760                 dev_err(rga->dev, "Cannot enable rga hclk: %d\n", ret);
 761                 goto err_disable_aclk;
 762         }
 763
 764         return 0;
 765
 766 err_disable_sclk:
 767         clk_disable_unprepare(rga->sclk);
 768 err_disable_aclk:
 769         clk_disable_unprepare(rga->aclk);
 770
 771         return ret;
 772 }
 773
 774 static void rga_disable_clocks(struct rockchip_rga *rga)
 775 {
 776         clk_disable_unprepare(rga->sclk);
 777         clk_disable_unprepare(rga->hclk);
 778         clk_disable_unprepare(rga->aclk);
 779 }
 780
 781 static int rga_parse_dt(struct rockchip_rga *rga)
 782 {
 783         struct reset_control *core_rst, *axi_rst, *ahb_rst;
 784
 785         core_rst = devm_reset_control_get(rga->dev, "core");
 786         if (IS_ERR(core_rst)) {
 787                 dev_err(rga->dev, "failed to get core reset controller\n");
 788                 return PTR_ERR(core_rst);
 789         }
 790
 791         axi_rst = devm_reset_control_get(rga->dev, "axi");
 792         if (IS_ERR(axi_rst)) {
 793                 dev_err(rga->dev, "failed to get axi reset controller\n");
 794                 return PTR_ERR(axi_rst);
 795         }
 796
 797         ahb_rst = devm_reset_control_get(rga->dev, "ahb");
 798         if (IS_ERR(ahb_rst)) {
 799                 dev_err(rga->dev, "failed to get ahb reset controller\n");
 800                 return PTR_ERR(ahb_rst);
 801         }
 802
 803         reset_control_assert(core_rst);
 804         udelay(1);
 805         reset_control_deassert(core_rst);
 806
 807         reset_control_assert(axi_rst);
 808         udelay(1);
 809         reset_control_deassert(axi_rst);
 810
 811         reset_control_assert(ahb_rst);
 812         udelay(1);
 813         reset_control_deassert(ahb_rst);
 814
 815         rga->sclk = devm_clk_get(rga->dev, "sclk");
 816         if (IS_ERR(rga->sclk)) {
 817                 dev_err(rga->dev, "failed to get sclk clock\n");
 818                 return PTR_ERR(rga->sclk);
 819         }
 820
 821         rga->aclk = devm_clk_get(rga->dev, "aclk");
 822         if (IS_ERR(rga->aclk)) {
 823                 dev_err(rga->dev, "failed to get aclk clock\n");
 824                 return PTR_ERR(rga->aclk);
 825         }
 826
 827         rga->hclk = devm_clk_get(rga->dev, "hclk");
 828         if (IS_ERR(rga->hclk)) {
 829                 dev_err(rga->dev, "failed to get hclk clock\n");
 830                 return PTR_ERR(rga->hclk);
 831         }
 832
 833         return 0;
 834 }
 835
 836 static int rga_probe(struct platform_device *pdev)
 837 {
 838         struct dma_attrs cmdlist_dma_attrs;
 839         struct rockchip_rga *rga;
 840         struct video_device *vfd;
 841         struct resource *res;
 842         int ret = 0;
 843         int irq;
 844
 845         if (!pdev->dev.of_node)
 846                 return -ENODEV;
 847
 848         rga = devm_kzalloc(&pdev->dev, sizeof(*rga), GFP_KERNEL);
 849         if (!rga)
 850                 return -ENOMEM;
 851
 852         rga->dev = &pdev->dev;
 853         spin_lock_init(&rga->ctrl_lock);
 854         mutex_init(&rga->mutex);
 855
 856         init_waitqueue_head(&rga->irq_queue);
 857
 858         ret = rga_parse_dt(rga);
 859         if (ret)
 860                 dev_err(&pdev->dev, "Unable to parse OF data\n");
 861
 862         pm_runtime_enable(rga->dev);
 863
 864         res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
 865
 866         rga->regs = devm_ioremap_resource(rga->dev, res);
 867         if (IS_ERR(rga->regs)) {
 868                 ret = PTR_ERR(rga->regs);
 869                 goto err_put_clk;
 870         }
 871
 872         irq = platform_get_irq(pdev, 0);
 873         if (irq < 0) {
 874                 dev_err(rga->dev, "failed to get irq\n");
 875                 ret = irq;
 876                 goto err_put_clk;
 877         }
 878
 879         ret = devm_request_irq(rga->dev, irq, rga_isr, 0,
 880                                dev_name(rga->dev), rga);
 881         if (ret < 0) {
 882                 dev_err(rga->dev, "failed to request irq\n");
 883                 goto err_put_clk;
 884         }
 885
 886         rga->alloc_ctx = vb2_dma_sg_init_ctx(&pdev->dev);
 887
 888         ret = v4l2_device_register(&pdev->dev, &rga->v4l2_dev);
 889         if (ret)
 890                 goto err_put_clk;
 891         vfd = video_device_alloc();
 892         if (!vfd) {
 893                 v4l2_err(&rga->v4l2_dev, "Failed to allocate video device\n");
 894                 ret = -ENOMEM;
 895                 goto unreg_v4l2_dev;
 896         }
 897         *vfd = rga_videodev;
 898         vfd->lock = &rga->mutex;
 899         vfd->v4l2_dev = &rga->v4l2_dev;
 900
 901         video_set_drvdata(vfd, rga);
 902         snprintf(vfd->name, sizeof(vfd->name), "%s", rga_videodev.name);
 903         rga->vfd = vfd;
 904
 905         platform_set_drvdata(pdev, rga);
 906         rga->m2m_dev = v4l2_m2m_init(&rga_m2m_ops);
 907         if (IS_ERR(rga->m2m_dev)) {
 908                 v4l2_err(&rga->v4l2_dev, "Failed to init mem2mem device\n");
 909                 ret = PTR_ERR(rga->m2m_dev);
 910                 goto unreg_video_dev;
 911         }
 912
 913         pm_runtime_get_sync(rga->dev);
 914
 915         rga->version.major = (rga_read(rga, RGA_VERSION_INFO) >> 24) & 0xFF;
 916         rga->version.minor = (rga_read(rga, RGA_VERSION_INFO) >> 20) & 0x0F;
 917
 918         v4l2_info(&rga->v4l2_dev, "HW Version: 0x%02x.%02x\n",
 919                   rga->version.major, rga->version.minor);
 920
 921         pm_runtime_put(rga->dev);
 922
 923         /* Create CMD buffer */
 924         init_dma_attrs(&cmdlist_dma_attrs);
 925         dma_set_attr(DMA_ATTR_WRITE_COMBINE, &cmdlist_dma_attrs);
 926         rga->cmdbuf_virt = dma_alloc_attrs(rga->dev, RGA_CMDBUF_SIZE,
 927                                            &rga->cmdbuf_phy, GFP_KERNEL,
 928                                            &cmdlist_dma_attrs);
 929
 930         rga->src_mmu_pages =
 931                 (unsigned int *)__get_free_pages(GFP_KERNEL | __GFP_ZERO, 3);
 932         rga->dst_mmu_pages =
 933                 (unsigned int *)__get_free_pages(GFP_KERNEL | __GFP_ZERO, 3);
 934
 935         def_frame.stride = (def_frame.width * def_frame.fmt->depth) >> 3;
 936         def_frame.size = def_frame.stride * def_frame.height;
 937
 938         ret = video_register_device(vfd, VFL_TYPE_GRABBER, -1);
 939         if (ret) {
 940                 v4l2_err(&rga->v4l2_dev, "Failed to register video device\n");
 941                 goto rel_vdev;
 942         }
 943         v4l2_info(&rga->v4l2_dev, "Registered %s as /dev/%s\n",
 944                   vfd->name, video_device_node_name(vfd));
 945
 946         return 0;
 947
 948 rel_vdev:
 949         video_device_release(vfd);
 950 unreg_video_dev:
 951         video_unregister_device(rga->vfd);
 952 unreg_v4l2_dev:
 953         v4l2_device_unregister(&rga->v4l2_dev);
 954 err_put_clk:
 955         pm_runtime_disable(rga->dev);
 956
 957         return ret;
 958 }
 959
 960 static int rga_remove(struct platform_device *pdev)
 961 {
 962         struct rockchip_rga *rga = platform_get_drvdata(pdev);
 963         DEFINE_DMA_ATTRS(attrs);
 964
 965         dma_free_attrs(rga->dev, RGA_CMDBUF_SIZE, &rga->cmdbuf_virt,
 966                        rga->cmdbuf_phy, &attrs);
 967
 968         free_pages((unsigned long)rga->src_mmu_pages, 3);
 969         free_pages((unsigned long)rga->dst_mmu_pages, 3);
 970
 971         v4l2_info(&rga->v4l2_dev, "Removing\n");
 972
 973         v4l2_m2m_release(rga->m2m_dev);
 974         video_unregister_device(rga->vfd);
 975         v4l2_device_unregister(&rga->v4l2_dev);
 976         vb2_dma_sg_cleanup_ctx(rga->alloc_ctx);
 977
 978         pm_runtime_disable(rga->dev);
 979
 980         return 0;
 981 }
 982
 983 #ifdef CONFIG_PM
 984 static int rga_runtime_suspend(struct device *dev)
 985 {
 986         struct rockchip_rga *rga = dev_get_drvdata(dev);
 987
 988         rga_disable_clocks(rga);
 989
 990         return 0;
 991 }
 992
 993 static int rga_runtime_resume(struct device *dev)
 994 {
 995         struct rockchip_rga *rga = dev_get_drvdata(dev);
 996
 997         return rga_enable_clocks(rga);
 998 }
 999 #endif
1000
1001 static const struct dev_pm_ops rga_pm = {
1002         SET_RUNTIME_PM_OPS(rga_runtime_suspend,
1003                            rga_runtime_resume, NULL)
1004 };
1005
1006 static const struct of_device_id rockchip_rga_match[] = {
1007         {
1008                 .compatible = "rockchip,rk3288-rga",
1009         },
1010         {
1011                 .compatible = "rockchip,rk3399-rga",
1012         },
1013         {},
1014 };
1015
1016 MODULE_DEVICE_TABLE(of, rockchip_rga_match);
1017
1018 static struct platform_driver rga_pdrv = {
1019         .probe = rga_probe,
1020         .remove = rga_remove,
1021         .driver = {
1022                 .name = RGA_NAME,
1023                 .pm = &rga_pm,
1024                 .of_match_table = rockchip_rga_match,
1025         },
1026 };
1027
1028 module_platform_driver(rga_pdrv);
1029
1030 MODULE_AUTHOR("Jacob Chen <jacob-chen@iotwrt.com>");
1031 MODULE_DESCRIPTION("Rockchip Raster 2d Grapphic Acceleration Unit");
1032 MODULE_LICENSE("GPL");