drivers/media/platform/rockchip-rga/rga.c

   1 /*
   2  * Copyright (C) Fuzhou Rockchip Electronics Co.Ltd
   3  * Author: Jacob Chen <jacob-chen@iotwrt.com>
   4  *
   5  * This software is licensed under the terms of the GNU General Public
   6  * License version 2, as published by the Free Software Foundation, and
   7  * may be copied, distributed, and modified under those terms.
   8  *
   9  * This program is distributed in the hope that it will be useful,
  10  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  11  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  12  * GNU General Public License for more details.
  13  */
  14
  15 #include <linux/clk.h>
  16 #include <linux/debugfs.h>
  17 #include <linux/delay.h>
  18 #include <linux/fs.h>
  19 #include <linux/interrupt.h>
  20 #include <linux/module.h>
  21 #include <linux/of.h>
  22 #include <linux/pm_runtime.h>
  23 #include <linux/reset.h>
  24 #include <linux/sched.h>
  25 #include <linux/slab.h>
  26 #include <linux/timer.h>
  27
  28 #include <linux/platform_device.h>
  29 #include <media/v4l2-device.h>
  30 #include <media/v4l2-event.h>
  31 #include <media/v4l2-ioctl.h>
  32 #include <media/v4l2-mem2mem.h>
  33 #include <media/videobuf2-dma-sg.h>
  34 #include <media/videobuf2-v4l2.h>
  35
  36 #include "rga-hw.h"
  37 #include "rga.h"
  38
  39 static void job_abort(void *prv)
  40 {
  41         struct rga_ctx *ctx = prv;
  42         struct rockchip_rga *rga = ctx->rga;
  43
  44         if (!rga->curr) /* No job currently running */
  45                 return;
  46
  47         wait_event_timeout(rga->irq_queue,
  48                            !rga->curr, msecs_to_jiffies(RGA_TIMEOUT));
  49 }
  50
  51 static void device_run(void *prv)
  52 {
  53         struct rga_ctx *ctx = prv;
  54         struct rockchip_rga *rga = ctx->rga;
  55         struct vb2_buffer *src, *dst;
  56         unsigned long flags;
  57
  58         spin_lock_irqsave(&rga->ctrl_lock, flags);
  59
  60         rga->curr = ctx;
  61
  62         src = v4l2_m2m_next_src_buf(ctx->fh.m2m_ctx);
  63         dst = v4l2_m2m_next_dst_buf(ctx->fh.m2m_ctx);
  64
  65         rga_buf_map(src);
  66         rga_buf_map(dst);
  67
  68         rga_cmd_set(ctx);
  69
  70         rga_start(rga);
  71
  72         spin_unlock_irqrestore(&rga->ctrl_lock, flags);
  73 }
  74
  75 static irqreturn_t rga_isr(int irq, void *prv)
  76 {
  77         struct rockchip_rga *rga = prv;
  78         int intr;
  79
  80         intr = rga_read(rga, RGA_INT) & 0xf;
  81
  82         rga_mod(rga, RGA_INT, intr << 4, 0xf << 4);
  83
  84         if (intr & 0x04) {
  85                 struct vb2_v4l2_buffer *src, *dst;
  86                 struct rga_ctx *ctx = rga->curr;
  87
  88                 WARN_ON(!ctx);
  89
  90                 rga->curr = NULL;
  91
  92                 src = v4l2_m2m_src_buf_remove(ctx->fh.m2m_ctx);
  93                 dst = v4l2_m2m_dst_buf_remove(ctx->fh.m2m_ctx);
  94
  95                 WARN_ON(!src);
  96                 WARN_ON(!dst);
  97
  98                 dst->timecode = src->timecode;
  99                 dst->timestamp = src->timestamp;
 100                 dst->flags &= ~V4L2_BUF_FLAG_TSTAMP_SRC_MASK;
 101                 dst->flags |= src->flags & V4L2_BUF_FLAG_TSTAMP_SRC_MASK;
 102
 103                 v4l2_m2m_buf_done(src, VB2_BUF_STATE_DONE);
 104                 v4l2_m2m_buf_done(dst, VB2_BUF_STATE_DONE);
 105                 v4l2_m2m_job_finish(rga->m2m_dev, ctx->fh.m2m_ctx);
 106
 107                 wake_up(&rga->irq_queue);
 108         }
 109
 110         return IRQ_HANDLED;
 111 }
 112
 113 static struct v4l2_m2m_ops rga_m2m_ops = {
 114         .device_run = device_run,
 115         .job_abort = job_abort,
 116 };
 117
 118 static int
 119 queue_init(void *priv, struct vb2_queue *src_vq, struct vb2_queue *dst_vq)
 120 {
 121         struct rga_ctx *ctx = priv;
 122         int ret;
 123
 124         src_vq->type = V4L2_BUF_TYPE_VIDEO_OUTPUT;
 125         src_vq->io_modes = VB2_MMAP | VB2_DMABUF;
 126         src_vq->drv_priv = ctx;
 127         src_vq->ops = &rga_qops;
 128         src_vq->mem_ops = &vb2_dma_sg_memops;
 129         src_vq->buf_struct_size = sizeof(struct v4l2_m2m_buffer);
 130         src_vq->timestamp_flags = V4L2_BUF_FLAG_TIMESTAMP_COPY;
 131         src_vq->lock = &ctx->rga->mutex;
 132
 133         ret = vb2_queue_init(src_vq);
 134         if (ret)
 135                 return ret;
 136
 137         dst_vq->type = V4L2_BUF_TYPE_VIDEO_CAPTURE;
 138         dst_vq->io_modes = VB2_MMAP | VB2_DMABUF;
 139         dst_vq->drv_priv = ctx;
 140         dst_vq->ops = &rga_qops;
 141         dst_vq->mem_ops = &vb2_dma_sg_memops;
 142         dst_vq->buf_struct_size = sizeof(struct v4l2_m2m_buffer);
 143         dst_vq->timestamp_flags = V4L2_BUF_FLAG_TIMESTAMP_COPY;
 144         dst_vq->lock = &ctx->rga->mutex;
 145
 146         return vb2_queue_init(dst_vq);
 147 }
 148
 149 static int rga_s_ctrl(struct v4l2_ctrl *ctrl)
 150 {
 151         struct rga_ctx *ctx = container_of(ctrl->handler, struct rga_ctx,
 152                                            ctrl_handler);
 153         unsigned long flags;
 154
 155         spin_lock_irqsave(&ctx->rga->ctrl_lock, flags);
 156         switch (ctrl->id) {
 157         case V4L2_CID_PORTER_DUFF_MODE:
 158                 ctx->op = ctrl->val;
 159                 break;
 160         case V4L2_CID_HFLIP:
 161                 ctx->hflip = ctrl->val;
 162                 break;
 163         case V4L2_CID_VFLIP:
 164                 ctx->vflip = ctrl->val;
 165                 break;
 166         case V4L2_CID_ROTATE:
 167                 ctx->rotate = ctrl->val;
 168                 break;
 169         case V4L2_CID_BG_COLOR:
 170                 ctx->fill_color = ctrl->val;
 171                 break;
 172         }
 173         spin_unlock_irqrestore(&ctx->rga->ctrl_lock, flags);
 174         return 0;
 175 }
 176
 177 static const struct v4l2_ctrl_ops rga_ctrl_ops = {
 178         .s_ctrl = rga_s_ctrl,
 179 };
 180
 181 static int rga_setup_ctrls(struct rga_ctx *ctx)
 182 {
 183         struct rockchip_rga *rga = ctx->rga;
 184
 185         v4l2_ctrl_handler_init(&ctx->ctrl_handler, 5);
 186
 187         v4l2_ctrl_new_std_menu(&ctx->ctrl_handler, &rga_ctrl_ops,
 188                                V4L2_CID_PORTER_DUFF_MODE,
 189                                V4L2_PORTER_DUFF_CLEAR, 0,
 190                                V4L2_PORTER_DUFF_SRC);
 191
 192         v4l2_ctrl_new_std(&ctx->ctrl_handler, &rga_ctrl_ops,
 193                           V4L2_CID_HFLIP, 0, 1, 1, 0);
 194
 195         v4l2_ctrl_new_std(&ctx->ctrl_handler, &rga_ctrl_ops,
 196                           V4L2_CID_VFLIP, 0, 1, 1, 0);
 197
 198         v4l2_ctrl_new_std(&ctx->ctrl_handler, &rga_ctrl_ops,
 199                           V4L2_CID_ROTATE, 0, 270, 90, 0);
 200
 201         v4l2_ctrl_new_std(&ctx->ctrl_handler, &rga_ctrl_ops,
 202                           V4L2_CID_BG_COLOR, 0, 0xffffffff, 1, 0);
 203
 204         if (ctx->ctrl_handler.error) {
 205                 int err = ctx->ctrl_handler.error;
 206
 207                 v4l2_err(&rga->v4l2_dev, "%s failed\n", __func__);
 208                 v4l2_ctrl_handler_free(&ctx->ctrl_handler);
 209                 return err;
 210         }
 211
 212         return 0;
 213 }
 214
 215 struct rga_fmt formats[] = {
 216         {
 217                 .fourcc = V4L2_PIX_FMT_ARGB32,
 218                 .color_swap = RGA_COLOR_RB_SWAP,
 219                 .hw_format = RGA_COLOR_FMT_ABGR8888,
 220                 .depth = 32,
 221                 .uv_factor = 1,
 222                 .y_div = 1,
 223                 .x_div = 1,
 224         },
 225         {
 226                 .fourcc = V4L2_PIX_FMT_XRGB32,
 227                 .color_swap = RGA_COLOR_RB_SWAP,
 228                 .hw_format = RGA_COLOR_FMT_XBGR8888,
 229                 .depth = 32,
 230                 .uv_factor = 1,
 231                 .y_div = 1,
 232                 .x_div = 1,
 233         },
 234         {
 235                 .fourcc = V4L2_PIX_FMT_ABGR32,
 236                 .color_swap = RGA_COLOR_ALPHA_SWAP,
 237                 .hw_format = RGA_COLOR_FMT_ABGR8888,
 238                 .depth = 32,
 239                 .uv_factor = 1,
 240                 .y_div = 1,
 241                 .x_div = 1,
 242         },
 243         {
 244                 .fourcc = V4L2_PIX_FMT_XBGR32,
 245                 .color_swap = RGA_COLOR_ALPHA_SWAP,
 246                 .hw_format = RGA_COLOR_FMT_XBGR8888,
 247                 .depth = 32,
 248                 .uv_factor = 1,
 249                 .y_div = 1,
 250                 .x_div = 1,
 251         },
 252         {
 253                 .fourcc = V4L2_PIX_FMT_RGB24,
 254                 .color_swap = RGA_COLOR_NONE_SWAP,
 255                 .hw_format = RGA_COLOR_FMT_RGB888,
 256                 .depth = 24,
 257                 .uv_factor = 1,
 258                 .y_div = 1,
 259                 .x_div = 1,
 260         },
 261         {
 262                 .fourcc = V4L2_PIX_FMT_BGR24,
 263                 .color_swap = RGA_COLOR_RB_SWAP,
 264                 .hw_format = RGA_COLOR_FMT_RGB888,
 265                 .depth = 24,
 266                 .uv_factor = 1,
 267                 .y_div = 1,
 268                 .x_div = 1,
 269         },
 270         {
 271                 .fourcc = V4L2_PIX_FMT_ARGB444,
 272                 .color_swap = RGA_COLOR_RB_SWAP,
 273                 .hw_format = RGA_COLOR_FMT_ABGR4444,
 274                 .depth = 16,
 275                 .uv_factor = 1,
 276                 .y_div = 1,
 277                 .x_div = 1,
 278         },
 279         {
 280                 .fourcc = V4L2_PIX_FMT_ARGB555,
 281                 .color_swap = RGA_COLOR_RB_SWAP,
 282                 .hw_format = RGA_COLOR_FMT_ABGR1555,
 283                 .depth = 16,
 284                 .uv_factor = 1,
 285                 .y_div = 1,
 286                 .x_div = 1,
 287         },
 288         {
 289                 .fourcc = V4L2_PIX_FMT_RGB565,
 290                 .color_swap = RGA_COLOR_RB_SWAP,
 291                 .hw_format = RGA_COLOR_FMT_BGR565,
 292                 .depth = 16,
 293                 .uv_factor = 1,
 294                 .y_div = 1,
 295                 .x_div = 1,
 296         },
 297         {
 298                 .fourcc = V4L2_PIX_FMT_NV21,
 299                 .color_swap = RGA_COLOR_UV_SWAP,
 300                 .hw_format = RGA_COLOR_FMT_YUV420SP,
 301                 .depth = 12,
 302                 .uv_factor = 4,
 303                 .y_div = 2,
 304                 .x_div = 1,
 305         },
 306         {
 307                 .fourcc = V4L2_PIX_FMT_NV61,
 308                 .color_swap = RGA_COLOR_UV_SWAP,
 309                 .hw_format = RGA_COLOR_FMT_YUV422SP,
 310                 .depth = 16,
 311                 .uv_factor = 2,
 312                 .y_div = 1,
 313                 .x_div = 1,
 314         },
 315         {
 316                 .fourcc = V4L2_PIX_FMT_NV12,
 317                 .color_swap = RGA_COLOR_NONE_SWAP,
 318                 .hw_format = RGA_COLOR_FMT_YUV420SP,
 319                 .depth = 12,
 320                 .uv_factor = 4,
 321                 .y_div = 2,
 322                 .x_div = 1,
 323         },
 324         {
 325                 .fourcc = V4L2_PIX_FMT_NV16,
 326                 .color_swap = RGA_COLOR_NONE_SWAP,
 327                 .hw_format = RGA_COLOR_FMT_YUV422SP,
 328                 .depth = 16,
 329                 .uv_factor = 2,
 330                 .y_div = 1,
 331                 .x_div = 1,
 332         },
 333         {
 334                 .fourcc = V4L2_PIX_FMT_YUV420,
 335                 .color_swap = RGA_COLOR_NONE_SWAP,
 336                 .hw_format = RGA_COLOR_FMT_YUV420P,
 337                 .depth = 12,
 338                 .uv_factor = 4,
 339                 .y_div = 2,
 340                 .x_div = 2,
 341         },
 342         {
 343                 .fourcc = V4L2_PIX_FMT_YUV422P,
 344                 .color_swap = RGA_COLOR_NONE_SWAP,
 345                 .hw_format = RGA_COLOR_FMT_YUV422P,
 346                 .depth = 16,
 347                 .uv_factor = 2,
 348                 .y_div = 1,
 349                 .x_div = 2,
 350         },
 351         {
 352                 .fourcc = V4L2_PIX_FMT_YVU420,
 353                 .color_swap = RGA_COLOR_UV_SWAP,
 354                 .hw_format = RGA_COLOR_FMT_YUV420P,
 355                 .depth = 12,
 356                 .uv_factor = 4,
 357                 .y_div = 2,
 358                 .x_div = 2,
 359         },
 360 };
 361
 362 #define NUM_FORMATS ARRAY_SIZE(formats)
 363
 364 struct rga_fmt *rga_fmt_find(struct v4l2_format *f)
 365 {
 366         unsigned int i;
 367
 368         for (i = 0; i < NUM_FORMATS; i++) {
 369                 if (formats[i].fourcc == f->fmt.pix.pixelformat)
 370                         return &formats[i];
 371         }
 372         return NULL;
 373 }
 374
 375 static struct rga_frame def_frame = {
 376         .width = DEFAULT_WIDTH,
 377         .height = DEFAULT_HEIGHT,
 378         .colorspace = V4L2_COLORSPACE_DEFAULT,
 379         .crop.left = 0,
 380         .crop.top = 0,
 381         .crop.width = DEFAULT_WIDTH,
 382         .crop.height = DEFAULT_HEIGHT,
 383         .fmt = &formats[0],
 384 };
 385
 386 struct rga_frame *rga_get_frame(struct rga_ctx *ctx, enum v4l2_buf_type type)
 387 {
 388         switch (type) {
 389         case V4L2_BUF_TYPE_VIDEO_OUTPUT:
 390                 return &ctx->in;
 391         case V4L2_BUF_TYPE_VIDEO_CAPTURE:
 392                 return &ctx->out;
 393         default:
 394                 return ERR_PTR(-EINVAL);
 395         }
 396 }
 397
 398 static int rga_open(struct file *file)
 399 {
 400         struct rockchip_rga *rga = video_drvdata(file);
 401         struct rga_ctx *ctx = NULL;
 402         int ret = 0;
 403
 404         ctx = kzalloc(sizeof(*ctx), GFP_KERNEL);
 405         if (!ctx)
 406                 return -ENOMEM;
 407         ctx->rga = rga;
 408         /* Set default formats */
 409         ctx->in = def_frame;
 410         ctx->out = def_frame;
 411
 412         if (mutex_lock_interruptible(&rga->mutex)) {
 413                 kfree(ctx);
 414                 return -ERESTARTSYS;
 415         }
 416         ctx->fh.m2m_ctx = v4l2_m2m_ctx_init(rga->m2m_dev, ctx, &queue_init);
 417         if (IS_ERR(ctx->fh.m2m_ctx)) {
 418                 ret = PTR_ERR(ctx->fh.m2m_ctx);
 419                 mutex_unlock(&rga->mutex);
 420                 kfree(ctx);
 421                 return ret;
 422         }
 423         v4l2_fh_init(&ctx->fh, video_devdata(file));
 424         file->private_data = &ctx->fh;
 425         v4l2_fh_add(&ctx->fh);
 426
 427         rga_setup_ctrls(ctx);
 428
 429         /* Write the default values to the ctx struct */
 430         v4l2_ctrl_handler_setup(&ctx->ctrl_handler);
 431
 432         ctx->fh.ctrl_handler = &ctx->ctrl_handler;
 433         mutex_unlock(&rga->mutex);
 434
 435         return 0;
 436 }
 437
 438 static int rga_release(struct file *file)
 439 {
 440         struct rga_ctx *ctx =
 441                 container_of(file->private_data, struct rga_ctx, fh);
 442         struct rockchip_rga *rga = ctx->rga;
 443
 444         mutex_lock(&rga->mutex);
 445
 446         v4l2_m2m_ctx_release(ctx->fh.m2m_ctx);
 447
 448         v4l2_ctrl_handler_free(&ctx->ctrl_handler);
 449         v4l2_fh_del(&ctx->fh);
 450         v4l2_fh_exit(&ctx->fh);
 451         kfree(ctx);
 452
 453         mutex_unlock(&rga->mutex);
 454
 455         return 0;
 456 }
 457
 458 static const struct v4l2_file_operations rga_fops = {
 459         .owner = THIS_MODULE,
 460         .open = rga_open,
 461         .release = rga_release,
 462         .poll = v4l2_m2m_fop_poll,
 463         .unlocked_ioctl = video_ioctl2,
 464         .mmap = v4l2_m2m_fop_mmap,
 465 };
 466
 467 static int
 468 vidioc_querycap(struct file *file, void *priv, struct v4l2_capability *cap)
 469 {
 470         strlcpy(cap->driver, RGA_NAME, sizeof(cap->driver));
 471         strlcpy(cap->card, "rockchip rga", sizeof(cap->card));
 472         strlcpy(cap->bus_info, "platform:rga", sizeof(cap->bus_info));
 473
 474         cap->device_caps = V4L2_CAP_VIDEO_M2M | V4L2_CAP_STREAMING;
 475         cap->capabilities = cap->device_caps | V4L2_CAP_DEVICE_CAPS;
 476
 477         return 0;
 478 }
 479
 480 static int vidioc_enum_fmt(struct file *file, void *prv, struct v4l2_fmtdesc *f)
 481 {
 482         struct rga_fmt *fmt;
 483
 484         if (f->index >= NUM_FORMATS)
 485                 return -EINVAL;
 486
 487         fmt = &formats[f->index];
 488         f->pixelformat = fmt->fourcc;
 489
 490         return 0;
 491 }
 492
 493 static int vidioc_g_fmt(struct file *file, void *prv, struct v4l2_format *f)
 494 {
 495         struct rga_ctx *ctx = prv;
 496         struct vb2_queue *vq;
 497         struct rga_frame *frm;
 498
 499         vq = v4l2_m2m_get_vq(ctx->fh.m2m_ctx, f->type);
 500         if (!vq)
 501                 return -EINVAL;
 502         frm = rga_get_frame(ctx, f->type);
 503         if (IS_ERR(frm))
 504                 return PTR_ERR(frm);
 505
 506         f->fmt.pix.width = frm->width;
 507         f->fmt.pix.height = frm->height;
 508         f->fmt.pix.field = V4L2_FIELD_NONE;
 509         f->fmt.pix.pixelformat = frm->fmt->fourcc;
 510         f->fmt.pix.bytesperline = frm->stride;
 511         f->fmt.pix.sizeimage = frm->size;
 512         f->fmt.pix.colorspace = frm->colorspace;
 513
 514         return 0;
 515 }
 516
 517 static int vidioc_try_fmt(struct file *file, void *prv, struct v4l2_format *f)
 518 {
 519         struct rga_fmt *fmt;
 520
 521         fmt = rga_fmt_find(f);
 522         if (!fmt) {
 523                 fmt = &formats[0];
 524                 f->fmt.pix.pixelformat = fmt->fourcc;
 525         }
 526
 527         f->fmt.pix.field = V4L2_FIELD_NONE;
 528
 529         if (f->fmt.pix.width > MAX_WIDTH)
 530                 f->fmt.pix.width = MAX_WIDTH;
 531         if (f->fmt.pix.height > MAX_HEIGHT)
 532                 f->fmt.pix.height = MAX_HEIGHT;
 533
 534         if (f->fmt.pix.width < MIN_WIDTH)
 535                 f->fmt.pix.width = MIN_WIDTH;
 536         if (f->fmt.pix.height < MIN_HEIGHT)
 537                 f->fmt.pix.height = MIN_HEIGHT;
 538
 539         if (fmt->hw_format >= RGA_COLOR_FMT_YUV422SP)
 540                 f->fmt.pix.bytesperline = f->fmt.pix.width;
 541         else
 542                 f->fmt.pix.bytesperline = (f->fmt.pix.width * fmt->depth) >> 3;
 543
 544         f->fmt.pix.sizeimage =
 545                 f->fmt.pix.height * (f->fmt.pix.width * fmt->depth) >> 3;
 546
 547         return 0;
 548 }
 549
 550 static int vidioc_s_fmt(struct file *file, void *prv, struct v4l2_format *f)
 551 {
 552         struct rga_ctx *ctx = prv;
 553         struct rockchip_rga *rga = ctx->rga;
 554         struct vb2_queue *vq;
 555         struct rga_frame *frm;
 556         struct rga_fmt *fmt;
 557         int ret = 0;
 558
 559         /* Adjust all values accordingly to the hardware capabilities
 560          * and chosen format.
 561          */
 562         ret = vidioc_try_fmt(file, prv, f);
 563         if (ret)
 564                 return ret;
 565         vq = v4l2_m2m_get_vq(ctx->fh.m2m_ctx, f->type);
 566         if (vb2_is_busy(vq)) {
 567                 v4l2_err(&rga->v4l2_dev, "queue (%d) bust\n", f->type);
 568                 return -EBUSY;
 569         }
 570         frm = rga_get_frame(ctx, f->type);
 571         if (IS_ERR(frm))
 572                 return PTR_ERR(frm);
 573         fmt = rga_fmt_find(f);
 574         if (!fmt)
 575                 return -EINVAL;
 576         frm->width = f->fmt.pix.width;
 577         frm->height = f->fmt.pix.height;
 578         frm->size = f->fmt.pix.sizeimage;
 579         frm->fmt = fmt;
 580         frm->stride = f->fmt.pix.bytesperline;
 581         frm->colorspace = f->fmt.pix.colorspace;
 582
 583         /* Reset crop settings */
 584         frm->crop.left = 0;
 585         frm->crop.top = 0;
 586         frm->crop.width = frm->width;
 587         frm->crop.height = frm->height;
 588
 589         return 0;
 590 }
 591
 592 static int
 593 vidioc_try_crop(struct rga_ctx *ctx, struct v4l2_selection *s)
 594 {
 595         struct rockchip_rga *rga = ctx->rga;
 596         struct rga_frame *f;
 597
 598         f = rga_get_frame(ctx, s->type);
 599         if (IS_ERR(f))
 600                 return PTR_ERR(f);
 601
 602         switch (s->target) {
 603         case V4L2_SEL_TGT_COMPOSE:
 604                 /*
 605                  * COMPOSE target is only valid for capture buffer type, return
 606                  * error for output buffer type
 607                  */
 608                 if (s->type == V4L2_BUF_TYPE_VIDEO_OUTPUT)
 609                         return -EINVAL;
 610                 break;
 611         case V4L2_SEL_TGT_CROP:
 612                 /*
 613                  * CROP target is only valid for output buffer type, return
 614                  * error for capture buffer type
 615                  */
 616                 if (s->type == V4L2_BUF_TYPE_VIDEO_CAPTURE)
 617                         return -EINVAL;
 618                 break;
 619         /*
 620          * bound and default crop/compose targets are invalid targets to
 621          * try/set
 622          */
 623         default:
 624                 return -EINVAL;
 625         }
 626
 627         if (s->r.top < 0 || s->r.left < 0) {
 628                 v4l2_err(&rga->v4l2_dev,
 629                          "doesn't support negative values for top & left.\n");
 630                 return -EINVAL;
 631         }
 632
 633         if (s->r.left + s->r.width > s->r.width ||
 634             s->r.top + s->r.height > s->r.height ||
 635             s->r.width < MIN_WIDTH || s->r.height < MIN_HEIGHT) {
 636                 v4l2_err(&rga->v4l2_dev, "unsupport crop value.\n");
 637                 return -EINVAL;
 638         }
 639
 640         return 0;
 641 }
 642
 643 static int vidioc_g_selection(struct file *file, void *prv,
 644                               struct v4l2_selection *s)
 645 {
 646         struct rga_ctx *ctx = prv;
 647         struct rga_frame *f;
 648         bool use_frame = false;
 649
 650         f = rga_get_frame(ctx, s->type);
 651         if (IS_ERR(f))
 652                 return PTR_ERR(f);
 653
 654         switch (s->target) {
 655         case V4L2_SEL_TGT_COMPOSE_DEFAULT:
 656         case V4L2_SEL_TGT_COMPOSE_BOUNDS:
 657                 if (s->type == V4L2_BUF_TYPE_VIDEO_OUTPUT)
 658                         return -EINVAL;
 659                 break;
 660         case V4L2_SEL_TGT_CROP_BOUNDS:
 661         case V4L2_SEL_TGT_CROP_DEFAULT:
 662                 if (s->type == V4L2_BUF_TYPE_VIDEO_CAPTURE)
 663                         return -EINVAL;
 664                 break;
 665         case V4L2_SEL_TGT_COMPOSE:
 666                 if (s->type == V4L2_BUF_TYPE_VIDEO_OUTPUT)
 667                         return -EINVAL;
 668                 use_frame = true;
 669                 break;
 670         case V4L2_SEL_TGT_CROP:
 671                 if (s->type == V4L2_BUF_TYPE_VIDEO_CAPTURE)
 672                         return -EINVAL;
 673                 use_frame = true;
 674                 break;
 675         default:
 676                 return -EINVAL;
 677         }
 678
 679         if (use_frame) {
 680                 s->r = f->crop;
 681         } else {
 682                 s->r.left = 0;
 683                 s->r.top = 0;
 684                 s->r.width = f->width;
 685                 s->r.height = f->height;
 686         }
 687
 688         return 0;
 689 }
 690
 691 static int vidioc_s_selection(struct file *file, void *prv,
 692                               struct v4l2_selection *s)
 693 {
 694         struct rga_ctx *ctx = prv;
 695         struct rga_frame *f;
 696         int ret = 0;
 697
 698         ret = vidioc_try_crop(ctx, s);
 699         if (ret)
 700                 return ret;
 701
 702         f = rga_get_frame(ctx, s->type);
 703         if (IS_ERR(f))
 704                 return PTR_ERR(f);
 705
 706         f->crop = s->r;
 707
 708         return ret;
 709 }
 710
 711 static const struct v4l2_ioctl_ops rga_ioctl_ops = {
 712         .vidioc_querycap = vidioc_querycap,
 713
 714         .vidioc_enum_fmt_vid_cap = vidioc_enum_fmt,
 715         .vidioc_g_fmt_vid_cap = vidioc_g_fmt,
 716         .vidioc_try_fmt_vid_cap = vidioc_try_fmt,
 717         .vidioc_s_fmt_vid_cap = vidioc_s_fmt,
 718
 719         .vidioc_enum_fmt_vid_out = vidioc_enum_fmt,
 720         .vidioc_g_fmt_vid_out = vidioc_g_fmt,
 721         .vidioc_try_fmt_vid_out = vidioc_try_fmt,
 722         .vidioc_s_fmt_vid_out = vidioc_s_fmt,
 723
 724         .vidioc_reqbufs = v4l2_m2m_ioctl_reqbufs,
 725         .vidioc_querybuf = v4l2_m2m_ioctl_querybuf,
 726         .vidioc_qbuf = v4l2_m2m_ioctl_qbuf,
 727         .vidioc_dqbuf = v4l2_m2m_ioctl_dqbuf,
 728         .vidioc_prepare_buf = v4l2_m2m_ioctl_prepare_buf,
 729         .vidioc_create_bufs = v4l2_m2m_ioctl_create_bufs,
 730         .vidioc_expbuf = v4l2_m2m_ioctl_expbuf,
 731
 732         .vidioc_subscribe_event = v4l2_ctrl_subscribe_event,
 733         .vidioc_unsubscribe_event = v4l2_event_unsubscribe,
 734
 735         .vidioc_streamon = v4l2_m2m_ioctl_streamon,
 736         .vidioc_streamoff = v4l2_m2m_ioctl_streamoff,
 737
 738         .vidioc_g_selection = vidioc_g_selection,
 739         .vidioc_s_selection = vidioc_s_selection,
 740 };
 741
 742 static struct video_device rga_videodev = {
 743         .name = "rockchip-rga",
 744         .fops = &rga_fops,
 745         .ioctl_ops = &rga_ioctl_ops,
 746         .minor = -1,
 747         .release = video_device_release,
 748         .vfl_dir = VFL_DIR_M2M,
 749 };
 750
 751 static int rga_enable_clocks(struct rockchip_rga *rga)
 752 {
 753         int ret;
 754
 755         ret = clk_prepare_enable(rga->sclk);
 756         if (ret) {
 757                 dev_err(rga->dev, "Cannot enable rga sclk: %d\n", ret);
 758                 return ret;
 759         }
 760
 761         ret = clk_prepare_enable(rga->aclk);
 762         if (ret) {
 763                 dev_err(rga->dev, "Cannot enable rga aclk: %d\n", ret);
 764                 goto err_disable_sclk;
 765         }
 766
 767         ret = clk_prepare_enable(rga->hclk);
 768         if (ret) {
 769                 dev_err(rga->dev, "Cannot enable rga hclk: %d\n", ret);
 770                 goto err_disable_aclk;
 771         }
 772
 773         return 0;
 774
 775 err_disable_sclk:
 776         clk_disable_unprepare(rga->sclk);
 777 err_disable_aclk:
 778         clk_disable_unprepare(rga->aclk);
 779
 780         return ret;
 781 }
 782
 783 static void rga_disable_clocks(struct rockchip_rga *rga)
 784 {
 785         clk_disable_unprepare(rga->sclk);
 786         clk_disable_unprepare(rga->hclk);
 787         clk_disable_unprepare(rga->aclk);
 788 }
 789
 790 static int rga_parse_dt(struct rockchip_rga *rga)
 791 {
 792         struct reset_control *core_rst, *axi_rst, *ahb_rst;
 793
 794         core_rst = devm_reset_control_get(rga->dev, "core");
 795         if (IS_ERR(core_rst)) {
 796                 dev_err(rga->dev, "failed to get core reset controller\n");
 797                 return PTR_ERR(core_rst);
 798         }
 799
 800         axi_rst = devm_reset_control_get(rga->dev, "axi");
 801         if (IS_ERR(axi_rst)) {
 802                 dev_err(rga->dev, "failed to get axi reset controller\n");
 803                 return PTR_ERR(axi_rst);
 804         }
 805
 806         ahb_rst = devm_reset_control_get(rga->dev, "ahb");
 807         if (IS_ERR(ahb_rst)) {
 808                 dev_err(rga->dev, "failed to get ahb reset controller\n");
 809                 return PTR_ERR(ahb_rst);
 810         }
 811
 812         reset_control_assert(core_rst);
 813         udelay(1);
 814         reset_control_deassert(core_rst);
 815
 816         reset_control_assert(axi_rst);
 817         udelay(1);
 818         reset_control_deassert(axi_rst);
 819
 820         reset_control_assert(ahb_rst);
 821         udelay(1);
 822         reset_control_deassert(ahb_rst);
 823
 824         rga->sclk = devm_clk_get(rga->dev, "sclk");
 825         if (IS_ERR(rga->sclk)) {
 826                 dev_err(rga->dev, "failed to get sclk clock\n");
 827                 return PTR_ERR(rga->sclk);
 828         }
 829
 830         rga->aclk = devm_clk_get(rga->dev, "aclk");
 831         if (IS_ERR(rga->aclk)) {
 832                 dev_err(rga->dev, "failed to get aclk clock\n");
 833                 return PTR_ERR(rga->aclk);
 834         }
 835
 836         rga->hclk = devm_clk_get(rga->dev, "hclk");
 837         if (IS_ERR(rga->hclk)) {
 838                 dev_err(rga->dev, "failed to get hclk clock\n");
 839                 return PTR_ERR(rga->hclk);
 840         }
 841
 842         return 0;
 843 }
 844
 845 static int rga_probe(struct platform_device *pdev)
 846 {
 847         struct dma_attrs cmdlist_dma_attrs;
 848         struct rockchip_rga *rga;
 849         struct video_device *vfd;
 850         struct resource *res;
 851         int ret = 0;
 852         int irq;
 853
 854         if (!pdev->dev.of_node)
 855                 return -ENODEV;
 856
 857         rga = devm_kzalloc(&pdev->dev, sizeof(*rga), GFP_KERNEL);
 858         if (!rga)
 859                 return -ENOMEM;
 860
 861         rga->dev = &pdev->dev;
 862         spin_lock_init(&rga->ctrl_lock);
 863         mutex_init(&rga->mutex);
 864
 865         init_waitqueue_head(&rga->irq_queue);
 866
 867         ret = rga_parse_dt(rga);
 868         if (ret)
 869                 dev_err(&pdev->dev, "Unable to parse OF data\n");
 870
 871         pm_runtime_enable(rga->dev);
 872
 873         res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
 874
 875         rga->regs = devm_ioremap_resource(rga->dev, res);
 876         if (IS_ERR(rga->regs)) {
 877                 ret = PTR_ERR(rga->regs);
 878                 goto err_put_clk;
 879         }
 880
 881         irq = platform_get_irq(pdev, 0);
 882         if (irq < 0) {
 883                 dev_err(rga->dev, "failed to get irq\n");
 884                 ret = irq;
 885                 goto err_put_clk;
 886         }
 887
 888         ret = devm_request_irq(rga->dev, irq, rga_isr, 0,
 889                                dev_name(rga->dev), rga);
 890         if (ret < 0) {
 891                 dev_err(rga->dev, "failed to request irq\n");
 892                 goto err_put_clk;
 893         }
 894
 895         rga->alloc_ctx = vb2_dma_sg_init_ctx(&pdev->dev);
 896
 897         ret = v4l2_device_register(&pdev->dev, &rga->v4l2_dev);
 898         if (ret)
 899                 goto err_put_clk;
 900         vfd = video_device_alloc();
 901         if (!vfd) {
 902                 v4l2_err(&rga->v4l2_dev, "Failed to allocate video device\n");
 903                 ret = -ENOMEM;
 904                 goto unreg_v4l2_dev;
 905         }
 906         *vfd = rga_videodev;
 907         vfd->lock = &rga->mutex;
 908         vfd->v4l2_dev = &rga->v4l2_dev;
 909
 910         video_set_drvdata(vfd, rga);
 911         snprintf(vfd->name, sizeof(vfd->name), "%s", rga_videodev.name);
 912         rga->vfd = vfd;
 913
 914         platform_set_drvdata(pdev, rga);
 915         rga->m2m_dev = v4l2_m2m_init(&rga_m2m_ops);
 916         if (IS_ERR(rga->m2m_dev)) {
 917                 v4l2_err(&rga->v4l2_dev, "Failed to init mem2mem device\n");
 918                 ret = PTR_ERR(rga->m2m_dev);
 919                 goto unreg_video_dev;
 920         }
 921
 922         pm_runtime_get_sync(rga->dev);
 923
 924         rga->version.major = (rga_read(rga, RGA_VERSION_INFO) >> 24) & 0xFF;
 925         rga->version.minor = (rga_read(rga, RGA_VERSION_INFO) >> 20) & 0x0F;
 926
 927         v4l2_info(&rga->v4l2_dev, "HW Version: 0x%02x.%02x\n",
 928                   rga->version.major, rga->version.minor);
 929
 930         pm_runtime_put(rga->dev);
 931
 932         /* Create CMD buffer */
 933         init_dma_attrs(&cmdlist_dma_attrs);
 934         dma_set_attr(DMA_ATTR_WRITE_COMBINE, &cmdlist_dma_attrs);
 935         rga->cmdbuf_virt = dma_alloc_attrs(rga->dev, RGA_CMDBUF_SIZE,
 936                                            &rga->cmdbuf_phy, GFP_KERNEL,
 937                                            &cmdlist_dma_attrs);
 938
 939         rga->src_mmu_pages =
 940                 (unsigned int *)__get_free_pages(GFP_KERNEL | __GFP_ZERO, 3);
 941         rga->dst_mmu_pages =
 942                 (unsigned int *)__get_free_pages(GFP_KERNEL | __GFP_ZERO, 3);
 943
 944         def_frame.stride = (def_frame.width * def_frame.fmt->depth) >> 3;
 945         def_frame.size = def_frame.stride * def_frame.height;
 946
 947         ret = video_register_device(vfd, VFL_TYPE_GRABBER, -1);
 948         if (ret) {
 949                 v4l2_err(&rga->v4l2_dev, "Failed to register video device\n");
 950                 goto rel_vdev;
 951         }
 952         v4l2_info(&rga->v4l2_dev, "Registered %s as /dev/%s\n",
 953                   vfd->name, video_device_node_name(vfd));
 954
 955         return 0;
 956
 957 rel_vdev:
 958         video_device_release(vfd);
 959 unreg_video_dev:
 960         video_unregister_device(rga->vfd);
 961 unreg_v4l2_dev:
 962         v4l2_device_unregister(&rga->v4l2_dev);
 963 err_put_clk:
 964         pm_runtime_disable(rga->dev);
 965
 966         return ret;
 967 }
 968
 969 static int rga_remove(struct platform_device *pdev)
 970 {
 971         struct rockchip_rga *rga = platform_get_drvdata(pdev);
 972         DEFINE_DMA_ATTRS(attrs);
 973
 974         dma_free_attrs(rga->dev, RGA_CMDBUF_SIZE, &rga->cmdbuf_virt,
 975                        rga->cmdbuf_phy, &attrs);
 976
 977         free_pages((unsigned long)rga->src_mmu_pages, 3);
 978         free_pages((unsigned long)rga->dst_mmu_pages, 3);
 979
 980         v4l2_info(&rga->v4l2_dev, "Removing\n");
 981
 982         v4l2_m2m_release(rga->m2m_dev);
 983         video_unregister_device(rga->vfd);
 984         v4l2_device_unregister(&rga->v4l2_dev);
 985         vb2_dma_sg_cleanup_ctx(rga->alloc_ctx);
 986
 987         pm_runtime_disable(rga->dev);
 988
 989         return 0;
 990 }
 991
 992 #ifdef CONFIG_PM
 993 static int rga_runtime_suspend(struct device *dev)
 994 {
 995         struct rockchip_rga *rga = dev_get_drvdata(dev);
 996
 997         rga_disable_clocks(rga);
 998
 999         return 0;
1000 }
1001
1002 static int rga_runtime_resume(struct device *dev)
1003 {
1004         struct rockchip_rga *rga = dev_get_drvdata(dev);
1005
1006         return rga_enable_clocks(rga);
1007 }
1008 #endif
1009
1010 static const struct dev_pm_ops rga_pm = {
1011         SET_RUNTIME_PM_OPS(rga_runtime_suspend,
1012                            rga_runtime_resume, NULL)
1013 };
1014
1015 static const struct of_device_id rockchip_rga_match[] = {
1016         {
1017                 .compatible = "rockchip,rk3288-rga",
1018         },
1019         {
1020                 .compatible = "rockchip,rk3399-rga",
1021         },
1022         {},
1023 };
1024
1025 MODULE_DEVICE_TABLE(of, rockchip_rga_match);
1026
1027 static struct platform_driver rga_pdrv = {
1028         .probe = rga_probe,
1029         .remove = rga_remove,
1030         .driver = {
1031                 .name = RGA_NAME,
1032                 .pm = &rga_pm,
1033                 .of_match_table = rockchip_rga_match,
1034         },
1035 };
1036
1037 module_platform_driver(rga_pdrv);
1038
1039 MODULE_AUTHOR("Jacob Chen <jacob-chen@iotwrt.com>");
1040 MODULE_DESCRIPTION("Rockchip Raster 2d Grapphic Acceleration Unit");
1041 MODULE_LICENSE("GPL");