2 * vsp1_bru.c -- R-Car VSP1 Blend ROP Unit
4 * Copyright (C) 2013 Renesas Corporation
6 * Contact: Laurent Pinchart (laurent.pinchart@ideasonboard.com)
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License as published by
10 * the Free Software Foundation; either version 2 of the License, or
11 * (at your option) any later version.
14 #include <linux/device.h>
15 #include <linux/gfp.h>
17 #include <media/v4l2-subdev.h>
21 #include "vsp1_rwpf.h"
23 #define BRU_MIN_SIZE 1U
24 #define BRU_MAX_SIZE 8190U
26 /* -----------------------------------------------------------------------------
30 static inline u32 vsp1_bru_read(struct vsp1_bru *bru, u32 reg)
32 return vsp1_read(bru->entity.vsp1, reg);
35 static inline void vsp1_bru_write(struct vsp1_bru *bru, u32 reg, u32 data)
37 vsp1_write(bru->entity.vsp1, reg, data);
40 /* -----------------------------------------------------------------------------
44 static int bru_s_ctrl(struct v4l2_ctrl *ctrl)
46 struct vsp1_bru *bru =
47 container_of(ctrl->handler, struct vsp1_bru, ctrls);
49 if (!vsp1_entity_is_streaming(&bru->entity))
53 case V4L2_CID_BG_COLOR:
54 vsp1_bru_write(bru, VI6_BRU_VIRRPF_COL, ctrl->val |
55 (0xff << VI6_BRU_VIRRPF_COL_A_SHIFT));
62 static const struct v4l2_ctrl_ops bru_ctrl_ops = {
66 /* -----------------------------------------------------------------------------
67 * V4L2 Subdevice Core Operations
70 static int bru_s_stream(struct v4l2_subdev *subdev, int enable)
72 struct vsp1_pipeline *pipe = to_vsp1_pipeline(&subdev->entity);
73 struct vsp1_bru *bru = to_bru(subdev);
74 struct v4l2_mbus_framefmt *format;
79 ret = vsp1_entity_set_streaming(&bru->entity, enable);
86 format = &bru->entity.formats[BRU_PAD_SOURCE];
88 /* The hardware is extremely flexible but we have no userspace API to
89 * expose all the parameters, nor is it clear whether we would have use
90 * cases for all the supported modes. Let's just harcode the parameters
91 * to sane default values for now.
94 /* Disable dithering and enable color data normalization unless the
95 * format at the pipeline output is premultiplied.
97 flags = pipe->output ? pipe->output->video.format.flags : 0;
98 vsp1_bru_write(bru, VI6_BRU_INCTRL,
99 flags & V4L2_PIX_FMT_FLAG_PREMUL_ALPHA ?
100 0 : VI6_BRU_INCTRL_NRM);
102 /* Set the background position to cover the whole output image. */
103 vsp1_bru_write(bru, VI6_BRU_VIRRPF_SIZE,
104 (format->width << VI6_BRU_VIRRPF_SIZE_HSIZE_SHIFT) |
105 (format->height << VI6_BRU_VIRRPF_SIZE_VSIZE_SHIFT));
106 vsp1_bru_write(bru, VI6_BRU_VIRRPF_LOC, 0);
108 /* Route BRU input 1 as SRC input to the ROP unit and configure the ROP
109 * unit with a NOP operation to make BRU input 1 available as the
110 * Blend/ROP unit B SRC input.
112 vsp1_bru_write(bru, VI6_BRU_ROP, VI6_BRU_ROP_DSTSEL_BRUIN(1) |
113 VI6_BRU_ROP_CROP(VI6_ROP_NOP) |
114 VI6_BRU_ROP_AROP(VI6_ROP_NOP));
116 for (i = 0; i < 4; ++i) {
117 bool premultiplied = false;
120 /* Configure all Blend/ROP units corresponding to an enabled BRU
121 * input for alpha blending. Blend/ROP units corresponding to
122 * disabled BRU inputs are used in ROP NOP mode to ignore the
125 if (bru->inputs[i].rpf) {
126 ctrl |= VI6_BRU_CTRL_RBC;
128 premultiplied = bru->inputs[i].rpf->video.format.flags
129 & V4L2_PIX_FMT_FLAG_PREMUL_ALPHA;
131 ctrl |= VI6_BRU_CTRL_CROP(VI6_ROP_NOP)
132 | VI6_BRU_CTRL_AROP(VI6_ROP_NOP);
135 /* Select the virtual RPF as the Blend/ROP unit A DST input to
136 * serve as a background color.
139 ctrl |= VI6_BRU_CTRL_DSTSEL_VRPF;
141 /* Route BRU inputs 0 to 3 as SRC inputs to Blend/ROP units A to
142 * D in that order. The Blend/ROP unit B SRC is hardwired to the
143 * ROP unit output, the corresponding register bits must be set
147 ctrl |= VI6_BRU_CTRL_SRCSEL_BRUIN(i);
149 vsp1_bru_write(bru, VI6_BRU_CTRL(i), ctrl);
151 /* Harcode the blending formula to
153 * DSTc = DSTc * (1 - SRCa) + SRCc * SRCa
154 * DSTa = DSTa * (1 - SRCa) + SRCa
156 * when the SRC input isn't premultiplied, and to
158 * DSTc = DSTc * (1 - SRCa) + SRCc
159 * DSTa = DSTa * (1 - SRCa) + SRCa
163 vsp1_bru_write(bru, VI6_BRU_BLD(i),
164 VI6_BRU_BLD_CCMDX_255_SRC_A |
165 (premultiplied ? VI6_BRU_BLD_CCMDY_COEFY :
166 VI6_BRU_BLD_CCMDY_SRC_A) |
167 VI6_BRU_BLD_ACMDX_255_SRC_A |
168 VI6_BRU_BLD_ACMDY_COEFY |
169 (0xff << VI6_BRU_BLD_COEFY_SHIFT));
175 /* -----------------------------------------------------------------------------
176 * V4L2 Subdevice Pad Operations
180 * The BRU can't perform format conversion, all sink and source formats must be
181 * identical. We pick the format on the first sink pad (pad 0) and propagate it
185 static int bru_enum_mbus_code(struct v4l2_subdev *subdev,
186 struct v4l2_subdev_pad_config *cfg,
187 struct v4l2_subdev_mbus_code_enum *code)
189 static const unsigned int codes[] = {
190 MEDIA_BUS_FMT_ARGB8888_1X32,
191 MEDIA_BUS_FMT_AYUV8_1X32,
193 struct vsp1_bru *bru = to_bru(subdev);
194 struct v4l2_mbus_framefmt *format;
196 if (code->pad == BRU_PAD_SINK(0)) {
197 if (code->index >= ARRAY_SIZE(codes))
200 code->code = codes[code->index];
205 format = vsp1_entity_get_pad_format(&bru->entity, cfg,
206 BRU_PAD_SINK(0), code->which);
207 code->code = format->code;
213 static int bru_enum_frame_size(struct v4l2_subdev *subdev,
214 struct v4l2_subdev_pad_config *cfg,
215 struct v4l2_subdev_frame_size_enum *fse)
220 if (fse->code != MEDIA_BUS_FMT_ARGB8888_1X32 &&
221 fse->code != MEDIA_BUS_FMT_AYUV8_1X32)
224 fse->min_width = BRU_MIN_SIZE;
225 fse->max_width = BRU_MAX_SIZE;
226 fse->min_height = BRU_MIN_SIZE;
227 fse->max_height = BRU_MAX_SIZE;
232 static struct v4l2_rect *bru_get_compose(struct vsp1_bru *bru,
233 struct v4l2_subdev_pad_config *cfg,
234 unsigned int pad, u32 which)
237 case V4L2_SUBDEV_FORMAT_TRY:
238 return v4l2_subdev_get_try_crop(&bru->entity.subdev, cfg, pad);
239 case V4L2_SUBDEV_FORMAT_ACTIVE:
240 return &bru->inputs[pad].compose;
246 static int bru_get_format(struct v4l2_subdev *subdev, struct v4l2_subdev_pad_config *cfg,
247 struct v4l2_subdev_format *fmt)
249 struct vsp1_bru *bru = to_bru(subdev);
251 fmt->format = *vsp1_entity_get_pad_format(&bru->entity, cfg, fmt->pad,
257 static void bru_try_format(struct vsp1_bru *bru, struct v4l2_subdev_pad_config *cfg,
258 unsigned int pad, struct v4l2_mbus_framefmt *fmt,
259 enum v4l2_subdev_format_whence which)
261 struct v4l2_mbus_framefmt *format;
264 case BRU_PAD_SINK(0):
265 /* Default to YUV if the requested format is not supported. */
266 if (fmt->code != MEDIA_BUS_FMT_ARGB8888_1X32 &&
267 fmt->code != MEDIA_BUS_FMT_AYUV8_1X32)
268 fmt->code = MEDIA_BUS_FMT_AYUV8_1X32;
272 /* The BRU can't perform format conversion. */
273 format = vsp1_entity_get_pad_format(&bru->entity, cfg,
274 BRU_PAD_SINK(0), which);
275 fmt->code = format->code;
279 fmt->width = clamp(fmt->width, BRU_MIN_SIZE, BRU_MAX_SIZE);
280 fmt->height = clamp(fmt->height, BRU_MIN_SIZE, BRU_MAX_SIZE);
281 fmt->field = V4L2_FIELD_NONE;
282 fmt->colorspace = V4L2_COLORSPACE_SRGB;
285 static int bru_set_format(struct v4l2_subdev *subdev, struct v4l2_subdev_pad_config *cfg,
286 struct v4l2_subdev_format *fmt)
288 struct vsp1_bru *bru = to_bru(subdev);
289 struct v4l2_mbus_framefmt *format;
291 bru_try_format(bru, cfg, fmt->pad, &fmt->format, fmt->which);
293 format = vsp1_entity_get_pad_format(&bru->entity, cfg, fmt->pad,
295 *format = fmt->format;
297 /* Reset the compose rectangle */
298 if (fmt->pad != BRU_PAD_SOURCE) {
299 struct v4l2_rect *compose;
301 compose = bru_get_compose(bru, cfg, fmt->pad, fmt->which);
304 compose->width = format->width;
305 compose->height = format->height;
308 /* Propagate the format code to all pads */
309 if (fmt->pad == BRU_PAD_SINK(0)) {
312 for (i = 0; i <= BRU_PAD_SOURCE; ++i) {
313 format = vsp1_entity_get_pad_format(&bru->entity, cfg,
315 format->code = fmt->format.code;
322 static int bru_get_selection(struct v4l2_subdev *subdev,
323 struct v4l2_subdev_pad_config *cfg,
324 struct v4l2_subdev_selection *sel)
326 struct vsp1_bru *bru = to_bru(subdev);
328 if (sel->pad == BRU_PAD_SOURCE)
331 switch (sel->target) {
332 case V4L2_SEL_TGT_COMPOSE_BOUNDS:
335 sel->r.width = BRU_MAX_SIZE;
336 sel->r.height = BRU_MAX_SIZE;
339 case V4L2_SEL_TGT_COMPOSE:
340 sel->r = *bru_get_compose(bru, cfg, sel->pad, sel->which);
348 static int bru_set_selection(struct v4l2_subdev *subdev,
349 struct v4l2_subdev_pad_config *cfg,
350 struct v4l2_subdev_selection *sel)
352 struct vsp1_bru *bru = to_bru(subdev);
353 struct v4l2_mbus_framefmt *format;
354 struct v4l2_rect *compose;
356 if (sel->pad == BRU_PAD_SOURCE)
359 if (sel->target != V4L2_SEL_TGT_COMPOSE)
362 /* The compose rectangle top left corner must be inside the output
365 format = vsp1_entity_get_pad_format(&bru->entity, cfg, BRU_PAD_SOURCE,
367 sel->r.left = clamp_t(unsigned int, sel->r.left, 0, format->width - 1);
368 sel->r.top = clamp_t(unsigned int, sel->r.top, 0, format->height - 1);
370 /* Scaling isn't supported, the compose rectangle size must be identical
371 * to the sink format size.
373 format = vsp1_entity_get_pad_format(&bru->entity, cfg, sel->pad,
375 sel->r.width = format->width;
376 sel->r.height = format->height;
378 compose = bru_get_compose(bru, cfg, sel->pad, sel->which);
384 /* -----------------------------------------------------------------------------
385 * V4L2 Subdevice Operations
388 static struct v4l2_subdev_video_ops bru_video_ops = {
389 .s_stream = bru_s_stream,
392 static struct v4l2_subdev_pad_ops bru_pad_ops = {
393 .enum_mbus_code = bru_enum_mbus_code,
394 .enum_frame_size = bru_enum_frame_size,
395 .get_fmt = bru_get_format,
396 .set_fmt = bru_set_format,
397 .get_selection = bru_get_selection,
398 .set_selection = bru_set_selection,
401 static struct v4l2_subdev_ops bru_ops = {
402 .video = &bru_video_ops,
406 /* -----------------------------------------------------------------------------
407 * Initialization and Cleanup
410 struct vsp1_bru *vsp1_bru_create(struct vsp1_device *vsp1)
412 struct v4l2_subdev *subdev;
413 struct vsp1_bru *bru;
416 bru = devm_kzalloc(vsp1->dev, sizeof(*bru), GFP_KERNEL);
418 return ERR_PTR(-ENOMEM);
420 bru->entity.type = VSP1_ENTITY_BRU;
422 ret = vsp1_entity_init(vsp1, &bru->entity, 5);
426 /* Initialize the V4L2 subdev. */
427 subdev = &bru->entity.subdev;
428 v4l2_subdev_init(subdev, &bru_ops);
430 subdev->entity.ops = &vsp1_media_ops;
431 subdev->internal_ops = &vsp1_subdev_internal_ops;
432 snprintf(subdev->name, sizeof(subdev->name), "%s bru",
433 dev_name(vsp1->dev));
434 v4l2_set_subdevdata(subdev, bru);
435 subdev->flags |= V4L2_SUBDEV_FL_HAS_DEVNODE;
437 vsp1_entity_init_formats(subdev, NULL);
439 /* Initialize the control handler. */
440 v4l2_ctrl_handler_init(&bru->ctrls, 1);
441 v4l2_ctrl_new_std(&bru->ctrls, &bru_ctrl_ops, V4L2_CID_BG_COLOR,
444 bru->entity.subdev.ctrl_handler = &bru->ctrls;
446 if (bru->ctrls.error) {
447 dev_err(vsp1->dev, "bru: failed to initialize controls\n");
448 ret = bru->ctrls.error;
449 vsp1_entity_destroy(&bru->entity);