2 * mxl5007t.c - driver for the MaxLinear MxL5007T silicon tuner
4 * Copyright (C) 2008, 2009 Michael Krufky <mkrufky@linuxtv.org>
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software
18 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
21 #include <linux/i2c.h>
22 #include <linux/types.h>
23 #include <linux/videodev2.h>
24 #include "tuner-i2c.h"
27 static DEFINE_MUTEX(mxl5007t_list_mutex);
28 static LIST_HEAD(hybrid_tuner_instance_list);
30 static int mxl5007t_debug;
31 module_param_named(debug, mxl5007t_debug, int, 0644);
32 MODULE_PARM_DESC(debug, "set debug level");
34 /* ------------------------------------------------------------------------- */
36 #define mxl_printk(kern, fmt, arg...) \
37 printk(kern "%s: " fmt "\n", __func__, ##arg)
39 #define mxl_err(fmt, arg...) \
40 mxl_printk(KERN_ERR, "%d: " fmt, __LINE__, ##arg)
42 #define mxl_warn(fmt, arg...) \
43 mxl_printk(KERN_WARNING, fmt, ##arg)
45 #define mxl_info(fmt, arg...) \
46 mxl_printk(KERN_INFO, fmt, ##arg)
48 #define mxl_debug(fmt, arg...) \
51 mxl_printk(KERN_DEBUG, fmt, ##arg); \
54 #define mxl_fail(ret) \
59 mxl_printk(KERN_ERR, "error %d on line %d", \
64 /* ------------------------------------------------------------------------- */
72 MxL_MODE_CABLE = 0x10,
75 enum mxl5007t_chip_version {
76 MxL_UNKNOWN_ID = 0x00,
77 MxL_5007_V1_F1 = 0x11,
78 MxL_5007_V1_F2 = 0x12,
80 MxL_5007_V2_100_F1 = 0x21,
81 MxL_5007_V2_100_F2 = 0x22,
82 MxL_5007_V2_200_F1 = 0x23,
83 MxL_5007_V2_200_F2 = 0x24,
91 /* ------------------------------------------------------------------------- */
93 static struct reg_pair_t init_tab[] = {
98 { 0x2e, 0x15 }, /* OVERRIDE */
99 { 0x30, 0x10 }, /* OVERRIDE */
100 { 0x45, 0x58 }, /* OVERRIDE */
101 { 0x48, 0x19 }, /* OVERRIDE */
102 { 0x52, 0x03 }, /* OVERRIDE */
103 { 0x53, 0x44 }, /* OVERRIDE */
104 { 0x6a, 0x4b }, /* OVERRIDE */
105 { 0x76, 0x00 }, /* OVERRIDE */
106 { 0x78, 0x18 }, /* OVERRIDE */
107 { 0x7a, 0x17 }, /* OVERRIDE */
108 { 0x85, 0x06 }, /* OVERRIDE */
109 { 0x01, 0x01 }, /* TOP_MASTER_ENABLE */
113 static struct reg_pair_t init_tab_cable[] = {
121 { 0x2e, 0x15 }, /* OVERRIDE */
122 { 0x30, 0x10 }, /* OVERRIDE */
123 { 0x45, 0x58 }, /* OVERRIDE */
124 { 0x48, 0x19 }, /* OVERRIDE */
125 { 0x52, 0x03 }, /* OVERRIDE */
126 { 0x53, 0x44 }, /* OVERRIDE */
127 { 0x6a, 0x4b }, /* OVERRIDE */
128 { 0x76, 0x00 }, /* OVERRIDE */
129 { 0x78, 0x18 }, /* OVERRIDE */
130 { 0x7a, 0x17 }, /* OVERRIDE */
131 { 0x85, 0x06 }, /* OVERRIDE */
132 { 0x01, 0x01 }, /* TOP_MASTER_ENABLE */
136 /* ------------------------------------------------------------------------- */
138 static struct reg_pair_t reg_pair_rftune[] = {
139 { 0x0f, 0x00 }, /* abort tune */
143 { 0x1f, 0x87 }, /* OVERRIDE */
144 { 0x20, 0x1f }, /* OVERRIDE */
145 { 0x21, 0x87 }, /* OVERRIDE */
146 { 0x22, 0x1f }, /* OVERRIDE */
147 { 0x80, 0x01 }, /* freq dependent */
148 { 0x0f, 0x01 }, /* start tune */
152 /* ------------------------------------------------------------------------- */
154 struct mxl5007t_state {
155 struct list_head hybrid_tuner_instance_list;
156 struct tuner_i2c_props i2c_props;
160 struct mxl5007t_config *config;
162 enum mxl5007t_chip_version chip_id;
164 struct reg_pair_t tab_init[ARRAY_SIZE(init_tab)];
165 struct reg_pair_t tab_init_cable[ARRAY_SIZE(init_tab_cable)];
166 struct reg_pair_t tab_rftune[ARRAY_SIZE(reg_pair_rftune)];
168 enum mxl5007t_if_freq if_freq;
174 /* ------------------------------------------------------------------------- */
176 /* called by _init and _rftun to manipulate the register arrays */
178 static void set_reg_bits(struct reg_pair_t *reg_pair, u8 reg, u8 mask, u8 val)
182 while (reg_pair[i].reg || reg_pair[i].val) {
183 if (reg_pair[i].reg == reg) {
184 reg_pair[i].val &= ~mask;
185 reg_pair[i].val |= val;
193 static void copy_reg_bits(struct reg_pair_t *reg_pair1,
194 struct reg_pair_t *reg_pair2)
200 while (reg_pair1[i].reg || reg_pair1[i].val) {
201 while (reg_pair2[j].reg || reg_pair2[j].val) {
202 if (reg_pair1[i].reg != reg_pair2[j].reg) {
206 reg_pair2[j].val = reg_pair1[i].val;
214 /* ------------------------------------------------------------------------- */
216 static void mxl5007t_set_mode_bits(struct mxl5007t_state *state,
217 enum mxl5007t_mode mode,
218 s32 if_diff_out_level)
222 set_reg_bits(state->tab_init, 0x06, 0x1f, 0x12);
225 set_reg_bits(state->tab_init, 0x06, 0x1f, 0x11);
228 set_reg_bits(state->tab_init, 0x06, 0x1f, 0x10);
231 set_reg_bits(state->tab_init_cable, 0x09, 0xff, 0xc1);
232 set_reg_bits(state->tab_init_cable, 0x0a, 0xff,
233 8 - if_diff_out_level);
234 set_reg_bits(state->tab_init_cable, 0x0b, 0xff, 0x17);
242 static void mxl5007t_set_if_freq_bits(struct mxl5007t_state *state,
243 enum mxl5007t_if_freq if_freq,
255 case MxL_IF_4_57_MHZ:
261 case MxL_IF_5_38_MHZ:
267 case MxL_IF_6_28_MHZ:
270 case MxL_IF_9_1915_MHZ:
273 case MxL_IF_35_25_MHZ:
276 case MxL_IF_36_15_MHZ:
286 set_reg_bits(state->tab_init, 0x02, 0x0f, val);
288 /* set inverted IF or normal IF */
289 set_reg_bits(state->tab_init, 0x02, 0x10, invert_if ? 0x10 : 0x00);
291 state->if_freq = if_freq;
296 static void mxl5007t_set_xtal_freq_bits(struct mxl5007t_state *state,
297 enum mxl5007t_xtal_freq xtal_freq)
300 case MxL_XTAL_16_MHZ:
301 /* select xtal freq & ref freq */
302 set_reg_bits(state->tab_init, 0x03, 0xf0, 0x00);
303 set_reg_bits(state->tab_init, 0x05, 0x0f, 0x00);
305 case MxL_XTAL_20_MHZ:
306 set_reg_bits(state->tab_init, 0x03, 0xf0, 0x10);
307 set_reg_bits(state->tab_init, 0x05, 0x0f, 0x01);
309 case MxL_XTAL_20_25_MHZ:
310 set_reg_bits(state->tab_init, 0x03, 0xf0, 0x20);
311 set_reg_bits(state->tab_init, 0x05, 0x0f, 0x02);
313 case MxL_XTAL_20_48_MHZ:
314 set_reg_bits(state->tab_init, 0x03, 0xf0, 0x30);
315 set_reg_bits(state->tab_init, 0x05, 0x0f, 0x03);
317 case MxL_XTAL_24_MHZ:
318 set_reg_bits(state->tab_init, 0x03, 0xf0, 0x40);
319 set_reg_bits(state->tab_init, 0x05, 0x0f, 0x04);
321 case MxL_XTAL_25_MHZ:
322 set_reg_bits(state->tab_init, 0x03, 0xf0, 0x50);
323 set_reg_bits(state->tab_init, 0x05, 0x0f, 0x05);
325 case MxL_XTAL_25_14_MHZ:
326 set_reg_bits(state->tab_init, 0x03, 0xf0, 0x60);
327 set_reg_bits(state->tab_init, 0x05, 0x0f, 0x06);
329 case MxL_XTAL_27_MHZ:
330 set_reg_bits(state->tab_init, 0x03, 0xf0, 0x70);
331 set_reg_bits(state->tab_init, 0x05, 0x0f, 0x07);
333 case MxL_XTAL_28_8_MHZ:
334 set_reg_bits(state->tab_init, 0x03, 0xf0, 0x80);
335 set_reg_bits(state->tab_init, 0x05, 0x0f, 0x08);
337 case MxL_XTAL_32_MHZ:
338 set_reg_bits(state->tab_init, 0x03, 0xf0, 0x90);
339 set_reg_bits(state->tab_init, 0x05, 0x0f, 0x09);
341 case MxL_XTAL_40_MHZ:
342 set_reg_bits(state->tab_init, 0x03, 0xf0, 0xa0);
343 set_reg_bits(state->tab_init, 0x05, 0x0f, 0x0a);
345 case MxL_XTAL_44_MHZ:
346 set_reg_bits(state->tab_init, 0x03, 0xf0, 0xb0);
347 set_reg_bits(state->tab_init, 0x05, 0x0f, 0x0b);
349 case MxL_XTAL_48_MHZ:
350 set_reg_bits(state->tab_init, 0x03, 0xf0, 0xc0);
351 set_reg_bits(state->tab_init, 0x05, 0x0f, 0x0c);
353 case MxL_XTAL_49_3811_MHZ:
354 set_reg_bits(state->tab_init, 0x03, 0xf0, 0xd0);
355 set_reg_bits(state->tab_init, 0x05, 0x0f, 0x0d);
365 static struct reg_pair_t *mxl5007t_calc_init_regs(struct mxl5007t_state *state,
366 enum mxl5007t_mode mode)
368 struct mxl5007t_config *cfg = state->config;
370 memcpy(&state->tab_init, &init_tab, sizeof(init_tab));
371 memcpy(&state->tab_init_cable, &init_tab_cable, sizeof(init_tab_cable));
373 mxl5007t_set_mode_bits(state, mode, cfg->if_diff_out_level);
374 mxl5007t_set_if_freq_bits(state, cfg->if_freq_hz, cfg->invert_if);
375 mxl5007t_set_xtal_freq_bits(state, cfg->xtal_freq_hz);
377 set_reg_bits(state->tab_init, 0x04, 0x01, cfg->loop_thru_enable);
378 set_reg_bits(state->tab_init, 0x03, 0x08, cfg->clk_out_enable << 3);
379 set_reg_bits(state->tab_init, 0x03, 0x07, cfg->clk_out_amp);
381 if (mode >= MxL_MODE_CABLE) {
382 copy_reg_bits(state->tab_init, state->tab_init_cable);
383 return state->tab_init_cable;
385 return state->tab_init;
388 /* ------------------------------------------------------------------------- */
390 enum mxl5007t_bw_mhz {
396 static void mxl5007t_set_bw_bits(struct mxl5007t_state *state,
397 enum mxl5007t_bw_mhz bw)
403 val = 0x15; /* set DIG_MODEINDEX, DIG_MODEINDEX_A,
404 * and DIG_MODEINDEX_CSF */
416 set_reg_bits(state->tab_rftune, 0x0c, 0x3f, val);
422 reg_pair_t *mxl5007t_calc_rf_tune_regs(struct mxl5007t_state *state,
423 u32 rf_freq, enum mxl5007t_bw_mhz bw)
427 u32 frac_divider = 1000000;
430 memcpy(&state->tab_rftune, ®_pair_rftune, sizeof(reg_pair_rftune));
432 mxl5007t_set_bw_bits(state, bw);
434 /* Convert RF frequency into 16 bits =>
435 * 10 bit integer (MHz) + 6 bit fraction */
436 dig_rf_freq = rf_freq / MHz;
438 temp = rf_freq % MHz;
440 for (i = 0; i < 6; i++) {
443 if (temp > frac_divider) {
444 temp -= frac_divider;
449 /* add to have shift center point by 7.8124 kHz */
453 set_reg_bits(state->tab_rftune, 0x0d, 0xff, (u8) dig_rf_freq);
454 set_reg_bits(state->tab_rftune, 0x0e, 0xff, (u8) (dig_rf_freq >> 8));
456 if (rf_freq >= 333000000)
457 set_reg_bits(state->tab_rftune, 0x80, 0x40, 0x40);
459 return state->tab_rftune;
462 /* ------------------------------------------------------------------------- */
464 static int mxl5007t_write_reg(struct mxl5007t_state *state, u8 reg, u8 val)
466 u8 buf[] = { reg, val };
467 struct i2c_msg msg = { .addr = state->i2c_props.addr, .flags = 0,
468 .buf = buf, .len = 2 };
471 ret = i2c_transfer(state->i2c_props.adap, &msg, 1);
479 static int mxl5007t_write_regs(struct mxl5007t_state *state,
480 struct reg_pair_t *reg_pair)
485 while ((ret == 0) && (reg_pair[i].reg || reg_pair[i].val)) {
486 ret = mxl5007t_write_reg(state,
487 reg_pair[i].reg, reg_pair[i].val);
493 static int mxl5007t_read_reg(struct mxl5007t_state *state, u8 reg, u8 *val)
495 u8 buf[2] = { 0xfb, reg };
496 struct i2c_msg msg[] = {
497 { .addr = state->i2c_props.addr, .flags = 0,
498 .buf = buf, .len = 2 },
499 { .addr = state->i2c_props.addr, .flags = I2C_M_RD,
500 .buf = val, .len = 1 },
504 ret = i2c_transfer(state->i2c_props.adap, msg, 2);
512 static int mxl5007t_soft_reset(struct mxl5007t_state *state)
515 struct i2c_msg msg = {
516 .addr = state->i2c_props.addr, .flags = 0,
519 int ret = i2c_transfer(state->i2c_props.adap, &msg, 1);
528 static int mxl5007t_tuner_init(struct mxl5007t_state *state,
529 enum mxl5007t_mode mode)
531 struct reg_pair_t *init_regs;
534 ret = mxl5007t_soft_reset(state);
538 /* calculate initialization reg array */
539 init_regs = mxl5007t_calc_init_regs(state, mode);
541 ret = mxl5007t_write_regs(state, init_regs);
549 static int mxl5007t_tuner_rf_tune(struct mxl5007t_state *state, u32 rf_freq_hz,
550 enum mxl5007t_bw_mhz bw)
552 struct reg_pair_t *rf_tune_regs;
555 /* calculate channel change reg array */
556 rf_tune_regs = mxl5007t_calc_rf_tune_regs(state, rf_freq_hz, bw);
558 ret = mxl5007t_write_regs(state, rf_tune_regs);
566 /* ------------------------------------------------------------------------- */
568 static int mxl5007t_synth_lock_status(struct mxl5007t_state *state,
569 int *rf_locked, int *ref_locked)
577 ret = mxl5007t_read_reg(state, 0xd8, &d);
581 if ((d & 0x0c) == 0x0c)
584 if ((d & 0x03) == 0x03)
590 /* ------------------------------------------------------------------------- */
592 static int mxl5007t_get_status(struct dvb_frontend *fe, u32 *status)
594 struct mxl5007t_state *state = fe->tuner_priv;
595 int rf_locked, ref_locked, ret;
599 if (fe->ops.i2c_gate_ctrl)
600 fe->ops.i2c_gate_ctrl(fe, 1);
602 ret = mxl5007t_synth_lock_status(state, &rf_locked, &ref_locked);
605 mxl_debug("%s%s", rf_locked ? "rf locked " : "",
606 ref_locked ? "ref locked" : "");
608 if ((rf_locked) || (ref_locked))
609 *status |= TUNER_STATUS_LOCKED;
611 if (fe->ops.i2c_gate_ctrl)
612 fe->ops.i2c_gate_ctrl(fe, 0);
617 /* ------------------------------------------------------------------------- */
619 static int mxl5007t_set_params(struct dvb_frontend *fe)
621 struct dtv_frontend_properties *c = &fe->dtv_property_cache;
622 u32 delsys = c->delivery_system;
623 struct mxl5007t_state *state = fe->tuner_priv;
624 enum mxl5007t_bw_mhz bw;
625 enum mxl5007t_mode mode;
627 u32 freq = c->frequency;
631 mode = MxL_MODE_ATSC;
634 case SYS_DVBC_ANNEX_B:
635 mode = MxL_MODE_CABLE;
640 mode = MxL_MODE_DVBT;
641 switch (c->bandwidth_hz) {
656 mxl_err("modulation type not supported!");
660 if (fe->ops.i2c_gate_ctrl)
661 fe->ops.i2c_gate_ctrl(fe, 1);
663 mutex_lock(&state->lock);
665 ret = mxl5007t_tuner_init(state, mode);
669 ret = mxl5007t_tuner_rf_tune(state, freq, bw);
673 state->frequency = freq;
674 state->bandwidth = c->bandwidth_hz;
676 mutex_unlock(&state->lock);
678 if (fe->ops.i2c_gate_ctrl)
679 fe->ops.i2c_gate_ctrl(fe, 0);
684 /* ------------------------------------------------------------------------- */
686 static int mxl5007t_init(struct dvb_frontend *fe)
688 struct mxl5007t_state *state = fe->tuner_priv;
691 if (fe->ops.i2c_gate_ctrl)
692 fe->ops.i2c_gate_ctrl(fe, 1);
694 /* wake from standby */
695 ret = mxl5007t_write_reg(state, 0x01, 0x01);
698 if (fe->ops.i2c_gate_ctrl)
699 fe->ops.i2c_gate_ctrl(fe, 0);
704 static int mxl5007t_sleep(struct dvb_frontend *fe)
706 struct mxl5007t_state *state = fe->tuner_priv;
709 if (fe->ops.i2c_gate_ctrl)
710 fe->ops.i2c_gate_ctrl(fe, 1);
712 /* enter standby mode */
713 ret = mxl5007t_write_reg(state, 0x01, 0x00);
715 ret = mxl5007t_write_reg(state, 0x0f, 0x00);
718 if (fe->ops.i2c_gate_ctrl)
719 fe->ops.i2c_gate_ctrl(fe, 0);
724 /* ------------------------------------------------------------------------- */
726 static int mxl5007t_get_frequency(struct dvb_frontend *fe, u32 *frequency)
728 struct mxl5007t_state *state = fe->tuner_priv;
729 *frequency = state->frequency;
733 static int mxl5007t_get_bandwidth(struct dvb_frontend *fe, u32 *bandwidth)
735 struct mxl5007t_state *state = fe->tuner_priv;
736 *bandwidth = state->bandwidth;
740 static int mxl5007t_get_if_frequency(struct dvb_frontend *fe, u32 *frequency)
742 struct mxl5007t_state *state = fe->tuner_priv;
746 switch (state->if_freq) {
748 *frequency = 4000000;
751 *frequency = 4500000;
753 case MxL_IF_4_57_MHZ:
754 *frequency = 4570000;
757 *frequency = 5000000;
759 case MxL_IF_5_38_MHZ:
760 *frequency = 5380000;
763 *frequency = 6000000;
765 case MxL_IF_6_28_MHZ:
766 *frequency = 6280000;
768 case MxL_IF_9_1915_MHZ:
769 *frequency = 9191500;
771 case MxL_IF_35_25_MHZ:
772 *frequency = 35250000;
774 case MxL_IF_36_15_MHZ:
775 *frequency = 36150000;
778 *frequency = 44000000;
784 static int mxl5007t_release(struct dvb_frontend *fe)
786 struct mxl5007t_state *state = fe->tuner_priv;
788 mutex_lock(&mxl5007t_list_mutex);
791 hybrid_tuner_release_state(state);
793 mutex_unlock(&mxl5007t_list_mutex);
795 fe->tuner_priv = NULL;
800 /* ------------------------------------------------------------------------- */
802 static struct dvb_tuner_ops mxl5007t_tuner_ops = {
804 .name = "MaxLinear MxL5007T",
806 .init = mxl5007t_init,
807 .sleep = mxl5007t_sleep,
808 .set_params = mxl5007t_set_params,
809 .get_status = mxl5007t_get_status,
810 .get_frequency = mxl5007t_get_frequency,
811 .get_bandwidth = mxl5007t_get_bandwidth,
812 .release = mxl5007t_release,
813 .get_if_frequency = mxl5007t_get_if_frequency,
816 static int mxl5007t_get_chip_id(struct mxl5007t_state *state)
822 ret = mxl5007t_read_reg(state, 0xd9, &id);
828 name = "MxL5007.v1.f1";
831 name = "MxL5007.v1.f2";
833 case MxL_5007_V2_100_F1:
834 name = "MxL5007.v2.100.f1";
836 case MxL_5007_V2_100_F2:
837 name = "MxL5007.v2.100.f2";
839 case MxL_5007_V2_200_F1:
840 name = "MxL5007.v2.200.f1";
842 case MxL_5007_V2_200_F2:
843 name = "MxL5007.v2.200.f2";
846 name = "MxL5007T.v4";
850 printk(KERN_WARNING "%s: unknown rev (%02x)\n", __func__, id);
854 mxl_info("%s detected @ %d-%04x", name,
855 i2c_adapter_id(state->i2c_props.adap),
856 state->i2c_props.addr);
859 mxl_warn("unable to identify device @ %d-%04x",
860 i2c_adapter_id(state->i2c_props.adap),
861 state->i2c_props.addr);
863 state->chip_id = MxL_UNKNOWN_ID;
867 struct dvb_frontend *mxl5007t_attach(struct dvb_frontend *fe,
868 struct i2c_adapter *i2c, u8 addr,
869 struct mxl5007t_config *cfg)
871 struct mxl5007t_state *state = NULL;
874 mutex_lock(&mxl5007t_list_mutex);
875 instance = hybrid_tuner_request_state(struct mxl5007t_state, state,
876 hybrid_tuner_instance_list,
877 i2c, addr, "mxl5007t");
882 /* new tuner instance */
885 mutex_init(&state->lock);
887 if (fe->ops.i2c_gate_ctrl)
888 fe->ops.i2c_gate_ctrl(fe, 1);
890 ret = mxl5007t_get_chip_id(state);
892 if (fe->ops.i2c_gate_ctrl)
893 fe->ops.i2c_gate_ctrl(fe, 0);
895 /* check return value of mxl5007t_get_chip_id */
900 /* existing tuner instance */
903 fe->tuner_priv = state;
904 mutex_unlock(&mxl5007t_list_mutex);
906 memcpy(&fe->ops.tuner_ops, &mxl5007t_tuner_ops,
907 sizeof(struct dvb_tuner_ops));
911 mutex_unlock(&mxl5007t_list_mutex);
913 mxl5007t_release(fe);
916 EXPORT_SYMBOL_GPL(mxl5007t_attach);
917 MODULE_DESCRIPTION("MaxLinear MxL5007T Silicon IC tuner driver");
918 MODULE_AUTHOR("Michael Krufky <mkrufky@linuxtv.org>");
919 MODULE_LICENSE("GPL");
920 MODULE_VERSION("0.2");
923 * Overrides for Emacs so that we follow Linus's tabbing style.
924 * ---------------------------------------------------------------------------