2 * v4l2-dv-timings - dv-timings helper functions
4 * Copyright 2013 Cisco Systems, Inc. and/or its affiliates. All rights reserved.
6 * This program is free software; you may redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; version 2 of the License.
10 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
11 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
12 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
13 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
14 * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
15 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
16 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
21 #include <linux/module.h>
22 #include <linux/types.h>
23 #include <linux/kernel.h>
24 #include <linux/errno.h>
25 #include <linux/videodev2.h>
26 #include <linux/v4l2-dv-timings.h>
27 #include <media/v4l2-dv-timings.h>
29 MODULE_AUTHOR("Hans Verkuil");
30 MODULE_DESCRIPTION("V4L2 DV Timings Helper Functions");
31 MODULE_LICENSE("GPL");
33 const struct v4l2_dv_timings v4l2_dv_timings_presets[] = {
34 V4L2_DV_BT_CEA_640X480P59_94,
35 V4L2_DV_BT_CEA_720X480I59_94,
36 V4L2_DV_BT_CEA_720X480P59_94,
37 V4L2_DV_BT_CEA_720X576I50,
38 V4L2_DV_BT_CEA_720X576P50,
39 V4L2_DV_BT_CEA_1280X720P24,
40 V4L2_DV_BT_CEA_1280X720P25,
41 V4L2_DV_BT_CEA_1280X720P30,
42 V4L2_DV_BT_CEA_1280X720P50,
43 V4L2_DV_BT_CEA_1280X720P60,
44 V4L2_DV_BT_CEA_1920X1080P24,
45 V4L2_DV_BT_CEA_1920X1080P25,
46 V4L2_DV_BT_CEA_1920X1080P30,
47 V4L2_DV_BT_CEA_1920X1080I50,
48 V4L2_DV_BT_CEA_1920X1080P50,
49 V4L2_DV_BT_CEA_1920X1080I60,
50 V4L2_DV_BT_CEA_1920X1080P60,
51 V4L2_DV_BT_DMT_640X350P85,
52 V4L2_DV_BT_DMT_640X400P85,
53 V4L2_DV_BT_DMT_720X400P85,
54 V4L2_DV_BT_DMT_640X480P72,
55 V4L2_DV_BT_DMT_640X480P75,
56 V4L2_DV_BT_DMT_640X480P85,
57 V4L2_DV_BT_DMT_800X600P56,
58 V4L2_DV_BT_DMT_800X600P60,
59 V4L2_DV_BT_DMT_800X600P72,
60 V4L2_DV_BT_DMT_800X600P75,
61 V4L2_DV_BT_DMT_800X600P85,
62 V4L2_DV_BT_DMT_800X600P120_RB,
63 V4L2_DV_BT_DMT_848X480P60,
64 V4L2_DV_BT_DMT_1024X768I43,
65 V4L2_DV_BT_DMT_1024X768P60,
66 V4L2_DV_BT_DMT_1024X768P70,
67 V4L2_DV_BT_DMT_1024X768P75,
68 V4L2_DV_BT_DMT_1024X768P85,
69 V4L2_DV_BT_DMT_1024X768P120_RB,
70 V4L2_DV_BT_DMT_1152X864P75,
71 V4L2_DV_BT_DMT_1280X768P60_RB,
72 V4L2_DV_BT_DMT_1280X768P60,
73 V4L2_DV_BT_DMT_1280X768P75,
74 V4L2_DV_BT_DMT_1280X768P85,
75 V4L2_DV_BT_DMT_1280X768P120_RB,
76 V4L2_DV_BT_DMT_1280X800P60_RB,
77 V4L2_DV_BT_DMT_1280X800P60,
78 V4L2_DV_BT_DMT_1280X800P75,
79 V4L2_DV_BT_DMT_1280X800P85,
80 V4L2_DV_BT_DMT_1280X800P120_RB,
81 V4L2_DV_BT_DMT_1280X960P60,
82 V4L2_DV_BT_DMT_1280X960P85,
83 V4L2_DV_BT_DMT_1280X960P120_RB,
84 V4L2_DV_BT_DMT_1280X1024P60,
85 V4L2_DV_BT_DMT_1280X1024P75,
86 V4L2_DV_BT_DMT_1280X1024P85,
87 V4L2_DV_BT_DMT_1280X1024P120_RB,
88 V4L2_DV_BT_DMT_1360X768P60,
89 V4L2_DV_BT_DMT_1360X768P120_RB,
90 V4L2_DV_BT_DMT_1366X768P60,
91 V4L2_DV_BT_DMT_1366X768P60_RB,
92 V4L2_DV_BT_DMT_1400X1050P60_RB,
93 V4L2_DV_BT_DMT_1400X1050P60,
94 V4L2_DV_BT_DMT_1400X1050P75,
95 V4L2_DV_BT_DMT_1400X1050P85,
96 V4L2_DV_BT_DMT_1400X1050P120_RB,
97 V4L2_DV_BT_DMT_1440X900P60_RB,
98 V4L2_DV_BT_DMT_1440X900P60,
99 V4L2_DV_BT_DMT_1440X900P75,
100 V4L2_DV_BT_DMT_1440X900P85,
101 V4L2_DV_BT_DMT_1440X900P120_RB,
102 V4L2_DV_BT_DMT_1600X900P60_RB,
103 V4L2_DV_BT_DMT_1600X1200P60,
104 V4L2_DV_BT_DMT_1600X1200P65,
105 V4L2_DV_BT_DMT_1600X1200P70,
106 V4L2_DV_BT_DMT_1600X1200P75,
107 V4L2_DV_BT_DMT_1600X1200P85,
108 V4L2_DV_BT_DMT_1600X1200P120_RB,
109 V4L2_DV_BT_DMT_1680X1050P60_RB,
110 V4L2_DV_BT_DMT_1680X1050P60,
111 V4L2_DV_BT_DMT_1680X1050P75,
112 V4L2_DV_BT_DMT_1680X1050P85,
113 V4L2_DV_BT_DMT_1680X1050P120_RB,
114 V4L2_DV_BT_DMT_1792X1344P60,
115 V4L2_DV_BT_DMT_1792X1344P75,
116 V4L2_DV_BT_DMT_1792X1344P120_RB,
117 V4L2_DV_BT_DMT_1856X1392P60,
118 V4L2_DV_BT_DMT_1856X1392P75,
119 V4L2_DV_BT_DMT_1856X1392P120_RB,
120 V4L2_DV_BT_DMT_1920X1200P60_RB,
121 V4L2_DV_BT_DMT_1920X1200P60,
122 V4L2_DV_BT_DMT_1920X1200P75,
123 V4L2_DV_BT_DMT_1920X1200P85,
124 V4L2_DV_BT_DMT_1920X1200P120_RB,
125 V4L2_DV_BT_DMT_1920X1440P60,
126 V4L2_DV_BT_DMT_1920X1440P75,
127 V4L2_DV_BT_DMT_1920X1440P120_RB,
128 V4L2_DV_BT_DMT_2048X1152P60_RB,
129 V4L2_DV_BT_DMT_2560X1600P60_RB,
130 V4L2_DV_BT_DMT_2560X1600P60,
131 V4L2_DV_BT_DMT_2560X1600P75,
132 V4L2_DV_BT_DMT_2560X1600P85,
133 V4L2_DV_BT_DMT_2560X1600P120_RB,
134 V4L2_DV_BT_CEA_3840X2160P24,
135 V4L2_DV_BT_CEA_3840X2160P25,
136 V4L2_DV_BT_CEA_3840X2160P30,
137 V4L2_DV_BT_CEA_3840X2160P50,
138 V4L2_DV_BT_CEA_3840X2160P60,
139 V4L2_DV_BT_CEA_4096X2160P24,
140 V4L2_DV_BT_CEA_4096X2160P25,
141 V4L2_DV_BT_CEA_4096X2160P30,
142 V4L2_DV_BT_CEA_4096X2160P50,
143 V4L2_DV_BT_DMT_4096X2160P59_94_RB,
144 V4L2_DV_BT_CEA_4096X2160P60,
147 EXPORT_SYMBOL_GPL(v4l2_dv_timings_presets);
149 bool v4l2_valid_dv_timings(const struct v4l2_dv_timings *t,
150 const struct v4l2_dv_timings_cap *dvcap,
151 v4l2_check_dv_timings_fnc fnc,
154 const struct v4l2_bt_timings *bt = &t->bt;
155 const struct v4l2_bt_timings_cap *cap = &dvcap->bt;
156 u32 caps = cap->capabilities;
158 if (t->type != V4L2_DV_BT_656_1120)
160 if (t->type != dvcap->type ||
161 bt->height < cap->min_height ||
162 bt->height > cap->max_height ||
163 bt->width < cap->min_width ||
164 bt->width > cap->max_width ||
165 bt->pixelclock < cap->min_pixelclock ||
166 bt->pixelclock > cap->max_pixelclock ||
167 (cap->standards && bt->standards &&
168 !(bt->standards & cap->standards)) ||
169 (bt->interlaced && !(caps & V4L2_DV_BT_CAP_INTERLACED)) ||
170 (!bt->interlaced && !(caps & V4L2_DV_BT_CAP_PROGRESSIVE)))
172 return fnc == NULL || fnc(t, fnc_handle);
174 EXPORT_SYMBOL_GPL(v4l2_valid_dv_timings);
176 int v4l2_enum_dv_timings_cap(struct v4l2_enum_dv_timings *t,
177 const struct v4l2_dv_timings_cap *cap,
178 v4l2_check_dv_timings_fnc fnc,
183 memset(t->reserved, 0, sizeof(t->reserved));
184 for (i = idx = 0; v4l2_dv_timings_presets[i].bt.width; i++) {
185 if (v4l2_valid_dv_timings(v4l2_dv_timings_presets + i, cap,
188 t->timings = v4l2_dv_timings_presets[i];
194 EXPORT_SYMBOL_GPL(v4l2_enum_dv_timings_cap);
196 bool v4l2_find_dv_timings_cap(struct v4l2_dv_timings *t,
197 const struct v4l2_dv_timings_cap *cap,
198 unsigned pclock_delta,
199 v4l2_check_dv_timings_fnc fnc,
204 if (!v4l2_valid_dv_timings(t, cap, fnc, fnc_handle))
207 for (i = 0; i < v4l2_dv_timings_presets[i].bt.width; i++) {
208 if (v4l2_valid_dv_timings(v4l2_dv_timings_presets + i, cap,
210 v4l2_match_dv_timings(t, v4l2_dv_timings_presets + i,
212 *t = v4l2_dv_timings_presets[i];
218 EXPORT_SYMBOL_GPL(v4l2_find_dv_timings_cap);
221 * v4l2_match_dv_timings - check if two timings match
222 * @t1 - compare this v4l2_dv_timings struct...
223 * @t2 - with this struct.
224 * @pclock_delta - the allowed pixelclock deviation.
226 * Compare t1 with t2 with a given margin of error for the pixelclock.
228 bool v4l2_match_dv_timings(const struct v4l2_dv_timings *t1,
229 const struct v4l2_dv_timings *t2,
230 unsigned pclock_delta)
232 if (t1->type != t2->type || t1->type != V4L2_DV_BT_656_1120)
234 if (t1->bt.width == t2->bt.width &&
235 t1->bt.height == t2->bt.height &&
236 t1->bt.interlaced == t2->bt.interlaced &&
237 t1->bt.polarities == t2->bt.polarities &&
238 t1->bt.pixelclock >= t2->bt.pixelclock - pclock_delta &&
239 t1->bt.pixelclock <= t2->bt.pixelclock + pclock_delta &&
240 t1->bt.hfrontporch == t2->bt.hfrontporch &&
241 t1->bt.vfrontporch == t2->bt.vfrontporch &&
242 t1->bt.vsync == t2->bt.vsync &&
243 t1->bt.vbackporch == t2->bt.vbackporch &&
244 (!t1->bt.interlaced ||
245 (t1->bt.il_vfrontporch == t2->bt.il_vfrontporch &&
246 t1->bt.il_vsync == t2->bt.il_vsync &&
247 t1->bt.il_vbackporch == t2->bt.il_vbackporch)))
251 EXPORT_SYMBOL_GPL(v4l2_match_dv_timings);
253 void v4l2_print_dv_timings(const char *dev_prefix, const char *prefix,
254 const struct v4l2_dv_timings *t, bool detailed)
256 const struct v4l2_bt_timings *bt = &t->bt;
259 if (t->type != V4L2_DV_BT_656_1120)
262 htot = V4L2_DV_BT_FRAME_WIDTH(bt);
263 vtot = V4L2_DV_BT_FRAME_HEIGHT(bt);
268 pr_info("%s: %s%ux%u%s%u (%ux%u)\n", dev_prefix, prefix,
269 bt->width, bt->height, bt->interlaced ? "i" : "p",
270 (htot * vtot) > 0 ? ((u32)bt->pixelclock / (htot * vtot)) : 0,
276 pr_info("%s: horizontal: fp = %u, %ssync = %u, bp = %u\n",
277 dev_prefix, bt->hfrontporch,
278 (bt->polarities & V4L2_DV_HSYNC_POS_POL) ? "+" : "-",
279 bt->hsync, bt->hbackporch);
280 pr_info("%s: vertical: fp = %u, %ssync = %u, bp = %u\n",
281 dev_prefix, bt->vfrontporch,
282 (bt->polarities & V4L2_DV_VSYNC_POS_POL) ? "+" : "-",
283 bt->vsync, bt->vbackporch);
284 pr_info("%s: pixelclock: %llu\n", dev_prefix, bt->pixelclock);
285 pr_info("%s: flags (0x%x):%s%s%s%s%s\n", dev_prefix, bt->flags,
286 (bt->flags & V4L2_DV_FL_REDUCED_BLANKING) ?
287 " REDUCED_BLANKING" : "",
288 (bt->flags & V4L2_DV_FL_CAN_REDUCE_FPS) ?
289 " CAN_REDUCE_FPS" : "",
290 (bt->flags & V4L2_DV_FL_REDUCED_FPS) ?
292 (bt->flags & V4L2_DV_FL_HALF_LINE) ?
294 (bt->flags & V4L2_DV_FL_IS_CE_VIDEO) ?
296 pr_info("%s: standards (0x%x):%s%s%s%s\n", dev_prefix, bt->standards,
297 (bt->standards & V4L2_DV_BT_STD_CEA861) ? " CEA" : "",
298 (bt->standards & V4L2_DV_BT_STD_DMT) ? " DMT" : "",
299 (bt->standards & V4L2_DV_BT_STD_CVT) ? " CVT" : "",
300 (bt->standards & V4L2_DV_BT_STD_GTF) ? " GTF" : "");
302 EXPORT_SYMBOL_GPL(v4l2_print_dv_timings);
306 * Based on Coordinated Video Timings Standard
307 * version 1.1 September 10, 2003
310 #define CVT_PXL_CLK_GRAN 250000 /* pixel clock granularity */
312 /* Normal blanking */
313 #define CVT_MIN_V_BPORCH 7 /* lines */
314 #define CVT_MIN_V_PORCH_RND 3 /* lines */
315 #define CVT_MIN_VSYNC_BP 550 /* min time of vsync + back porch (us) */
317 /* Normal blanking for CVT uses GTF to calculate horizontal blanking */
318 #define CVT_CELL_GRAN 8 /* character cell granularity */
319 #define CVT_M 600 /* blanking formula gradient */
320 #define CVT_C 40 /* blanking formula offset */
321 #define CVT_K 128 /* blanking formula scaling factor */
322 #define CVT_J 20 /* blanking formula scaling factor */
323 #define CVT_C_PRIME (((CVT_C - CVT_J) * CVT_K / 256) + CVT_J)
324 #define CVT_M_PRIME (CVT_K * CVT_M / 256)
326 /* Reduced Blanking */
327 #define CVT_RB_MIN_V_BPORCH 7 /* lines */
328 #define CVT_RB_V_FPORCH 3 /* lines */
329 #define CVT_RB_MIN_V_BLANK 460 /* us */
330 #define CVT_RB_H_SYNC 32 /* pixels */
331 #define CVT_RB_H_BPORCH 80 /* pixels */
332 #define CVT_RB_H_BLANK 160 /* pixels */
334 /** v4l2_detect_cvt - detect if the given timings follow the CVT standard
335 * @frame_height - the total height of the frame (including blanking) in lines.
336 * @hfreq - the horizontal frequency in Hz.
337 * @vsync - the height of the vertical sync in lines.
338 * @polarities - the horizontal and vertical polarities (same as struct
339 * v4l2_bt_timings polarities).
340 * @fmt - the resulting timings.
342 * This function will attempt to detect if the given values correspond to a
343 * valid CVT format. If so, then it will return true, and fmt will be filled
344 * in with the found CVT timings.
346 * TODO: VESA defined a new version 2 of their reduced blanking
347 * formula. Support for that is currently missing in this CVT
348 * detection function.
350 bool v4l2_detect_cvt(unsigned frame_height, unsigned hfreq, unsigned vsync,
351 u32 polarities, struct v4l2_dv_timings *fmt)
353 int v_fp, v_bp, h_fp, h_bp, hsync;
354 int frame_width, image_height, image_width;
355 bool reduced_blanking;
358 if (vsync < 4 || vsync > 7)
361 if (polarities == V4L2_DV_VSYNC_POS_POL)
362 reduced_blanking = false;
363 else if (polarities == V4L2_DV_HSYNC_POS_POL)
364 reduced_blanking = true;
372 if (reduced_blanking) {
373 v_fp = CVT_RB_V_FPORCH;
374 v_bp = (CVT_RB_MIN_V_BLANK * hfreq) / 1000000 + 1;
375 v_bp -= vsync + v_fp;
377 if (v_bp < CVT_RB_MIN_V_BPORCH)
378 v_bp = CVT_RB_MIN_V_BPORCH;
380 v_fp = CVT_MIN_V_PORCH_RND;
381 v_bp = (CVT_MIN_VSYNC_BP * hfreq) / 1000000 + 1 - vsync;
383 if (v_bp < CVT_MIN_V_BPORCH)
384 v_bp = CVT_MIN_V_BPORCH;
386 image_height = (frame_height - v_fp - vsync - v_bp + 1) & ~0x1;
388 if (image_height < 0)
391 /* Aspect ratio based on vsync */
394 image_width = (image_height * 4) / 3;
397 image_width = (image_height * 16) / 9;
400 image_width = (image_height * 16) / 10;
404 if (image_height == 1024)
405 image_width = (image_height * 5) / 4;
406 else if (image_height == 768)
407 image_width = (image_height * 15) / 9;
415 image_width = image_width & ~7;
418 if (reduced_blanking) {
419 pix_clk = (image_width + CVT_RB_H_BLANK) * hfreq;
420 pix_clk = (pix_clk / CVT_PXL_CLK_GRAN) * CVT_PXL_CLK_GRAN;
422 h_bp = CVT_RB_H_BPORCH;
423 hsync = CVT_RB_H_SYNC;
424 h_fp = CVT_RB_H_BLANK - h_bp - hsync;
426 frame_width = image_width + CVT_RB_H_BLANK;
428 unsigned ideal_duty_cycle_per_myriad =
429 100 * CVT_C_PRIME - (CVT_M_PRIME * 100000) / hfreq;
432 if (ideal_duty_cycle_per_myriad < 2000)
433 ideal_duty_cycle_per_myriad = 2000;
435 h_blank = image_width * ideal_duty_cycle_per_myriad /
436 (10000 - ideal_duty_cycle_per_myriad);
437 h_blank = (h_blank / (2 * CVT_CELL_GRAN)) * 2 * CVT_CELL_GRAN;
439 pix_clk = (image_width + h_blank) * hfreq;
440 pix_clk = (pix_clk / CVT_PXL_CLK_GRAN) * CVT_PXL_CLK_GRAN;
443 frame_width = image_width + h_blank;
445 hsync = frame_width * 8 / 100;
446 hsync = (hsync / CVT_CELL_GRAN) * CVT_CELL_GRAN;
447 h_fp = h_blank - hsync - h_bp;
450 fmt->type = V4L2_DV_BT_656_1120;
451 fmt->bt.polarities = polarities;
452 fmt->bt.width = image_width;
453 fmt->bt.height = image_height;
454 fmt->bt.hfrontporch = h_fp;
455 fmt->bt.vfrontporch = v_fp;
456 fmt->bt.hsync = hsync;
457 fmt->bt.vsync = vsync;
458 fmt->bt.hbackporch = frame_width - image_width - h_fp - hsync;
459 fmt->bt.vbackporch = frame_height - image_height - v_fp - vsync;
460 fmt->bt.pixelclock = pix_clk;
461 fmt->bt.standards = V4L2_DV_BT_STD_CVT;
462 if (reduced_blanking)
463 fmt->bt.flags |= V4L2_DV_FL_REDUCED_BLANKING;
466 EXPORT_SYMBOL_GPL(v4l2_detect_cvt);
470 * Based on Generalized Timing Formula Standard
471 * Version 1.1 September 2, 1999
474 #define GTF_PXL_CLK_GRAN 250000 /* pixel clock granularity */
476 #define GTF_MIN_VSYNC_BP 550 /* min time of vsync + back porch (us) */
477 #define GTF_V_FP 1 /* vertical front porch (lines) */
478 #define GTF_CELL_GRAN 8 /* character cell granularity */
481 #define GTF_D_M 600 /* blanking formula gradient */
482 #define GTF_D_C 40 /* blanking formula offset */
483 #define GTF_D_K 128 /* blanking formula scaling factor */
484 #define GTF_D_J 20 /* blanking formula scaling factor */
485 #define GTF_D_C_PRIME ((((GTF_D_C - GTF_D_J) * GTF_D_K) / 256) + GTF_D_J)
486 #define GTF_D_M_PRIME ((GTF_D_K * GTF_D_M) / 256)
489 #define GTF_S_M 3600 /* blanking formula gradient */
490 #define GTF_S_C 40 /* blanking formula offset */
491 #define GTF_S_K 128 /* blanking formula scaling factor */
492 #define GTF_S_J 35 /* blanking formula scaling factor */
493 #define GTF_S_C_PRIME ((((GTF_S_C - GTF_S_J) * GTF_S_K) / 256) + GTF_S_J)
494 #define GTF_S_M_PRIME ((GTF_S_K * GTF_S_M) / 256)
496 /** v4l2_detect_gtf - detect if the given timings follow the GTF standard
497 * @frame_height - the total height of the frame (including blanking) in lines.
498 * @hfreq - the horizontal frequency in Hz.
499 * @vsync - the height of the vertical sync in lines.
500 * @polarities - the horizontal and vertical polarities (same as struct
501 * v4l2_bt_timings polarities).
502 * @aspect - preferred aspect ratio. GTF has no method of determining the
503 * aspect ratio in order to derive the image width from the
504 * image height, so it has to be passed explicitly. Usually
505 * the native screen aspect ratio is used for this. If it
506 * is not filled in correctly, then 16:9 will be assumed.
507 * @fmt - the resulting timings.
509 * This function will attempt to detect if the given values correspond to a
510 * valid GTF format. If so, then it will return true, and fmt will be filled
511 * in with the found GTF timings.
513 bool v4l2_detect_gtf(unsigned frame_height,
517 struct v4l2_fract aspect,
518 struct v4l2_dv_timings *fmt)
521 int v_fp, v_bp, h_fp, hsync;
522 int frame_width, image_height, image_width;
529 if (polarities == V4L2_DV_VSYNC_POS_POL)
531 else if (polarities == V4L2_DV_HSYNC_POS_POL)
542 v_bp = (GTF_MIN_VSYNC_BP * hfreq + 500000) / 1000000 - vsync;
543 image_height = (frame_height - v_fp - vsync - v_bp + 1) & ~0x1;
545 if (image_height < 0)
548 if (aspect.numerator == 0 || aspect.denominator == 0) {
549 aspect.numerator = 16;
550 aspect.denominator = 9;
552 image_width = ((image_height * aspect.numerator) / aspect.denominator);
553 image_width = (image_width + GTF_CELL_GRAN/2) & ~(GTF_CELL_GRAN - 1);
557 h_blank = ((image_width * GTF_D_C_PRIME * hfreq) -
558 (image_width * GTF_D_M_PRIME * 1000) +
559 (hfreq * (100 - GTF_D_C_PRIME) + GTF_D_M_PRIME * 1000) / 2) /
560 (hfreq * (100 - GTF_D_C_PRIME) + GTF_D_M_PRIME * 1000);
562 h_blank = ((image_width * GTF_S_C_PRIME * hfreq) -
563 (image_width * GTF_S_M_PRIME * 1000) +
564 (hfreq * (100 - GTF_S_C_PRIME) + GTF_S_M_PRIME * 1000) / 2) /
565 (hfreq * (100 - GTF_S_C_PRIME) + GTF_S_M_PRIME * 1000);
567 h_blank = ((h_blank + GTF_CELL_GRAN) / (2 * GTF_CELL_GRAN)) *
569 frame_width = image_width + h_blank;
571 pix_clk = (image_width + h_blank) * hfreq;
572 pix_clk = pix_clk / GTF_PXL_CLK_GRAN * GTF_PXL_CLK_GRAN;
574 hsync = (frame_width * 8 + 50) / 100;
575 hsync = ((hsync + GTF_CELL_GRAN / 2) / GTF_CELL_GRAN) * GTF_CELL_GRAN;
577 h_fp = h_blank / 2 - hsync;
579 fmt->type = V4L2_DV_BT_656_1120;
580 fmt->bt.polarities = polarities;
581 fmt->bt.width = image_width;
582 fmt->bt.height = image_height;
583 fmt->bt.hfrontporch = h_fp;
584 fmt->bt.vfrontporch = v_fp;
585 fmt->bt.hsync = hsync;
586 fmt->bt.vsync = vsync;
587 fmt->bt.hbackporch = frame_width - image_width - h_fp - hsync;
588 fmt->bt.vbackporch = frame_height - image_height - v_fp - vsync;
589 fmt->bt.pixelclock = pix_clk;
590 fmt->bt.standards = V4L2_DV_BT_STD_GTF;
592 fmt->bt.flags |= V4L2_DV_FL_REDUCED_BLANKING;
595 EXPORT_SYMBOL_GPL(v4l2_detect_gtf);
597 /** v4l2_calc_aspect_ratio - calculate the aspect ratio based on bytes
598 * 0x15 and 0x16 from the EDID.
599 * @hor_landscape - byte 0x15 from the EDID.
600 * @vert_portrait - byte 0x16 from the EDID.
602 * Determines the aspect ratio from the EDID.
603 * See VESA Enhanced EDID standard, release A, rev 2, section 3.6.2:
604 * "Horizontal and Vertical Screen Size or Aspect Ratio"
606 struct v4l2_fract v4l2_calc_aspect_ratio(u8 hor_landscape, u8 vert_portrait)
608 struct v4l2_fract aspect = { 16, 9 };
612 /* Nothing filled in, fallback to 16:9 */
613 if (!hor_landscape && !vert_portrait)
615 /* Both filled in, so they are interpreted as the screen size in cm */
616 if (hor_landscape && vert_portrait) {
617 aspect.numerator = hor_landscape;
618 aspect.denominator = vert_portrait;
621 /* Only one is filled in, so interpret them as a ratio:
623 ratio = hor_landscape | vert_portrait;
624 /* Change some rounded values into the exact aspect ratio */
626 aspect.numerator = 16;
627 aspect.denominator = 9;
628 } else if (ratio == 34) {
629 aspect.numerator = 4;
630 aspect.denominator = 3;
631 } else if (ratio == 68) {
632 aspect.numerator = 15;
633 aspect.denominator = 9;
635 aspect.numerator = hor_landscape + 99;
636 aspect.denominator = 100;
640 /* The aspect ratio is for portrait, so swap numerator and denominator */
641 tmp = aspect.denominator;
642 aspect.denominator = aspect.numerator;
643 aspect.numerator = tmp;
646 EXPORT_SYMBOL_GPL(v4l2_calc_aspect_ratio);