drivers/media/video/cx88/cx88-tvaudio.c

   1 /*
   2
   3     cx88x-audio.c - Conexant CX23880/23881 audio downstream driver driver
   4
   5      (c) 2001 Michael Eskin, Tom Zakrajsek [Windows version]
   6      (c) 2002 Yurij Sysoev <yurij@naturesoft.net>
   7      (c) 2003 Gerd Knorr <kraxel@bytesex.org>
   8
   9     -----------------------------------------------------------------------
  10
  11     Lot of voodoo here.  Even the data sheet doesn't help to
  12     understand what is going on here, the documentation for the audio
  13     part of the cx2388x chip is *very* bad.
  14
  15     Some of this comes from party done linux driver sources I got from
  16     [undocumented].
  17
  18     Some comes from the dscaler sources, one of the dscaler driver guy works
  19     for Conexant ...
  20
  21     -----------------------------------------------------------------------
  22
  23     This program is free software; you can redistribute it and/or modify
  24     it under the terms of the GNU General Public License as published by
  25     the Free Software Foundation; either version 2 of the License, or
  26     (at your option) any later version.
  27
  28     This program is distributed in the hope that it will be useful,
  29     but WITHOUT ANY WARRANTY; without even the implied warranty of
  30     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  31     GNU General Public License for more details.
  32
  33     You should have received a copy of the GNU General Public License
  34     along with this program; if not, write to the Free Software
  35     Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  36 */
  37
  38 #include <linux/module.h>
  39 #include <linux/moduleparam.h>
  40 #include <linux/errno.h>
  41 #include <linux/kernel.h>
  42 #include <linux/slab.h>
  43 #include <linux/mm.h>
  44 #include <linux/poll.h>
  45 #include <linux/pci.h>
  46 #include <linux/signal.h>
  47 #include <linux/ioport.h>
  48 #include <linux/sched.h>
  49 #include <linux/types.h>
  50 #include <linux/interrupt.h>
  51 #include <linux/vmalloc.h>
  52 #include <linux/init.h>
  53 #include <linux/smp_lock.h>
  54 #include <linux/delay.h>
  55 #include <linux/kthread.h>
  56
  57 #include "cx88.h"
  58
  59 static unsigned int audio_debug = 0;
  60 module_param(audio_debug, int, 0644);
  61 MODULE_PARM_DESC(audio_debug, "enable debug messages [audio]");
  62
  63 #define dprintk(fmt, arg...)    if (audio_debug) \
  64         printk(KERN_DEBUG "%s/0: " fmt, core->name , ## arg)
  65
  66 /* ----------------------------------------------------------- */
  67
  68 static char *aud_ctl_names[64] = {
  69         [EN_BTSC_FORCE_MONO] = "BTSC_FORCE_MONO",
  70         [EN_BTSC_FORCE_STEREO] = "BTSC_FORCE_STEREO",
  71         [EN_BTSC_FORCE_SAP] = "BTSC_FORCE_SAP",
  72         [EN_BTSC_AUTO_STEREO] = "BTSC_AUTO_STEREO",
  73         [EN_BTSC_AUTO_SAP] = "BTSC_AUTO_SAP",
  74         [EN_A2_FORCE_MONO1] = "A2_FORCE_MONO1",
  75         [EN_A2_FORCE_MONO2] = "A2_FORCE_MONO2",
  76         [EN_A2_FORCE_STEREO] = "A2_FORCE_STEREO",
  77         [EN_A2_AUTO_MONO2] = "A2_AUTO_MONO2",
  78         [EN_A2_AUTO_STEREO] = "A2_AUTO_STEREO",
  79         [EN_EIAJ_FORCE_MONO1] = "EIAJ_FORCE_MONO1",
  80         [EN_EIAJ_FORCE_MONO2] = "EIAJ_FORCE_MONO2",
  81         [EN_EIAJ_FORCE_STEREO] = "EIAJ_FORCE_STEREO",
  82         [EN_EIAJ_AUTO_MONO2] = "EIAJ_AUTO_MONO2",
  83         [EN_EIAJ_AUTO_STEREO] = "EIAJ_AUTO_STEREO",
  84         [EN_NICAM_FORCE_MONO1] = "NICAM_FORCE_MONO1",
  85         [EN_NICAM_FORCE_MONO2] = "NICAM_FORCE_MONO2",
  86         [EN_NICAM_FORCE_STEREO] = "NICAM_FORCE_STEREO",
  87         [EN_NICAM_AUTO_MONO2] = "NICAM_AUTO_MONO2",
  88         [EN_NICAM_AUTO_STEREO] = "NICAM_AUTO_STEREO",
  89         [EN_FMRADIO_FORCE_MONO] = "FMRADIO_FORCE_MONO",
  90         [EN_FMRADIO_FORCE_STEREO] = "FMRADIO_FORCE_STEREO",
  91         [EN_FMRADIO_AUTO_STEREO] = "FMRADIO_AUTO_STEREO",
  92 };
  93
  94 struct rlist {
  95         u32 reg;
  96         u32 val;
  97 };
  98
  99 static void set_audio_registers(struct cx88_core *core, const struct rlist *l)
 100 {
 101         int i;
 102
 103         for (i = 0; l[i].reg; i++) {
 104                 switch (l[i].reg) {
 105                 case AUD_PDF_DDS_CNST_BYTE2:
 106                 case AUD_PDF_DDS_CNST_BYTE1:
 107                 case AUD_PDF_DDS_CNST_BYTE0:
 108                 case AUD_QAM_MODE:
 109                 case AUD_PHACC_FREQ_8MSB:
 110                 case AUD_PHACC_FREQ_8LSB:
 111                         cx_writeb(l[i].reg, l[i].val);
 112                         break;
 113                 default:
 114                         cx_write(l[i].reg, l[i].val);
 115                         break;
 116                 }
 117         }
 118 }
 119
 120 static void set_audio_start(struct cx88_core *core, u32 mode)
 121 {
 122         // mute
 123         cx_write(AUD_VOL_CTL, (1 << 6));
 124
 125         // start programming
 126         cx_write(AUD_CTL, 0x0000);
 127         cx_write(AUD_INIT, mode);
 128         cx_write(AUD_INIT_LD, 0x0001);
 129         cx_write(AUD_SOFT_RESET, 0x0001);
 130 }
 131
 132 static void set_audio_finish(struct cx88_core *core, u32 ctl)
 133 {
 134         u32 volume;
 135
 136         if (cx88_boards[core->board].blackbird) {
 137                 // sets sound input from external adc
 138                 cx_set(AUD_CTL, EN_I2SIN_ENABLE);
 139                 //cx_write(AUD_I2SINPUTCNTL, 0);
 140                 cx_write(AUD_I2SINPUTCNTL, 4);
 141                 cx_write(AUD_BAUDRATE, 1);
 142                 // 'pass-thru mode': this enables the i2s output to the mpeg encoder
 143                 cx_set(AUD_CTL, EN_I2SOUT_ENABLE);
 144                 cx_write(AUD_I2SOUTPUTCNTL, 1);
 145                 cx_write(AUD_I2SCNTL, 0);
 146                 //cx_write(AUD_APB_IN_RATE_ADJ, 0);
 147         } else {
 148                 ctl |= EN_DAC_ENABLE;
 149                 cx_write(AUD_CTL, ctl);
 150         }
 151
 152         /* finish programming */
 153         cx_write(AUD_SOFT_RESET, 0x0000);
 154
 155         /* unmute */
 156         volume = cx_sread(SHADOW_AUD_VOL_CTL);
 157         cx_swrite(SHADOW_AUD_VOL_CTL, AUD_VOL_CTL, volume);
 158 }
 159
 160 /* ----------------------------------------------------------- */
 161
 162 static void set_audio_standard_BTSC(struct cx88_core *core, unsigned int sap,
 163                                     u32 mode)
 164 {
 165         static const struct rlist btsc[] = {
 166                 {AUD_AFE_12DB_EN, 0x00000001},
 167                 {AUD_OUT1_SEL, 0x00000013},
 168                 {AUD_OUT1_SHIFT, 0x00000000},
 169                 {AUD_POLY0_DDS_CONSTANT, 0x0012010c},
 170                 {AUD_DMD_RA_DDS, 0x00c3e7aa},
 171                 {AUD_DBX_IN_GAIN, 0x00004734},
 172                 {AUD_DBX_WBE_GAIN, 0x00004640},
 173                 {AUD_DBX_SE_GAIN, 0x00008d31},
 174                 {AUD_DCOC_0_SRC, 0x0000001a},
 175                 {AUD_IIR1_4_SEL, 0x00000021},
 176                 {AUD_DCOC_PASS_IN, 0x00000003},
 177                 {AUD_DCOC_0_SHIFT_IN0, 0x0000000a},
 178                 {AUD_DCOC_0_SHIFT_IN1, 0x00000008},
 179                 {AUD_DCOC_1_SHIFT_IN0, 0x0000000a},
 180                 {AUD_DCOC_1_SHIFT_IN1, 0x00000008},
 181                 {AUD_DN0_FREQ, 0x0000283b},
 182                 {AUD_DN2_SRC_SEL, 0x00000008},
 183                 {AUD_DN2_FREQ, 0x00003000},
 184                 {AUD_DN2_AFC, 0x00000002},
 185                 {AUD_DN2_SHFT, 0x00000000},
 186                 {AUD_IIR2_2_SEL, 0x00000020},
 187                 {AUD_IIR2_2_SHIFT, 0x00000000},
 188                 {AUD_IIR2_3_SEL, 0x0000001f},
 189                 {AUD_IIR2_3_SHIFT, 0x00000000},
 190                 {AUD_CRDC1_SRC_SEL, 0x000003ce},
 191                 {AUD_CRDC1_SHIFT, 0x00000000},
 192                 {AUD_CORDIC_SHIFT_1, 0x00000007},
 193                 {AUD_DCOC_1_SRC, 0x0000001b},
 194                 {AUD_DCOC1_SHIFT, 0x00000000},
 195                 {AUD_RDSI_SEL, 0x00000008},
 196                 {AUD_RDSQ_SEL, 0x00000008},
 197                 {AUD_RDSI_SHIFT, 0x00000000},
 198                 {AUD_RDSQ_SHIFT, 0x00000000},
 199                 {AUD_POLYPH80SCALEFAC, 0x00000003},
 200                 { /* end of list */ },
 201         };
 202         static const struct rlist btsc_sap[] = {
 203                 {AUD_AFE_12DB_EN, 0x00000001},
 204                 {AUD_DBX_IN_GAIN, 0x00007200},
 205                 {AUD_DBX_WBE_GAIN, 0x00006200},
 206                 {AUD_DBX_SE_GAIN, 0x00006200},
 207                 {AUD_IIR1_1_SEL, 0x00000000},
 208                 {AUD_IIR1_3_SEL, 0x00000001},
 209                 {AUD_DN1_SRC_SEL, 0x00000007},
 210                 {AUD_IIR1_4_SHIFT, 0x00000006},
 211                 {AUD_IIR2_1_SHIFT, 0x00000000},
 212                 {AUD_IIR2_2_SHIFT, 0x00000000},
 213                 {AUD_IIR3_0_SHIFT, 0x00000000},
 214                 {AUD_IIR3_1_SHIFT, 0x00000000},
 215                 {AUD_IIR3_0_SEL, 0x0000000d},
 216                 {AUD_IIR3_1_SEL, 0x0000000e},
 217                 {AUD_DEEMPH1_SRC_SEL, 0x00000014},
 218                 {AUD_DEEMPH1_SHIFT, 0x00000000},
 219                 {AUD_DEEMPH1_G0, 0x00004000},
 220                 {AUD_DEEMPH1_A0, 0x00000000},
 221                 {AUD_DEEMPH1_B0, 0x00000000},
 222                 {AUD_DEEMPH1_A1, 0x00000000},
 223                 {AUD_DEEMPH1_B1, 0x00000000},
 224                 {AUD_OUT0_SEL, 0x0000003f},
 225                 {AUD_OUT1_SEL, 0x0000003f},
 226                 {AUD_DN1_AFC, 0x00000002},
 227                 {AUD_DCOC_0_SHIFT_IN0, 0x0000000a},
 228                 {AUD_DCOC_0_SHIFT_IN1, 0x00000008},
 229                 {AUD_DCOC_1_SHIFT_IN0, 0x0000000a},
 230                 {AUD_DCOC_1_SHIFT_IN1, 0x00000008},
 231                 {AUD_IIR1_0_SEL, 0x0000001d},
 232                 {AUD_IIR1_2_SEL, 0x0000001e},
 233                 {AUD_IIR2_1_SEL, 0x00000002},
 234                 {AUD_IIR2_2_SEL, 0x00000004},
 235                 {AUD_IIR3_2_SEL, 0x0000000f},
 236                 {AUD_DCOC2_SHIFT, 0x00000001},
 237                 {AUD_IIR3_2_SHIFT, 0x00000001},
 238                 {AUD_DEEMPH0_SRC_SEL, 0x00000014},
 239                 {AUD_CORDIC_SHIFT_1, 0x00000006},
 240                 {AUD_POLY0_DDS_CONSTANT, 0x000e4db2},
 241                 {AUD_DMD_RA_DDS, 0x00f696e6},
 242                 {AUD_IIR2_3_SEL, 0x00000025},
 243                 {AUD_IIR1_4_SEL, 0x00000021},
 244                 {AUD_DN1_FREQ, 0x0000c965},
 245                 {AUD_DCOC_PASS_IN, 0x00000003},
 246                 {AUD_DCOC_0_SRC, 0x0000001a},
 247                 {AUD_DCOC_1_SRC, 0x0000001b},
 248                 {AUD_DCOC1_SHIFT, 0x00000000},
 249                 {AUD_RDSI_SEL, 0x00000009},
 250                 {AUD_RDSQ_SEL, 0x00000009},
 251                 {AUD_RDSI_SHIFT, 0x00000000},
 252                 {AUD_RDSQ_SHIFT, 0x00000000},
 253                 {AUD_POLYPH80SCALEFAC, 0x00000003},
 254                 { /* end of list */ },
 255         };
 256
 257         mode |= EN_FMRADIO_EN_RDS;
 258
 259         if (sap) {
 260                 dprintk("%s SAP (status: unknown)\n", __FUNCTION__);
 261                 set_audio_start(core, SEL_SAP);
 262                 set_audio_registers(core, btsc_sap);
 263                 set_audio_finish(core, mode);
 264         } else {
 265                 dprintk("%s (status: known-good)\n", __FUNCTION__);
 266                 set_audio_start(core, SEL_BTSC);
 267                 set_audio_registers(core, btsc);
 268                 set_audio_finish(core, mode);
 269         }
 270 }
 271
 272 static void set_audio_standard_NICAM(struct cx88_core *core, u32 mode)
 273 {
 274         static const struct rlist nicam_l[] = {
 275                 {AUD_AFE_12DB_EN, 0x00000001},
 276                 {AUD_RATE_ADJ1, 0x00000060},
 277                 {AUD_RATE_ADJ2, 0x000000F9},
 278                 {AUD_RATE_ADJ3, 0x000001CC},
 279                 {AUD_RATE_ADJ4, 0x000002B3},
 280                 {AUD_RATE_ADJ5, 0x00000726},
 281                 {AUD_DEEMPHDENOM1_R, 0x0000F3D0},
 282                 {AUD_DEEMPHDENOM2_R, 0x00000000},
 283                 {AUD_ERRLOGPERIOD_R, 0x00000064},
 284                 {AUD_ERRINTRPTTHSHLD1_R, 0x00000FFF},
 285                 {AUD_ERRINTRPTTHSHLD2_R, 0x0000001F},
 286                 {AUD_ERRINTRPTTHSHLD3_R, 0x0000000F},
 287                 {AUD_POLYPH80SCALEFAC, 0x00000003},
 288                 {AUD_DMD_RA_DDS, 0x00C00000},
 289                 {AUD_PLL_INT, 0x0000001E},
 290                 {AUD_PLL_DDS, 0x00000000},
 291                 {AUD_PLL_FRAC, 0x0000E542},
 292                 {AUD_START_TIMER, 0x00000000},
 293                 {AUD_DEEMPHNUMER1_R, 0x000353DE},
 294                 {AUD_DEEMPHNUMER2_R, 0x000001B1},
 295                 {AUD_PDF_DDS_CNST_BYTE2, 0x06},
 296                 {AUD_PDF_DDS_CNST_BYTE1, 0x82},
 297                 {AUD_PDF_DDS_CNST_BYTE0, 0x12},
 298                 {AUD_QAM_MODE, 0x05},
 299                 {AUD_PHACC_FREQ_8MSB, 0x34},
 300                 {AUD_PHACC_FREQ_8LSB, 0x4C},
 301                 {AUD_DEEMPHGAIN_R, 0x00006680},
 302                 {AUD_RATE_THRES_DMD, 0x000000C0},
 303                 { /* end of list */ },
 304         };
 305
 306         static const struct rlist nicam_bgdki_common[] = {
 307                 {AUD_AFE_12DB_EN, 0x00000001},
 308                 {AUD_RATE_ADJ1, 0x00000010},
 309                 {AUD_RATE_ADJ2, 0x00000040},
 310                 {AUD_RATE_ADJ3, 0x00000100},
 311                 {AUD_RATE_ADJ4, 0x00000400},
 312                 {AUD_RATE_ADJ5, 0x00001000},
 313                 //{ AUD_DMD_RA_DDS,        0x00c0d5ce },
 314                 {AUD_ERRLOGPERIOD_R, 0x00000fff},
 315                 {AUD_ERRINTRPTTHSHLD1_R, 0x000003ff},
 316                 {AUD_ERRINTRPTTHSHLD2_R, 0x000000ff},
 317                 {AUD_ERRINTRPTTHSHLD3_R, 0x0000003f},
 318                 {AUD_POLYPH80SCALEFAC, 0x00000003},
 319                 {AUD_DEEMPHGAIN_R, 0x000023c2},
 320                 {AUD_DEEMPHNUMER1_R, 0x0002a7bc},
 321                 {AUD_DEEMPHNUMER2_R, 0x0003023e},
 322                 {AUD_DEEMPHDENOM1_R, 0x0000f3d0},
 323                 {AUD_DEEMPHDENOM2_R, 0x00000000},
 324                 {AUD_PDF_DDS_CNST_BYTE2, 0x06},
 325                 {AUD_PDF_DDS_CNST_BYTE1, 0x82},
 326                 {AUD_QAM_MODE, 0x05},
 327                 { /* end of list */ },
 328         };
 329
 330         static const struct rlist nicam_i[] = {
 331                 {AUD_PDF_DDS_CNST_BYTE0, 0x12},
 332                 {AUD_PHACC_FREQ_8MSB, 0x3a},
 333                 {AUD_PHACC_FREQ_8LSB, 0x93},
 334                 { /* end of list */ },
 335         };
 336
 337         static const struct rlist nicam_default[] = {
 338                 {AUD_PDF_DDS_CNST_BYTE0, 0x16},
 339                 {AUD_PHACC_FREQ_8MSB, 0x34},
 340                 {AUD_PHACC_FREQ_8LSB, 0x4c},
 341                 { /* end of list */ },
 342         };
 343
 344         switch (core->tvaudio) {
 345         case WW_L:
 346                 dprintk("%s SECAM-L NICAM (status: devel)\n", __FUNCTION__);
 347                 set_audio_registers(core, nicam_l);
 348                 break;
 349         case WW_I:
 350                 dprintk("%s PAL-I NICAM (status: devel)\n", __FUNCTION__);
 351                 set_audio_registers(core, nicam_bgdki_common);
 352                 set_audio_registers(core, nicam_i);
 353                 break;
 354         default:
 355                 dprintk("%s PAL-BGDK NICAM (status: unknown)\n", __FUNCTION__);
 356                 set_audio_registers(core, nicam_bgdki_common);
 357                 set_audio_registers(core, nicam_default);
 358                 break;
 359         };
 360
 361         mode |= EN_DMTRX_LR | EN_DMTRX_BYPASS;
 362         set_audio_finish(core, mode);
 363 }
 364
 365 static void set_audio_standard_A2(struct cx88_core *core, u32 mode)
 366 {
 367         static const struct rlist a2_bgdk_common[] = {
 368                 {AUD_ERRLOGPERIOD_R, 0x00000064},
 369                 {AUD_ERRINTRPTTHSHLD1_R, 0x00000fff},
 370                 {AUD_ERRINTRPTTHSHLD2_R, 0x0000001f},
 371                 {AUD_ERRINTRPTTHSHLD3_R, 0x0000000f},
 372                 {AUD_PDF_DDS_CNST_BYTE2, 0x06},
 373                 {AUD_PDF_DDS_CNST_BYTE1, 0x82},
 374                 {AUD_PDF_DDS_CNST_BYTE0, 0x12},
 375                 {AUD_QAM_MODE, 0x05},
 376                 {AUD_PHACC_FREQ_8MSB, 0x34},
 377                 {AUD_PHACC_FREQ_8LSB, 0x4c},
 378                 {AUD_RATE_ADJ1, 0x00000100},
 379                 {AUD_RATE_ADJ2, 0x00000200},
 380                 {AUD_RATE_ADJ3, 0x00000300},
 381                 {AUD_RATE_ADJ4, 0x00000400},
 382                 {AUD_RATE_ADJ5, 0x00000500},
 383                 {AUD_THR_FR, 0x00000000},
 384                 {AAGC_HYST, 0x0000001a},
 385                 {AUD_PILOT_BQD_1_K0, 0x0000755b},
 386                 {AUD_PILOT_BQD_1_K1, 0x00551340},
 387                 {AUD_PILOT_BQD_1_K2, 0x006d30be},
 388                 {AUD_PILOT_BQD_1_K3, 0xffd394af},
 389                 {AUD_PILOT_BQD_1_K4, 0x00400000},
 390                 {AUD_PILOT_BQD_2_K0, 0x00040000},
 391                 {AUD_PILOT_BQD_2_K1, 0x002a4841},
 392                 {AUD_PILOT_BQD_2_K2, 0x00400000},
 393                 {AUD_PILOT_BQD_2_K3, 0x00000000},
 394                 {AUD_PILOT_BQD_2_K4, 0x00000000},
 395                 {AUD_MODE_CHG_TIMER, 0x00000040},
 396                 {AUD_AFE_12DB_EN, 0x00000001},
 397                 {AUD_CORDIC_SHIFT_0, 0x00000007},
 398                 {AUD_CORDIC_SHIFT_1, 0x00000007},
 399                 {AUD_DEEMPH0_G0, 0x00000380},
 400                 {AUD_DEEMPH1_G0, 0x00000380},
 401                 {AUD_DCOC_0_SRC, 0x0000001a},
 402                 {AUD_DCOC0_SHIFT, 0x00000000},
 403                 {AUD_DCOC_0_SHIFT_IN0, 0x0000000a},
 404                 {AUD_DCOC_0_SHIFT_IN1, 0x00000008},
 405                 {AUD_DCOC_PASS_IN, 0x00000003},
 406                 {AUD_IIR3_0_SEL, 0x00000021},
 407                 {AUD_DN2_AFC, 0x00000002},
 408                 {AUD_DCOC_1_SRC, 0x0000001b},
 409                 {AUD_DCOC1_SHIFT, 0x00000000},
 410                 {AUD_DCOC_1_SHIFT_IN0, 0x0000000a},
 411                 {AUD_DCOC_1_SHIFT_IN1, 0x00000008},
 412                 {AUD_IIR3_1_SEL, 0x00000023},
 413                 {AUD_RDSI_SEL, 0x00000017},
 414                 {AUD_RDSI_SHIFT, 0x00000000},
 415                 {AUD_RDSQ_SEL, 0x00000017},
 416                 {AUD_RDSQ_SHIFT, 0x00000000},
 417                 {AUD_PLL_INT, 0x0000001e},
 418                 {AUD_PLL_DDS, 0x00000000},
 419                 {AUD_PLL_FRAC, 0x0000e542},
 420                 {AUD_POLYPH80SCALEFAC, 0x00000001},
 421                 {AUD_START_TIMER, 0x00000000},
 422                 { /* end of list */ },
 423         };
 424
 425         static const struct rlist a2_bg[] = {
 426                 {AUD_DMD_RA_DDS, 0x002a4f2f},
 427                 {AUD_C1_UP_THR, 0x00007000},
 428                 {AUD_C1_LO_THR, 0x00005400},
 429                 {AUD_C2_UP_THR, 0x00005400},
 430                 {AUD_C2_LO_THR, 0x00003000},
 431                 { /* end of list */ },
 432         };
 433
 434         static const struct rlist a2_dk[] = {
 435                 {AUD_DMD_RA_DDS, 0x002a4f2f},
 436                 {AUD_C1_UP_THR, 0x00007000},
 437                 {AUD_C1_LO_THR, 0x00005400},
 438                 {AUD_C2_UP_THR, 0x00005400},
 439                 {AUD_C2_LO_THR, 0x00003000},
 440                 {AUD_DN0_FREQ, 0x00003a1c},
 441                 {AUD_DN2_FREQ, 0x0000d2e0},
 442                 { /* end of list */ },
 443         };
 444
 445         static const struct rlist a1_i[] = {
 446                 {AUD_ERRLOGPERIOD_R, 0x00000064},
 447                 {AUD_ERRINTRPTTHSHLD1_R, 0x00000fff},
 448                 {AUD_ERRINTRPTTHSHLD2_R, 0x0000001f},
 449                 {AUD_ERRINTRPTTHSHLD3_R, 0x0000000f},
 450                 {AUD_PDF_DDS_CNST_BYTE2, 0x06},
 451                 {AUD_PDF_DDS_CNST_BYTE1, 0x82},
 452                 {AUD_PDF_DDS_CNST_BYTE0, 0x12},
 453                 {AUD_QAM_MODE, 0x05},
 454                 {AUD_PHACC_FREQ_8MSB, 0x3a},
 455                 {AUD_PHACC_FREQ_8LSB, 0x93},
 456                 {AUD_DMD_RA_DDS, 0x002a4f2f},
 457                 {AUD_PLL_INT, 0x0000001e},
 458                 {AUD_PLL_DDS, 0x00000004},
 459                 {AUD_PLL_FRAC, 0x0000e542},
 460                 {AUD_RATE_ADJ1, 0x00000100},
 461                 {AUD_RATE_ADJ2, 0x00000200},
 462                 {AUD_RATE_ADJ3, 0x00000300},
 463                 {AUD_RATE_ADJ4, 0x00000400},
 464                 {AUD_RATE_ADJ5, 0x00000500},
 465                 {AUD_THR_FR, 0x00000000},
 466                 {AUD_PILOT_BQD_1_K0, 0x0000755b},
 467                 {AUD_PILOT_BQD_1_K1, 0x00551340},
 468                 {AUD_PILOT_BQD_1_K2, 0x006d30be},
 469                 {AUD_PILOT_BQD_1_K3, 0xffd394af},
 470                 {AUD_PILOT_BQD_1_K4, 0x00400000},
 471                 {AUD_PILOT_BQD_2_K0, 0x00040000},
 472                 {AUD_PILOT_BQD_2_K1, 0x002a4841},
 473                 {AUD_PILOT_BQD_2_K2, 0x00400000},
 474                 {AUD_PILOT_BQD_2_K3, 0x00000000},
 475                 {AUD_PILOT_BQD_2_K4, 0x00000000},
 476                 {AUD_MODE_CHG_TIMER, 0x00000060},
 477                 {AUD_AFE_12DB_EN, 0x00000001},
 478                 {AAGC_HYST, 0x0000000a},
 479                 {AUD_CORDIC_SHIFT_0, 0x00000007},
 480                 {AUD_CORDIC_SHIFT_1, 0x00000007},
 481                 {AUD_C1_UP_THR, 0x00007000},
 482                 {AUD_C1_LO_THR, 0x00005400},
 483                 {AUD_C2_UP_THR, 0x00005400},
 484                 {AUD_C2_LO_THR, 0x00003000},
 485                 {AUD_DCOC_0_SRC, 0x0000001a},
 486                 {AUD_DCOC0_SHIFT, 0x00000000},
 487                 {AUD_DCOC_0_SHIFT_IN0, 0x0000000a},
 488                 {AUD_DCOC_0_SHIFT_IN1, 0x00000008},
 489                 {AUD_DCOC_PASS_IN, 0x00000003},
 490                 {AUD_IIR3_0_SEL, 0x00000021},
 491                 {AUD_DN2_AFC, 0x00000002},
 492                 {AUD_DCOC_1_SRC, 0x0000001b},
 493                 {AUD_DCOC1_SHIFT, 0x00000000},
 494                 {AUD_DCOC_1_SHIFT_IN0, 0x0000000a},
 495                 {AUD_DCOC_1_SHIFT_IN1, 0x00000008},
 496                 {AUD_IIR3_1_SEL, 0x00000023},
 497                 {AUD_DN0_FREQ, 0x000035a3},
 498                 {AUD_DN2_FREQ, 0x000029c7},
 499                 {AUD_CRDC0_SRC_SEL, 0x00000511},
 500                 {AUD_IIR1_0_SEL, 0x00000001},
 501                 {AUD_IIR1_1_SEL, 0x00000000},
 502                 {AUD_IIR3_2_SEL, 0x00000003},
 503                 {AUD_IIR3_2_SHIFT, 0x00000000},
 504                 {AUD_IIR3_0_SEL, 0x00000002},
 505                 {AUD_IIR2_0_SEL, 0x00000021},
 506                 {AUD_IIR2_0_SHIFT, 0x00000002},
 507                 {AUD_DEEMPH0_SRC_SEL, 0x0000000b},
 508                 {AUD_DEEMPH1_SRC_SEL, 0x0000000b},
 509                 {AUD_POLYPH80SCALEFAC, 0x00000001},
 510                 {AUD_START_TIMER, 0x00000000},
 511                 { /* end of list */ },
 512         };
 513
 514         static const struct rlist am_l[] = {
 515                 {AUD_ERRLOGPERIOD_R, 0x00000064},
 516                 {AUD_ERRINTRPTTHSHLD1_R, 0x00000FFF},
 517                 {AUD_ERRINTRPTTHSHLD2_R, 0x0000001F},
 518                 {AUD_ERRINTRPTTHSHLD3_R, 0x0000000F},
 519                 {AUD_PDF_DDS_CNST_BYTE2, 0x48},
 520                 {AUD_PDF_DDS_CNST_BYTE1, 0x3D},
 521                 {AUD_QAM_MODE, 0x00},
 522                 {AUD_PDF_DDS_CNST_BYTE0, 0xf5},
 523                 {AUD_PHACC_FREQ_8MSB, 0x3a},
 524                 {AUD_PHACC_FREQ_8LSB, 0x4a},
 525                 {AUD_DEEMPHGAIN_R, 0x00006680},
 526                 {AUD_DEEMPHNUMER1_R, 0x000353DE},
 527                 {AUD_DEEMPHNUMER2_R, 0x000001B1},
 528                 {AUD_DEEMPHDENOM1_R, 0x0000F3D0},
 529                 {AUD_DEEMPHDENOM2_R, 0x00000000},
 530                 {AUD_FM_MODE_ENABLE, 0x00000007},
 531                 {AUD_POLYPH80SCALEFAC, 0x00000003},
 532                 {AUD_AFE_12DB_EN, 0x00000001},
 533                 {AAGC_GAIN, 0x00000000},
 534                 {AAGC_HYST, 0x00000018},
 535                 {AAGC_DEF, 0x00000020},
 536                 {AUD_DN0_FREQ, 0x00000000},
 537                 {AUD_POLY0_DDS_CONSTANT, 0x000E4DB2},
 538                 {AUD_DCOC_0_SRC, 0x00000021},
 539                 {AUD_IIR1_0_SEL, 0x00000000},
 540                 {AUD_IIR1_0_SHIFT, 0x00000007},
 541                 {AUD_IIR1_1_SEL, 0x00000002},
 542                 {AUD_IIR1_1_SHIFT, 0x00000000},
 543                 {AUD_DCOC_1_SRC, 0x00000003},
 544                 {AUD_DCOC1_SHIFT, 0x00000000},
 545                 {AUD_DCOC_PASS_IN, 0x00000000},
 546                 {AUD_IIR1_2_SEL, 0x00000023},
 547                 {AUD_IIR1_2_SHIFT, 0x00000000},
 548                 {AUD_IIR1_3_SEL, 0x00000004},
 549                 {AUD_IIR1_3_SHIFT, 0x00000007},
 550                 {AUD_IIR1_4_SEL, 0x00000005},
 551                 {AUD_IIR1_4_SHIFT, 0x00000007},
 552                 {AUD_IIR3_0_SEL, 0x00000007},
 553                 {AUD_IIR3_0_SHIFT, 0x00000000},
 554                 {AUD_DEEMPH0_SRC_SEL, 0x00000011},
 555                 {AUD_DEEMPH0_SHIFT, 0x00000000},
 556                 {AUD_DEEMPH0_G0, 0x00007000},
 557                 {AUD_DEEMPH0_A0, 0x00000000},
 558                 {AUD_DEEMPH0_B0, 0x00000000},
 559                 {AUD_DEEMPH0_A1, 0x00000000},
 560                 {AUD_DEEMPH0_B1, 0x00000000},
 561                 {AUD_DEEMPH1_SRC_SEL, 0x00000011},
 562                 {AUD_DEEMPH1_SHIFT, 0x00000000},
 563                 {AUD_DEEMPH1_G0, 0x00007000},
 564                 {AUD_DEEMPH1_A0, 0x00000000},
 565                 {AUD_DEEMPH1_B0, 0x00000000},
 566                 {AUD_DEEMPH1_A1, 0x00000000},
 567                 {AUD_DEEMPH1_B1, 0x00000000},
 568                 {AUD_OUT0_SEL, 0x0000003F},
 569                 {AUD_OUT1_SEL, 0x0000003F},
 570                 {AUD_DMD_RA_DDS, 0x00F5C285},
 571                 {AUD_PLL_INT, 0x0000001E},
 572                 {AUD_PLL_DDS, 0x00000000},
 573                 {AUD_PLL_FRAC, 0x0000E542},
 574                 {AUD_RATE_ADJ1, 0x00000100},
 575                 {AUD_RATE_ADJ2, 0x00000200},
 576                 {AUD_RATE_ADJ3, 0x00000300},
 577                 {AUD_RATE_ADJ4, 0x00000400},
 578                 {AUD_RATE_ADJ5, 0x00000500},
 579                 {AUD_RATE_THRES_DMD, 0x000000C0},
 580                 { /* end of list */ },
 581         };
 582
 583         static const struct rlist a2_deemph50[] = {
 584                 {AUD_DEEMPH0_G0, 0x00000380},
 585                 {AUD_DEEMPH1_G0, 0x00000380},
 586                 {AUD_DEEMPHGAIN_R, 0x000011e1},
 587                 {AUD_DEEMPHNUMER1_R, 0x0002a7bc},
 588                 {AUD_DEEMPHNUMER2_R, 0x0003023c},
 589                 { /* end of list */ },
 590         };
 591
 592         set_audio_start(core, SEL_A2);
 593         switch (core->tvaudio) {
 594         case WW_BG:
 595                 dprintk("%s PAL-BG A1/2 (status: known-good)\n", __FUNCTION__);
 596                 set_audio_registers(core, a2_bgdk_common);
 597                 set_audio_registers(core, a2_bg);
 598                 set_audio_registers(core, a2_deemph50);
 599                 break;
 600         case WW_DK:
 601                 dprintk("%s PAL-DK A1/2 (status: known-good)\n", __FUNCTION__);
 602                 set_audio_registers(core, a2_bgdk_common);
 603                 set_audio_registers(core, a2_dk);
 604                 set_audio_registers(core, a2_deemph50);
 605                 break;
 606         case WW_I:
 607                 dprintk("%s PAL-I A1 (status: known-good)\n", __FUNCTION__);
 608                 set_audio_registers(core, a1_i);
 609                 set_audio_registers(core, a2_deemph50);
 610                 break;
 611         case WW_L:
 612                 dprintk("%s AM-L (status: devel)\n", __FUNCTION__);
 613                 set_audio_registers(core, am_l);
 614                 break;
 615         default:
 616                 dprintk("%s Warning: wrong value\n", __FUNCTION__);
 617                 return;
 618                 break;
 619         };
 620
 621         mode |= EN_FMRADIO_EN_RDS | EN_DMTRX_SUMDIFF;
 622         set_audio_finish(core, mode);
 623 }
 624
 625 static void set_audio_standard_EIAJ(struct cx88_core *core)
 626 {
 627         static const struct rlist eiaj[] = {
 628                 /* TODO: eiaj register settings are not there yet ... */
 629
 630                 { /* end of list */ },
 631         };
 632         dprintk("%s (status: unknown)\n", __FUNCTION__);
 633
 634         set_audio_start(core, SEL_EIAJ);
 635         set_audio_registers(core, eiaj);
 636         set_audio_finish(core, EN_EIAJ_AUTO_STEREO);
 637 }
 638
 639 static void set_audio_standard_FM(struct cx88_core *core,
 640                                   enum cx88_deemph_type deemph)
 641 {
 642         static const struct rlist fm_deemph_50[] = {
 643                 {AUD_DEEMPH0_G0, 0x0C45},
 644                 {AUD_DEEMPH0_A0, 0x6262},
 645                 {AUD_DEEMPH0_B0, 0x1C29},
 646                 {AUD_DEEMPH0_A1, 0x3FC66},
 647                 {AUD_DEEMPH0_B1, 0x399A},
 648
 649                 {AUD_DEEMPH1_G0, 0x0D80},
 650                 {AUD_DEEMPH1_A0, 0x6262},
 651                 {AUD_DEEMPH1_B0, 0x1C29},
 652                 {AUD_DEEMPH1_A1, 0x3FC66},
 653                 {AUD_DEEMPH1_B1, 0x399A},
 654
 655                 {AUD_POLYPH80SCALEFAC, 0x0003},
 656                 { /* end of list */ },
 657         };
 658         static const struct rlist fm_deemph_75[] = {
 659                 {AUD_DEEMPH0_G0, 0x091B},
 660                 {AUD_DEEMPH0_A0, 0x6B68},
 661                 {AUD_DEEMPH0_B0, 0x11EC},
 662                 {AUD_DEEMPH0_A1, 0x3FC66},
 663                 {AUD_DEEMPH0_B1, 0x399A},
 664
 665                 {AUD_DEEMPH1_G0, 0x0AA0},
 666                 {AUD_DEEMPH1_A0, 0x6B68},
 667                 {AUD_DEEMPH1_B0, 0x11EC},
 668                 {AUD_DEEMPH1_A1, 0x3FC66},
 669                 {AUD_DEEMPH1_B1, 0x399A},
 670
 671                 {AUD_POLYPH80SCALEFAC, 0x0003},
 672                 { /* end of list */ },
 673         };
 674
 675         /* It is enough to leave default values? */
 676         static const struct rlist fm_no_deemph[] = {
 677
 678                 {AUD_POLYPH80SCALEFAC, 0x0003},
 679                 { /* end of list */ },
 680         };
 681
 682         dprintk("%s (status: unknown)\n", __FUNCTION__);
 683         set_audio_start(core, SEL_FMRADIO);
 684
 685         switch (deemph) {
 686         case FM_NO_DEEMPH:
 687                 set_audio_registers(core, fm_no_deemph);
 688                 break;
 689
 690         case FM_DEEMPH_50:
 691                 set_audio_registers(core, fm_deemph_50);
 692                 break;
 693
 694         case FM_DEEMPH_75:
 695                 set_audio_registers(core, fm_deemph_75);
 696                 break;
 697         }
 698
 699         set_audio_finish(core, EN_FMRADIO_AUTO_STEREO);
 700 }
 701
 702 /* ----------------------------------------------------------- */
 703
 704 int cx88_detect_nicam(struct cx88_core *core)
 705 {
 706         int i, j = 0;
 707
 708         dprintk("start nicam autodetect.\n");
 709
 710         for (i = 0; i < 6; i++) {
 711                 /* if bit1=1 then nicam is detected */
 712                 j += ((cx_read(AUD_NICAM_STATUS2) & 0x02) >> 1);
 713
 714                 /* 3x detected: absolutly sure now */
 715                 if (j == 3) {
 716                         dprintk("nicam is detected.\n");
 717                         return 1;
 718                 }
 719
 720                 /* wait a little bit for next reading status */
 721                 msleep(10);
 722         }
 723
 724         dprintk("nicam is not detected.\n");
 725         return 0;
 726 }
 727
 728 void cx88_set_tvaudio(struct cx88_core *core)
 729 {
 730         switch (core->tvaudio) {
 731         case WW_BTSC:
 732                 set_audio_standard_BTSC(core, 0, EN_BTSC_AUTO_STEREO);
 733                 break;
 734         case WW_BG:
 735         case WW_DK:
 736         case WW_I:
 737         case WW_L:
 738                 /* prepare all dsp registers */
 739                 set_audio_standard_A2(core, EN_A2_FORCE_MONO1);
 740
 741                 /* set nicam mode - otherwise
 742                    AUD_NICAM_STATUS2 contains wrong values */
 743                 set_audio_standard_NICAM(core, EN_NICAM_FORCE_MONO1);
 744                 if (0 == cx88_detect_nicam(core)) {
 745                         /* fall back to fm / am mono */
 746                         set_audio_standard_A2(core, EN_A2_FORCE_MONO1);
 747                         core->use_nicam = 0;
 748                 } else {
 749                         core->use_nicam = 1;
 750                 }
 751                 break;
 752         case WW_EIAJ:
 753                 set_audio_standard_EIAJ(core);
 754                 break;
 755         case WW_FM:
 756                 set_audio_standard_FM(core, FM_NO_DEEMPH);
 757                 break;
 758         case WW_NONE:
 759         default:
 760                 printk("%s/0: unknown tv audio mode [%d]\n",
 761                        core->name, core->tvaudio);
 762                 break;
 763         }
 764         return;
 765 }
 766
 767 void cx88_newstation(struct cx88_core *core)
 768 {
 769         core->audiomode_manual = UNSET;
 770 }
 771
 772 void cx88_get_stereo(struct cx88_core *core, struct v4l2_tuner *t)
 773 {
 774         static char *m[] = { "stereo", "dual mono", "mono", "sap" };
 775         static char *p[] = { "no pilot", "pilot c1", "pilot c2", "?" };
 776         u32 reg, mode, pilot;
 777
 778         reg = cx_read(AUD_STATUS);
 779         mode = reg & 0x03;
 780         pilot = (reg >> 2) & 0x03;
 781
 782         if (core->astat != reg)
 783                 dprintk("AUD_STATUS: 0x%x [%s/%s] ctl=%s\n",
 784                         reg, m[mode], p[pilot],
 785                         aud_ctl_names[cx_read(AUD_CTL) & 63]);
 786         core->astat = reg;
 787
 788 /* TODO
 789        Reading from AUD_STATUS is not enough
 790        for auto-detecting sap/dual-fm/nicam.
 791        Add some code here later.
 792 */
 793
 794 # if 0
 795         t->capability = V4L2_TUNER_CAP_STEREO | V4L2_TUNER_CAP_SAP |
 796             V4L2_TUNER_CAP_LANG1 | V4L2_TUNER_CAP_LANG2;
 797         t->rxsubchans = V4L2_TUNER_SUB_MONO;
 798         t->audmode = V4L2_TUNER_MODE_MONO;
 799
 800         switch (core->tvaudio) {
 801         case WW_BTSC:
 802                 t->capability = V4L2_TUNER_CAP_STEREO | V4L2_TUNER_CAP_SAP;
 803                 t->rxsubchans = V4L2_TUNER_SUB_STEREO;
 804                 if (1 == pilot) {
 805                         /* SAP */
 806                         t->rxsubchans |= V4L2_TUNER_SUB_SAP;
 807                 }
 808                 break;
 809         case WW_A2_BG:
 810         case WW_A2_DK:
 811         case WW_A2_M:
 812                 if (1 == pilot) {
 813                         /* stereo */
 814                         t->rxsubchans =
 815                             V4L2_TUNER_SUB_MONO | V4L2_TUNER_SUB_STEREO;
 816                         if (0 == mode)
 817                                 t->audmode = V4L2_TUNER_MODE_STEREO;
 818                 }
 819                 if (2 == pilot) {
 820                         /* dual language -- FIXME */
 821                         t->rxsubchans =
 822                             V4L2_TUNER_SUB_LANG1 | V4L2_TUNER_SUB_LANG2;
 823                         t->audmode = V4L2_TUNER_MODE_LANG1;
 824                 }
 825                 break;
 826         case WW_NICAM_BGDKL:
 827                 if (0 == mode) {
 828                         t->audmode = V4L2_TUNER_MODE_STEREO;
 829                         t->rxsubchans |= V4L2_TUNER_SUB_STEREO;
 830                 }
 831                 break;
 832         case WW_SYSTEM_L_AM:
 833                 if (0x0 == mode && !(cx_read(AUD_INIT) & 0x04)) {
 834                         t->audmode = V4L2_TUNER_MODE_STEREO;
 835                         t->rxsubchans |= V4L2_TUNER_SUB_STEREO;
 836                 }
 837                 break;
 838         default:
 839                 /* nothing */
 840                 break;
 841         }
 842 # endif
 843         return;
 844 }
 845
 846 void cx88_set_stereo(struct cx88_core *core, u32 mode, int manual)
 847 {
 848         u32 ctl = UNSET;
 849         u32 mask = UNSET;
 850
 851         if (manual) {
 852                 core->audiomode_manual = mode;
 853         } else {
 854                 if (UNSET != core->audiomode_manual)
 855                         return;
 856         }
 857         core->audiomode_current = mode;
 858
 859         switch (core->tvaudio) {
 860         case WW_BTSC:
 861                 switch (mode) {
 862                 case V4L2_TUNER_MODE_MONO:
 863                         set_audio_standard_BTSC(core, 0, EN_BTSC_FORCE_MONO);
 864                         break;
 865                 case V4L2_TUNER_MODE_LANG1:
 866                         set_audio_standard_BTSC(core, 0, EN_BTSC_AUTO_STEREO);
 867                         break;
 868                 case V4L2_TUNER_MODE_LANG2:
 869                         set_audio_standard_BTSC(core, 1, EN_BTSC_FORCE_SAP);
 870                         break;
 871                 case V4L2_TUNER_MODE_STEREO:
 872                         set_audio_standard_BTSC(core, 0, EN_BTSC_FORCE_STEREO);
 873                         break;
 874                 }
 875                 break;
 876         case WW_BG:
 877         case WW_DK:
 878         case WW_I:
 879         case WW_L:
 880                 if (1 == core->use_nicam) {
 881                         switch (mode) {
 882                         case V4L2_TUNER_MODE_MONO:
 883                         case V4L2_TUNER_MODE_LANG1:
 884                                 set_audio_standard_NICAM(core,
 885                                                          EN_NICAM_FORCE_MONO1);
 886                                 break;
 887                         case V4L2_TUNER_MODE_LANG2:
 888                                 set_audio_standard_NICAM(core,
 889                                                          EN_NICAM_FORCE_MONO2);
 890                                 break;
 891                         case V4L2_TUNER_MODE_STEREO:
 892                                 set_audio_standard_NICAM(core,
 893                                                          EN_NICAM_FORCE_STEREO);
 894                                 break;
 895                         }
 896                 } else {
 897                         if ((core->tvaudio == WW_I) || (core->tvaudio == WW_L)) {
 898                                 /* fall back to fm / am mono */
 899                                 set_audio_standard_A2(core, EN_A2_FORCE_MONO1);
 900                         } else {
 901                                 /* TODO: Add A2 autodection */
 902                                 switch (mode) {
 903                                 case V4L2_TUNER_MODE_MONO:
 904                                 case V4L2_TUNER_MODE_LANG1:
 905                                         set_audio_standard_A2(core,
 906                                                               EN_A2_FORCE_MONO1);
 907                                         break;
 908                                 case V4L2_TUNER_MODE_LANG2:
 909                                         set_audio_standard_A2(core,
 910                                                               EN_A2_FORCE_MONO2);
 911                                         break;
 912                                 case V4L2_TUNER_MODE_STEREO:
 913                                         set_audio_standard_A2(core,
 914                                                               EN_A2_FORCE_STEREO);
 915                                         break;
 916                                 }
 917                         }
 918                 }
 919                 break;
 920         case WW_FM:
 921                 switch (mode) {
 922                 case V4L2_TUNER_MODE_MONO:
 923                         ctl = EN_FMRADIO_FORCE_MONO;
 924                         mask = 0x3f;
 925                         break;
 926                 case V4L2_TUNER_MODE_STEREO:
 927                         ctl = EN_FMRADIO_AUTO_STEREO;
 928                         mask = 0x3f;
 929                         break;
 930                 }
 931                 break;
 932         }
 933
 934         if (UNSET != ctl) {
 935                 dprintk("cx88_set_stereo: mask 0x%x, ctl 0x%x "
 936                         "[status=0x%x,ctl=0x%x,vol=0x%x]\n",
 937                         mask, ctl, cx_read(AUD_STATUS),
 938                         cx_read(AUD_CTL), cx_sread(SHADOW_AUD_VOL_CTL));
 939                 cx_andor(AUD_CTL, mask, ctl);
 940         }
 941         return;
 942 }
 943
 944 int cx88_audio_thread(void *data)
 945 {
 946         struct cx88_core *core = data;
 947         struct v4l2_tuner t;
 948         u32 mode = 0;
 949
 950         dprintk("cx88: tvaudio thread started\n");
 951         for (;;) {
 952                 msleep_interruptible(1000);
 953                 if (kthread_should_stop())
 954                         break;
 955
 956                 /* just monitor the audio status for now ... */
 957                 memset(&t, 0, sizeof(t));
 958                 cx88_get_stereo(core, &t);
 959
 960                 if (UNSET != core->audiomode_manual)
 961                         /* manually set, don't do anything. */
 962                         continue;
 963
 964                 /* monitor signal */
 965                 if (t.rxsubchans & V4L2_TUNER_SUB_STEREO)
 966                         mode = V4L2_TUNER_MODE_STEREO;
 967                 else
 968                         mode = V4L2_TUNER_MODE_MONO;
 969                 if (mode == core->audiomode_current)
 970                         continue;
 971
 972                 /* automatically switch to best available mode */
 973                 cx88_set_stereo(core, mode, 0);
 974         }
 975
 976         dprintk("cx88: tvaudio thread exiting\n");
 977         return 0;
 978 }
 979
 980 /* ----------------------------------------------------------- */
 981
 982 EXPORT_SYMBOL(cx88_set_tvaudio);
 983 EXPORT_SYMBOL(cx88_newstation);
 984 EXPORT_SYMBOL(cx88_set_stereo);
 985 EXPORT_SYMBOL(cx88_get_stereo);
 986 EXPORT_SYMBOL(cx88_audio_thread);
 987
 988 /*
 989  * Local variables:
 990  * c-basic-offset: 8
 991  * End:
 992  * kate: eol "unix"; indent-width 3; remove-trailing-space on; replace-trailing-space-save on; tab-width 8; replace-tabs off; space-indent off; mixed-indent off
 993  */