2 em28xx-core.c - driver for Empia EM2800/EM2820/2840 USB video capture devices
4 Copyright (C) 2005 Ludovico Cavedon <cavedon@sssup.it>
5 Markus Rechberger <mrechberger@gmail.com>
6 Mauro Carvalho Chehab <mchehab@infradead.org>
7 Sascha Sommer <saschasommer@freenet.de>
9 This program is free software; you can redistribute it and/or modify
10 it under the terms of the GNU General Public License as published by
11 the Free Software Foundation; either version 2 of the License, or
12 (at your option) any later version.
14 This program is distributed in the hope that it will be useful,
15 but WITHOUT ANY WARRANTY; without even the implied warranty of
16 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 GNU General Public License for more details.
19 You should have received a copy of the GNU General Public License
20 along with this program; if not, write to the Free Software
21 Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
24 #include <linux/init.h>
25 #include <linux/list.h>
26 #include <linux/module.h>
27 #include <linux/usb.h>
28 #include <linux/vmalloc.h>
32 /* #define ENABLE_DEBUG_ISOC_FRAMES */
34 static unsigned int core_debug;
35 module_param(core_debug,int,0644);
36 MODULE_PARM_DESC(core_debug,"enable debug messages [core]");
38 #define em28xx_coredbg(fmt, arg...) do {\
40 printk(KERN_INFO "%s %s :"fmt, \
41 dev->name, __func__ , ##arg); } while (0)
43 static unsigned int reg_debug;
44 module_param(reg_debug,int,0644);
45 MODULE_PARM_DESC(reg_debug,"enable debug messages [URB reg]");
47 #define em28xx_regdbg(fmt, arg...) do {\
49 printk(KERN_INFO "%s %s :"fmt, \
50 dev->name, __func__ , ##arg); } while (0)
52 static int alt = EM28XX_PINOUT;
53 module_param(alt, int, 0644);
54 MODULE_PARM_DESC(alt, "alternate setting to use for video endpoint");
57 #define em28xx_isocdbg(fmt, arg...) do {\
59 printk(KERN_INFO "%s %s :"fmt, \
60 dev->name, __func__ , ##arg); } while (0)
63 * em28xx_read_reg_req()
64 * reads data from the usb device specifying bRequest
66 int em28xx_read_reg_req_len(struct em28xx *dev, u8 req, u16 reg,
71 if (dev->state & DEV_DISCONNECTED)
74 if (len > URB_MAX_CTRL_SIZE)
77 em28xx_regdbg("req=%02x, reg=%02x ", req, reg);
79 mutex_lock(&dev->ctrl_urb_lock);
80 ret = usb_control_msg(dev->udev, usb_rcvctrlpipe(dev->udev, 0), req,
81 USB_DIR_IN | USB_TYPE_VENDOR | USB_RECIP_DEVICE,
82 0x0000, reg, dev->urb_buf, len, HZ);
86 mutex_unlock(&dev->ctrl_urb_lock);
91 memcpy(buf, dev->urb_buf, len);
93 mutex_unlock(&dev->ctrl_urb_lock);
96 printk("%02x values: ", ret);
97 for (byte = 0; byte < len; byte++)
98 printk(" %02x", (unsigned char)buf[byte]);
106 * em28xx_read_reg_req()
107 * reads data from the usb device specifying bRequest
109 int em28xx_read_reg_req(struct em28xx *dev, u8 req, u16 reg)
114 if (dev->state & DEV_DISCONNECTED)
117 em28xx_regdbg("req=%02x, reg=%02x:", req, reg);
119 mutex_lock(&dev->ctrl_urb_lock);
120 ret = usb_control_msg(dev->udev, usb_rcvctrlpipe(dev->udev, 0), req,
121 USB_DIR_IN | USB_TYPE_VENDOR | USB_RECIP_DEVICE,
122 0x0000, reg, dev->urb_buf, 1, HZ);
123 val = dev->urb_buf[0];
124 mutex_unlock(&dev->ctrl_urb_lock);
127 printk(" failed!\n");
132 printk("%02x\n", (unsigned char) val);
137 int em28xx_read_reg(struct em28xx *dev, u16 reg)
139 return em28xx_read_reg_req(dev, USB_REQ_GET_STATUS, reg);
143 * em28xx_write_regs_req()
144 * sends data to the usb device, specifying bRequest
146 int em28xx_write_regs_req(struct em28xx *dev, u8 req, u16 reg, char *buf,
151 if (dev->state & DEV_DISCONNECTED)
154 if ((len < 1) || (len > URB_MAX_CTRL_SIZE))
157 em28xx_regdbg("req=%02x reg=%02x:", req, reg);
160 for (i = 0; i < len; ++i)
161 printk(" %02x", (unsigned char)buf[i]);
165 mutex_lock(&dev->ctrl_urb_lock);
166 memcpy(dev->urb_buf, buf, len);
167 ret = usb_control_msg(dev->udev, usb_sndctrlpipe(dev->udev, 0), req,
168 USB_DIR_OUT | USB_TYPE_VENDOR | USB_RECIP_DEVICE,
169 0x0000, reg, dev->urb_buf, len, HZ);
170 mutex_unlock(&dev->ctrl_urb_lock);
172 if (dev->wait_after_write)
173 msleep(dev->wait_after_write);
178 int em28xx_write_regs(struct em28xx *dev, u16 reg, char *buf, int len)
182 rc = em28xx_write_regs_req(dev, USB_REQ_GET_STATUS, reg, buf, len);
184 /* Stores GPO/GPIO values at the cache, if changed
185 Only write values should be stored, since input on a GPIO
186 register will return the input bits.
187 Not sure what happens on reading GPO register.
190 if (reg == dev->reg_gpo_num)
191 dev->reg_gpo = buf[0];
192 else if (reg == dev->reg_gpio_num)
193 dev->reg_gpio = buf[0];
199 /* Write a single register */
200 int em28xx_write_reg(struct em28xx *dev, u16 reg, u8 val)
202 return em28xx_write_regs(dev, reg, &val, 1);
206 * em28xx_write_reg_bits()
207 * sets only some bits (specified by bitmask) of a register, by first reading
210 static int em28xx_write_reg_bits(struct em28xx *dev, u16 reg, u8 val,
216 /* Uses cache for gpo/gpio registers */
217 if (reg == dev->reg_gpo_num)
218 oldval = dev->reg_gpo;
219 else if (reg == dev->reg_gpio_num)
220 oldval = dev->reg_gpio;
222 oldval = em28xx_read_reg(dev, reg);
227 newval = (((u8) oldval) & ~bitmask) | (val & bitmask);
229 return em28xx_write_regs(dev, reg, &newval, 1);
233 * em28xx_is_ac97_ready()
234 * Checks if ac97 is ready
236 static int em28xx_is_ac97_ready(struct em28xx *dev)
240 /* Wait up to 50 ms for AC97 command to complete */
241 for (i = 0; i < 10; i++, msleep(5)) {
242 ret = em28xx_read_reg(dev, EM28XX_R43_AC97BUSY);
250 em28xx_warn("AC97 command still being executed: not handled properly!\n");
256 * write a 16 bit value to the specified AC97 address (LSB first!)
258 static int em28xx_read_ac97(struct em28xx *dev, u8 reg)
261 u8 addr = (reg & 0x7f) | 0x80;
264 ret = em28xx_is_ac97_ready(dev);
268 ret = em28xx_write_regs(dev, EM28XX_R42_AC97ADDR, &addr, 1);
272 ret = dev->em28xx_read_reg_req_len(dev, 0, EM28XX_R40_AC97LSB,
273 (u8 *)&val, sizeof(val));
277 return le16_to_cpu(val);
281 * em28xx_write_ac97()
282 * write a 16 bit value to the specified AC97 address (LSB first!)
284 static int em28xx_write_ac97(struct em28xx *dev, u8 reg, u16 val)
287 u8 addr = reg & 0x7f;
290 value = cpu_to_le16(val);
292 ret = em28xx_is_ac97_ready(dev);
296 ret = em28xx_write_regs(dev, EM28XX_R40_AC97LSB, (u8 *) &value, 2);
300 ret = em28xx_write_regs(dev, EM28XX_R42_AC97ADDR, &addr, 1);
307 struct em28xx_input_table {
308 enum em28xx_amux amux;
312 static struct em28xx_input_table inputs[] = {
313 { EM28XX_AMUX_VIDEO, AC97_VIDEO_VOL },
314 { EM28XX_AMUX_LINE_IN, AC97_LINEIN_VOL },
315 { EM28XX_AMUX_PHONE, AC97_PHONE_VOL },
316 { EM28XX_AMUX_MIC, AC97_MIC_VOL },
317 { EM28XX_AMUX_CD, AC97_CD_VOL },
318 { EM28XX_AMUX_AUX, AC97_AUX_VOL },
319 { EM28XX_AMUX_PCM_OUT, AC97_PCM_OUT_VOL },
322 static int set_ac97_input(struct em28xx *dev)
325 enum em28xx_amux amux = dev->ctl_ainput;
327 /* EM28XX_AMUX_VIDEO2 is a special case used to indicate that
328 em28xx should point to LINE IN, while AC97 should use VIDEO
330 if (amux == EM28XX_AMUX_VIDEO2)
331 amux = EM28XX_AMUX_VIDEO;
333 /* Mute all entres but the one that were selected */
334 for (i = 0; i < ARRAY_SIZE(inputs); i++) {
335 if (amux == inputs[i].amux)
336 ret = em28xx_write_ac97(dev, inputs[i].reg, 0x0808);
338 ret = em28xx_write_ac97(dev, inputs[i].reg, 0x8000);
341 em28xx_warn("couldn't setup AC97 register %d\n",
347 static int em28xx_set_audio_source(struct em28xx *dev)
352 if (dev->is_em2800) {
353 if (dev->ctl_ainput == EM28XX_AMUX_VIDEO)
354 input = EM2800_AUDIO_SRC_TUNER;
356 input = EM2800_AUDIO_SRC_LINE;
358 ret = em28xx_write_regs(dev, EM2800_R08_AUDIOSRC, &input, 1);
363 if (dev->has_msp34xx)
364 input = EM28XX_AUDIO_SRC_TUNER;
366 switch (dev->ctl_ainput) {
367 case EM28XX_AMUX_VIDEO:
368 input = EM28XX_AUDIO_SRC_TUNER;
371 input = EM28XX_AUDIO_SRC_LINE;
376 ret = em28xx_write_reg_bits(dev, EM28XX_R0E_AUDIOSRC, input, 0xc0);
381 switch (dev->audio_mode.ac97) {
385 ret = set_ac97_input(dev);
391 static int outputs[] = {
392 [EM28XX_AOUT_MASTER] = AC97_MASTER_VOL,
393 [EM28XX_AOUT_LINE] = AC97_LINE_LEVEL_VOL,
394 [EM28XX_AOUT_MONO] = AC97_MASTER_MONO_VOL,
395 [EM28XX_AOUT_LFE] = AC97_LFE_MASTER_VOL,
396 [EM28XX_AOUT_SURR] = AC97_SURR_MASTER_VOL,
399 int em28xx_audio_analog_set(struct em28xx *dev)
404 if (!dev->audio_mode.has_audio)
407 /* It is assumed that all devices use master volume for output.
408 It would be possible to use also line output.
410 if (dev->audio_mode.ac97 != EM28XX_NO_AC97) {
411 /* Mute all outputs */
412 for (i = 0; i < ARRAY_SIZE(outputs); i++) {
413 ret = em28xx_write_ac97(dev, outputs[i], 0x8000);
415 em28xx_warn("couldn't setup AC97 register %d\n",
420 if (dev->has_12mhz_i2s)
426 ret = em28xx_write_reg_bits(dev, EM28XX_R0F_XCLK, xclk, 0xa7);
431 /* Selects the proper audio input */
432 ret = em28xx_set_audio_source(dev);
435 if (dev->audio_mode.ac97 != EM28XX_NO_AC97) {
438 /* LSB: left channel - both channels with the same level */
439 vol = (0x1f - dev->volume) | ((0x1f - dev->volume) << 8);
441 /* Mute device, if needed */
446 ret = em28xx_write_ac97(dev, outputs[dev->ctl_aoutput], vol);
451 EXPORT_SYMBOL_GPL(em28xx_audio_analog_set);
453 int em28xx_audio_setup(struct em28xx *dev)
455 int vid1, vid2, feat, cfg;
458 if (dev->chip_id == CHIP_ID_EM2874) {
459 /* Digital only device - don't load any alsa module */
460 dev->audio_mode.has_audio = 0;
461 dev->has_audio_class = 0;
462 dev->has_alsa_audio = 0;
466 /* If device doesn't support Usb Audio Class, use vendor class */
467 if (!dev->has_audio_class)
468 dev->has_alsa_audio = 1;
470 dev->audio_mode.has_audio = 1;
472 /* See how this device is configured */
473 cfg = em28xx_read_reg(dev, EM28XX_R00_CHIPCFG);
475 cfg = EM28XX_CHIPCFG_AC97; /* Be conservative */
477 em28xx_info("Config register raw data: 0x%02x\n", cfg);
479 if ((cfg & EM28XX_CHIPCFG_AUDIOMASK) ==
480 EM28XX_CHIPCFG_I2S_3_SAMPRATES) {
481 em28xx_info("I2S Audio (3 sample rates)\n");
482 dev->audio_mode.i2s_3rates = 1;
484 if ((cfg & EM28XX_CHIPCFG_AUDIOMASK) ==
485 EM28XX_CHIPCFG_I2S_5_SAMPRATES) {
486 em28xx_info("I2S Audio (5 sample rates)\n");
487 dev->audio_mode.i2s_5rates = 1;
490 if (!(cfg & EM28XX_CHIPCFG_AC97)) {
491 dev->audio_mode.ac97 = EM28XX_NO_AC97;
495 dev->audio_mode.ac97 = EM28XX_AC97_OTHER;
497 vid1 = em28xx_read_ac97(dev, AC97_VENDOR_ID1);
499 /* Device likely doesn't support AC97 */
500 em28xx_warn("AC97 chip type couldn't be determined\n");
504 vid2 = em28xx_read_ac97(dev, AC97_VENDOR_ID2);
508 vid = vid1 << 16 | vid2;
510 dev->audio_mode.ac97_vendor_id = vid;
511 em28xx_warn("AC97 vendor ID = 0x%08x\n", vid);
513 feat = em28xx_read_ac97(dev, AC97_RESET);
517 dev->audio_mode.ac97_feat = feat;
518 em28xx_warn("AC97 features = 0x%04x\n", feat);
520 /* Try to identify what audio processor we have */
521 if ((vid == 0xffffffff) && (feat == 0x6a90))
522 dev->audio_mode.ac97 = EM28XX_AC97_EM202;
523 else if ((vid >> 8) == 0x838476)
524 dev->audio_mode.ac97 = EM28XX_AC97_SIGMATEL;
527 /* Reports detected AC97 processor */
528 switch (dev->audio_mode.ac97) {
530 em28xx_info("No AC97 audio processor\n");
532 case EM28XX_AC97_EM202:
533 em28xx_info("Empia 202 AC97 audio processor detected\n");
535 case EM28XX_AC97_SIGMATEL:
536 em28xx_info("Sigmatel audio processor detected(stac 97%02x)\n",
537 dev->audio_mode.ac97_vendor_id & 0xff);
539 case EM28XX_AC97_OTHER:
540 em28xx_warn("Unknown AC97 audio processor detected!\n");
546 return em28xx_audio_analog_set(dev);
548 EXPORT_SYMBOL_GPL(em28xx_audio_setup);
550 int em28xx_colorlevels_set_default(struct em28xx *dev)
552 em28xx_write_regs(dev, EM28XX_R20_YGAIN, "\x10", 1); /* contrast */
553 em28xx_write_regs(dev, EM28XX_R21_YOFFSET, "\x00", 1); /* brightness */
554 em28xx_write_regs(dev, EM28XX_R22_UVGAIN, "\x10", 1); /* saturation */
555 em28xx_write_regs(dev, EM28XX_R23_UOFFSET, "\x00", 1);
556 em28xx_write_regs(dev, EM28XX_R24_VOFFSET, "\x00", 1);
557 em28xx_write_regs(dev, EM28XX_R25_SHARPNESS, "\x00", 1);
559 em28xx_write_regs(dev, EM28XX_R14_GAMMA, "\x20", 1);
560 em28xx_write_regs(dev, EM28XX_R15_RGAIN, "\x20", 1);
561 em28xx_write_regs(dev, EM28XX_R16_GGAIN, "\x20", 1);
562 em28xx_write_regs(dev, EM28XX_R17_BGAIN, "\x20", 1);
563 em28xx_write_regs(dev, EM28XX_R18_ROFFSET, "\x00", 1);
564 em28xx_write_regs(dev, EM28XX_R19_GOFFSET, "\x00", 1);
565 return em28xx_write_regs(dev, EM28XX_R1A_BOFFSET, "\x00", 1);
568 int em28xx_capture_start(struct em28xx *dev, int start)
572 if (dev->chip_id == CHIP_ID_EM2874) {
573 /* The Transport Stream Enable Register moved in em2874 */
575 rc = em28xx_write_reg_bits(dev, EM2874_R5F_TS_ENABLE,
577 EM2874_TS1_CAPTURE_ENABLE);
581 /* Enable Transport Stream */
582 rc = em28xx_write_reg_bits(dev, EM2874_R5F_TS_ENABLE,
583 EM2874_TS1_CAPTURE_ENABLE,
584 EM2874_TS1_CAPTURE_ENABLE);
589 /* FIXME: which is the best order? */
590 /* video registers are sampled by VREF */
591 rc = em28xx_write_reg_bits(dev, EM28XX_R0C_USBSUSP,
592 start ? 0x10 : 0x00, 0x10);
597 /* disable video capture */
598 rc = em28xx_write_regs(dev, EM28XX_R12_VINENABLE, "\x27", 1);
602 /* enable video capture */
603 rc = em28xx_write_regs_req(dev, 0x00, 0x48, "\x00", 1);
605 if (dev->mode == EM28XX_ANALOG_MODE)
606 rc = em28xx_write_regs(dev, EM28XX_R12_VINENABLE, "\x67", 1);
608 rc = em28xx_write_regs(dev, EM28XX_R12_VINENABLE, "\x37", 1);
615 int em28xx_outfmt_set_yuv422(struct em28xx *dev)
617 em28xx_write_regs(dev, EM28XX_R27_OUTFMT, "\x34", 1);
618 em28xx_write_regs(dev, EM28XX_R10_VINMODE, "\x10", 1);
619 return em28xx_write_regs(dev, EM28XX_R11_VINCTRL, "\x11", 1);
622 static int em28xx_accumulator_set(struct em28xx *dev, u8 xmin, u8 xmax,
625 em28xx_coredbg("em28xx Scale: (%d,%d)-(%d,%d)\n",
626 xmin, ymin, xmax, ymax);
628 em28xx_write_regs(dev, EM28XX_R28_XMIN, &xmin, 1);
629 em28xx_write_regs(dev, EM28XX_R29_XMAX, &xmax, 1);
630 em28xx_write_regs(dev, EM28XX_R2A_YMIN, &ymin, 1);
631 return em28xx_write_regs(dev, EM28XX_R2B_YMAX, &ymax, 1);
634 static int em28xx_capture_area_set(struct em28xx *dev, u8 hstart, u8 vstart,
635 u16 width, u16 height)
639 u8 overflow = (height >> 7 & 0x02) | (width >> 8 & 0x01);
641 em28xx_coredbg("em28xx Area Set: (%d,%d)\n",
642 (width | (overflow & 2) << 7),
643 (height | (overflow & 1) << 8));
645 em28xx_write_regs(dev, EM28XX_R1C_HSTART, &hstart, 1);
646 em28xx_write_regs(dev, EM28XX_R1D_VSTART, &vstart, 1);
647 em28xx_write_regs(dev, EM28XX_R1E_CWIDTH, &cwidth, 1);
648 em28xx_write_regs(dev, EM28XX_R1F_CHEIGHT, &cheight, 1);
649 return em28xx_write_regs(dev, EM28XX_R1B_OFLOW, &overflow, 1);
652 static int em28xx_scaler_set(struct em28xx *dev, u16 h, u16 v)
655 /* the em2800 scaler only supports scaling down to 50% */
657 mode = (v ? 0x20 : 0x00) | (h ? 0x10 : 0x00);
662 em28xx_write_regs(dev, EM28XX_R30_HSCALELOW, (char *)buf, 2);
665 em28xx_write_regs(dev, EM28XX_R32_VSCALELOW, (char *)buf, 2);
666 /* it seems that both H and V scalers must be active
668 mode = (h || v)? 0x30: 0x00;
670 return em28xx_write_reg_bits(dev, EM28XX_R26_COMPR, mode, 0x30);
673 /* FIXME: this only function read values from dev */
674 int em28xx_resolution_set(struct em28xx *dev)
677 width = norm_maxw(dev);
678 height = norm_maxh(dev) >> 1;
680 em28xx_outfmt_set_yuv422(dev);
681 em28xx_accumulator_set(dev, 1, (width - 4) >> 2, 1, (height - 4) >> 2);
682 em28xx_capture_area_set(dev, 0, 0, width >> 2, height >> 2);
683 return em28xx_scaler_set(dev, dev->hscale, dev->vscale);
686 int em28xx_set_alternate(struct em28xx *dev)
688 int errCode, prev_alt = dev->alt;
690 unsigned int min_pkt_size = dev->width * 2 + 4;
692 /* When image size is bigger than a certain value,
693 the frame size should be increased, otherwise, only
694 green screen will be received.
696 if (dev->width * 2 * dev->height > 720 * 240 * 2)
699 for (i = 0; i < dev->num_alt; i++) {
700 /* stop when the selected alt setting offers enough bandwidth */
701 if (dev->alt_max_pkt_size[i] >= min_pkt_size) {
704 /* otherwise make sure that we end up with the maximum bandwidth
705 because the min_pkt_size equation might be wrong...
707 } else if (dev->alt_max_pkt_size[i] >
708 dev->alt_max_pkt_size[dev->alt])
712 if (dev->alt != prev_alt) {
713 em28xx_coredbg("minimum isoc packet size: %u (alt=%d)\n",
714 min_pkt_size, dev->alt);
715 dev->max_pkt_size = dev->alt_max_pkt_size[dev->alt];
716 em28xx_coredbg("setting alternate %d with wMaxPacketSize=%u\n",
717 dev->alt, dev->max_pkt_size);
718 errCode = usb_set_interface(dev->udev, 0, dev->alt);
720 em28xx_errdev("cannot change alternate number to %d (error=%i)\n",
728 int em28xx_gpio_set(struct em28xx *dev, struct em28xx_reg_seq *gpio)
735 dev->em28xx_write_regs_req(dev, 0x00, 0x48, "\x00", 1);
736 if (dev->mode == EM28XX_ANALOG_MODE)
737 dev->em28xx_write_regs_req(dev, 0x00, 0x12, "\x67", 1);
739 dev->em28xx_write_regs_req(dev, 0x00, 0x12, "\x37", 1);
742 /* Send GPIO reset sequences specified at board entry */
743 while (gpio->sleep >= 0) {
744 if (gpio->reg >= 0) {
745 rc = em28xx_write_reg_bits(dev,
760 int em28xx_set_mode(struct em28xx *dev, enum em28xx_mode set_mode)
762 if (dev->mode == set_mode)
765 if (set_mode == EM28XX_MODE_UNDEFINED) {
766 dev->mode = set_mode;
770 dev->mode = set_mode;
772 if (dev->mode == EM28XX_DIGITAL_MODE)
773 return em28xx_gpio_set(dev, dev->digital_gpio);
775 return em28xx_gpio_set(dev, dev->analog_gpio);
777 EXPORT_SYMBOL_GPL(em28xx_set_mode);
779 /* ------------------------------------------------------------------
781 ------------------------------------------------------------------*/
784 * IRQ callback, called by URB callback
786 static void em28xx_irq_callback(struct urb *urb)
788 struct em28xx_dmaqueue *dma_q = urb->context;
789 struct em28xx *dev = container_of(dma_q, struct em28xx, vidq);
792 /* Copy data from URB */
793 spin_lock(&dev->slock);
794 rc = dev->isoc_ctl.isoc_copy(dev, urb);
795 spin_unlock(&dev->slock);
797 /* Reset urb buffers */
798 for (i = 0; i < urb->number_of_packets; i++) {
799 urb->iso_frame_desc[i].status = 0;
800 urb->iso_frame_desc[i].actual_length = 0;
804 urb->status = usb_submit_urb(urb, GFP_ATOMIC);
806 em28xx_isocdbg("urb resubmit failed (error=%i)\n",
812 * Stop and Deallocate URBs
814 void em28xx_uninit_isoc(struct em28xx *dev)
819 em28xx_isocdbg("em28xx: called em28xx_uninit_isoc\n");
821 dev->isoc_ctl.nfields = -1;
822 for (i = 0; i < dev->isoc_ctl.num_bufs; i++) {
823 urb = dev->isoc_ctl.urb[i];
827 if (dev->isoc_ctl.transfer_buffer[i]) {
828 usb_buffer_free(dev->udev,
829 urb->transfer_buffer_length,
830 dev->isoc_ctl.transfer_buffer[i],
834 dev->isoc_ctl.urb[i] = NULL;
836 dev->isoc_ctl.transfer_buffer[i] = NULL;
839 kfree(dev->isoc_ctl.urb);
840 kfree(dev->isoc_ctl.transfer_buffer);
842 dev->isoc_ctl.urb = NULL;
843 dev->isoc_ctl.transfer_buffer = NULL;
844 dev->isoc_ctl.num_bufs = 0;
846 em28xx_capture_start(dev, 0);
848 EXPORT_SYMBOL_GPL(em28xx_uninit_isoc);
851 * Allocate URBs and start IRQ
853 int em28xx_init_isoc(struct em28xx *dev, int max_packets,
854 int num_bufs, int max_pkt_size,
855 int (*isoc_copy) (struct em28xx *dev, struct urb *urb))
857 struct em28xx_dmaqueue *dma_q = &dev->vidq;
864 em28xx_isocdbg("em28xx: called em28xx_prepare_isoc\n");
866 /* De-allocates all pending stuff */
867 em28xx_uninit_isoc(dev);
869 dev->isoc_ctl.isoc_copy = isoc_copy;
870 dev->isoc_ctl.num_bufs = num_bufs;
872 dev->isoc_ctl.urb = kzalloc(sizeof(void *)*num_bufs, GFP_KERNEL);
873 if (!dev->isoc_ctl.urb) {
874 em28xx_errdev("cannot alloc memory for usb buffers\n");
878 dev->isoc_ctl.transfer_buffer = kzalloc(sizeof(void *)*num_bufs,
880 if (!dev->isoc_ctl.transfer_buffer) {
881 em28xx_errdev("cannot allocate memory for usbtransfer\n");
882 kfree(dev->isoc_ctl.urb);
886 dev->isoc_ctl.max_pkt_size = max_pkt_size;
887 dev->isoc_ctl.buf = NULL;
889 sb_size = max_packets * dev->isoc_ctl.max_pkt_size;
891 /* allocate urbs and transfer buffers */
892 for (i = 0; i < dev->isoc_ctl.num_bufs; i++) {
893 urb = usb_alloc_urb(max_packets, GFP_KERNEL);
895 em28xx_err("cannot alloc isoc_ctl.urb %i\n", i);
896 em28xx_uninit_isoc(dev);
899 dev->isoc_ctl.urb[i] = urb;
901 dev->isoc_ctl.transfer_buffer[i] = usb_buffer_alloc(dev->udev,
902 sb_size, GFP_KERNEL, &urb->transfer_dma);
903 if (!dev->isoc_ctl.transfer_buffer[i]) {
904 em28xx_err("unable to allocate %i bytes for transfer"
907 in_interrupt()?" while in int":"");
908 em28xx_uninit_isoc(dev);
911 memset(dev->isoc_ctl.transfer_buffer[i], 0, sb_size);
913 /* FIXME: this is a hack - should be
914 'desc.bEndpointAddress & USB_ENDPOINT_NUMBER_MASK'
915 should also be using 'desc.bInterval'
917 pipe = usb_rcvisocpipe(dev->udev,
918 dev->mode == EM28XX_ANALOG_MODE ? 0x82 : 0x84);
920 usb_fill_int_urb(urb, dev->udev, pipe,
921 dev->isoc_ctl.transfer_buffer[i], sb_size,
922 em28xx_irq_callback, dma_q, 1);
924 urb->number_of_packets = max_packets;
925 urb->transfer_flags = URB_ISO_ASAP;
928 for (j = 0; j < max_packets; j++) {
929 urb->iso_frame_desc[j].offset = k;
930 urb->iso_frame_desc[j].length =
931 dev->isoc_ctl.max_pkt_size;
932 k += dev->isoc_ctl.max_pkt_size;
936 init_waitqueue_head(&dma_q->wq);
938 em28xx_capture_start(dev, 1);
940 /* submit urbs and enables IRQ */
941 for (i = 0; i < dev->isoc_ctl.num_bufs; i++) {
942 rc = usb_submit_urb(dev->isoc_ctl.urb[i], GFP_ATOMIC);
944 em28xx_err("submit of urb %i failed (error=%i)\n", i,
946 em28xx_uninit_isoc(dev);
953 EXPORT_SYMBOL_GPL(em28xx_init_isoc);