6 * Copyright (C) 2006-2010 Nokia Corporation
7 * Copyright (C) 2007-2009 Texas Instruments, Inc.
9 * Contacts: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
10 * Sakari Ailus <sakari.ailus@iki.fi>
13 * Laurent Pinchart <laurent.pinchart@ideasonboard.com>
14 * Sakari Ailus <sakari.ailus@iki.fi>
15 * David Cohen <dacohen@gmail.com>
16 * Stanimir Varbanov <svarbanov@mm-sol.com>
17 * Vimarsh Zutshi <vimarsh.zutshi@gmail.com>
18 * Tuukka Toivonen <tuukkat76@gmail.com>
19 * Sergio Aguirre <saaguirre@ti.com>
20 * Antti Koskipaa <akoskipa@gmail.com>
21 * Ivan T. Ivanov <iivanov@mm-sol.com>
22 * RaniSuneela <r-m@ti.com>
23 * Atanas Filipov <afilipov@mm-sol.com>
24 * Gjorgji Rosikopulos <grosikopulos@mm-sol.com>
25 * Hiroshi DOYU <hiroshi.doyu@nokia.com>
26 * Nayden Kanchev <nkanchev@mm-sol.com>
27 * Phil Carmody <ext-phil.2.carmody@nokia.com>
28 * Artem Bityutskiy <artem.bityutskiy@nokia.com>
29 * Dominic Curran <dcurran@ti.com>
30 * Ilkka Myllyperkio <ilkka.myllyperkio@sofica.fi>
31 * Pallavi Kulkarni <p-kulkarni@ti.com>
32 * Vaibhav Hiremath <hvaibhav@ti.com>
33 * Mohit Jalori <mjalori@ti.com>
34 * Sameer Venkatraman <sameerv@ti.com>
35 * Senthilvadivu Guruswamy <svadivu@ti.com>
36 * Thara Gopinath <thara@ti.com>
37 * Toni Leinonen <toni.leinonen@nokia.com>
38 * Troy Laramy <t-laramy@ti.com>
40 * This program is free software; you can redistribute it and/or modify
41 * it under the terms of the GNU General Public License version 2 as
42 * published by the Free Software Foundation.
44 * This program is distributed in the hope that it will be useful, but
45 * WITHOUT ANY WARRANTY; without even the implied warranty of
46 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
47 * General Public License for more details.
49 * You should have received a copy of the GNU General Public License
50 * along with this program; if not, write to the Free Software
51 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA
55 #include <asm/cacheflush.h>
57 #include <linux/clk.h>
58 #include <linux/delay.h>
59 #include <linux/device.h>
60 #include <linux/dma-mapping.h>
61 #include <linux/i2c.h>
62 #include <linux/interrupt.h>
63 #include <linux/module.h>
64 #include <linux/platform_device.h>
65 #include <linux/regulator/consumer.h>
66 #include <linux/slab.h>
67 #include <linux/sched.h>
68 #include <linux/vmalloc.h>
70 #include <media/v4l2-common.h>
71 #include <media/v4l2-device.h>
76 #include "isppreview.h"
77 #include "ispresizer.h"
83 static unsigned int autoidle;
84 module_param(autoidle, int, 0444);
85 MODULE_PARM_DESC(autoidle, "Enable OMAP3ISP AUTOIDLE support");
87 static void isp_save_ctx(struct isp_device *isp);
89 static void isp_restore_ctx(struct isp_device *isp);
91 static const struct isp_res_mapping isp_res_maps[] = {
93 .isp_rev = ISP_REVISION_2_0,
94 .map = 1 << OMAP3_ISP_IOMEM_MAIN |
95 1 << OMAP3_ISP_IOMEM_CCP2 |
96 1 << OMAP3_ISP_IOMEM_CCDC |
97 1 << OMAP3_ISP_IOMEM_HIST |
98 1 << OMAP3_ISP_IOMEM_H3A |
99 1 << OMAP3_ISP_IOMEM_PREV |
100 1 << OMAP3_ISP_IOMEM_RESZ |
101 1 << OMAP3_ISP_IOMEM_SBL |
102 1 << OMAP3_ISP_IOMEM_CSI2A_REGS1 |
103 1 << OMAP3_ISP_IOMEM_CSIPHY2,
106 .isp_rev = ISP_REVISION_15_0,
107 .map = 1 << OMAP3_ISP_IOMEM_MAIN |
108 1 << OMAP3_ISP_IOMEM_CCP2 |
109 1 << OMAP3_ISP_IOMEM_CCDC |
110 1 << OMAP3_ISP_IOMEM_HIST |
111 1 << OMAP3_ISP_IOMEM_H3A |
112 1 << OMAP3_ISP_IOMEM_PREV |
113 1 << OMAP3_ISP_IOMEM_RESZ |
114 1 << OMAP3_ISP_IOMEM_SBL |
115 1 << OMAP3_ISP_IOMEM_CSI2A_REGS1 |
116 1 << OMAP3_ISP_IOMEM_CSIPHY2 |
117 1 << OMAP3_ISP_IOMEM_CSI2A_REGS2 |
118 1 << OMAP3_ISP_IOMEM_CSI2C_REGS1 |
119 1 << OMAP3_ISP_IOMEM_CSIPHY1 |
120 1 << OMAP3_ISP_IOMEM_CSI2C_REGS2,
124 /* Structure for saving/restoring ISP module registers */
125 static struct isp_reg isp_reg_list[] = {
126 {OMAP3_ISP_IOMEM_MAIN, ISP_SYSCONFIG, 0},
127 {OMAP3_ISP_IOMEM_MAIN, ISP_CTRL, 0},
128 {OMAP3_ISP_IOMEM_MAIN, ISP_TCTRL_CTRL, 0},
133 * omap3isp_flush - Post pending L3 bus writes by doing a register readback
134 * @isp: OMAP3 ISP device
136 * In order to force posting of pending writes, we need to write and
137 * readback the same register, in this case the revision register.
139 * See this link for reference:
140 * http://www.mail-archive.com/linux-omap@vger.kernel.org/msg08149.html
142 void omap3isp_flush(struct isp_device *isp)
144 isp_reg_writel(isp, 0, OMAP3_ISP_IOMEM_MAIN, ISP_REVISION);
145 isp_reg_readl(isp, OMAP3_ISP_IOMEM_MAIN, ISP_REVISION);
149 * isp_enable_interrupts - Enable ISP interrupts.
150 * @isp: OMAP3 ISP device
152 static void isp_enable_interrupts(struct isp_device *isp)
154 static const u32 irq = IRQ0ENABLE_CSIA_IRQ
155 | IRQ0ENABLE_CSIB_IRQ
156 | IRQ0ENABLE_CCDC_LSC_PREF_ERR_IRQ
157 | IRQ0ENABLE_CCDC_LSC_DONE_IRQ
158 | IRQ0ENABLE_CCDC_VD0_IRQ
159 | IRQ0ENABLE_CCDC_VD1_IRQ
160 | IRQ0ENABLE_HS_VS_IRQ
161 | IRQ0ENABLE_HIST_DONE_IRQ
162 | IRQ0ENABLE_H3A_AWB_DONE_IRQ
163 | IRQ0ENABLE_H3A_AF_DONE_IRQ
164 | IRQ0ENABLE_PRV_DONE_IRQ
165 | IRQ0ENABLE_RSZ_DONE_IRQ;
167 isp_reg_writel(isp, irq, OMAP3_ISP_IOMEM_MAIN, ISP_IRQ0STATUS);
168 isp_reg_writel(isp, irq, OMAP3_ISP_IOMEM_MAIN, ISP_IRQ0ENABLE);
172 * isp_disable_interrupts - Disable ISP interrupts.
173 * @isp: OMAP3 ISP device
175 static void isp_disable_interrupts(struct isp_device *isp)
177 isp_reg_writel(isp, 0, OMAP3_ISP_IOMEM_MAIN, ISP_IRQ0ENABLE);
181 * isp_set_xclk - Configures the specified cam_xclk to the desired frequency.
182 * @isp: OMAP3 ISP device
183 * @xclk: Desired frequency of the clock in Hz. 0 = stable low, 1 is stable high
184 * @xclksel: XCLK to configure (0 = A, 1 = B).
186 * Configures the specified MCLK divisor in the ISP timing control register
187 * (TCTRL_CTRL) to generate the desired xclk clock value.
189 * Divisor = cam_mclk_hz / xclk
191 * Returns the final frequency that is actually being generated
193 static u32 isp_set_xclk(struct isp_device *isp, u32 xclk, u8 xclksel)
197 unsigned long mclk_hz;
199 if (!omap3isp_get(isp))
202 mclk_hz = clk_get_rate(isp->clock[ISP_CLK_CAM_MCLK]);
204 if (xclk >= mclk_hz) {
205 divisor = ISPTCTRL_CTRL_DIV_BYPASS;
206 currentxclk = mclk_hz;
207 } else if (xclk >= 2) {
208 divisor = mclk_hz / xclk;
209 if (divisor >= ISPTCTRL_CTRL_DIV_BYPASS)
210 divisor = ISPTCTRL_CTRL_DIV_BYPASS - 1;
211 currentxclk = mclk_hz / divisor;
219 isp_reg_clr_set(isp, OMAP3_ISP_IOMEM_MAIN, ISP_TCTRL_CTRL,
220 ISPTCTRL_CTRL_DIVA_MASK,
221 divisor << ISPTCTRL_CTRL_DIVA_SHIFT);
222 dev_dbg(isp->dev, "isp_set_xclk(): cam_xclka set to %d Hz\n",
226 isp_reg_clr_set(isp, OMAP3_ISP_IOMEM_MAIN, ISP_TCTRL_CTRL,
227 ISPTCTRL_CTRL_DIVB_MASK,
228 divisor << ISPTCTRL_CTRL_DIVB_SHIFT);
229 dev_dbg(isp->dev, "isp_set_xclk(): cam_xclkb set to %d Hz\n",
235 dev_dbg(isp->dev, "ISP_ERR: isp_set_xclk(): Invalid requested "
236 "xclk. Must be 0 (A) or 1 (B).\n");
240 /* Do we go from stable whatever to clock? */
241 if (divisor >= 2 && isp->xclk_divisor[xclksel - 1] < 2)
243 /* Stopping the clock. */
244 else if (divisor < 2 && isp->xclk_divisor[xclksel - 1] >= 2)
247 isp->xclk_divisor[xclksel - 1] = divisor;
255 * isp_power_settings - Sysconfig settings, for Power Management.
256 * @isp: OMAP3 ISP device
257 * @idle: Consider idle state.
259 * Sets the power settings for the ISP, and SBL bus.
261 static void isp_power_settings(struct isp_device *isp, int idle)
264 ((idle ? ISP_SYSCONFIG_MIDLEMODE_SMARTSTANDBY :
265 ISP_SYSCONFIG_MIDLEMODE_FORCESTANDBY) <<
266 ISP_SYSCONFIG_MIDLEMODE_SHIFT) |
267 ((isp->revision == ISP_REVISION_15_0) ?
268 ISP_SYSCONFIG_AUTOIDLE : 0),
269 OMAP3_ISP_IOMEM_MAIN, ISP_SYSCONFIG);
272 isp_reg_writel(isp, ISPCTRL_SBL_AUTOIDLE, OMAP3_ISP_IOMEM_MAIN,
277 * Configure the bridge and lane shifter. Valid inputs are
279 * CCDC_INPUT_PARALLEL: Parallel interface
280 * CCDC_INPUT_CSI2A: CSI2a receiver
281 * CCDC_INPUT_CCP2B: CCP2b receiver
282 * CCDC_INPUT_CSI2C: CSI2c receiver
284 * The bridge and lane shifter are configured according to the selected input
285 * and the ISP platform data.
287 void omap3isp_configure_bridge(struct isp_device *isp,
288 enum ccdc_input_entity input,
289 const struct isp_parallel_platform_data *pdata,
294 ispctrl_val = isp_reg_readl(isp, OMAP3_ISP_IOMEM_MAIN, ISP_CTRL);
295 ispctrl_val &= ~ISPCTRL_SHIFT_MASK;
296 ispctrl_val &= ~ISPCTRL_PAR_CLK_POL_INV;
297 ispctrl_val &= ~ISPCTRL_PAR_SER_CLK_SEL_MASK;
298 ispctrl_val &= ~ISPCTRL_PAR_BRIDGE_MASK;
301 case CCDC_INPUT_PARALLEL:
302 ispctrl_val |= ISPCTRL_PAR_SER_CLK_SEL_PARALLEL;
303 ispctrl_val |= pdata->clk_pol << ISPCTRL_PAR_CLK_POL_SHIFT;
304 ispctrl_val |= pdata->bridge << ISPCTRL_PAR_BRIDGE_SHIFT;
305 shift += pdata->data_lane_shift * 2;
308 case CCDC_INPUT_CSI2A:
309 ispctrl_val |= ISPCTRL_PAR_SER_CLK_SEL_CSIA;
312 case CCDC_INPUT_CCP2B:
313 ispctrl_val |= ISPCTRL_PAR_SER_CLK_SEL_CSIB;
316 case CCDC_INPUT_CSI2C:
317 ispctrl_val |= ISPCTRL_PAR_SER_CLK_SEL_CSIC;
324 ispctrl_val |= ((shift/2) << ISPCTRL_SHIFT_SHIFT) & ISPCTRL_SHIFT_MASK;
326 ispctrl_val &= ~ISPCTRL_SYNC_DETECT_MASK;
327 ispctrl_val |= ISPCTRL_SYNC_DETECT_VSRISE;
329 isp_reg_writel(isp, ispctrl_val, OMAP3_ISP_IOMEM_MAIN, ISP_CTRL);
333 * isp_set_pixel_clock - Configures the ISP pixel clock
334 * @isp: OMAP3 ISP device
335 * @pixelclk: Average pixel clock in Hz
337 * Set the average pixel clock required by the sensor. The ISP will use the
338 * lowest possible memory bandwidth settings compatible with the clock.
340 static void isp_set_pixel_clock(struct isp_device *isp, unsigned int pixelclk)
342 isp->isp_ccdc.vpcfg.pixelclk = pixelclk;
345 void omap3isp_hist_dma_done(struct isp_device *isp)
347 if (omap3isp_ccdc_busy(&isp->isp_ccdc) ||
348 omap3isp_stat_pcr_busy(&isp->isp_hist)) {
349 /* Histogram cannot be enabled in this frame anymore */
350 atomic_set(&isp->isp_hist.buf_err, 1);
351 dev_dbg(isp->dev, "hist: Out of synchronization with "
352 "CCDC. Ignoring next buffer.\n");
356 static inline void isp_isr_dbg(struct isp_device *isp, u32 irqstatus)
358 static const char *name[] = {
377 "CCDC_LSC_PREFETCH_COMPLETED",
378 "CCDC_LSC_PREFETCH_ERROR",
394 dev_dbg(isp->dev, "ISP IRQ: ");
396 for (i = 0; i < ARRAY_SIZE(name); i++) {
397 if ((1 << i) & irqstatus)
398 printk(KERN_CONT "%s ", name[i]);
400 printk(KERN_CONT "\n");
403 static void isp_isr_sbl(struct isp_device *isp)
405 struct device *dev = isp->dev;
406 struct isp_pipeline *pipe;
410 * Handle shared buffer logic overflows for video buffers.
411 * ISPSBL_PCR_CCDCPRV_2_RSZ_OVF can be safely ignored.
413 sbl_pcr = isp_reg_readl(isp, OMAP3_ISP_IOMEM_SBL, ISPSBL_PCR);
414 isp_reg_writel(isp, sbl_pcr, OMAP3_ISP_IOMEM_SBL, ISPSBL_PCR);
415 sbl_pcr &= ~ISPSBL_PCR_CCDCPRV_2_RSZ_OVF;
418 dev_dbg(dev, "SBL overflow (PCR = 0x%08x)\n", sbl_pcr);
420 if (sbl_pcr & ISPSBL_PCR_CSIB_WBL_OVF) {
421 pipe = to_isp_pipeline(&isp->isp_ccp2.subdev.entity);
426 if (sbl_pcr & ISPSBL_PCR_CSIA_WBL_OVF) {
427 pipe = to_isp_pipeline(&isp->isp_csi2a.subdev.entity);
432 if (sbl_pcr & ISPSBL_PCR_CCDC_WBL_OVF) {
433 pipe = to_isp_pipeline(&isp->isp_ccdc.subdev.entity);
438 if (sbl_pcr & ISPSBL_PCR_PRV_WBL_OVF) {
439 pipe = to_isp_pipeline(&isp->isp_prev.subdev.entity);
444 if (sbl_pcr & (ISPSBL_PCR_RSZ1_WBL_OVF
445 | ISPSBL_PCR_RSZ2_WBL_OVF
446 | ISPSBL_PCR_RSZ3_WBL_OVF
447 | ISPSBL_PCR_RSZ4_WBL_OVF)) {
448 pipe = to_isp_pipeline(&isp->isp_res.subdev.entity);
453 if (sbl_pcr & ISPSBL_PCR_H3A_AF_WBL_OVF)
454 omap3isp_stat_sbl_overflow(&isp->isp_af);
456 if (sbl_pcr & ISPSBL_PCR_H3A_AEAWB_WBL_OVF)
457 omap3isp_stat_sbl_overflow(&isp->isp_aewb);
461 * isp_isr - Interrupt Service Routine for Camera ISP module.
462 * @irq: Not used currently.
463 * @_isp: Pointer to the OMAP3 ISP device
465 * Handles the corresponding callback if plugged in.
467 * Returns IRQ_HANDLED when IRQ was correctly handled, or IRQ_NONE when the
468 * IRQ wasn't handled.
470 static irqreturn_t isp_isr(int irq, void *_isp)
472 static const u32 ccdc_events = IRQ0STATUS_CCDC_LSC_PREF_ERR_IRQ |
473 IRQ0STATUS_CCDC_LSC_DONE_IRQ |
474 IRQ0STATUS_CCDC_VD0_IRQ |
475 IRQ0STATUS_CCDC_VD1_IRQ |
476 IRQ0STATUS_HS_VS_IRQ;
477 struct isp_device *isp = _isp;
480 irqstatus = isp_reg_readl(isp, OMAP3_ISP_IOMEM_MAIN, ISP_IRQ0STATUS);
481 isp_reg_writel(isp, irqstatus, OMAP3_ISP_IOMEM_MAIN, ISP_IRQ0STATUS);
485 if (irqstatus & IRQ0STATUS_CSIA_IRQ)
486 omap3isp_csi2_isr(&isp->isp_csi2a);
488 if (irqstatus & IRQ0STATUS_CSIB_IRQ)
489 omap3isp_ccp2_isr(&isp->isp_ccp2);
491 if (irqstatus & IRQ0STATUS_CCDC_VD0_IRQ) {
492 if (isp->isp_ccdc.output & CCDC_OUTPUT_PREVIEW)
493 omap3isp_preview_isr_frame_sync(&isp->isp_prev);
494 if (isp->isp_ccdc.output & CCDC_OUTPUT_RESIZER)
495 omap3isp_resizer_isr_frame_sync(&isp->isp_res);
496 omap3isp_stat_isr_frame_sync(&isp->isp_aewb);
497 omap3isp_stat_isr_frame_sync(&isp->isp_af);
498 omap3isp_stat_isr_frame_sync(&isp->isp_hist);
501 if (irqstatus & ccdc_events)
502 omap3isp_ccdc_isr(&isp->isp_ccdc, irqstatus & ccdc_events);
504 if (irqstatus & IRQ0STATUS_PRV_DONE_IRQ) {
505 if (isp->isp_prev.output & PREVIEW_OUTPUT_RESIZER)
506 omap3isp_resizer_isr_frame_sync(&isp->isp_res);
507 omap3isp_preview_isr(&isp->isp_prev);
510 if (irqstatus & IRQ0STATUS_RSZ_DONE_IRQ)
511 omap3isp_resizer_isr(&isp->isp_res);
513 if (irqstatus & IRQ0STATUS_H3A_AWB_DONE_IRQ)
514 omap3isp_stat_isr(&isp->isp_aewb);
516 if (irqstatus & IRQ0STATUS_H3A_AF_DONE_IRQ)
517 omap3isp_stat_isr(&isp->isp_af);
519 if (irqstatus & IRQ0STATUS_HIST_DONE_IRQ)
520 omap3isp_stat_isr(&isp->isp_hist);
524 #if defined(DEBUG) && defined(ISP_ISR_DEBUG)
525 isp_isr_dbg(isp, irqstatus);
531 /* -----------------------------------------------------------------------------
532 * Pipeline power management
534 * Entities must be powered up when part of a pipeline that contains at least
535 * one open video device node.
537 * To achieve this use the entity use_count field to track the number of users.
538 * For entities corresponding to video device nodes the use_count field stores
539 * the users count of the node. For entities corresponding to subdevs the
540 * use_count field stores the total number of users of all video device nodes
543 * The omap3isp_pipeline_pm_use() function must be called in the open() and
544 * close() handlers of video device nodes. It increments or decrements the use
545 * count of all subdev entities in the pipeline.
547 * To react to link management on powered pipelines, the link setup notification
548 * callback updates the use count of all entities in the source and sink sides
553 * isp_pipeline_pm_use_count - Count the number of users of a pipeline
554 * @entity: The entity
556 * Return the total number of users of all video device nodes in the pipeline.
558 static int isp_pipeline_pm_use_count(struct media_entity *entity)
560 struct media_entity_graph graph;
563 media_entity_graph_walk_start(&graph, entity);
565 while ((entity = media_entity_graph_walk_next(&graph))) {
566 if (media_entity_type(entity) == MEDIA_ENT_T_DEVNODE)
567 use += entity->use_count;
574 * isp_pipeline_pm_power_one - Apply power change to an entity
575 * @entity: The entity
576 * @change: Use count change
578 * Change the entity use count by @change. If the entity is a subdev update its
579 * power state by calling the core::s_power operation when the use count goes
580 * from 0 to != 0 or from != 0 to 0.
582 * Return 0 on success or a negative error code on failure.
584 static int isp_pipeline_pm_power_one(struct media_entity *entity, int change)
586 struct v4l2_subdev *subdev;
589 subdev = media_entity_type(entity) == MEDIA_ENT_T_V4L2_SUBDEV
590 ? media_entity_to_v4l2_subdev(entity) : NULL;
592 if (entity->use_count == 0 && change > 0 && subdev != NULL) {
593 ret = v4l2_subdev_call(subdev, core, s_power, 1);
594 if (ret < 0 && ret != -ENOIOCTLCMD)
598 entity->use_count += change;
599 WARN_ON(entity->use_count < 0);
601 if (entity->use_count == 0 && change < 0 && subdev != NULL)
602 v4l2_subdev_call(subdev, core, s_power, 0);
608 * isp_pipeline_pm_power - Apply power change to all entities in a pipeline
609 * @entity: The entity
610 * @change: Use count change
612 * Walk the pipeline to update the use count and the power state of all non-node
615 * Return 0 on success or a negative error code on failure.
617 static int isp_pipeline_pm_power(struct media_entity *entity, int change)
619 struct media_entity_graph graph;
620 struct media_entity *first = entity;
626 media_entity_graph_walk_start(&graph, entity);
628 while (!ret && (entity = media_entity_graph_walk_next(&graph)))
629 if (media_entity_type(entity) != MEDIA_ENT_T_DEVNODE)
630 ret = isp_pipeline_pm_power_one(entity, change);
635 media_entity_graph_walk_start(&graph, first);
637 while ((first = media_entity_graph_walk_next(&graph))
639 if (media_entity_type(first) != MEDIA_ENT_T_DEVNODE)
640 isp_pipeline_pm_power_one(first, -change);
646 * omap3isp_pipeline_pm_use - Update the use count of an entity
647 * @entity: The entity
648 * @use: Use (1) or stop using (0) the entity
650 * Update the use count of all entities in the pipeline and power entities on or
653 * Return 0 on success or a negative error code on failure. Powering entities
654 * off is assumed to never fail. No failure can occur when the use parameter is
657 int omap3isp_pipeline_pm_use(struct media_entity *entity, int use)
659 int change = use ? 1 : -1;
662 mutex_lock(&entity->parent->graph_mutex);
664 /* Apply use count to node. */
665 entity->use_count += change;
666 WARN_ON(entity->use_count < 0);
668 /* Apply power change to connected non-nodes. */
669 ret = isp_pipeline_pm_power(entity, change);
671 entity->use_count -= change;
673 mutex_unlock(&entity->parent->graph_mutex);
679 * isp_pipeline_link_notify - Link management notification callback
680 * @source: Pad at the start of the link
681 * @sink: Pad at the end of the link
682 * @flags: New link flags that will be applied
684 * React to link management on powered pipelines by updating the use count of
685 * all entities in the source and sink sides of the link. Entities are powered
686 * on or off accordingly.
688 * Return 0 on success or a negative error code on failure. Powering entities
689 * off is assumed to never fail. This function will not fail for disconnection
692 static int isp_pipeline_link_notify(struct media_pad *source,
693 struct media_pad *sink, u32 flags)
695 int source_use = isp_pipeline_pm_use_count(source->entity);
696 int sink_use = isp_pipeline_pm_use_count(sink->entity);
699 if (!(flags & MEDIA_LNK_FL_ENABLED)) {
700 /* Powering off entities is assumed to never fail. */
701 isp_pipeline_pm_power(source->entity, -sink_use);
702 isp_pipeline_pm_power(sink->entity, -source_use);
706 ret = isp_pipeline_pm_power(source->entity, sink_use);
710 ret = isp_pipeline_pm_power(sink->entity, source_use);
712 isp_pipeline_pm_power(source->entity, -sink_use);
717 /* -----------------------------------------------------------------------------
718 * Pipeline stream management
722 * isp_pipeline_enable - Enable streaming on a pipeline
723 * @pipe: ISP pipeline
724 * @mode: Stream mode (single shot or continuous)
726 * Walk the entities chain starting at the pipeline output video node and start
727 * all modules in the chain in the given mode.
729 * Return 0 if successful, or the return value of the failed video::s_stream
730 * operation otherwise.
732 static int isp_pipeline_enable(struct isp_pipeline *pipe,
733 enum isp_pipeline_stream_state mode)
735 struct isp_device *isp = pipe->output->isp;
736 struct media_entity *entity;
737 struct media_pad *pad;
738 struct v4l2_subdev *subdev;
742 /* If the preview engine crashed it might not respond to read/write
743 * operations on the L4 bus. This would result in a bus fault and a
744 * kernel oops. Refuse to start streaming in that case. This check must
745 * be performed before the loop below to avoid starting entities if the
746 * pipeline won't start anyway (those entities would then likely fail to
747 * stop, making the problem worse).
749 if ((pipe->entities & isp->crashed) &
750 (1U << isp->isp_prev.subdev.entity.id))
753 spin_lock_irqsave(&pipe->lock, flags);
754 pipe->state &= ~(ISP_PIPELINE_IDLE_INPUT | ISP_PIPELINE_IDLE_OUTPUT);
755 spin_unlock_irqrestore(&pipe->lock, flags);
757 pipe->do_propagation = false;
759 entity = &pipe->output->video.entity;
761 pad = &entity->pads[0];
762 if (!(pad->flags & MEDIA_PAD_FL_SINK))
765 pad = media_entity_remote_source(pad);
767 media_entity_type(pad->entity) != MEDIA_ENT_T_V4L2_SUBDEV)
770 entity = pad->entity;
771 subdev = media_entity_to_v4l2_subdev(entity);
773 ret = v4l2_subdev_call(subdev, video, s_stream, mode);
774 if (ret < 0 && ret != -ENOIOCTLCMD)
777 if (subdev == &isp->isp_ccdc.subdev) {
778 v4l2_subdev_call(&isp->isp_aewb.subdev, video,
780 v4l2_subdev_call(&isp->isp_af.subdev, video,
782 v4l2_subdev_call(&isp->isp_hist.subdev, video,
784 pipe->do_propagation = true;
791 static int isp_pipeline_wait_resizer(struct isp_device *isp)
793 return omap3isp_resizer_busy(&isp->isp_res);
796 static int isp_pipeline_wait_preview(struct isp_device *isp)
798 return omap3isp_preview_busy(&isp->isp_prev);
801 static int isp_pipeline_wait_ccdc(struct isp_device *isp)
803 return omap3isp_stat_busy(&isp->isp_af)
804 || omap3isp_stat_busy(&isp->isp_aewb)
805 || omap3isp_stat_busy(&isp->isp_hist)
806 || omap3isp_ccdc_busy(&isp->isp_ccdc);
809 #define ISP_STOP_TIMEOUT msecs_to_jiffies(1000)
811 static int isp_pipeline_wait(struct isp_device *isp,
812 int(*busy)(struct isp_device *isp))
814 unsigned long timeout = jiffies + ISP_STOP_TIMEOUT;
816 while (!time_after(jiffies, timeout)) {
825 * isp_pipeline_disable - Disable streaming on a pipeline
826 * @pipe: ISP pipeline
828 * Walk the entities chain starting at the pipeline output video node and stop
829 * all modules in the chain. Wait synchronously for the modules to be stopped if
832 * Return 0 if all modules have been properly stopped, or -ETIMEDOUT if a module
833 * can't be stopped (in which case a software reset of the ISP is probably
836 static int isp_pipeline_disable(struct isp_pipeline *pipe)
838 struct isp_device *isp = pipe->output->isp;
839 struct media_entity *entity;
840 struct media_pad *pad;
841 struct v4l2_subdev *subdev;
846 * We need to stop all the modules after CCDC first or they'll
847 * never stop since they may not get a full frame from CCDC.
849 entity = &pipe->output->video.entity;
851 pad = &entity->pads[0];
852 if (!(pad->flags & MEDIA_PAD_FL_SINK))
855 pad = media_entity_remote_source(pad);
857 media_entity_type(pad->entity) != MEDIA_ENT_T_V4L2_SUBDEV)
860 entity = pad->entity;
861 subdev = media_entity_to_v4l2_subdev(entity);
863 if (subdev == &isp->isp_ccdc.subdev) {
864 v4l2_subdev_call(&isp->isp_aewb.subdev,
866 v4l2_subdev_call(&isp->isp_af.subdev,
868 v4l2_subdev_call(&isp->isp_hist.subdev,
872 v4l2_subdev_call(subdev, video, s_stream, 0);
874 if (subdev == &isp->isp_res.subdev)
875 ret = isp_pipeline_wait(isp, isp_pipeline_wait_resizer);
876 else if (subdev == &isp->isp_prev.subdev)
877 ret = isp_pipeline_wait(isp, isp_pipeline_wait_preview);
878 else if (subdev == &isp->isp_ccdc.subdev)
879 ret = isp_pipeline_wait(isp, isp_pipeline_wait_ccdc);
884 dev_info(isp->dev, "Unable to stop %s\n", subdev->name);
885 /* If the entity failed to stopped, assume it has
886 * crashed. Mark it as such, the ISP will be reset when
887 * applications will release it.
889 isp->crashed |= 1U << subdev->entity.id;
890 failure = -ETIMEDOUT;
898 * omap3isp_pipeline_set_stream - Enable/disable streaming on a pipeline
899 * @pipe: ISP pipeline
900 * @state: Stream state (stopped, single shot or continuous)
902 * Set the pipeline to the given stream state. Pipelines can be started in
903 * single-shot or continuous mode.
905 * Return 0 if successful, or the return value of the failed video::s_stream
906 * operation otherwise. The pipeline state is not updated when the operation
907 * fails, except when stopping the pipeline.
909 int omap3isp_pipeline_set_stream(struct isp_pipeline *pipe,
910 enum isp_pipeline_stream_state state)
914 if (state == ISP_PIPELINE_STREAM_STOPPED)
915 ret = isp_pipeline_disable(pipe);
917 ret = isp_pipeline_enable(pipe, state);
919 if (ret == 0 || state == ISP_PIPELINE_STREAM_STOPPED)
920 pipe->stream_state = state;
926 * isp_pipeline_resume - Resume streaming on a pipeline
927 * @pipe: ISP pipeline
929 * Resume video output and input and re-enable pipeline.
931 static void isp_pipeline_resume(struct isp_pipeline *pipe)
933 int singleshot = pipe->stream_state == ISP_PIPELINE_STREAM_SINGLESHOT;
935 omap3isp_video_resume(pipe->output, !singleshot);
937 omap3isp_video_resume(pipe->input, 0);
938 isp_pipeline_enable(pipe, pipe->stream_state);
942 * isp_pipeline_suspend - Suspend streaming on a pipeline
943 * @pipe: ISP pipeline
947 static void isp_pipeline_suspend(struct isp_pipeline *pipe)
949 isp_pipeline_disable(pipe);
953 * isp_pipeline_is_last - Verify if entity has an enabled link to the output
955 * @me: ISP module's media entity
957 * Returns 1 if the entity has an enabled link to the output video node or 0
958 * otherwise. It's true only while pipeline can have no more than one output
961 static int isp_pipeline_is_last(struct media_entity *me)
963 struct isp_pipeline *pipe;
964 struct media_pad *pad;
968 pipe = to_isp_pipeline(me);
969 if (pipe->stream_state == ISP_PIPELINE_STREAM_STOPPED)
971 pad = media_entity_remote_source(&pipe->output->pad);
972 return pad->entity == me;
976 * isp_suspend_module_pipeline - Suspend pipeline to which belongs the module
977 * @me: ISP module's media entity
979 * Suspend the whole pipeline if module's entity has an enabled link to the
980 * output video node. It works only while pipeline can have no more than one
983 static void isp_suspend_module_pipeline(struct media_entity *me)
985 if (isp_pipeline_is_last(me))
986 isp_pipeline_suspend(to_isp_pipeline(me));
990 * isp_resume_module_pipeline - Resume pipeline to which belongs the module
991 * @me: ISP module's media entity
993 * Resume the whole pipeline if module's entity has an enabled link to the
994 * output video node. It works only while pipeline can have no more than one
997 static void isp_resume_module_pipeline(struct media_entity *me)
999 if (isp_pipeline_is_last(me))
1000 isp_pipeline_resume(to_isp_pipeline(me));
1004 * isp_suspend_modules - Suspend ISP submodules.
1005 * @isp: OMAP3 ISP device
1007 * Returns 0 if suspend left in idle state all the submodules properly,
1008 * or returns 1 if a general Reset is required to suspend the submodules.
1010 static int isp_suspend_modules(struct isp_device *isp)
1012 unsigned long timeout;
1014 omap3isp_stat_suspend(&isp->isp_aewb);
1015 omap3isp_stat_suspend(&isp->isp_af);
1016 omap3isp_stat_suspend(&isp->isp_hist);
1017 isp_suspend_module_pipeline(&isp->isp_res.subdev.entity);
1018 isp_suspend_module_pipeline(&isp->isp_prev.subdev.entity);
1019 isp_suspend_module_pipeline(&isp->isp_ccdc.subdev.entity);
1020 isp_suspend_module_pipeline(&isp->isp_csi2a.subdev.entity);
1021 isp_suspend_module_pipeline(&isp->isp_ccp2.subdev.entity);
1023 timeout = jiffies + ISP_STOP_TIMEOUT;
1024 while (omap3isp_stat_busy(&isp->isp_af)
1025 || omap3isp_stat_busy(&isp->isp_aewb)
1026 || omap3isp_stat_busy(&isp->isp_hist)
1027 || omap3isp_preview_busy(&isp->isp_prev)
1028 || omap3isp_resizer_busy(&isp->isp_res)
1029 || omap3isp_ccdc_busy(&isp->isp_ccdc)) {
1030 if (time_after(jiffies, timeout)) {
1031 dev_info(isp->dev, "can't stop modules.\n");
1041 * isp_resume_modules - Resume ISP submodules.
1042 * @isp: OMAP3 ISP device
1044 static void isp_resume_modules(struct isp_device *isp)
1046 omap3isp_stat_resume(&isp->isp_aewb);
1047 omap3isp_stat_resume(&isp->isp_af);
1048 omap3isp_stat_resume(&isp->isp_hist);
1049 isp_resume_module_pipeline(&isp->isp_res.subdev.entity);
1050 isp_resume_module_pipeline(&isp->isp_prev.subdev.entity);
1051 isp_resume_module_pipeline(&isp->isp_ccdc.subdev.entity);
1052 isp_resume_module_pipeline(&isp->isp_csi2a.subdev.entity);
1053 isp_resume_module_pipeline(&isp->isp_ccp2.subdev.entity);
1057 * isp_reset - Reset ISP with a timeout wait for idle.
1058 * @isp: OMAP3 ISP device
1060 static int isp_reset(struct isp_device *isp)
1062 unsigned long timeout = 0;
1065 isp_reg_readl(isp, OMAP3_ISP_IOMEM_MAIN, ISP_SYSCONFIG)
1066 | ISP_SYSCONFIG_SOFTRESET,
1067 OMAP3_ISP_IOMEM_MAIN, ISP_SYSCONFIG);
1068 while (!(isp_reg_readl(isp, OMAP3_ISP_IOMEM_MAIN,
1069 ISP_SYSSTATUS) & 0x1)) {
1070 if (timeout++ > 10000) {
1071 dev_alert(isp->dev, "cannot reset ISP\n");
1082 * isp_save_context - Saves the values of the ISP module registers.
1083 * @isp: OMAP3 ISP device
1084 * @reg_list: Structure containing pairs of register address and value to
1088 isp_save_context(struct isp_device *isp, struct isp_reg *reg_list)
1090 struct isp_reg *next = reg_list;
1092 for (; next->reg != ISP_TOK_TERM; next++)
1093 next->val = isp_reg_readl(isp, next->mmio_range, next->reg);
1097 * isp_restore_context - Restores the values of the ISP module registers.
1098 * @isp: OMAP3 ISP device
1099 * @reg_list: Structure containing pairs of register address and value to
1103 isp_restore_context(struct isp_device *isp, struct isp_reg *reg_list)
1105 struct isp_reg *next = reg_list;
1107 for (; next->reg != ISP_TOK_TERM; next++)
1108 isp_reg_writel(isp, next->val, next->mmio_range, next->reg);
1112 * isp_save_ctx - Saves ISP, CCDC, HIST, H3A, PREV, RESZ & MMU context.
1113 * @isp: OMAP3 ISP device
1115 * Routine for saving the context of each module in the ISP.
1116 * CCDC, HIST, H3A, PREV, RESZ and MMU.
1118 static void isp_save_ctx(struct isp_device *isp)
1120 isp_save_context(isp, isp_reg_list);
1121 omap_iommu_save_ctx(isp->dev);
1125 * isp_restore_ctx - Restores ISP, CCDC, HIST, H3A, PREV, RESZ & MMU context.
1126 * @isp: OMAP3 ISP device
1128 * Routine for restoring the context of each module in the ISP.
1129 * CCDC, HIST, H3A, PREV, RESZ and MMU.
1131 static void isp_restore_ctx(struct isp_device *isp)
1133 isp_restore_context(isp, isp_reg_list);
1134 omap_iommu_restore_ctx(isp->dev);
1135 omap3isp_ccdc_restore_context(isp);
1136 omap3isp_preview_restore_context(isp);
1139 /* -----------------------------------------------------------------------------
1140 * SBL resources management
1142 #define OMAP3_ISP_SBL_READ (OMAP3_ISP_SBL_CSI1_READ | \
1143 OMAP3_ISP_SBL_CCDC_LSC_READ | \
1144 OMAP3_ISP_SBL_PREVIEW_READ | \
1145 OMAP3_ISP_SBL_RESIZER_READ)
1146 #define OMAP3_ISP_SBL_WRITE (OMAP3_ISP_SBL_CSI1_WRITE | \
1147 OMAP3_ISP_SBL_CSI2A_WRITE | \
1148 OMAP3_ISP_SBL_CSI2C_WRITE | \
1149 OMAP3_ISP_SBL_CCDC_WRITE | \
1150 OMAP3_ISP_SBL_PREVIEW_WRITE)
1152 void omap3isp_sbl_enable(struct isp_device *isp, enum isp_sbl_resource res)
1156 isp->sbl_resources |= res;
1158 if (isp->sbl_resources & OMAP3_ISP_SBL_CSI1_READ)
1159 sbl |= ISPCTRL_SBL_SHARED_RPORTA;
1161 if (isp->sbl_resources & OMAP3_ISP_SBL_CCDC_LSC_READ)
1162 sbl |= ISPCTRL_SBL_SHARED_RPORTB;
1164 if (isp->sbl_resources & OMAP3_ISP_SBL_CSI2C_WRITE)
1165 sbl |= ISPCTRL_SBL_SHARED_WPORTC;
1167 if (isp->sbl_resources & OMAP3_ISP_SBL_RESIZER_WRITE)
1168 sbl |= ISPCTRL_SBL_WR0_RAM_EN;
1170 if (isp->sbl_resources & OMAP3_ISP_SBL_WRITE)
1171 sbl |= ISPCTRL_SBL_WR1_RAM_EN;
1173 if (isp->sbl_resources & OMAP3_ISP_SBL_READ)
1174 sbl |= ISPCTRL_SBL_RD_RAM_EN;
1176 isp_reg_set(isp, OMAP3_ISP_IOMEM_MAIN, ISP_CTRL, sbl);
1179 void omap3isp_sbl_disable(struct isp_device *isp, enum isp_sbl_resource res)
1183 isp->sbl_resources &= ~res;
1185 if (!(isp->sbl_resources & OMAP3_ISP_SBL_CSI1_READ))
1186 sbl |= ISPCTRL_SBL_SHARED_RPORTA;
1188 if (!(isp->sbl_resources & OMAP3_ISP_SBL_CCDC_LSC_READ))
1189 sbl |= ISPCTRL_SBL_SHARED_RPORTB;
1191 if (!(isp->sbl_resources & OMAP3_ISP_SBL_CSI2C_WRITE))
1192 sbl |= ISPCTRL_SBL_SHARED_WPORTC;
1194 if (!(isp->sbl_resources & OMAP3_ISP_SBL_RESIZER_WRITE))
1195 sbl |= ISPCTRL_SBL_WR0_RAM_EN;
1197 if (!(isp->sbl_resources & OMAP3_ISP_SBL_WRITE))
1198 sbl |= ISPCTRL_SBL_WR1_RAM_EN;
1200 if (!(isp->sbl_resources & OMAP3_ISP_SBL_READ))
1201 sbl |= ISPCTRL_SBL_RD_RAM_EN;
1203 isp_reg_clr(isp, OMAP3_ISP_IOMEM_MAIN, ISP_CTRL, sbl);
1207 * isp_module_sync_idle - Helper to sync module with its idle state
1208 * @me: ISP submodule's media entity
1209 * @wait: ISP submodule's wait queue for streamoff/interrupt synchronization
1210 * @stopping: flag which tells module wants to stop
1212 * This function checks if ISP submodule needs to wait for next interrupt. If
1213 * yes, makes the caller to sleep while waiting for such event.
1215 int omap3isp_module_sync_idle(struct media_entity *me, wait_queue_head_t *wait,
1218 struct isp_pipeline *pipe = to_isp_pipeline(me);
1220 if (pipe->stream_state == ISP_PIPELINE_STREAM_STOPPED ||
1221 (pipe->stream_state == ISP_PIPELINE_STREAM_SINGLESHOT &&
1222 !isp_pipeline_ready(pipe)))
1226 * atomic_set() doesn't include memory barrier on ARM platform for SMP
1227 * scenario. We'll call it here to avoid race conditions.
1229 atomic_set(stopping, 1);
1233 * If module is the last one, it's writing to memory. In this case,
1234 * it's necessary to check if the module is already paused due to
1235 * DMA queue underrun or if it has to wait for next interrupt to be
1237 * If it isn't the last one, the function won't sleep but *stopping
1238 * will still be set to warn next submodule caller's interrupt the
1239 * module wants to be idle.
1241 if (isp_pipeline_is_last(me)) {
1242 struct isp_video *video = pipe->output;
1243 unsigned long flags;
1244 spin_lock_irqsave(&video->queue->irqlock, flags);
1245 if (video->dmaqueue_flags & ISP_VIDEO_DMAQUEUE_UNDERRUN) {
1246 spin_unlock_irqrestore(&video->queue->irqlock, flags);
1247 atomic_set(stopping, 0);
1251 spin_unlock_irqrestore(&video->queue->irqlock, flags);
1252 if (!wait_event_timeout(*wait, !atomic_read(stopping),
1253 msecs_to_jiffies(1000))) {
1254 atomic_set(stopping, 0);
1264 * omap3isp_module_sync_is_stopped - Helper to verify if module was stopping
1265 * @wait: ISP submodule's wait queue for streamoff/interrupt synchronization
1266 * @stopping: flag which tells module wants to stop
1268 * This function checks if ISP submodule was stopping. In case of yes, it
1269 * notices the caller by setting stopping to 0 and waking up the wait queue.
1270 * Returns 1 if it was stopping or 0 otherwise.
1272 int omap3isp_module_sync_is_stopping(wait_queue_head_t *wait,
1275 if (atomic_cmpxchg(stopping, 1, 0)) {
1283 /* --------------------------------------------------------------------------
1287 #define ISPCTRL_CLKS_MASK (ISPCTRL_H3A_CLK_EN | \
1288 ISPCTRL_HIST_CLK_EN | \
1289 ISPCTRL_RSZ_CLK_EN | \
1290 (ISPCTRL_CCDC_CLK_EN | ISPCTRL_CCDC_RAM_EN) | \
1291 (ISPCTRL_PREV_CLK_EN | ISPCTRL_PREV_RAM_EN))
1293 static void __isp_subclk_update(struct isp_device *isp)
1297 if (isp->subclk_resources & OMAP3_ISP_SUBCLK_H3A)
1298 clk |= ISPCTRL_H3A_CLK_EN;
1300 if (isp->subclk_resources & OMAP3_ISP_SUBCLK_HIST)
1301 clk |= ISPCTRL_HIST_CLK_EN;
1303 if (isp->subclk_resources & OMAP3_ISP_SUBCLK_RESIZER)
1304 clk |= ISPCTRL_RSZ_CLK_EN;
1306 /* NOTE: For CCDC & Preview submodules, we need to affect internal
1309 if (isp->subclk_resources & OMAP3_ISP_SUBCLK_CCDC)
1310 clk |= ISPCTRL_CCDC_CLK_EN | ISPCTRL_CCDC_RAM_EN;
1312 if (isp->subclk_resources & OMAP3_ISP_SUBCLK_PREVIEW)
1313 clk |= ISPCTRL_PREV_CLK_EN | ISPCTRL_PREV_RAM_EN;
1315 isp_reg_clr_set(isp, OMAP3_ISP_IOMEM_MAIN, ISP_CTRL,
1316 ISPCTRL_CLKS_MASK, clk);
1319 void omap3isp_subclk_enable(struct isp_device *isp,
1320 enum isp_subclk_resource res)
1322 isp->subclk_resources |= res;
1324 __isp_subclk_update(isp);
1327 void omap3isp_subclk_disable(struct isp_device *isp,
1328 enum isp_subclk_resource res)
1330 isp->subclk_resources &= ~res;
1332 __isp_subclk_update(isp);
1336 * isp_enable_clocks - Enable ISP clocks
1337 * @isp: OMAP3 ISP device
1339 * Return 0 if successful, or clk_enable return value if any of tthem fails.
1341 static int isp_enable_clocks(struct isp_device *isp)
1348 * cam_mclk clock chain:
1349 * dpll4 -> dpll4_m5 -> dpll4_m5x2 -> cam_mclk
1351 * In OMAP3630 dpll4_m5x2 != 2 x dpll4_m5 but both are
1352 * set to the same value. Hence the rate set for dpll4_m5
1353 * has to be twice of what is set on OMAP3430 to get
1354 * the required value for cam_mclk
1356 if (cpu_is_omap3630())
1361 r = clk_enable(isp->clock[ISP_CLK_CAM_ICK]);
1363 dev_err(isp->dev, "clk_enable cam_ick failed\n");
1364 goto out_clk_enable_ick;
1366 r = clk_set_rate(isp->clock[ISP_CLK_DPLL4_M5_CK],
1367 CM_CAM_MCLK_HZ/divisor);
1369 dev_err(isp->dev, "clk_set_rate for dpll4_m5_ck failed\n");
1370 goto out_clk_enable_mclk;
1372 r = clk_enable(isp->clock[ISP_CLK_CAM_MCLK]);
1374 dev_err(isp->dev, "clk_enable cam_mclk failed\n");
1375 goto out_clk_enable_mclk;
1377 rate = clk_get_rate(isp->clock[ISP_CLK_CAM_MCLK]);
1378 if (rate != CM_CAM_MCLK_HZ)
1379 dev_warn(isp->dev, "unexpected cam_mclk rate:\n"
1381 " actual : %ld\n", CM_CAM_MCLK_HZ, rate);
1382 r = clk_enable(isp->clock[ISP_CLK_CSI2_FCK]);
1384 dev_err(isp->dev, "clk_enable csi2_fck failed\n");
1385 goto out_clk_enable_csi2_fclk;
1389 out_clk_enable_csi2_fclk:
1390 clk_disable(isp->clock[ISP_CLK_CAM_MCLK]);
1391 out_clk_enable_mclk:
1392 clk_disable(isp->clock[ISP_CLK_CAM_ICK]);
1398 * isp_disable_clocks - Disable ISP clocks
1399 * @isp: OMAP3 ISP device
1401 static void isp_disable_clocks(struct isp_device *isp)
1403 clk_disable(isp->clock[ISP_CLK_CAM_ICK]);
1404 clk_disable(isp->clock[ISP_CLK_CAM_MCLK]);
1405 clk_disable(isp->clock[ISP_CLK_CSI2_FCK]);
1408 static const char *isp_clocks[] = {
1416 static void isp_put_clocks(struct isp_device *isp)
1420 for (i = 0; i < ARRAY_SIZE(isp_clocks); ++i) {
1421 if (isp->clock[i]) {
1422 clk_put(isp->clock[i]);
1423 isp->clock[i] = NULL;
1428 static int isp_get_clocks(struct isp_device *isp)
1433 for (i = 0; i < ARRAY_SIZE(isp_clocks); ++i) {
1434 clk = clk_get(isp->dev, isp_clocks[i]);
1436 dev_err(isp->dev, "clk_get %s failed\n", isp_clocks[i]);
1437 isp_put_clocks(isp);
1438 return PTR_ERR(clk);
1441 isp->clock[i] = clk;
1448 * omap3isp_get - Acquire the ISP resource.
1450 * Initializes the clocks for the first acquire.
1452 * Increment the reference count on the ISP. If the first reference is taken,
1453 * enable clocks and power-up all submodules.
1455 * Return a pointer to the ISP device structure, or NULL if an error occurred.
1457 struct isp_device *omap3isp_get(struct isp_device *isp)
1459 struct isp_device *__isp = isp;
1464 mutex_lock(&isp->isp_mutex);
1465 if (isp->ref_count > 0)
1468 if (isp_enable_clocks(isp) < 0) {
1473 /* We don't want to restore context before saving it! */
1474 if (isp->has_context)
1475 isp_restore_ctx(isp);
1477 isp->has_context = 1;
1479 isp_enable_interrupts(isp);
1484 mutex_unlock(&isp->isp_mutex);
1490 * omap3isp_put - Release the ISP
1492 * Decrement the reference count on the ISP. If the last reference is released,
1493 * power-down all submodules, disable clocks and free temporary buffers.
1495 void omap3isp_put(struct isp_device *isp)
1500 mutex_lock(&isp->isp_mutex);
1501 BUG_ON(isp->ref_count == 0);
1502 if (--isp->ref_count == 0) {
1503 isp_disable_interrupts(isp);
1506 /* Reset the ISP if an entity has failed to stop. This is the
1507 * only way to recover from such conditions.
1511 isp_disable_clocks(isp);
1513 mutex_unlock(&isp->isp_mutex);
1516 /* --------------------------------------------------------------------------
1517 * Platform device driver
1521 * omap3isp_print_status - Prints the values of the ISP Control Module registers
1522 * @isp: OMAP3 ISP device
1524 #define ISP_PRINT_REGISTER(isp, name)\
1525 dev_dbg(isp->dev, "###ISP " #name "=0x%08x\n", \
1526 isp_reg_readl(isp, OMAP3_ISP_IOMEM_MAIN, ISP_##name))
1527 #define SBL_PRINT_REGISTER(isp, name)\
1528 dev_dbg(isp->dev, "###SBL " #name "=0x%08x\n", \
1529 isp_reg_readl(isp, OMAP3_ISP_IOMEM_SBL, ISPSBL_##name))
1531 void omap3isp_print_status(struct isp_device *isp)
1533 dev_dbg(isp->dev, "-------------ISP Register dump--------------\n");
1535 ISP_PRINT_REGISTER(isp, SYSCONFIG);
1536 ISP_PRINT_REGISTER(isp, SYSSTATUS);
1537 ISP_PRINT_REGISTER(isp, IRQ0ENABLE);
1538 ISP_PRINT_REGISTER(isp, IRQ0STATUS);
1539 ISP_PRINT_REGISTER(isp, TCTRL_GRESET_LENGTH);
1540 ISP_PRINT_REGISTER(isp, TCTRL_PSTRB_REPLAY);
1541 ISP_PRINT_REGISTER(isp, CTRL);
1542 ISP_PRINT_REGISTER(isp, TCTRL_CTRL);
1543 ISP_PRINT_REGISTER(isp, TCTRL_FRAME);
1544 ISP_PRINT_REGISTER(isp, TCTRL_PSTRB_DELAY);
1545 ISP_PRINT_REGISTER(isp, TCTRL_STRB_DELAY);
1546 ISP_PRINT_REGISTER(isp, TCTRL_SHUT_DELAY);
1547 ISP_PRINT_REGISTER(isp, TCTRL_PSTRB_LENGTH);
1548 ISP_PRINT_REGISTER(isp, TCTRL_STRB_LENGTH);
1549 ISP_PRINT_REGISTER(isp, TCTRL_SHUT_LENGTH);
1551 SBL_PRINT_REGISTER(isp, PCR);
1552 SBL_PRINT_REGISTER(isp, SDR_REQ_EXP);
1554 dev_dbg(isp->dev, "--------------------------------------------\n");
1560 * Power management support.
1562 * As the ISP can't properly handle an input video stream interruption on a non
1563 * frame boundary, the ISP pipelines need to be stopped before sensors get
1564 * suspended. However, as suspending the sensors can require a running clock,
1565 * which can be provided by the ISP, the ISP can't be completely suspended
1566 * before the sensor.
1568 * To solve this problem power management support is split into prepare/complete
1569 * and suspend/resume operations. The pipelines are stopped in prepare() and the
1570 * ISP clocks get disabled in suspend(). Similarly, the clocks are reenabled in
1571 * resume(), and the the pipelines are restarted in complete().
1573 * TODO: PM dependencies between the ISP and sensors are not modeled explicitly
1576 static int isp_pm_prepare(struct device *dev)
1578 struct isp_device *isp = dev_get_drvdata(dev);
1581 WARN_ON(mutex_is_locked(&isp->isp_mutex));
1583 if (isp->ref_count == 0)
1586 reset = isp_suspend_modules(isp);
1587 isp_disable_interrupts(isp);
1595 static int isp_pm_suspend(struct device *dev)
1597 struct isp_device *isp = dev_get_drvdata(dev);
1599 WARN_ON(mutex_is_locked(&isp->isp_mutex));
1602 isp_disable_clocks(isp);
1607 static int isp_pm_resume(struct device *dev)
1609 struct isp_device *isp = dev_get_drvdata(dev);
1611 if (isp->ref_count == 0)
1614 return isp_enable_clocks(isp);
1617 static void isp_pm_complete(struct device *dev)
1619 struct isp_device *isp = dev_get_drvdata(dev);
1621 if (isp->ref_count == 0)
1624 isp_restore_ctx(isp);
1625 isp_enable_interrupts(isp);
1626 isp_resume_modules(isp);
1631 #define isp_pm_prepare NULL
1632 #define isp_pm_suspend NULL
1633 #define isp_pm_resume NULL
1634 #define isp_pm_complete NULL
1636 #endif /* CONFIG_PM */
1638 static void isp_unregister_entities(struct isp_device *isp)
1640 omap3isp_csi2_unregister_entities(&isp->isp_csi2a);
1641 omap3isp_ccp2_unregister_entities(&isp->isp_ccp2);
1642 omap3isp_ccdc_unregister_entities(&isp->isp_ccdc);
1643 omap3isp_preview_unregister_entities(&isp->isp_prev);
1644 omap3isp_resizer_unregister_entities(&isp->isp_res);
1645 omap3isp_stat_unregister_entities(&isp->isp_aewb);
1646 omap3isp_stat_unregister_entities(&isp->isp_af);
1647 omap3isp_stat_unregister_entities(&isp->isp_hist);
1649 v4l2_device_unregister(&isp->v4l2_dev);
1650 media_device_unregister(&isp->media_dev);
1654 * isp_register_subdev_group - Register a group of subdevices
1655 * @isp: OMAP3 ISP device
1656 * @board_info: I2C subdevs board information array
1658 * Register all I2C subdevices in the board_info array. The array must be
1659 * terminated by a NULL entry, and the first entry must be the sensor.
1661 * Return a pointer to the sensor media entity if it has been successfully
1662 * registered, or NULL otherwise.
1664 static struct v4l2_subdev *
1665 isp_register_subdev_group(struct isp_device *isp,
1666 struct isp_subdev_i2c_board_info *board_info)
1668 struct v4l2_subdev *sensor = NULL;
1671 if (board_info->board_info == NULL)
1674 for (first = 1; board_info->board_info; ++board_info, first = 0) {
1675 struct v4l2_subdev *subdev;
1676 struct i2c_adapter *adapter;
1678 adapter = i2c_get_adapter(board_info->i2c_adapter_id);
1679 if (adapter == NULL) {
1680 printk(KERN_ERR "%s: Unable to get I2C adapter %d for "
1681 "device %s\n", __func__,
1682 board_info->i2c_adapter_id,
1683 board_info->board_info->type);
1687 subdev = v4l2_i2c_new_subdev_board(&isp->v4l2_dev, adapter,
1688 board_info->board_info, NULL);
1689 if (subdev == NULL) {
1690 printk(KERN_ERR "%s: Unable to register subdev %s\n",
1691 __func__, board_info->board_info->type);
1702 static int isp_register_entities(struct isp_device *isp)
1704 struct isp_platform_data *pdata = isp->pdata;
1705 struct isp_v4l2_subdevs_group *subdevs;
1708 isp->media_dev.dev = isp->dev;
1709 strlcpy(isp->media_dev.model, "TI OMAP3 ISP",
1710 sizeof(isp->media_dev.model));
1711 isp->media_dev.hw_revision = isp->revision;
1712 isp->media_dev.link_notify = isp_pipeline_link_notify;
1713 ret = media_device_register(&isp->media_dev);
1715 printk(KERN_ERR "%s: Media device registration failed (%d)\n",
1720 isp->v4l2_dev.mdev = &isp->media_dev;
1721 ret = v4l2_device_register(isp->dev, &isp->v4l2_dev);
1723 printk(KERN_ERR "%s: V4L2 device registration failed (%d)\n",
1728 /* Register internal entities */
1729 ret = omap3isp_ccp2_register_entities(&isp->isp_ccp2, &isp->v4l2_dev);
1733 ret = omap3isp_csi2_register_entities(&isp->isp_csi2a, &isp->v4l2_dev);
1737 ret = omap3isp_ccdc_register_entities(&isp->isp_ccdc, &isp->v4l2_dev);
1741 ret = omap3isp_preview_register_entities(&isp->isp_prev,
1746 ret = omap3isp_resizer_register_entities(&isp->isp_res, &isp->v4l2_dev);
1750 ret = omap3isp_stat_register_entities(&isp->isp_aewb, &isp->v4l2_dev);
1754 ret = omap3isp_stat_register_entities(&isp->isp_af, &isp->v4l2_dev);
1758 ret = omap3isp_stat_register_entities(&isp->isp_hist, &isp->v4l2_dev);
1762 /* Register external entities */
1763 for (subdevs = pdata->subdevs; subdevs && subdevs->subdevs; ++subdevs) {
1764 struct v4l2_subdev *sensor;
1765 struct media_entity *input;
1769 sensor = isp_register_subdev_group(isp, subdevs->subdevs);
1773 sensor->host_priv = subdevs;
1775 /* Connect the sensor to the correct interface module. Parallel
1776 * sensors are connected directly to the CCDC, while serial
1777 * sensors are connected to the CSI2a, CCP2b or CSI2c receiver
1778 * through CSIPHY1 or CSIPHY2.
1780 switch (subdevs->interface) {
1781 case ISP_INTERFACE_PARALLEL:
1782 input = &isp->isp_ccdc.subdev.entity;
1783 pad = CCDC_PAD_SINK;
1787 case ISP_INTERFACE_CSI2A_PHY2:
1788 input = &isp->isp_csi2a.subdev.entity;
1789 pad = CSI2_PAD_SINK;
1790 flags = MEDIA_LNK_FL_IMMUTABLE
1791 | MEDIA_LNK_FL_ENABLED;
1794 case ISP_INTERFACE_CCP2B_PHY1:
1795 case ISP_INTERFACE_CCP2B_PHY2:
1796 input = &isp->isp_ccp2.subdev.entity;
1797 pad = CCP2_PAD_SINK;
1801 case ISP_INTERFACE_CSI2C_PHY1:
1802 input = &isp->isp_csi2c.subdev.entity;
1803 pad = CSI2_PAD_SINK;
1804 flags = MEDIA_LNK_FL_IMMUTABLE
1805 | MEDIA_LNK_FL_ENABLED;
1809 printk(KERN_ERR "%s: invalid interface type %u\n",
1810 __func__, subdevs->interface);
1815 ret = media_entity_create_link(&sensor->entity, 0, input, pad,
1821 ret = v4l2_device_register_subdev_nodes(&isp->v4l2_dev);
1825 isp_unregister_entities(isp);
1830 static void isp_cleanup_modules(struct isp_device *isp)
1832 omap3isp_h3a_aewb_cleanup(isp);
1833 omap3isp_h3a_af_cleanup(isp);
1834 omap3isp_hist_cleanup(isp);
1835 omap3isp_resizer_cleanup(isp);
1836 omap3isp_preview_cleanup(isp);
1837 omap3isp_ccdc_cleanup(isp);
1838 omap3isp_ccp2_cleanup(isp);
1839 omap3isp_csi2_cleanup(isp);
1842 static int isp_initialize_modules(struct isp_device *isp)
1846 ret = omap3isp_csiphy_init(isp);
1848 dev_err(isp->dev, "CSI PHY initialization failed\n");
1852 ret = omap3isp_csi2_init(isp);
1854 dev_err(isp->dev, "CSI2 initialization failed\n");
1858 ret = omap3isp_ccp2_init(isp);
1860 dev_err(isp->dev, "CCP2 initialization failed\n");
1864 ret = omap3isp_ccdc_init(isp);
1866 dev_err(isp->dev, "CCDC initialization failed\n");
1870 ret = omap3isp_preview_init(isp);
1872 dev_err(isp->dev, "Preview initialization failed\n");
1876 ret = omap3isp_resizer_init(isp);
1878 dev_err(isp->dev, "Resizer initialization failed\n");
1882 ret = omap3isp_hist_init(isp);
1884 dev_err(isp->dev, "Histogram initialization failed\n");
1888 ret = omap3isp_h3a_aewb_init(isp);
1890 dev_err(isp->dev, "H3A AEWB initialization failed\n");
1891 goto error_h3a_aewb;
1894 ret = omap3isp_h3a_af_init(isp);
1896 dev_err(isp->dev, "H3A AF initialization failed\n");
1900 /* Connect the submodules. */
1901 ret = media_entity_create_link(
1902 &isp->isp_csi2a.subdev.entity, CSI2_PAD_SOURCE,
1903 &isp->isp_ccdc.subdev.entity, CCDC_PAD_SINK, 0);
1907 ret = media_entity_create_link(
1908 &isp->isp_ccp2.subdev.entity, CCP2_PAD_SOURCE,
1909 &isp->isp_ccdc.subdev.entity, CCDC_PAD_SINK, 0);
1913 ret = media_entity_create_link(
1914 &isp->isp_ccdc.subdev.entity, CCDC_PAD_SOURCE_VP,
1915 &isp->isp_prev.subdev.entity, PREV_PAD_SINK, 0);
1919 ret = media_entity_create_link(
1920 &isp->isp_ccdc.subdev.entity, CCDC_PAD_SOURCE_OF,
1921 &isp->isp_res.subdev.entity, RESZ_PAD_SINK, 0);
1925 ret = media_entity_create_link(
1926 &isp->isp_prev.subdev.entity, PREV_PAD_SOURCE,
1927 &isp->isp_res.subdev.entity, RESZ_PAD_SINK, 0);
1931 ret = media_entity_create_link(
1932 &isp->isp_ccdc.subdev.entity, CCDC_PAD_SOURCE_VP,
1933 &isp->isp_aewb.subdev.entity, 0,
1934 MEDIA_LNK_FL_ENABLED | MEDIA_LNK_FL_IMMUTABLE);
1938 ret = media_entity_create_link(
1939 &isp->isp_ccdc.subdev.entity, CCDC_PAD_SOURCE_VP,
1940 &isp->isp_af.subdev.entity, 0,
1941 MEDIA_LNK_FL_ENABLED | MEDIA_LNK_FL_IMMUTABLE);
1945 ret = media_entity_create_link(
1946 &isp->isp_ccdc.subdev.entity, CCDC_PAD_SOURCE_VP,
1947 &isp->isp_hist.subdev.entity, 0,
1948 MEDIA_LNK_FL_ENABLED | MEDIA_LNK_FL_IMMUTABLE);
1955 omap3isp_h3a_af_cleanup(isp);
1957 omap3isp_h3a_aewb_cleanup(isp);
1959 omap3isp_hist_cleanup(isp);
1961 omap3isp_resizer_cleanup(isp);
1963 omap3isp_preview_cleanup(isp);
1965 omap3isp_ccdc_cleanup(isp);
1967 omap3isp_ccp2_cleanup(isp);
1969 omap3isp_csi2_cleanup(isp);
1976 * isp_remove - Remove ISP platform device
1977 * @pdev: Pointer to ISP platform device
1981 static int __devexit isp_remove(struct platform_device *pdev)
1983 struct isp_device *isp = platform_get_drvdata(pdev);
1986 isp_unregister_entities(isp);
1987 isp_cleanup_modules(isp);
1990 iommu_detach_device(isp->domain, &pdev->dev);
1991 iommu_domain_free(isp->domain);
1995 free_irq(isp->irq_num, isp);
1996 isp_put_clocks(isp);
1998 for (i = 0; i < OMAP3_ISP_IOMEM_LAST; i++) {
1999 if (isp->mmio_base[i]) {
2000 iounmap(isp->mmio_base[i]);
2001 isp->mmio_base[i] = NULL;
2004 if (isp->mmio_base_phys[i]) {
2005 release_mem_region(isp->mmio_base_phys[i],
2007 isp->mmio_base_phys[i] = 0;
2011 regulator_put(isp->isp_csiphy1.vdd);
2012 regulator_put(isp->isp_csiphy2.vdd);
2018 static int isp_map_mem_resource(struct platform_device *pdev,
2019 struct isp_device *isp,
2020 enum isp_mem_resources res)
2022 struct resource *mem;
2024 /* request the mem region for the camera registers */
2026 mem = platform_get_resource(pdev, IORESOURCE_MEM, res);
2028 dev_err(isp->dev, "no mem resource?\n");
2032 if (!request_mem_region(mem->start, resource_size(mem), pdev->name)) {
2034 "cannot reserve camera register I/O region\n");
2037 isp->mmio_base_phys[res] = mem->start;
2038 isp->mmio_size[res] = resource_size(mem);
2040 /* map the region */
2041 isp->mmio_base[res] = ioremap_nocache(isp->mmio_base_phys[res],
2042 isp->mmio_size[res]);
2043 if (!isp->mmio_base[res]) {
2044 dev_err(isp->dev, "cannot map camera register I/O region\n");
2052 * isp_probe - Probe ISP platform device
2053 * @pdev: Pointer to ISP platform device
2055 * Returns 0 if successful,
2056 * -ENOMEM if no memory available,
2057 * -ENODEV if no platform device resources found
2058 * or no space for remapping registers,
2059 * -EINVAL if couldn't install ISR,
2060 * or clk_get return error value.
2062 static int __devinit isp_probe(struct platform_device *pdev)
2064 struct isp_platform_data *pdata = pdev->dev.platform_data;
2065 struct isp_device *isp;
2072 isp = kzalloc(sizeof(*isp), GFP_KERNEL);
2074 dev_err(&pdev->dev, "could not allocate memory\n");
2078 isp->autoidle = autoidle;
2079 isp->platform_cb.set_xclk = isp_set_xclk;
2080 isp->platform_cb.set_pixel_clock = isp_set_pixel_clock;
2082 mutex_init(&isp->isp_mutex);
2083 spin_lock_init(&isp->stat_lock);
2085 isp->dev = &pdev->dev;
2089 isp->raw_dmamask = DMA_BIT_MASK(32);
2090 isp->dev->dma_mask = &isp->raw_dmamask;
2091 isp->dev->coherent_dma_mask = DMA_BIT_MASK(32);
2093 platform_set_drvdata(pdev, isp);
2096 isp->isp_csiphy1.vdd = regulator_get(&pdev->dev, "VDD_CSIPHY1");
2097 isp->isp_csiphy2.vdd = regulator_get(&pdev->dev, "VDD_CSIPHY2");
2100 ret = isp_map_mem_resource(pdev, isp, OMAP3_ISP_IOMEM_MAIN);
2104 ret = isp_get_clocks(isp);
2108 if (omap3isp_get(isp) == NULL)
2111 ret = isp_reset(isp);
2115 /* Memory resources */
2116 isp->revision = isp_reg_readl(isp, OMAP3_ISP_IOMEM_MAIN, ISP_REVISION);
2117 dev_info(isp->dev, "Revision %d.%d found\n",
2118 (isp->revision & 0xf0) >> 4, isp->revision & 0x0f);
2120 for (m = 0; m < ARRAY_SIZE(isp_res_maps); m++)
2121 if (isp->revision == isp_res_maps[m].isp_rev)
2124 if (m == ARRAY_SIZE(isp_res_maps)) {
2125 dev_err(isp->dev, "No resource map found for ISP rev %d.%d\n",
2126 (isp->revision & 0xf0) >> 4, isp->revision & 0xf);
2131 for (i = 1; i < OMAP3_ISP_IOMEM_LAST; i++) {
2132 if (isp_res_maps[m].map & 1 << i) {
2133 ret = isp_map_mem_resource(pdev, isp, i);
2139 isp->domain = iommu_domain_alloc(pdev->dev.bus);
2141 dev_err(isp->dev, "can't alloc iommu domain\n");
2146 ret = iommu_attach_device(isp->domain, &pdev->dev);
2148 dev_err(&pdev->dev, "can't attach iommu device: %d\n", ret);
2153 isp->irq_num = platform_get_irq(pdev, 0);
2154 if (isp->irq_num <= 0) {
2155 dev_err(isp->dev, "No IRQ resource\n");
2160 if (request_irq(isp->irq_num, isp_isr, IRQF_SHARED, "OMAP3 ISP", isp)) {
2161 dev_err(isp->dev, "Unable to request IRQ\n");
2167 ret = isp_initialize_modules(isp);
2171 ret = isp_register_entities(isp);
2175 isp_power_settings(isp, 1);
2181 isp_cleanup_modules(isp);
2183 free_irq(isp->irq_num, isp);
2185 iommu_detach_device(isp->domain, &pdev->dev);
2187 iommu_domain_free(isp->domain);
2191 isp_put_clocks(isp);
2193 for (i = 0; i < OMAP3_ISP_IOMEM_LAST; i++) {
2194 if (isp->mmio_base[i]) {
2195 iounmap(isp->mmio_base[i]);
2196 isp->mmio_base[i] = NULL;
2199 if (isp->mmio_base_phys[i]) {
2200 release_mem_region(isp->mmio_base_phys[i],
2202 isp->mmio_base_phys[i] = 0;
2205 regulator_put(isp->isp_csiphy2.vdd);
2206 regulator_put(isp->isp_csiphy1.vdd);
2207 platform_set_drvdata(pdev, NULL);
2209 mutex_destroy(&isp->isp_mutex);
2215 static const struct dev_pm_ops omap3isp_pm_ops = {
2216 .prepare = isp_pm_prepare,
2217 .suspend = isp_pm_suspend,
2218 .resume = isp_pm_resume,
2219 .complete = isp_pm_complete,
2222 static struct platform_device_id omap3isp_id_table[] = {
2226 MODULE_DEVICE_TABLE(platform, omap3isp_id_table);
2228 static struct platform_driver omap3isp_driver = {
2230 .remove = __devexit_p(isp_remove),
2231 .id_table = omap3isp_id_table,
2233 .owner = THIS_MODULE,
2235 .pm = &omap3isp_pm_ops,
2239 module_platform_driver(omap3isp_driver);
2241 MODULE_AUTHOR("Nokia Corporation");
2242 MODULE_DESCRIPTION("TI OMAP3 ISP driver");
2243 MODULE_LICENSE("GPL");
2244 MODULE_VERSION(ISP_VIDEO_DRIVER_VERSION);