drivers/media/video/omap3isp/isppreview.c

   1 /*
   2  * isppreview.c
   3  *
   4  * TI OMAP3 ISP driver - Preview module
   5  *
   6  * Copyright (C) 2010 Nokia Corporation
   7  * Copyright (C) 2009 Texas Instruments, Inc.
   8  *
   9  * Contacts: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
  10  *           Sakari Ailus <sakari.ailus@iki.fi>
  11  *
  12  * This program is free software; you can redistribute it and/or modify
  13  * it under the terms of the GNU General Public License version 2 as
  14  * published by the Free Software Foundation.
  15  *
  16  * This program is distributed in the hope that it will be useful, but
  17  * WITHOUT ANY WARRANTY; without even the implied warranty of
  18  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
  19  * General Public License for more details.
  20  *
  21  * You should have received a copy of the GNU General Public License
  22  * along with this program; if not, write to the Free Software
  23  * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA
  24  * 02110-1301 USA
  25  */
  26
  27 #include <linux/device.h>
  28 #include <linux/mm.h>
  29 #include <linux/module.h>
  30 #include <linux/mutex.h>
  31 #include <linux/uaccess.h>
  32
  33 #include "isp.h"
  34 #include "ispreg.h"
  35 #include "isppreview.h"
  36
  37 /* Default values in Office Fluorescent Light for RGBtoRGB Blending */
  38 static struct omap3isp_prev_rgbtorgb flr_rgb2rgb = {
  39         {       /* RGB-RGB Matrix */
  40                 {0x01E2, 0x0F30, 0x0FEE},
  41                 {0x0F9B, 0x01AC, 0x0FB9},
  42                 {0x0FE0, 0x0EC0, 0x0260}
  43         },      /* RGB Offset */
  44         {0x0000, 0x0000, 0x0000}
  45 };
  46
  47 /* Default values in Office Fluorescent Light for RGB to YUV Conversion*/
  48 static struct omap3isp_prev_csc flr_prev_csc = {
  49         {       /* CSC Coef Matrix */
  50                 {66, 129, 25},
  51                 {-38, -75, 112},
  52                 {112, -94 , -18}
  53         },      /* CSC Offset */
  54         {0x0, 0x0, 0x0}
  55 };
  56
  57 /* Default values in Office Fluorescent Light for CFA Gradient*/
  58 #define FLR_CFA_GRADTHRS_HORZ   0x28
  59 #define FLR_CFA_GRADTHRS_VERT   0x28
  60
  61 /* Default values in Office Fluorescent Light for Chroma Suppression*/
  62 #define FLR_CSUP_GAIN           0x0D
  63 #define FLR_CSUP_THRES          0xEB
  64
  65 /* Default values in Office Fluorescent Light for Noise Filter*/
  66 #define FLR_NF_STRGTH           0x03
  67
  68 /* Default values for White Balance */
  69 #define FLR_WBAL_DGAIN          0x100
  70 #define FLR_WBAL_COEF           0x20
  71
  72 /* Default values in Office Fluorescent Light for Black Adjustment*/
  73 #define FLR_BLKADJ_BLUE         0x0
  74 #define FLR_BLKADJ_GREEN        0x0
  75 #define FLR_BLKADJ_RED          0x0
  76
  77 #define DEF_DETECT_CORRECT_VAL  0xe
  78
  79 /*
  80  * Margins and image size limits.
  81  *
  82  * The preview engine crops several rows and columns internally depending on
  83  * which filters are enabled. To avoid format changes when the filters are
  84  * enabled or disabled (which would prevent them from being turned on or off
  85  * during streaming), the driver assumes all the filters are enabled when
  86  * computing sink crop and source format limits.
  87  *
  88  * If a filter is disabled, additional cropping is automatically added at the
  89  * preview engine input by the driver to avoid overflow at line and frame end.
  90  * This is completely transparent for applications.
  91  *
  92  * Median filter                4 pixels
  93  * Noise filter,
  94  * Faulty pixels correction     4 pixels, 4 lines
  95  * CFA filter                   4 pixels, 4 lines in Bayer mode
  96  *                                        2 lines in other modes
  97  * Color suppression            2 pixels
  98  * or luma enhancement
  99  * -------------------------------------------------------------
 100  * Maximum total                14 pixels, 8 lines
 101  *
 102  * The color suppression and luma enhancement filters are applied after bayer to
 103  * YUV conversion. They thus can crop one pixel on the left and one pixel on the
 104  * right side of the image without changing the color pattern. When both those
 105  * filters are disabled, the driver must crop the two pixels on the same side of
 106  * the image to avoid changing the bayer pattern. The left margin is thus set to
 107  * 8 pixels and the right margin to 6 pixels.
 108  */
 109
 110 #define PREV_MARGIN_LEFT        8
 111 #define PREV_MARGIN_RIGHT       6
 112 #define PREV_MARGIN_TOP         4
 113 #define PREV_MARGIN_BOTTOM      4
 114
 115 #define PREV_MIN_IN_WIDTH       64
 116 #define PREV_MIN_IN_HEIGHT      8
 117 #define PREV_MAX_IN_HEIGHT      16384
 118
 119 #define PREV_MIN_OUT_WIDTH              0
 120 #define PREV_MIN_OUT_HEIGHT             0
 121 #define PREV_MAX_OUT_WIDTH_REV_1        1280
 122 #define PREV_MAX_OUT_WIDTH_REV_2        3300
 123 #define PREV_MAX_OUT_WIDTH_REV_15       4096
 124
 125 /*
 126  * Coeficient Tables for the submodules in Preview.
 127  * Array is initialised with the values from.the tables text file.
 128  */
 129
 130 /*
 131  * CFA Filter Coefficient Table
 132  *
 133  */
 134 static u32 cfa_coef_table[] = {
 135 #include "cfa_coef_table.h"
 136 };
 137
 138 /*
 139  * Default Gamma Correction Table - All components
 140  */
 141 static u32 gamma_table[] = {
 142 #include "gamma_table.h"
 143 };
 144
 145 /*
 146  * Noise Filter Threshold table
 147  */
 148 static u32 noise_filter_table[] = {
 149 #include "noise_filter_table.h"
 150 };
 151
 152 /*
 153  * Luminance Enhancement Table
 154  */
 155 static u32 luma_enhance_table[] = {
 156 #include "luma_enhance_table.h"
 157 };
 158
 159 /*
 160  * preview_enable_invalaw - Enable/Disable Inverse A-Law module in Preview.
 161  * @enable: 1 - Reverse the A-Law done in CCDC.
 162  */
 163 static void
 164 preview_enable_invalaw(struct isp_prev_device *prev, u8 enable)
 165 {
 166         struct isp_device *isp = to_isp_device(prev);
 167
 168         if (enable)
 169                 isp_reg_set(isp, OMAP3_ISP_IOMEM_PREV, ISPPRV_PCR,
 170                             ISPPRV_PCR_WIDTH | ISPPRV_PCR_INVALAW);
 171         else
 172                 isp_reg_clr(isp, OMAP3_ISP_IOMEM_PREV, ISPPRV_PCR,
 173                             ISPPRV_PCR_WIDTH | ISPPRV_PCR_INVALAW);
 174 }
 175
 176 /*
 177  * preview_enable_drkframe_capture - Enable/Disable of the darkframe capture.
 178  * @prev -
 179  * @enable: 1 - Enable, 0 - Disable
 180  *
 181  * NOTE: PRV_WSDR_ADDR and PRV_WADD_OFFSET must be set also
 182  * The process is applied for each captured frame.
 183  */
 184 static void
 185 preview_enable_drkframe_capture(struct isp_prev_device *prev, u8 enable)
 186 {
 187         struct isp_device *isp = to_isp_device(prev);
 188
 189         if (enable)
 190                 isp_reg_set(isp, OMAP3_ISP_IOMEM_PREV, ISPPRV_PCR,
 191                             ISPPRV_PCR_DRKFCAP);
 192         else
 193                 isp_reg_clr(isp, OMAP3_ISP_IOMEM_PREV, ISPPRV_PCR,
 194                             ISPPRV_PCR_DRKFCAP);
 195 }
 196
 197 /*
 198  * preview_enable_drkframe - Enable/Disable of the darkframe subtract.
 199  * @enable: 1 - Acquires memory bandwidth since the pixels in each frame is
 200  *          subtracted with the pixels in the current frame.
 201  *
 202  * The process is applied for each captured frame.
 203  */
 204 static void
 205 preview_enable_drkframe(struct isp_prev_device *prev, u8 enable)
 206 {
 207         struct isp_device *isp = to_isp_device(prev);
 208
 209         if (enable)
 210                 isp_reg_set(isp, OMAP3_ISP_IOMEM_PREV, ISPPRV_PCR,
 211                             ISPPRV_PCR_DRKFEN);
 212         else
 213                 isp_reg_clr(isp, OMAP3_ISP_IOMEM_PREV, ISPPRV_PCR,
 214                             ISPPRV_PCR_DRKFEN);
 215 }
 216
 217 /*
 218  * preview_config_drkf_shadcomp - Configures shift value in shading comp.
 219  * @scomp_shtval: 3bit value of shift used in shading compensation.
 220  */
 221 static void
 222 preview_config_drkf_shadcomp(struct isp_prev_device *prev,
 223                              const void *scomp_shtval)
 224 {
 225         struct isp_device *isp = to_isp_device(prev);
 226         const u32 *shtval = scomp_shtval;
 227
 228         isp_reg_clr_set(isp, OMAP3_ISP_IOMEM_PREV, ISPPRV_PCR,
 229                         ISPPRV_PCR_SCOMP_SFT_MASK,
 230                         *shtval << ISPPRV_PCR_SCOMP_SFT_SHIFT);
 231 }
 232
 233 /*
 234  * preview_enable_hmed - Enables/Disables of the Horizontal Median Filter.
 235  * @enable: 1 - Enables Horizontal Median Filter.
 236  */
 237 static void
 238 preview_enable_hmed(struct isp_prev_device *prev, u8 enable)
 239 {
 240         struct isp_device *isp = to_isp_device(prev);
 241
 242         if (enable)
 243                 isp_reg_set(isp, OMAP3_ISP_IOMEM_PREV, ISPPRV_PCR,
 244                             ISPPRV_PCR_HMEDEN);
 245         else
 246                 isp_reg_clr(isp, OMAP3_ISP_IOMEM_PREV, ISPPRV_PCR,
 247                             ISPPRV_PCR_HMEDEN);
 248 }
 249
 250 /*
 251  * preview_config_hmed - Configures the Horizontal Median Filter.
 252  * @prev_hmed: Structure containing the odd and even distance between the
 253  *             pixels in the image along with the filter threshold.
 254  */
 255 static void
 256 preview_config_hmed(struct isp_prev_device *prev, const void *prev_hmed)
 257 {
 258         struct isp_device *isp = to_isp_device(prev);
 259         const struct omap3isp_prev_hmed *hmed = prev_hmed;
 260
 261         isp_reg_writel(isp, (hmed->odddist == 1 ? 0 : ISPPRV_HMED_ODDDIST) |
 262                        (hmed->evendist == 1 ? 0 : ISPPRV_HMED_EVENDIST) |
 263                        (hmed->thres << ISPPRV_HMED_THRESHOLD_SHIFT),
 264                        OMAP3_ISP_IOMEM_PREV, ISPPRV_HMED);
 265 }
 266
 267 /*
 268  * preview_config_noisefilter - Configures the Noise Filter.
 269  * @prev_nf: Structure containing the noisefilter table, strength to be used
 270  *           for the noise filter and the defect correction enable flag.
 271  */
 272 static void
 273 preview_config_noisefilter(struct isp_prev_device *prev, const void *prev_nf)
 274 {
 275         struct isp_device *isp = to_isp_device(prev);
 276         const struct omap3isp_prev_nf *nf = prev_nf;
 277         unsigned int i;
 278
 279         isp_reg_writel(isp, nf->spread, OMAP3_ISP_IOMEM_PREV, ISPPRV_NF);
 280         isp_reg_writel(isp, ISPPRV_NF_TABLE_ADDR,
 281                        OMAP3_ISP_IOMEM_PREV, ISPPRV_SET_TBL_ADDR);
 282         for (i = 0; i < OMAP3ISP_PREV_NF_TBL_SIZE; i++) {
 283                 isp_reg_writel(isp, nf->table[i],
 284                                OMAP3_ISP_IOMEM_PREV, ISPPRV_SET_TBL_DATA);
 285         }
 286 }
 287
 288 /*
 289  * preview_config_dcor - Configures the defect correction
 290  * @prev_dcor: Structure containing the defect correct thresholds
 291  */
 292 static void
 293 preview_config_dcor(struct isp_prev_device *prev, const void *prev_dcor)
 294 {
 295         struct isp_device *isp = to_isp_device(prev);
 296         const struct omap3isp_prev_dcor *dcor = prev_dcor;
 297
 298         isp_reg_writel(isp, dcor->detect_correct[0],
 299                        OMAP3_ISP_IOMEM_PREV, ISPPRV_CDC_THR0);
 300         isp_reg_writel(isp, dcor->detect_correct[1],
 301                        OMAP3_ISP_IOMEM_PREV, ISPPRV_CDC_THR1);
 302         isp_reg_writel(isp, dcor->detect_correct[2],
 303                        OMAP3_ISP_IOMEM_PREV, ISPPRV_CDC_THR2);
 304         isp_reg_writel(isp, dcor->detect_correct[3],
 305                        OMAP3_ISP_IOMEM_PREV, ISPPRV_CDC_THR3);
 306         isp_reg_clr_set(isp, OMAP3_ISP_IOMEM_PREV, ISPPRV_PCR,
 307                         ISPPRV_PCR_DCCOUP,
 308                         dcor->couplet_mode_en ? ISPPRV_PCR_DCCOUP : 0);
 309 }
 310
 311 /*
 312  * preview_config_cfa - Configures the CFA Interpolation parameters.
 313  * @prev_cfa: Structure containing the CFA interpolation table, CFA format
 314  *            in the image, vertical and horizontal gradient threshold.
 315  */
 316 static void
 317 preview_config_cfa(struct isp_prev_device *prev, const void *prev_cfa)
 318 {
 319         struct isp_device *isp = to_isp_device(prev);
 320         const struct omap3isp_prev_cfa *cfa = prev_cfa;
 321         unsigned int i;
 322
 323         isp_reg_clr_set(isp, OMAP3_ISP_IOMEM_PREV, ISPPRV_PCR,
 324                         ISPPRV_PCR_CFAFMT_MASK,
 325                         cfa->format << ISPPRV_PCR_CFAFMT_SHIFT);
 326
 327         isp_reg_writel(isp,
 328                 (cfa->gradthrs_vert << ISPPRV_CFA_GRADTH_VER_SHIFT) |
 329                 (cfa->gradthrs_horz << ISPPRV_CFA_GRADTH_HOR_SHIFT),
 330                 OMAP3_ISP_IOMEM_PREV, ISPPRV_CFA);
 331
 332         isp_reg_writel(isp, ISPPRV_CFA_TABLE_ADDR,
 333                        OMAP3_ISP_IOMEM_PREV, ISPPRV_SET_TBL_ADDR);
 334
 335         for (i = 0; i < OMAP3ISP_PREV_CFA_TBL_SIZE; i++) {
 336                 isp_reg_writel(isp, cfa->table[i],
 337                                OMAP3_ISP_IOMEM_PREV, ISPPRV_SET_TBL_DATA);
 338         }
 339 }
 340
 341 /*
 342  * preview_config_gammacorrn - Configures the Gamma Correction table values
 343  * @gtable: Structure containing the table for red, blue, green gamma table.
 344  */
 345 static void
 346 preview_config_gammacorrn(struct isp_prev_device *prev, const void *gtable)
 347 {
 348         struct isp_device *isp = to_isp_device(prev);
 349         const struct omap3isp_prev_gtables *gt = gtable;
 350         unsigned int i;
 351
 352         isp_reg_writel(isp, ISPPRV_REDGAMMA_TABLE_ADDR,
 353                        OMAP3_ISP_IOMEM_PREV, ISPPRV_SET_TBL_ADDR);
 354         for (i = 0; i < OMAP3ISP_PREV_GAMMA_TBL_SIZE; i++)
 355                 isp_reg_writel(isp, gt->red[i], OMAP3_ISP_IOMEM_PREV,
 356                                ISPPRV_SET_TBL_DATA);
 357
 358         isp_reg_writel(isp, ISPPRV_GREENGAMMA_TABLE_ADDR,
 359                        OMAP3_ISP_IOMEM_PREV, ISPPRV_SET_TBL_ADDR);
 360         for (i = 0; i < OMAP3ISP_PREV_GAMMA_TBL_SIZE; i++)
 361                 isp_reg_writel(isp, gt->green[i], OMAP3_ISP_IOMEM_PREV,
 362                                ISPPRV_SET_TBL_DATA);
 363
 364         isp_reg_writel(isp, ISPPRV_BLUEGAMMA_TABLE_ADDR,
 365                        OMAP3_ISP_IOMEM_PREV, ISPPRV_SET_TBL_ADDR);
 366         for (i = 0; i < OMAP3ISP_PREV_GAMMA_TBL_SIZE; i++)
 367                 isp_reg_writel(isp, gt->blue[i], OMAP3_ISP_IOMEM_PREV,
 368                                ISPPRV_SET_TBL_DATA);
 369 }
 370
 371 /*
 372  * preview_config_luma_enhancement - Sets the Luminance Enhancement table.
 373  * @ytable: Structure containing the table for Luminance Enhancement table.
 374  */
 375 static void
 376 preview_config_luma_enhancement(struct isp_prev_device *prev,
 377                                 const void *ytable)
 378 {
 379         struct isp_device *isp = to_isp_device(prev);
 380         const struct omap3isp_prev_luma *yt = ytable;
 381         unsigned int i;
 382
 383         isp_reg_writel(isp, ISPPRV_YENH_TABLE_ADDR,
 384                        OMAP3_ISP_IOMEM_PREV, ISPPRV_SET_TBL_ADDR);
 385         for (i = 0; i < OMAP3ISP_PREV_YENH_TBL_SIZE; i++) {
 386                 isp_reg_writel(isp, yt->table[i],
 387                                OMAP3_ISP_IOMEM_PREV, ISPPRV_SET_TBL_DATA);
 388         }
 389 }
 390
 391 /*
 392  * preview_config_chroma_suppression - Configures the Chroma Suppression.
 393  * @csup: Structure containing the threshold value for suppression
 394  *        and the hypass filter enable flag.
 395  */
 396 static void
 397 preview_config_chroma_suppression(struct isp_prev_device *prev,
 398                                   const void *csup)
 399 {
 400         struct isp_device *isp = to_isp_device(prev);
 401         const struct omap3isp_prev_csup *cs = csup;
 402
 403         isp_reg_writel(isp,
 404                        cs->gain | (cs->thres << ISPPRV_CSUP_THRES_SHIFT) |
 405                        (cs->hypf_en << ISPPRV_CSUP_HPYF_SHIFT),
 406                        OMAP3_ISP_IOMEM_PREV, ISPPRV_CSUP);
 407 }
 408
 409 /*
 410  * preview_enable_noisefilter - Enables/Disables the Noise Filter.
 411  * @enable: 1 - Enables the Noise Filter.
 412  */
 413 static void
 414 preview_enable_noisefilter(struct isp_prev_device *prev, u8 enable)
 415 {
 416         struct isp_device *isp = to_isp_device(prev);
 417
 418         if (enable)
 419                 isp_reg_set(isp, OMAP3_ISP_IOMEM_PREV, ISPPRV_PCR,
 420                             ISPPRV_PCR_NFEN);
 421         else
 422                 isp_reg_clr(isp, OMAP3_ISP_IOMEM_PREV, ISPPRV_PCR,
 423                             ISPPRV_PCR_NFEN);
 424 }
 425
 426 /*
 427  * preview_enable_dcor - Enables/Disables the defect correction.
 428  * @enable: 1 - Enables the defect correction.
 429  */
 430 static void
 431 preview_enable_dcor(struct isp_prev_device *prev, u8 enable)
 432 {
 433         struct isp_device *isp = to_isp_device(prev);
 434
 435         if (enable)
 436                 isp_reg_set(isp, OMAP3_ISP_IOMEM_PREV, ISPPRV_PCR,
 437                             ISPPRV_PCR_DCOREN);
 438         else
 439                 isp_reg_clr(isp, OMAP3_ISP_IOMEM_PREV, ISPPRV_PCR,
 440                             ISPPRV_PCR_DCOREN);
 441 }
 442
 443 /*
 444  * preview_enable_cfa - Enable/Disable the CFA Interpolation.
 445  * @enable: 1 - Enables the CFA.
 446  */
 447 static void
 448 preview_enable_cfa(struct isp_prev_device *prev, u8 enable)
 449 {
 450         struct isp_device *isp = to_isp_device(prev);
 451
 452         if (enable)
 453                 isp_reg_set(isp, OMAP3_ISP_IOMEM_PREV, ISPPRV_PCR,
 454                             ISPPRV_PCR_CFAEN);
 455         else
 456                 isp_reg_clr(isp, OMAP3_ISP_IOMEM_PREV, ISPPRV_PCR,
 457                             ISPPRV_PCR_CFAEN);
 458 }
 459
 460 /*
 461  * preview_enable_gammabypass - Enables/Disables the GammaByPass
 462  * @enable: 1 - Bypasses Gamma - 10bit input is cropped to 8MSB.
 463  *          0 - Goes through Gamma Correction. input and output is 10bit.
 464  */
 465 static void
 466 preview_enable_gammabypass(struct isp_prev_device *prev, u8 enable)
 467 {
 468         struct isp_device *isp = to_isp_device(prev);
 469
 470         if (enable)
 471                 isp_reg_set(isp, OMAP3_ISP_IOMEM_PREV, ISPPRV_PCR,
 472                             ISPPRV_PCR_GAMMA_BYPASS);
 473         else
 474                 isp_reg_clr(isp, OMAP3_ISP_IOMEM_PREV, ISPPRV_PCR,
 475                             ISPPRV_PCR_GAMMA_BYPASS);
 476 }
 477
 478 /*
 479  * preview_enable_luma_enhancement - Enables/Disables Luminance Enhancement
 480  * @enable: 1 - Enable the Luminance Enhancement.
 481  */
 482 static void
 483 preview_enable_luma_enhancement(struct isp_prev_device *prev, u8 enable)
 484 {
 485         struct isp_device *isp = to_isp_device(prev);
 486
 487         if (enable)
 488                 isp_reg_set(isp, OMAP3_ISP_IOMEM_PREV, ISPPRV_PCR,
 489                             ISPPRV_PCR_YNENHEN);
 490         else
 491                 isp_reg_clr(isp, OMAP3_ISP_IOMEM_PREV, ISPPRV_PCR,
 492                             ISPPRV_PCR_YNENHEN);
 493 }
 494
 495 /*
 496  * preview_enable_chroma_suppression - Enables/Disables Chrominance Suppr.
 497  * @enable: 1 - Enable the Chrominance Suppression.
 498  */
 499 static void
 500 preview_enable_chroma_suppression(struct isp_prev_device *prev, u8 enable)
 501 {
 502         struct isp_device *isp = to_isp_device(prev);
 503
 504         if (enable)
 505                 isp_reg_set(isp, OMAP3_ISP_IOMEM_PREV, ISPPRV_PCR,
 506                             ISPPRV_PCR_SUPEN);
 507         else
 508                 isp_reg_clr(isp, OMAP3_ISP_IOMEM_PREV, ISPPRV_PCR,
 509                             ISPPRV_PCR_SUPEN);
 510 }
 511
 512 /*
 513  * preview_config_whitebalance - Configures the White Balance parameters.
 514  * @prev_wbal: Structure containing the digital gain and white balance
 515  *             coefficient.
 516  *
 517  * Coefficient matrix always with default values.
 518  */
 519 static void
 520 preview_config_whitebalance(struct isp_prev_device *prev, const void *prev_wbal)
 521 {
 522         struct isp_device *isp = to_isp_device(prev);
 523         const struct omap3isp_prev_wbal *wbal = prev_wbal;
 524         u32 val;
 525
 526         isp_reg_writel(isp, wbal->dgain, OMAP3_ISP_IOMEM_PREV, ISPPRV_WB_DGAIN);
 527
 528         val = wbal->coef0 << ISPPRV_WBGAIN_COEF0_SHIFT;
 529         val |= wbal->coef1 << ISPPRV_WBGAIN_COEF1_SHIFT;
 530         val |= wbal->coef2 << ISPPRV_WBGAIN_COEF2_SHIFT;
 531         val |= wbal->coef3 << ISPPRV_WBGAIN_COEF3_SHIFT;
 532         isp_reg_writel(isp, val, OMAP3_ISP_IOMEM_PREV, ISPPRV_WBGAIN);
 533
 534         isp_reg_writel(isp,
 535                        ISPPRV_WBSEL_COEF0 << ISPPRV_WBSEL_N0_0_SHIFT |
 536                        ISPPRV_WBSEL_COEF1 << ISPPRV_WBSEL_N0_1_SHIFT |
 537                        ISPPRV_WBSEL_COEF0 << ISPPRV_WBSEL_N0_2_SHIFT |
 538                        ISPPRV_WBSEL_COEF1 << ISPPRV_WBSEL_N0_3_SHIFT |
 539                        ISPPRV_WBSEL_COEF2 << ISPPRV_WBSEL_N1_0_SHIFT |
 540                        ISPPRV_WBSEL_COEF3 << ISPPRV_WBSEL_N1_1_SHIFT |
 541                        ISPPRV_WBSEL_COEF2 << ISPPRV_WBSEL_N1_2_SHIFT |
 542                        ISPPRV_WBSEL_COEF3 << ISPPRV_WBSEL_N1_3_SHIFT |
 543                        ISPPRV_WBSEL_COEF0 << ISPPRV_WBSEL_N2_0_SHIFT |
 544                        ISPPRV_WBSEL_COEF1 << ISPPRV_WBSEL_N2_1_SHIFT |
 545                        ISPPRV_WBSEL_COEF0 << ISPPRV_WBSEL_N2_2_SHIFT |
 546                        ISPPRV_WBSEL_COEF1 << ISPPRV_WBSEL_N2_3_SHIFT |
 547                        ISPPRV_WBSEL_COEF2 << ISPPRV_WBSEL_N3_0_SHIFT |
 548                        ISPPRV_WBSEL_COEF3 << ISPPRV_WBSEL_N3_1_SHIFT |
 549                        ISPPRV_WBSEL_COEF2 << ISPPRV_WBSEL_N3_2_SHIFT |
 550                        ISPPRV_WBSEL_COEF3 << ISPPRV_WBSEL_N3_3_SHIFT,
 551                        OMAP3_ISP_IOMEM_PREV, ISPPRV_WBSEL);
 552 }
 553
 554 /*
 555  * preview_config_blkadj - Configures the Black Adjustment parameters.
 556  * @prev_blkadj: Structure containing the black adjustment towards red, green,
 557  *               blue.
 558  */
 559 static void
 560 preview_config_blkadj(struct isp_prev_device *prev, const void *prev_blkadj)
 561 {
 562         struct isp_device *isp = to_isp_device(prev);
 563         const struct omap3isp_prev_blkadj *blkadj = prev_blkadj;
 564
 565         isp_reg_writel(isp, (blkadj->blue << ISPPRV_BLKADJOFF_B_SHIFT) |
 566                        (blkadj->green << ISPPRV_BLKADJOFF_G_SHIFT) |
 567                        (blkadj->red << ISPPRV_BLKADJOFF_R_SHIFT),
 568                        OMAP3_ISP_IOMEM_PREV, ISPPRV_BLKADJOFF);
 569 }
 570
 571 /*
 572  * preview_config_rgb_blending - Configures the RGB-RGB Blending matrix.
 573  * @rgb2rgb: Structure containing the rgb to rgb blending matrix and the rgb
 574  *           offset.
 575  */
 576 static void
 577 preview_config_rgb_blending(struct isp_prev_device *prev, const void *rgb2rgb)
 578 {
 579         struct isp_device *isp = to_isp_device(prev);
 580         const struct omap3isp_prev_rgbtorgb *rgbrgb = rgb2rgb;
 581         u32 val;
 582
 583         val = (rgbrgb->matrix[0][0] & 0xfff) << ISPPRV_RGB_MAT1_MTX_RR_SHIFT;
 584         val |= (rgbrgb->matrix[0][1] & 0xfff) << ISPPRV_RGB_MAT1_MTX_GR_SHIFT;
 585         isp_reg_writel(isp, val, OMAP3_ISP_IOMEM_PREV, ISPPRV_RGB_MAT1);
 586
 587         val = (rgbrgb->matrix[0][2] & 0xfff) << ISPPRV_RGB_MAT2_MTX_BR_SHIFT;
 588         val |= (rgbrgb->matrix[1][0] & 0xfff) << ISPPRV_RGB_MAT2_MTX_RG_SHIFT;
 589         isp_reg_writel(isp, val, OMAP3_ISP_IOMEM_PREV, ISPPRV_RGB_MAT2);
 590
 591         val = (rgbrgb->matrix[1][1] & 0xfff) << ISPPRV_RGB_MAT3_MTX_GG_SHIFT;
 592         val |= (rgbrgb->matrix[1][2] & 0xfff) << ISPPRV_RGB_MAT3_MTX_BG_SHIFT;
 593         isp_reg_writel(isp, val, OMAP3_ISP_IOMEM_PREV, ISPPRV_RGB_MAT3);
 594
 595         val = (rgbrgb->matrix[2][0] & 0xfff) << ISPPRV_RGB_MAT4_MTX_RB_SHIFT;
 596         val |= (rgbrgb->matrix[2][1] & 0xfff) << ISPPRV_RGB_MAT4_MTX_GB_SHIFT;
 597         isp_reg_writel(isp, val, OMAP3_ISP_IOMEM_PREV, ISPPRV_RGB_MAT4);
 598
 599         val = (rgbrgb->matrix[2][2] & 0xfff) << ISPPRV_RGB_MAT5_MTX_BB_SHIFT;
 600         isp_reg_writel(isp, val, OMAP3_ISP_IOMEM_PREV, ISPPRV_RGB_MAT5);
 601
 602         val = (rgbrgb->offset[0] & 0x3ff) << ISPPRV_RGB_OFF1_MTX_OFFR_SHIFT;
 603         val |= (rgbrgb->offset[1] & 0x3ff) << ISPPRV_RGB_OFF1_MTX_OFFG_SHIFT;
 604         isp_reg_writel(isp, val, OMAP3_ISP_IOMEM_PREV, ISPPRV_RGB_OFF1);
 605
 606         val = (rgbrgb->offset[2] & 0x3ff) << ISPPRV_RGB_OFF2_MTX_OFFB_SHIFT;
 607         isp_reg_writel(isp, val, OMAP3_ISP_IOMEM_PREV, ISPPRV_RGB_OFF2);
 608 }
 609
 610 /*
 611  * Configures the color space conversion (RGB toYCbYCr) matrix
 612  * @prev_csc: Structure containing the RGB to YCbYCr matrix and the
 613  *            YCbCr offset.
 614  */
 615 static void
 616 preview_config_csc(struct isp_prev_device *prev, const void *prev_csc)
 617 {
 618         struct isp_device *isp = to_isp_device(prev);
 619         const struct omap3isp_prev_csc *csc = prev_csc;
 620         u32 val;
 621
 622         val = (csc->matrix[0][0] & 0x3ff) << ISPPRV_CSC0_RY_SHIFT;
 623         val |= (csc->matrix[0][1] & 0x3ff) << ISPPRV_CSC0_GY_SHIFT;
 624         val |= (csc->matrix[0][2] & 0x3ff) << ISPPRV_CSC0_BY_SHIFT;
 625         isp_reg_writel(isp, val, OMAP3_ISP_IOMEM_PREV, ISPPRV_CSC0);
 626
 627         val = (csc->matrix[1][0] & 0x3ff) << ISPPRV_CSC1_RCB_SHIFT;
 628         val |= (csc->matrix[1][1] & 0x3ff) << ISPPRV_CSC1_GCB_SHIFT;
 629         val |= (csc->matrix[1][2] & 0x3ff) << ISPPRV_CSC1_BCB_SHIFT;
 630         isp_reg_writel(isp, val, OMAP3_ISP_IOMEM_PREV, ISPPRV_CSC1);
 631
 632         val = (csc->matrix[2][0] & 0x3ff) << ISPPRV_CSC2_RCR_SHIFT;
 633         val |= (csc->matrix[2][1] & 0x3ff) << ISPPRV_CSC2_GCR_SHIFT;
 634         val |= (csc->matrix[2][2] & 0x3ff) << ISPPRV_CSC2_BCR_SHIFT;
 635         isp_reg_writel(isp, val, OMAP3_ISP_IOMEM_PREV, ISPPRV_CSC2);
 636
 637         val = (csc->offset[0] & 0xff) << ISPPRV_CSC_OFFSET_Y_SHIFT;
 638         val |= (csc->offset[1] & 0xff) << ISPPRV_CSC_OFFSET_CB_SHIFT;
 639         val |= (csc->offset[2] & 0xff) << ISPPRV_CSC_OFFSET_CR_SHIFT;
 640         isp_reg_writel(isp, val, OMAP3_ISP_IOMEM_PREV, ISPPRV_CSC_OFFSET);
 641 }
 642
 643 /*
 644  * preview_update_contrast - Updates the contrast.
 645  * @contrast: Pointer to hold the current programmed contrast value.
 646  *
 647  * Value should be programmed before enabling the module.
 648  */
 649 static void
 650 preview_update_contrast(struct isp_prev_device *prev, u8 contrast)
 651 {
 652         struct prev_params *params;
 653         unsigned long flags;
 654
 655         spin_lock_irqsave(&prev->params.lock, flags);
 656         params = (prev->params.active & OMAP3ISP_PREV_CONTRAST)
 657                ? &prev->params.params[0] : &prev->params.params[1];
 658
 659         if (params->contrast != (contrast * ISPPRV_CONTRAST_UNITS)) {
 660                 params->contrast = contrast * ISPPRV_CONTRAST_UNITS;
 661                 params->update |= OMAP3ISP_PREV_CONTRAST;
 662         }
 663         spin_unlock_irqrestore(&prev->params.lock, flags);
 664 }
 665
 666 /*
 667  * preview_config_contrast - Configures the Contrast.
 668  * @params: Contrast value (u8 pointer, U8Q0 format).
 669  *
 670  * Value should be programmed before enabling the module.
 671  */
 672 static void
 673 preview_config_contrast(struct isp_prev_device *prev, const void *params)
 674 {
 675         struct isp_device *isp = to_isp_device(prev);
 676
 677         isp_reg_clr_set(isp, OMAP3_ISP_IOMEM_PREV, ISPPRV_CNT_BRT,
 678                         0xff << ISPPRV_CNT_BRT_CNT_SHIFT,
 679                         *(u8 *)params << ISPPRV_CNT_BRT_CNT_SHIFT);
 680 }
 681
 682 /*
 683  * preview_update_brightness - Updates the brightness in preview module.
 684  * @brightness: Pointer to hold the current programmed brightness value.
 685  *
 686  */
 687 static void
 688 preview_update_brightness(struct isp_prev_device *prev, u8 brightness)
 689 {
 690         struct prev_params *params;
 691         unsigned long flags;
 692
 693         spin_lock_irqsave(&prev->params.lock, flags);
 694         params = (prev->params.active & OMAP3ISP_PREV_BRIGHTNESS)
 695                ? &prev->params.params[0] : &prev->params.params[1];
 696
 697         if (params->brightness != (brightness * ISPPRV_BRIGHT_UNITS)) {
 698                 params->brightness = brightness * ISPPRV_BRIGHT_UNITS;
 699                 params->update |= OMAP3ISP_PREV_BRIGHTNESS;
 700         }
 701         spin_unlock_irqrestore(&prev->params.lock, flags);
 702 }
 703
 704 /*
 705  * preview_config_brightness - Configures the brightness.
 706  * @params: Brightness value (u8 pointer, U8Q0 format).
 707  */
 708 static void
 709 preview_config_brightness(struct isp_prev_device *prev, const void *params)
 710 {
 711         struct isp_device *isp = to_isp_device(prev);
 712
 713         isp_reg_clr_set(isp, OMAP3_ISP_IOMEM_PREV, ISPPRV_CNT_BRT,
 714                         0xff << ISPPRV_CNT_BRT_BRT_SHIFT,
 715                         *(u8 *)params << ISPPRV_CNT_BRT_BRT_SHIFT);
 716 }
 717
 718 /*
 719  * preview_config_yc_range - Configures the max and min Y and C values.
 720  * @yclimit: Structure containing the range of Y and C values.
 721  */
 722 static void
 723 preview_config_yc_range(struct isp_prev_device *prev, const void *yclimit)
 724 {
 725         struct isp_device *isp = to_isp_device(prev);
 726         const struct omap3isp_prev_yclimit *yc = yclimit;
 727
 728         isp_reg_writel(isp,
 729                        yc->maxC << ISPPRV_SETUP_YC_MAXC_SHIFT |
 730                        yc->maxY << ISPPRV_SETUP_YC_MAXY_SHIFT |
 731                        yc->minC << ISPPRV_SETUP_YC_MINC_SHIFT |
 732                        yc->minY << ISPPRV_SETUP_YC_MINY_SHIFT,
 733                        OMAP3_ISP_IOMEM_PREV, ISPPRV_SETUP_YC);
 734 }
 735
 736 static u32
 737 preview_params_lock(struct isp_prev_device *prev, u32 update, bool shadow)
 738 {
 739         u32 active = prev->params.active;
 740
 741         if (shadow) {
 742                 /* Mark all shadow parameters we are going to touch as busy. */
 743                 prev->params.params[0].busy |= ~active & update;
 744                 prev->params.params[1].busy |= active & update;
 745         } else {
 746                 /* Mark all active parameters we are going to touch as busy. */
 747                 update = (prev->params.params[0].update & active)
 748                        | (prev->params.params[1].update & ~active);
 749
 750                 prev->params.params[0].busy |= active & update;
 751                 prev->params.params[1].busy |= ~active & update;
 752         }
 753
 754         return update;
 755 }
 756
 757 static void
 758 preview_params_unlock(struct isp_prev_device *prev, u32 update, bool shadow)
 759 {
 760         u32 active = prev->params.active;
 761
 762         if (shadow) {
 763                 /* Set the update flag for shadow parameters that have been
 764                  * updated and clear the busy flag for all shadow parameters.
 765                  */
 766                 prev->params.params[0].update |= (~active & update);
 767                 prev->params.params[1].update |= (active & update);
 768                 prev->params.params[0].busy &= active;
 769                 prev->params.params[1].busy &= ~active;
 770         } else {
 771                 /* Clear the update flag for active parameters that have been
 772                  * applied and the busy flag for all active parameters.
 773                  */
 774                 prev->params.params[0].update &= ~(active & update);
 775                 prev->params.params[1].update &= ~(~active & update);
 776                 prev->params.params[0].busy &= ~active;
 777                 prev->params.params[1].busy &= active;
 778         }
 779 }
 780
 781 static void preview_params_switch(struct isp_prev_device *prev)
 782 {
 783         u32 to_switch;
 784
 785         /* Switch active parameters with updated shadow parameters when the
 786          * shadow parameter has been updated and neither the active not the
 787          * shadow parameter is busy.
 788          */
 789         to_switch = (prev->params.params[0].update & ~prev->params.active)
 790                   | (prev->params.params[1].update & prev->params.active);
 791         to_switch &= ~(prev->params.params[0].busy |
 792                        prev->params.params[1].busy);
 793         if (to_switch == 0)
 794                 return;
 795
 796         prev->params.active ^= to_switch;
 797
 798         /* Remove the update flag for the shadow copy of parameters we have
 799          * switched.
 800          */
 801         prev->params.params[0].update &= ~(~prev->params.active & to_switch);
 802         prev->params.params[1].update &= ~(prev->params.active & to_switch);
 803 }
 804
 805 /* preview parameters update structure */
 806 struct preview_update {
 807         void (*config)(struct isp_prev_device *, const void *);
 808         void (*enable)(struct isp_prev_device *, u8);
 809         unsigned int param_offset;
 810         unsigned int param_size;
 811         unsigned int config_offset;
 812         bool skip;
 813 };
 814
 815 /* Keep the array indexed by the OMAP3ISP_PREV_* bit number. */
 816 static const struct preview_update update_attrs[] = {
 817         /* OMAP3ISP_PREV_LUMAENH */ {
 818                 preview_config_luma_enhancement,
 819                 preview_enable_luma_enhancement,
 820                 offsetof(struct prev_params, luma),
 821                 FIELD_SIZEOF(struct prev_params, luma),
 822                 offsetof(struct omap3isp_prev_update_config, luma),
 823         }, /* OMAP3ISP_PREV_INVALAW */ {
 824                 NULL,
 825                 preview_enable_invalaw,
 826         }, /* OMAP3ISP_PREV_HRZ_MED */ {
 827                 preview_config_hmed,
 828                 preview_enable_hmed,
 829                 offsetof(struct prev_params, hmed),
 830                 FIELD_SIZEOF(struct prev_params, hmed),
 831                 offsetof(struct omap3isp_prev_update_config, hmed),
 832         }, /* OMAP3ISP_PREV_CFA */ {
 833                 preview_config_cfa,
 834                 preview_enable_cfa,
 835                 offsetof(struct prev_params, cfa),
 836                 FIELD_SIZEOF(struct prev_params, cfa),
 837                 offsetof(struct omap3isp_prev_update_config, cfa),
 838         }, /* OMAP3ISP_PREV_CHROMA_SUPP */ {
 839                 preview_config_chroma_suppression,
 840                 preview_enable_chroma_suppression,
 841                 offsetof(struct prev_params, csup),
 842                 FIELD_SIZEOF(struct prev_params, csup),
 843                 offsetof(struct omap3isp_prev_update_config, csup),
 844         }, /* OMAP3ISP_PREV_WB */ {
 845                 preview_config_whitebalance,
 846                 NULL,
 847                 offsetof(struct prev_params, wbal),
 848                 FIELD_SIZEOF(struct prev_params, wbal),
 849                 offsetof(struct omap3isp_prev_update_config, wbal),
 850         }, /* OMAP3ISP_PREV_BLKADJ */ {
 851                 preview_config_blkadj,
 852                 NULL,
 853                 offsetof(struct prev_params, blkadj),
 854                 FIELD_SIZEOF(struct prev_params, blkadj),
 855                 offsetof(struct omap3isp_prev_update_config, blkadj),
 856         }, /* OMAP3ISP_PREV_RGB2RGB */ {
 857                 preview_config_rgb_blending,
 858                 NULL,
 859                 offsetof(struct prev_params, rgb2rgb),
 860                 FIELD_SIZEOF(struct prev_params, rgb2rgb),
 861                 offsetof(struct omap3isp_prev_update_config, rgb2rgb),
 862         }, /* OMAP3ISP_PREV_COLOR_CONV */ {
 863                 preview_config_csc,
 864                 NULL,
 865                 offsetof(struct prev_params, csc),
 866                 FIELD_SIZEOF(struct prev_params, csc),
 867                 offsetof(struct omap3isp_prev_update_config, csc),
 868         }, /* OMAP3ISP_PREV_YC_LIMIT */ {
 869                 preview_config_yc_range,
 870                 NULL,
 871                 offsetof(struct prev_params, yclimit),
 872                 FIELD_SIZEOF(struct prev_params, yclimit),
 873                 offsetof(struct omap3isp_prev_update_config, yclimit),
 874         }, /* OMAP3ISP_PREV_DEFECT_COR */ {
 875                 preview_config_dcor,
 876                 preview_enable_dcor,
 877                 offsetof(struct prev_params, dcor),
 878                 FIELD_SIZEOF(struct prev_params, dcor),
 879                 offsetof(struct omap3isp_prev_update_config, dcor),
 880         }, /* OMAP3ISP_PREV_GAMMABYPASS */ {
 881                 NULL,
 882                 preview_enable_gammabypass,
 883         }, /* OMAP3ISP_PREV_DRK_FRM_CAPTURE */ {
 884                 NULL,
 885                 preview_enable_drkframe_capture,
 886         }, /* OMAP3ISP_PREV_DRK_FRM_SUBTRACT */ {
 887                 NULL,
 888                 preview_enable_drkframe,
 889         }, /* OMAP3ISP_PREV_LENS_SHADING */ {
 890                 preview_config_drkf_shadcomp,
 891                 preview_enable_drkframe,
 892         }, /* OMAP3ISP_PREV_NF */ {
 893                 preview_config_noisefilter,
 894                 preview_enable_noisefilter,
 895                 offsetof(struct prev_params, nf),
 896                 FIELD_SIZEOF(struct prev_params, nf),
 897                 offsetof(struct omap3isp_prev_update_config, nf),
 898         }, /* OMAP3ISP_PREV_GAMMA */ {
 899                 preview_config_gammacorrn,
 900                 NULL,
 901                 offsetof(struct prev_params, gamma),
 902                 FIELD_SIZEOF(struct prev_params, gamma),
 903                 offsetof(struct omap3isp_prev_update_config, gamma),
 904         }, /* OMAP3ISP_PREV_CONTRAST */ {
 905                 preview_config_contrast,
 906                 NULL,
 907                 offsetof(struct prev_params, contrast),
 908                 0, true,
 909         }, /* OMAP3ISP_PREV_BRIGHTNESS */ {
 910                 preview_config_brightness,
 911                 NULL,
 912                 offsetof(struct prev_params, brightness),
 913                 0, true,
 914         },
 915 };
 916
 917 /*
 918  * preview_config - Copy and update local structure with userspace preview
 919  *                  configuration.
 920  * @prev: ISP preview engine
 921  * @cfg: Configuration
 922  *
 923  * Return zero if success or -EFAULT if the configuration can't be copied from
 924  * userspace.
 925  */
 926 static int preview_config(struct isp_prev_device *prev,
 927                           struct omap3isp_prev_update_config *cfg)
 928 {
 929         unsigned long flags;
 930         unsigned int i;
 931         int rval = 0;
 932         u32 update;
 933         u32 active;
 934
 935         if (cfg->update == 0)
 936                 return 0;
 937
 938         /* Mark the shadow parameters we're going to update as busy. */
 939         spin_lock_irqsave(&prev->params.lock, flags);
 940         preview_params_lock(prev, cfg->update, true);
 941         active = prev->params.active;
 942         spin_unlock_irqrestore(&prev->params.lock, flags);
 943
 944         update = 0;
 945
 946         for (i = 0; i < ARRAY_SIZE(update_attrs); i++) {
 947                 const struct preview_update *attr = &update_attrs[i];
 948                 struct prev_params *params;
 949                 unsigned int bit = 1 << i;
 950
 951                 if (attr->skip || !(cfg->update & bit))
 952                         continue;
 953
 954                 params = &prev->params.params[!!(active & bit)];
 955
 956                 if (cfg->flag & bit) {
 957                         void __user *from = *(void * __user *)
 958                                 ((void *)cfg + attr->config_offset);
 959                         void *to = (void *)params + attr->param_offset;
 960                         size_t size = attr->param_size;
 961
 962                         if (to && from && size) {
 963                                 if (copy_from_user(to, from, size)) {
 964                                         rval = -EFAULT;
 965                                         break;
 966                                 }
 967                         }
 968                         params->features |= bit;
 969                 } else {
 970                         params->features &= ~bit;
 971                 }
 972
 973                 update |= bit;
 974         }
 975
 976         spin_lock_irqsave(&prev->params.lock, flags);
 977         preview_params_unlock(prev, update, true);
 978         preview_params_switch(prev);
 979         spin_unlock_irqrestore(&prev->params.lock, flags);
 980
 981         return rval;
 982 }
 983
 984 /*
 985  * preview_setup_hw - Setup preview registers and/or internal memory
 986  * @prev: pointer to preview private structure
 987  * @update: Bitmask of parameters to setup
 988  * @active: Bitmask of parameters active in set 0
 989  * Note: can be called from interrupt context
 990  * Return none
 991  */
 992 static void preview_setup_hw(struct isp_prev_device *prev, u32 update,
 993                              u32 active)
 994 {
 995         unsigned int i;
 996         u32 features;
 997
 998         if (update == 0)
 999                 return;
1000
1001         features = (prev->params.params[0].features & active)
1002                  | (prev->params.params[1].features & ~active);
1003
1004         for (i = 0; i < ARRAY_SIZE(update_attrs); i++) {
1005                 const struct preview_update *attr = &update_attrs[i];
1006                 struct prev_params *params;
1007                 unsigned int bit = 1 << i;
1008                 void *param_ptr;
1009
1010                 if (!(update & bit))
1011                         continue;
1012
1013                 params = &prev->params.params[!(active & bit)];
1014
1015                 if (params->features & bit) {
1016                         if (attr->config) {
1017                                 param_ptr = (void *)params + attr->param_offset;
1018                                 attr->config(prev, param_ptr);
1019                         }
1020                         if (attr->enable)
1021                                 attr->enable(prev, 1);
1022                 } else {
1023                         if (attr->enable)
1024                                 attr->enable(prev, 0);
1025                 }
1026         }
1027 }
1028
1029 /*
1030  * preview_config_ycpos - Configure byte layout of YUV image.
1031  * @mode: Indicates the required byte layout.
1032  */
1033 static void
1034 preview_config_ycpos(struct isp_prev_device *prev,
1035                      enum v4l2_mbus_pixelcode pixelcode)
1036 {
1037         struct isp_device *isp = to_isp_device(prev);
1038         enum preview_ycpos_mode mode;
1039
1040         switch (pixelcode) {
1041         case V4L2_MBUS_FMT_YUYV8_1X16:
1042                 mode = YCPOS_CrYCbY;
1043                 break;
1044         case V4L2_MBUS_FMT_UYVY8_1X16:
1045                 mode = YCPOS_YCrYCb;
1046                 break;
1047         default:
1048                 return;
1049         }
1050
1051         isp_reg_clr_set(isp, OMAP3_ISP_IOMEM_PREV, ISPPRV_PCR,
1052                         ISPPRV_PCR_YCPOS_CrYCbY,
1053                         mode << ISPPRV_PCR_YCPOS_SHIFT);
1054 }
1055
1056 /*
1057  * preview_config_averager - Enable / disable / configure averager
1058  * @average: Average value to be configured.
1059  */
1060 static void preview_config_averager(struct isp_prev_device *prev, u8 average)
1061 {
1062         struct isp_device *isp = to_isp_device(prev);
1063         struct prev_params *params;
1064         int reg = 0;
1065
1066         params = (prev->params.active & OMAP3ISP_PREV_CFA)
1067                ? &prev->params.params[0] : &prev->params.params[1];
1068
1069         if (params->cfa.format == OMAP3ISP_CFAFMT_BAYER)
1070                 reg = ISPPRV_AVE_EVENDIST_2 << ISPPRV_AVE_EVENDIST_SHIFT |
1071                       ISPPRV_AVE_ODDDIST_2 << ISPPRV_AVE_ODDDIST_SHIFT |
1072                       average;
1073         else if (params->cfa.format == OMAP3ISP_CFAFMT_RGBFOVEON)
1074                 reg = ISPPRV_AVE_EVENDIST_3 << ISPPRV_AVE_EVENDIST_SHIFT |
1075                       ISPPRV_AVE_ODDDIST_3 << ISPPRV_AVE_ODDDIST_SHIFT |
1076                       average;
1077         isp_reg_writel(isp, reg, OMAP3_ISP_IOMEM_PREV, ISPPRV_AVE);
1078 }
1079
1080 /*
1081  * preview_config_input_size - Configure the input frame size
1082  *
1083  * The preview engine crops several rows and columns internally depending on
1084  * which processing blocks are enabled. The driver assumes all those blocks are
1085  * enabled when reporting source pad formats to userspace. If this assumption is
1086  * not true, rows and columns must be manually cropped at the preview engine
1087  * input to avoid overflows at the end of lines and frames.
1088  *
1089  * See the explanation at the PREV_MARGIN_* definitions for more details.
1090  */
1091 static void preview_config_input_size(struct isp_prev_device *prev, u32 active)
1092 {
1093         struct isp_device *isp = to_isp_device(prev);
1094         unsigned int sph = prev->crop.left;
1095         unsigned int eph = prev->crop.left + prev->crop.width - 1;
1096         unsigned int slv = prev->crop.top;
1097         unsigned int elv = prev->crop.top + prev->crop.height - 1;
1098         u32 features;
1099
1100         features = (prev->params.params[0].features & active)
1101                  | (prev->params.params[1].features & ~active);
1102
1103         if (features & OMAP3ISP_PREV_CFA) {
1104                 sph -= 2;
1105                 eph += 2;
1106                 slv -= 2;
1107                 elv += 2;
1108         }
1109         if (features & (OMAP3ISP_PREV_DEFECT_COR | OMAP3ISP_PREV_NF)) {
1110                 sph -= 2;
1111                 eph += 2;
1112                 slv -= 2;
1113                 elv += 2;
1114         }
1115         if (features & OMAP3ISP_PREV_HRZ_MED) {
1116                 sph -= 2;
1117                 eph += 2;
1118         }
1119         if (features & (OMAP3ISP_PREV_CHROMA_SUPP | OMAP3ISP_PREV_LUMAENH))
1120                 sph -= 2;
1121
1122         isp_reg_writel(isp, (sph << ISPPRV_HORZ_INFO_SPH_SHIFT) | eph,
1123                        OMAP3_ISP_IOMEM_PREV, ISPPRV_HORZ_INFO);
1124         isp_reg_writel(isp, (slv << ISPPRV_VERT_INFO_SLV_SHIFT) | elv,
1125                        OMAP3_ISP_IOMEM_PREV, ISPPRV_VERT_INFO);
1126 }
1127
1128 /*
1129  * preview_config_inlineoffset - Configures the Read address line offset.
1130  * @prev: Preview module
1131  * @offset: Line offset
1132  *
1133  * According to the TRM, the line offset must be aligned on a 32 bytes boundary.
1134  * However, a hardware bug requires the memory start address to be aligned on a
1135  * 64 bytes boundary, so the offset probably should be aligned on 64 bytes as
1136  * well.
1137  */
1138 static void
1139 preview_config_inlineoffset(struct isp_prev_device *prev, u32 offset)
1140 {
1141         struct isp_device *isp = to_isp_device(prev);
1142
1143         isp_reg_writel(isp, offset & 0xffff, OMAP3_ISP_IOMEM_PREV,
1144                        ISPPRV_RADR_OFFSET);
1145 }
1146
1147 /*
1148  * preview_set_inaddr - Sets memory address of input frame.
1149  * @addr: 32bit memory address aligned on 32byte boundary.
1150  *
1151  * Configures the memory address from which the input frame is to be read.
1152  */
1153 static void preview_set_inaddr(struct isp_prev_device *prev, u32 addr)
1154 {
1155         struct isp_device *isp = to_isp_device(prev);
1156
1157         isp_reg_writel(isp, addr, OMAP3_ISP_IOMEM_PREV, ISPPRV_RSDR_ADDR);
1158 }
1159
1160 /*
1161  * preview_config_outlineoffset - Configures the Write address line offset.
1162  * @offset: Line Offset for the preview output.
1163  *
1164  * The offset must be a multiple of 32 bytes.
1165  */
1166 static void preview_config_outlineoffset(struct isp_prev_device *prev,
1167                                     u32 offset)
1168 {
1169         struct isp_device *isp = to_isp_device(prev);
1170
1171         isp_reg_writel(isp, offset & 0xffff, OMAP3_ISP_IOMEM_PREV,
1172                        ISPPRV_WADD_OFFSET);
1173 }
1174
1175 /*
1176  * preview_set_outaddr - Sets the memory address to store output frame
1177  * @addr: 32bit memory address aligned on 32byte boundary.
1178  *
1179  * Configures the memory address to which the output frame is written.
1180  */
1181 static void preview_set_outaddr(struct isp_prev_device *prev, u32 addr)
1182 {
1183         struct isp_device *isp = to_isp_device(prev);
1184
1185         isp_reg_writel(isp, addr, OMAP3_ISP_IOMEM_PREV, ISPPRV_WSDR_ADDR);
1186 }
1187
1188 static void preview_adjust_bandwidth(struct isp_prev_device *prev)
1189 {
1190         struct isp_pipeline *pipe = to_isp_pipeline(&prev->subdev.entity);
1191         struct isp_device *isp = to_isp_device(prev);
1192         const struct v4l2_mbus_framefmt *ifmt = &prev->formats[PREV_PAD_SINK];
1193         unsigned long l3_ick = pipe->l3_ick;
1194         struct v4l2_fract *timeperframe;
1195         unsigned int cycles_per_frame;
1196         unsigned int requests_per_frame;
1197         unsigned int cycles_per_request;
1198         unsigned int minimum;
1199         unsigned int maximum;
1200         unsigned int value;
1201
1202         if (prev->input != PREVIEW_INPUT_MEMORY) {
1203                 isp_reg_clr(isp, OMAP3_ISP_IOMEM_SBL, ISPSBL_SDR_REQ_EXP,
1204                             ISPSBL_SDR_REQ_PRV_EXP_MASK);
1205                 return;
1206         }
1207
1208         /* Compute the minimum number of cycles per request, based on the
1209          * pipeline maximum data rate. This is an absolute lower bound if we
1210          * don't want SBL overflows, so round the value up.
1211          */
1212         cycles_per_request = div_u64((u64)l3_ick / 2 * 256 + pipe->max_rate - 1,
1213                                      pipe->max_rate);
1214         minimum = DIV_ROUND_UP(cycles_per_request, 32);
1215
1216         /* Compute the maximum number of cycles per request, based on the
1217          * requested frame rate. This is a soft upper bound to achieve a frame
1218          * rate equal or higher than the requested value, so round the value
1219          * down.
1220          */
1221         timeperframe = &pipe->max_timeperframe;
1222
1223         requests_per_frame = DIV_ROUND_UP(ifmt->width * 2, 256) * ifmt->height;
1224         cycles_per_frame = div_u64((u64)l3_ick * timeperframe->numerator,
1225                                    timeperframe->denominator);
1226         cycles_per_request = cycles_per_frame / requests_per_frame;
1227
1228         maximum = cycles_per_request / 32;
1229
1230         value = max(minimum, maximum);
1231
1232         dev_dbg(isp->dev, "%s: cycles per request = %u\n", __func__, value);
1233         isp_reg_clr_set(isp, OMAP3_ISP_IOMEM_SBL, ISPSBL_SDR_REQ_EXP,
1234                         ISPSBL_SDR_REQ_PRV_EXP_MASK,
1235                         value << ISPSBL_SDR_REQ_PRV_EXP_SHIFT);
1236 }
1237
1238 /*
1239  * omap3isp_preview_busy - Gets busy state of preview module.
1240  */
1241 int omap3isp_preview_busy(struct isp_prev_device *prev)
1242 {
1243         struct isp_device *isp = to_isp_device(prev);
1244
1245         return isp_reg_readl(isp, OMAP3_ISP_IOMEM_PREV, ISPPRV_PCR)
1246                 & ISPPRV_PCR_BUSY;
1247 }
1248
1249 /*
1250  * omap3isp_preview_restore_context - Restores the values of preview registers
1251  */
1252 void omap3isp_preview_restore_context(struct isp_device *isp)
1253 {
1254         struct isp_prev_device *prev = &isp->isp_prev;
1255         const u32 update = OMAP3ISP_PREV_FEATURES_END - 1;
1256
1257         prev->params.params[0].update = prev->params.active & update;
1258         prev->params.params[1].update = ~prev->params.active & update;
1259
1260         preview_setup_hw(prev, update, prev->params.active);
1261
1262         prev->params.params[0].update = 0;
1263         prev->params.params[1].update = 0;
1264 }
1265
1266 /*
1267  * preview_print_status - Dump preview module registers to the kernel log
1268  */
1269 #define PREV_PRINT_REGISTER(isp, name)\
1270         dev_dbg(isp->dev, "###PRV " #name "=0x%08x\n", \
1271                 isp_reg_readl(isp, OMAP3_ISP_IOMEM_PREV, ISPPRV_##name))
1272
1273 static void preview_print_status(struct isp_prev_device *prev)
1274 {
1275         struct isp_device *isp = to_isp_device(prev);
1276
1277         dev_dbg(isp->dev, "-------------Preview Register dump----------\n");
1278
1279         PREV_PRINT_REGISTER(isp, PCR);
1280         PREV_PRINT_REGISTER(isp, HORZ_INFO);
1281         PREV_PRINT_REGISTER(isp, VERT_INFO);
1282         PREV_PRINT_REGISTER(isp, RSDR_ADDR);
1283         PREV_PRINT_REGISTER(isp, RADR_OFFSET);
1284         PREV_PRINT_REGISTER(isp, DSDR_ADDR);
1285         PREV_PRINT_REGISTER(isp, DRKF_OFFSET);
1286         PREV_PRINT_REGISTER(isp, WSDR_ADDR);
1287         PREV_PRINT_REGISTER(isp, WADD_OFFSET);
1288         PREV_PRINT_REGISTER(isp, AVE);
1289         PREV_PRINT_REGISTER(isp, HMED);
1290         PREV_PRINT_REGISTER(isp, NF);
1291         PREV_PRINT_REGISTER(isp, WB_DGAIN);
1292         PREV_PRINT_REGISTER(isp, WBGAIN);
1293         PREV_PRINT_REGISTER(isp, WBSEL);
1294         PREV_PRINT_REGISTER(isp, CFA);
1295         PREV_PRINT_REGISTER(isp, BLKADJOFF);
1296         PREV_PRINT_REGISTER(isp, RGB_MAT1);
1297         PREV_PRINT_REGISTER(isp, RGB_MAT2);
1298         PREV_PRINT_REGISTER(isp, RGB_MAT3);
1299         PREV_PRINT_REGISTER(isp, RGB_MAT4);
1300         PREV_PRINT_REGISTER(isp, RGB_MAT5);
1301         PREV_PRINT_REGISTER(isp, RGB_OFF1);
1302         PREV_PRINT_REGISTER(isp, RGB_OFF2);
1303         PREV_PRINT_REGISTER(isp, CSC0);
1304         PREV_PRINT_REGISTER(isp, CSC1);
1305         PREV_PRINT_REGISTER(isp, CSC2);
1306         PREV_PRINT_REGISTER(isp, CSC_OFFSET);
1307         PREV_PRINT_REGISTER(isp, CNT_BRT);
1308         PREV_PRINT_REGISTER(isp, CSUP);
1309         PREV_PRINT_REGISTER(isp, SETUP_YC);
1310         PREV_PRINT_REGISTER(isp, SET_TBL_ADDR);
1311         PREV_PRINT_REGISTER(isp, CDC_THR0);
1312         PREV_PRINT_REGISTER(isp, CDC_THR1);
1313         PREV_PRINT_REGISTER(isp, CDC_THR2);
1314         PREV_PRINT_REGISTER(isp, CDC_THR3);
1315
1316         dev_dbg(isp->dev, "--------------------------------------------\n");
1317 }
1318
1319 /*
1320  * preview_init_params - init image processing parameters.
1321  * @prev: pointer to previewer private structure
1322  */
1323 static void preview_init_params(struct isp_prev_device *prev)
1324 {
1325         struct prev_params *params;
1326         unsigned int i;
1327
1328         spin_lock_init(&prev->params.lock);
1329
1330         prev->params.active = ~0;
1331         prev->params.params[0].busy = 0;
1332         prev->params.params[0].update = OMAP3ISP_PREV_FEATURES_END - 1;
1333         prev->params.params[1].busy = 0;
1334         prev->params.params[1].update = 0;
1335
1336         params = &prev->params.params[0];
1337
1338         /* Init values */
1339         params->contrast = ISPPRV_CONTRAST_DEF * ISPPRV_CONTRAST_UNITS;
1340         params->brightness = ISPPRV_BRIGHT_DEF * ISPPRV_BRIGHT_UNITS;
1341         params->cfa.format = OMAP3ISP_CFAFMT_BAYER;
1342         memcpy(params->cfa.table, cfa_coef_table,
1343                sizeof(params->cfa.table));
1344         params->cfa.gradthrs_horz = FLR_CFA_GRADTHRS_HORZ;
1345         params->cfa.gradthrs_vert = FLR_CFA_GRADTHRS_VERT;
1346         params->csup.gain = FLR_CSUP_GAIN;
1347         params->csup.thres = FLR_CSUP_THRES;
1348         params->csup.hypf_en = 0;
1349         memcpy(params->luma.table, luma_enhance_table,
1350                sizeof(params->luma.table));
1351         params->nf.spread = FLR_NF_STRGTH;
1352         memcpy(params->nf.table, noise_filter_table, sizeof(params->nf.table));
1353         params->dcor.couplet_mode_en = 1;
1354         for (i = 0; i < OMAP3ISP_PREV_DETECT_CORRECT_CHANNELS; i++)
1355                 params->dcor.detect_correct[i] = DEF_DETECT_CORRECT_VAL;
1356         memcpy(params->gamma.blue, gamma_table, sizeof(params->gamma.blue));
1357         memcpy(params->gamma.green, gamma_table, sizeof(params->gamma.green));
1358         memcpy(params->gamma.red, gamma_table, sizeof(params->gamma.red));
1359         params->wbal.dgain = FLR_WBAL_DGAIN;
1360         params->wbal.coef0 = FLR_WBAL_COEF;
1361         params->wbal.coef1 = FLR_WBAL_COEF;
1362         params->wbal.coef2 = FLR_WBAL_COEF;
1363         params->wbal.coef3 = FLR_WBAL_COEF;
1364         params->blkadj.red = FLR_BLKADJ_RED;
1365         params->blkadj.green = FLR_BLKADJ_GREEN;
1366         params->blkadj.blue = FLR_BLKADJ_BLUE;
1367         params->rgb2rgb = flr_rgb2rgb;
1368         params->csc = flr_prev_csc;
1369         params->yclimit.minC = ISPPRV_YC_MIN;
1370         params->yclimit.maxC = ISPPRV_YC_MAX;
1371         params->yclimit.minY = ISPPRV_YC_MIN;
1372         params->yclimit.maxY = ISPPRV_YC_MAX;
1373
1374         params->features = OMAP3ISP_PREV_CFA | OMAP3ISP_PREV_DEFECT_COR
1375                          | OMAP3ISP_PREV_NF | OMAP3ISP_PREV_GAMMA
1376                          | OMAP3ISP_PREV_BLKADJ | OMAP3ISP_PREV_YC_LIMIT
1377                          | OMAP3ISP_PREV_RGB2RGB | OMAP3ISP_PREV_COLOR_CONV
1378                          | OMAP3ISP_PREV_WB | OMAP3ISP_PREV_BRIGHTNESS
1379                          | OMAP3ISP_PREV_CONTRAST;
1380 }
1381
1382 /*
1383  * preview_max_out_width - Handle previewer hardware ouput limitations
1384  * @isp_revision : ISP revision
1385  * returns maximum width output for current isp revision
1386  */
1387 static unsigned int preview_max_out_width(struct isp_prev_device *prev)
1388 {
1389         struct isp_device *isp = to_isp_device(prev);
1390
1391         switch (isp->revision) {
1392         case ISP_REVISION_1_0:
1393                 return PREV_MAX_OUT_WIDTH_REV_1;
1394
1395         case ISP_REVISION_2_0:
1396         default:
1397                 return PREV_MAX_OUT_WIDTH_REV_2;
1398
1399         case ISP_REVISION_15_0:
1400                 return PREV_MAX_OUT_WIDTH_REV_15;
1401         }
1402 }
1403
1404 static void preview_configure(struct isp_prev_device *prev)
1405 {
1406         struct isp_device *isp = to_isp_device(prev);
1407         struct v4l2_mbus_framefmt *format;
1408         unsigned long flags;
1409         u32 update;
1410         u32 active;
1411
1412         spin_lock_irqsave(&prev->params.lock, flags);
1413         /* Mark all active parameters we are going to touch as busy. */
1414         update = preview_params_lock(prev, 0, false);
1415         active = prev->params.active;
1416         spin_unlock_irqrestore(&prev->params.lock, flags);
1417
1418         preview_setup_hw(prev, update, active);
1419
1420         if (prev->output & PREVIEW_OUTPUT_MEMORY)
1421                 isp_reg_set(isp, OMAP3_ISP_IOMEM_PREV, ISPPRV_PCR,
1422                             ISPPRV_PCR_SDRPORT);
1423         else
1424                 isp_reg_clr(isp, OMAP3_ISP_IOMEM_PREV, ISPPRV_PCR,
1425                             ISPPRV_PCR_SDRPORT);
1426
1427         if (prev->output & PREVIEW_OUTPUT_RESIZER)
1428                 isp_reg_set(isp, OMAP3_ISP_IOMEM_PREV, ISPPRV_PCR,
1429                             ISPPRV_PCR_RSZPORT);
1430         else
1431                 isp_reg_clr(isp, OMAP3_ISP_IOMEM_PREV, ISPPRV_PCR,
1432                             ISPPRV_PCR_RSZPORT);
1433
1434         /* PREV_PAD_SINK */
1435         format = &prev->formats[PREV_PAD_SINK];
1436
1437         preview_adjust_bandwidth(prev);
1438
1439         preview_config_input_size(prev, active);
1440
1441         if (prev->input == PREVIEW_INPUT_CCDC)
1442                 preview_config_inlineoffset(prev, 0);
1443         else
1444                 preview_config_inlineoffset(prev,
1445                                 ALIGN(format->width, 0x20) * 2);
1446
1447         /* PREV_PAD_SOURCE */
1448         format = &prev->formats[PREV_PAD_SOURCE];
1449
1450         if (prev->output & PREVIEW_OUTPUT_MEMORY)
1451                 preview_config_outlineoffset(prev,
1452                                 ALIGN(format->width, 0x10) * 2);
1453
1454         preview_config_averager(prev, 0);
1455         preview_config_ycpos(prev, format->code);
1456
1457         spin_lock_irqsave(&prev->params.lock, flags);
1458         preview_params_unlock(prev, update, false);
1459         spin_unlock_irqrestore(&prev->params.lock, flags);
1460 }
1461
1462 /* -----------------------------------------------------------------------------
1463  * Interrupt handling
1464  */
1465
1466 static void preview_enable_oneshot(struct isp_prev_device *prev)
1467 {
1468         struct isp_device *isp = to_isp_device(prev);
1469
1470         /* The PCR.SOURCE bit is automatically reset to 0 when the PCR.ENABLE
1471          * bit is set. As the preview engine is used in single-shot mode, we
1472          * need to set PCR.SOURCE before enabling the preview engine.
1473          */
1474         if (prev->input == PREVIEW_INPUT_MEMORY)
1475                 isp_reg_set(isp, OMAP3_ISP_IOMEM_PREV, ISPPRV_PCR,
1476                             ISPPRV_PCR_SOURCE);
1477
1478         isp_reg_set(isp, OMAP3_ISP_IOMEM_PREV, ISPPRV_PCR,
1479                     ISPPRV_PCR_EN | ISPPRV_PCR_ONESHOT);
1480 }
1481
1482 void omap3isp_preview_isr_frame_sync(struct isp_prev_device *prev)
1483 {
1484         /*
1485          * If ISP_VIDEO_DMAQUEUE_QUEUED is set, DMA queue had an underrun
1486          * condition, the module was paused and now we have a buffer queued
1487          * on the output again. Restart the pipeline if running in continuous
1488          * mode.
1489          */
1490         if (prev->state == ISP_PIPELINE_STREAM_CONTINUOUS &&
1491             prev->video_out.dmaqueue_flags & ISP_VIDEO_DMAQUEUE_QUEUED) {
1492                 preview_enable_oneshot(prev);
1493                 isp_video_dmaqueue_flags_clr(&prev->video_out);
1494         }
1495 }
1496
1497 static void preview_isr_buffer(struct isp_prev_device *prev)
1498 {
1499         struct isp_pipeline *pipe = to_isp_pipeline(&prev->subdev.entity);
1500         struct isp_buffer *buffer;
1501         int restart = 0;
1502
1503         if (prev->input == PREVIEW_INPUT_MEMORY) {
1504                 buffer = omap3isp_video_buffer_next(&prev->video_in);
1505                 if (buffer != NULL)
1506                         preview_set_inaddr(prev, buffer->isp_addr);
1507                 pipe->state |= ISP_PIPELINE_IDLE_INPUT;
1508         }
1509
1510         if (prev->output & PREVIEW_OUTPUT_MEMORY) {
1511                 buffer = omap3isp_video_buffer_next(&prev->video_out);
1512                 if (buffer != NULL) {
1513                         preview_set_outaddr(prev, buffer->isp_addr);
1514                         restart = 1;
1515                 }
1516                 pipe->state |= ISP_PIPELINE_IDLE_OUTPUT;
1517         }
1518
1519         switch (prev->state) {
1520         case ISP_PIPELINE_STREAM_SINGLESHOT:
1521                 if (isp_pipeline_ready(pipe))
1522                         omap3isp_pipeline_set_stream(pipe,
1523                                                 ISP_PIPELINE_STREAM_SINGLESHOT);
1524                 break;
1525
1526         case ISP_PIPELINE_STREAM_CONTINUOUS:
1527                 /* If an underrun occurs, the video queue operation handler will
1528                  * restart the preview engine. Otherwise restart it immediately.
1529                  */
1530                 if (restart)
1531                         preview_enable_oneshot(prev);
1532                 break;
1533
1534         case ISP_PIPELINE_STREAM_STOPPED:
1535         default:
1536                 return;
1537         }
1538 }
1539
1540 /*
1541  * omap3isp_preview_isr - ISP preview engine interrupt handler
1542  *
1543  * Manage the preview engine video buffers and configure shadowed registers.
1544  */
1545 void omap3isp_preview_isr(struct isp_prev_device *prev)
1546 {
1547         unsigned long flags;
1548         u32 update;
1549         u32 active;
1550
1551         if (omap3isp_module_sync_is_stopping(&prev->wait, &prev->stopping))
1552                 return;
1553
1554         spin_lock_irqsave(&prev->params.lock, flags);
1555         preview_params_switch(prev);
1556         update = preview_params_lock(prev, 0, false);
1557         active = prev->params.active;
1558         spin_unlock_irqrestore(&prev->params.lock, flags);
1559
1560         preview_setup_hw(prev, update, active);
1561         preview_config_input_size(prev, active);
1562
1563         if (prev->input == PREVIEW_INPUT_MEMORY ||
1564             prev->output & PREVIEW_OUTPUT_MEMORY)
1565                 preview_isr_buffer(prev);
1566         else if (prev->state == ISP_PIPELINE_STREAM_CONTINUOUS)
1567                 preview_enable_oneshot(prev);
1568
1569         spin_lock_irqsave(&prev->params.lock, flags);
1570         preview_params_unlock(prev, update, false);
1571         spin_unlock_irqrestore(&prev->params.lock, flags);
1572 }
1573
1574 /* -----------------------------------------------------------------------------
1575  * ISP video operations
1576  */
1577
1578 static int preview_video_queue(struct isp_video *video,
1579                                struct isp_buffer *buffer)
1580 {
1581         struct isp_prev_device *prev = &video->isp->isp_prev;
1582
1583         if (video->type == V4L2_BUF_TYPE_VIDEO_OUTPUT)
1584                 preview_set_inaddr(prev, buffer->isp_addr);
1585
1586         if (video->type == V4L2_BUF_TYPE_VIDEO_CAPTURE)
1587                 preview_set_outaddr(prev, buffer->isp_addr);
1588
1589         return 0;
1590 }
1591
1592 static const struct isp_video_operations preview_video_ops = {
1593         .queue = preview_video_queue,
1594 };
1595
1596 /* -----------------------------------------------------------------------------
1597  * V4L2 subdev operations
1598  */
1599
1600 /*
1601  * preview_s_ctrl - Handle set control subdev method
1602  * @ctrl: pointer to v4l2 control structure
1603  */
1604 static int preview_s_ctrl(struct v4l2_ctrl *ctrl)
1605 {
1606         struct isp_prev_device *prev =
1607                 container_of(ctrl->handler, struct isp_prev_device, ctrls);
1608
1609         switch (ctrl->id) {
1610         case V4L2_CID_BRIGHTNESS:
1611                 preview_update_brightness(prev, ctrl->val);
1612                 break;
1613         case V4L2_CID_CONTRAST:
1614                 preview_update_contrast(prev, ctrl->val);
1615                 break;
1616         }
1617
1618         return 0;
1619 }
1620
1621 static const struct v4l2_ctrl_ops preview_ctrl_ops = {
1622         .s_ctrl = preview_s_ctrl,
1623 };
1624
1625 /*
1626  * preview_ioctl - Handle preview module private ioctl's
1627  * @prev: pointer to preview context structure
1628  * @cmd: configuration command
1629  * @arg: configuration argument
1630  * return -EINVAL or zero on success
1631  */
1632 static long preview_ioctl(struct v4l2_subdev *sd, unsigned int cmd, void *arg)
1633 {
1634         struct isp_prev_device *prev = v4l2_get_subdevdata(sd);
1635
1636         switch (cmd) {
1637         case VIDIOC_OMAP3ISP_PRV_CFG:
1638                 return preview_config(prev, arg);
1639
1640         default:
1641                 return -ENOIOCTLCMD;
1642         }
1643 }
1644
1645 /*
1646  * preview_set_stream - Enable/Disable streaming on preview subdev
1647  * @sd    : pointer to v4l2 subdev structure
1648  * @enable: 1 == Enable, 0 == Disable
1649  * return -EINVAL or zero on success
1650  */
1651 static int preview_set_stream(struct v4l2_subdev *sd, int enable)
1652 {
1653         struct isp_prev_device *prev = v4l2_get_subdevdata(sd);
1654         struct isp_video *video_out = &prev->video_out;
1655         struct isp_device *isp = to_isp_device(prev);
1656         struct device *dev = to_device(prev);
1657
1658         if (prev->state == ISP_PIPELINE_STREAM_STOPPED) {
1659                 if (enable == ISP_PIPELINE_STREAM_STOPPED)
1660                         return 0;
1661
1662                 omap3isp_subclk_enable(isp, OMAP3_ISP_SUBCLK_PREVIEW);
1663                 preview_configure(prev);
1664                 atomic_set(&prev->stopping, 0);
1665                 preview_print_status(prev);
1666         }
1667
1668         switch (enable) {
1669         case ISP_PIPELINE_STREAM_CONTINUOUS:
1670                 if (prev->output & PREVIEW_OUTPUT_MEMORY)
1671                         omap3isp_sbl_enable(isp, OMAP3_ISP_SBL_PREVIEW_WRITE);
1672
1673                 if (video_out->dmaqueue_flags & ISP_VIDEO_DMAQUEUE_QUEUED ||
1674                     !(prev->output & PREVIEW_OUTPUT_MEMORY))
1675                         preview_enable_oneshot(prev);
1676
1677                 isp_video_dmaqueue_flags_clr(video_out);
1678                 break;
1679
1680         case ISP_PIPELINE_STREAM_SINGLESHOT:
1681                 if (prev->input == PREVIEW_INPUT_MEMORY)
1682                         omap3isp_sbl_enable(isp, OMAP3_ISP_SBL_PREVIEW_READ);
1683                 if (prev->output & PREVIEW_OUTPUT_MEMORY)
1684                         omap3isp_sbl_enable(isp, OMAP3_ISP_SBL_PREVIEW_WRITE);
1685
1686                 preview_enable_oneshot(prev);
1687                 break;
1688
1689         case ISP_PIPELINE_STREAM_STOPPED:
1690                 if (omap3isp_module_sync_idle(&sd->entity, &prev->wait,
1691                                               &prev->stopping))
1692                         dev_dbg(dev, "%s: stop timeout.\n", sd->name);
1693                 omap3isp_sbl_disable(isp, OMAP3_ISP_SBL_PREVIEW_READ);
1694                 omap3isp_sbl_disable(isp, OMAP3_ISP_SBL_PREVIEW_WRITE);
1695                 omap3isp_subclk_disable(isp, OMAP3_ISP_SUBCLK_PREVIEW);
1696                 isp_video_dmaqueue_flags_clr(video_out);
1697                 break;
1698         }
1699
1700         prev->state = enable;
1701         return 0;
1702 }
1703
1704 static struct v4l2_mbus_framefmt *
1705 __preview_get_format(struct isp_prev_device *prev, struct v4l2_subdev_fh *fh,
1706                      unsigned int pad, enum v4l2_subdev_format_whence which)
1707 {
1708         if (which == V4L2_SUBDEV_FORMAT_TRY)
1709                 return v4l2_subdev_get_try_format(fh, pad);
1710         else
1711                 return &prev->formats[pad];
1712 }
1713
1714 static struct v4l2_rect *
1715 __preview_get_crop(struct isp_prev_device *prev, struct v4l2_subdev_fh *fh,
1716                    enum v4l2_subdev_format_whence which)
1717 {
1718         if (which == V4L2_SUBDEV_FORMAT_TRY)
1719                 return v4l2_subdev_get_try_crop(fh, PREV_PAD_SINK);
1720         else
1721                 return &prev->crop;
1722 }
1723
1724 /* previewer format descriptions */
1725 static const unsigned int preview_input_fmts[] = {
1726         V4L2_MBUS_FMT_SGRBG10_1X10,
1727         V4L2_MBUS_FMT_SRGGB10_1X10,
1728         V4L2_MBUS_FMT_SBGGR10_1X10,
1729         V4L2_MBUS_FMT_SGBRG10_1X10,
1730 };
1731
1732 static const unsigned int preview_output_fmts[] = {
1733         V4L2_MBUS_FMT_UYVY8_1X16,
1734         V4L2_MBUS_FMT_YUYV8_1X16,
1735 };
1736
1737 /*
1738  * preview_try_format - Validate a format
1739  * @prev: ISP preview engine
1740  * @fh: V4L2 subdev file handle
1741  * @pad: pad number
1742  * @fmt: format to be validated
1743  * @which: try/active format selector
1744  *
1745  * Validate and adjust the given format for the given pad based on the preview
1746  * engine limits and the format and crop rectangles on other pads.
1747  */
1748 static void preview_try_format(struct isp_prev_device *prev,
1749                                struct v4l2_subdev_fh *fh, unsigned int pad,
1750                                struct v4l2_mbus_framefmt *fmt,
1751                                enum v4l2_subdev_format_whence which)
1752 {
1753         enum v4l2_mbus_pixelcode pixelcode;
1754         struct v4l2_rect *crop;
1755         unsigned int i;
1756
1757         switch (pad) {
1758         case PREV_PAD_SINK:
1759                 /* When reading data from the CCDC, the input size has already
1760                  * been mangled by the CCDC output pad so it can be accepted
1761                  * as-is.
1762                  *
1763                  * When reading data from memory, clamp the requested width and
1764                  * height. The TRM doesn't specify a minimum input height, make
1765                  * sure we got enough lines to enable the noise filter and color
1766                  * filter array interpolation.
1767                  */
1768                 if (prev->input == PREVIEW_INPUT_MEMORY) {
1769                         fmt->width = clamp_t(u32, fmt->width, PREV_MIN_IN_WIDTH,
1770                                              preview_max_out_width(prev));
1771                         fmt->height = clamp_t(u32, fmt->height,
1772                                               PREV_MIN_IN_HEIGHT,
1773                                               PREV_MAX_IN_HEIGHT);
1774                 }
1775
1776                 fmt->colorspace = V4L2_COLORSPACE_SRGB;
1777
1778                 for (i = 0; i < ARRAY_SIZE(preview_input_fmts); i++) {
1779                         if (fmt->code == preview_input_fmts[i])
1780                                 break;
1781                 }
1782
1783                 /* If not found, use SGRBG10 as default */
1784                 if (i >= ARRAY_SIZE(preview_input_fmts))
1785                         fmt->code = V4L2_MBUS_FMT_SGRBG10_1X10;
1786                 break;
1787
1788         case PREV_PAD_SOURCE:
1789                 pixelcode = fmt->code;
1790                 *fmt = *__preview_get_format(prev, fh, PREV_PAD_SINK, which);
1791
1792                 switch (pixelcode) {
1793                 case V4L2_MBUS_FMT_YUYV8_1X16:
1794                 case V4L2_MBUS_FMT_UYVY8_1X16:
1795                         fmt->code = pixelcode;
1796                         break;
1797
1798                 default:
1799                         fmt->code = V4L2_MBUS_FMT_YUYV8_1X16;
1800                         break;
1801                 }
1802
1803                 /* The preview module output size is configurable through the
1804                  * averager (horizontal scaling by 1/1, 1/2, 1/4 or 1/8). This
1805                  * is not supported yet, hardcode the output size to the crop
1806                  * rectangle size.
1807                  */
1808                 crop = __preview_get_crop(prev, fh, which);
1809                 fmt->width = crop->width;
1810                 fmt->height = crop->height;
1811
1812                 fmt->colorspace = V4L2_COLORSPACE_JPEG;
1813                 break;
1814         }
1815
1816         fmt->field = V4L2_FIELD_NONE;
1817 }
1818
1819 /*
1820  * preview_try_crop - Validate a crop rectangle
1821  * @prev: ISP preview engine
1822  * @sink: format on the sink pad
1823  * @crop: crop rectangle to be validated
1824  *
1825  * The preview engine crops lines and columns for its internal operation,
1826  * depending on which filters are enabled. Enforce minimum crop margins to
1827  * handle that transparently for userspace.
1828  *
1829  * See the explanation at the PREV_MARGIN_* definitions for more details.
1830  */
1831 static void preview_try_crop(struct isp_prev_device *prev,
1832                              const struct v4l2_mbus_framefmt *sink,
1833                              struct v4l2_rect *crop)
1834 {
1835         unsigned int left = PREV_MARGIN_LEFT;
1836         unsigned int right = sink->width - PREV_MARGIN_RIGHT;
1837         unsigned int top = PREV_MARGIN_TOP;
1838         unsigned int bottom = sink->height - PREV_MARGIN_BOTTOM;
1839
1840         /* When processing data on-the-fly from the CCDC, at least 2 pixels must
1841          * be cropped from the left and right sides of the image. As we don't
1842          * know which filters will be enabled, increase the left and right
1843          * margins by two.
1844          */
1845         if (prev->input == PREVIEW_INPUT_CCDC) {
1846                 left += 2;
1847                 right -= 2;
1848         }
1849
1850         /* Restrict left/top to even values to keep the Bayer pattern. */
1851         crop->left &= ~1;
1852         crop->top &= ~1;
1853
1854         crop->left = clamp_t(u32, crop->left, left, right - PREV_MIN_OUT_WIDTH);
1855         crop->top = clamp_t(u32, crop->top, top, bottom - PREV_MIN_OUT_HEIGHT);
1856         crop->width = clamp_t(u32, crop->width, PREV_MIN_OUT_WIDTH,
1857                               right - crop->left);
1858         crop->height = clamp_t(u32, crop->height, PREV_MIN_OUT_HEIGHT,
1859                                bottom - crop->top);
1860 }
1861
1862 /*
1863  * preview_enum_mbus_code - Handle pixel format enumeration
1864  * @sd     : pointer to v4l2 subdev structure
1865  * @fh     : V4L2 subdev file handle
1866  * @code   : pointer to v4l2_subdev_mbus_code_enum structure
1867  * return -EINVAL or zero on success
1868  */
1869 static int preview_enum_mbus_code(struct v4l2_subdev *sd,
1870                                   struct v4l2_subdev_fh *fh,
1871                                   struct v4l2_subdev_mbus_code_enum *code)
1872 {
1873         switch (code->pad) {
1874         case PREV_PAD_SINK:
1875                 if (code->index >= ARRAY_SIZE(preview_input_fmts))
1876                         return -EINVAL;
1877
1878                 code->code = preview_input_fmts[code->index];
1879                 break;
1880         case PREV_PAD_SOURCE:
1881                 if (code->index >= ARRAY_SIZE(preview_output_fmts))
1882                         return -EINVAL;
1883
1884                 code->code = preview_output_fmts[code->index];
1885                 break;
1886         default:
1887                 return -EINVAL;
1888         }
1889
1890         return 0;
1891 }
1892
1893 static int preview_enum_frame_size(struct v4l2_subdev *sd,
1894                                    struct v4l2_subdev_fh *fh,
1895                                    struct v4l2_subdev_frame_size_enum *fse)
1896 {
1897         struct isp_prev_device *prev = v4l2_get_subdevdata(sd);
1898         struct v4l2_mbus_framefmt format;
1899
1900         if (fse->index != 0)
1901                 return -EINVAL;
1902
1903         format.code = fse->code;
1904         format.width = 1;
1905         format.height = 1;
1906         preview_try_format(prev, fh, fse->pad, &format, V4L2_SUBDEV_FORMAT_TRY);
1907         fse->min_width = format.width;
1908         fse->min_height = format.height;
1909
1910         if (format.code != fse->code)
1911                 return -EINVAL;
1912
1913         format.code = fse->code;
1914         format.width = -1;
1915         format.height = -1;
1916         preview_try_format(prev, fh, fse->pad, &format, V4L2_SUBDEV_FORMAT_TRY);
1917         fse->max_width = format.width;
1918         fse->max_height = format.height;
1919
1920         return 0;
1921 }
1922
1923 /*
1924  * preview_get_crop - Retrieve the crop rectangle on a pad
1925  * @sd: ISP preview V4L2 subdevice
1926  * @fh: V4L2 subdev file handle
1927  * @crop: crop rectangle
1928  *
1929  * Return 0 on success or a negative error code otherwise.
1930  */
1931 static int preview_get_crop(struct v4l2_subdev *sd, struct v4l2_subdev_fh *fh,
1932                             struct v4l2_subdev_crop *crop)
1933 {
1934         struct isp_prev_device *prev = v4l2_get_subdevdata(sd);
1935
1936         /* Cropping is only supported on the sink pad. */
1937         if (crop->pad != PREV_PAD_SINK)
1938                 return -EINVAL;
1939
1940         crop->rect = *__preview_get_crop(prev, fh, crop->which);
1941         return 0;
1942 }
1943
1944 /*
1945  * preview_set_crop - Retrieve the crop rectangle on a pad
1946  * @sd: ISP preview V4L2 subdevice
1947  * @fh: V4L2 subdev file handle
1948  * @crop: crop rectangle
1949  *
1950  * Return 0 on success or a negative error code otherwise.
1951  */
1952 static int preview_set_crop(struct v4l2_subdev *sd, struct v4l2_subdev_fh *fh,
1953                             struct v4l2_subdev_crop *crop)
1954 {
1955         struct isp_prev_device *prev = v4l2_get_subdevdata(sd);
1956         struct v4l2_mbus_framefmt *format;
1957
1958         /* Cropping is only supported on the sink pad. */
1959         if (crop->pad != PREV_PAD_SINK)
1960                 return -EINVAL;
1961
1962         /* The crop rectangle can't be changed while streaming. */
1963         if (prev->state != ISP_PIPELINE_STREAM_STOPPED)
1964                 return -EBUSY;
1965
1966         format = __preview_get_format(prev, fh, PREV_PAD_SINK, crop->which);
1967         preview_try_crop(prev, format, &crop->rect);
1968         *__preview_get_crop(prev, fh, crop->which) = crop->rect;
1969
1970         /* Update the source format. */
1971         format = __preview_get_format(prev, fh, PREV_PAD_SOURCE, crop->which);
1972         preview_try_format(prev, fh, PREV_PAD_SOURCE, format, crop->which);
1973
1974         return 0;
1975 }
1976
1977 /*
1978  * preview_get_format - Handle get format by pads subdev method
1979  * @sd : pointer to v4l2 subdev structure
1980  * @fh : V4L2 subdev file handle
1981  * @fmt: pointer to v4l2 subdev format structure
1982  * return -EINVAL or zero on success
1983  */
1984 static int preview_get_format(struct v4l2_subdev *sd, struct v4l2_subdev_fh *fh,
1985                               struct v4l2_subdev_format *fmt)
1986 {
1987         struct isp_prev_device *prev = v4l2_get_subdevdata(sd);
1988         struct v4l2_mbus_framefmt *format;
1989
1990         format = __preview_get_format(prev, fh, fmt->pad, fmt->which);
1991         if (format == NULL)
1992                 return -EINVAL;
1993
1994         fmt->format = *format;
1995         return 0;
1996 }
1997
1998 /*
1999  * preview_set_format - Handle set format by pads subdev method
2000  * @sd : pointer to v4l2 subdev structure
2001  * @fh : V4L2 subdev file handle
2002  * @fmt: pointer to v4l2 subdev format structure
2003  * return -EINVAL or zero on success
2004  */
2005 static int preview_set_format(struct v4l2_subdev *sd, struct v4l2_subdev_fh *fh,
2006                               struct v4l2_subdev_format *fmt)
2007 {
2008         struct isp_prev_device *prev = v4l2_get_subdevdata(sd);
2009         struct v4l2_mbus_framefmt *format;
2010         struct v4l2_rect *crop;
2011
2012         format = __preview_get_format(prev, fh, fmt->pad, fmt->which);
2013         if (format == NULL)
2014                 return -EINVAL;
2015
2016         preview_try_format(prev, fh, fmt->pad, &fmt->format, fmt->which);
2017         *format = fmt->format;
2018
2019         /* Propagate the format from sink to source */
2020         if (fmt->pad == PREV_PAD_SINK) {
2021                 /* Reset the crop rectangle. */
2022                 crop = __preview_get_crop(prev, fh, fmt->which);
2023                 crop->left = 0;
2024                 crop->top = 0;
2025                 crop->width = fmt->format.width;
2026                 crop->height = fmt->format.height;
2027
2028                 preview_try_crop(prev, &fmt->format, crop);
2029
2030                 /* Update the source format. */
2031                 format = __preview_get_format(prev, fh, PREV_PAD_SOURCE,
2032                                               fmt->which);
2033                 preview_try_format(prev, fh, PREV_PAD_SOURCE, format,
2034                                    fmt->which);
2035         }
2036
2037         return 0;
2038 }
2039
2040 /*
2041  * preview_init_formats - Initialize formats on all pads
2042  * @sd: ISP preview V4L2 subdevice
2043  * @fh: V4L2 subdev file handle
2044  *
2045  * Initialize all pad formats with default values. If fh is not NULL, try
2046  * formats are initialized on the file handle. Otherwise active formats are
2047  * initialized on the device.
2048  */
2049 static int preview_init_formats(struct v4l2_subdev *sd,
2050                                 struct v4l2_subdev_fh *fh)
2051 {
2052         struct v4l2_subdev_format format;
2053
2054         memset(&format, 0, sizeof(format));
2055         format.pad = PREV_PAD_SINK;
2056         format.which = fh ? V4L2_SUBDEV_FORMAT_TRY : V4L2_SUBDEV_FORMAT_ACTIVE;
2057         format.format.code = V4L2_MBUS_FMT_SGRBG10_1X10;
2058         format.format.width = 4096;
2059         format.format.height = 4096;
2060         preview_set_format(sd, fh, &format);
2061
2062         return 0;
2063 }
2064
2065 /* subdev core operations */
2066 static const struct v4l2_subdev_core_ops preview_v4l2_core_ops = {
2067         .ioctl = preview_ioctl,
2068 };
2069
2070 /* subdev video operations */
2071 static const struct v4l2_subdev_video_ops preview_v4l2_video_ops = {
2072         .s_stream = preview_set_stream,
2073 };
2074
2075 /* subdev pad operations */
2076 static const struct v4l2_subdev_pad_ops preview_v4l2_pad_ops = {
2077         .enum_mbus_code = preview_enum_mbus_code,
2078         .enum_frame_size = preview_enum_frame_size,
2079         .get_fmt = preview_get_format,
2080         .set_fmt = preview_set_format,
2081         .get_crop = preview_get_crop,
2082         .set_crop = preview_set_crop,
2083 };
2084
2085 /* subdev operations */
2086 static const struct v4l2_subdev_ops preview_v4l2_ops = {
2087         .core = &preview_v4l2_core_ops,
2088         .video = &preview_v4l2_video_ops,
2089         .pad = &preview_v4l2_pad_ops,
2090 };
2091
2092 /* subdev internal operations */
2093 static const struct v4l2_subdev_internal_ops preview_v4l2_internal_ops = {
2094         .open = preview_init_formats,
2095 };
2096
2097 /* -----------------------------------------------------------------------------
2098  * Media entity operations
2099  */
2100
2101 /*
2102  * preview_link_setup - Setup previewer connections.
2103  * @entity : Pointer to media entity structure
2104  * @local  : Pointer to local pad array
2105  * @remote : Pointer to remote pad array
2106  * @flags  : Link flags
2107  * return -EINVAL or zero on success
2108  */
2109 static int preview_link_setup(struct media_entity *entity,
2110                               const struct media_pad *local,
2111                               const struct media_pad *remote, u32 flags)
2112 {
2113         struct v4l2_subdev *sd = media_entity_to_v4l2_subdev(entity);
2114         struct isp_prev_device *prev = v4l2_get_subdevdata(sd);
2115
2116         switch (local->index | media_entity_type(remote->entity)) {
2117         case PREV_PAD_SINK | MEDIA_ENT_T_DEVNODE:
2118                 /* read from memory */
2119                 if (flags & MEDIA_LNK_FL_ENABLED) {
2120                         if (prev->input == PREVIEW_INPUT_CCDC)
2121                                 return -EBUSY;
2122                         prev->input = PREVIEW_INPUT_MEMORY;
2123                 } else {
2124                         if (prev->input == PREVIEW_INPUT_MEMORY)
2125                                 prev->input = PREVIEW_INPUT_NONE;
2126                 }
2127                 break;
2128
2129         case PREV_PAD_SINK | MEDIA_ENT_T_V4L2_SUBDEV:
2130                 /* read from ccdc */
2131                 if (flags & MEDIA_LNK_FL_ENABLED) {
2132                         if (prev->input == PREVIEW_INPUT_MEMORY)
2133                                 return -EBUSY;
2134                         prev->input = PREVIEW_INPUT_CCDC;
2135                 } else {
2136                         if (prev->input == PREVIEW_INPUT_CCDC)
2137                                 prev->input = PREVIEW_INPUT_NONE;
2138                 }
2139                 break;
2140
2141         /*
2142          * The ISP core doesn't support pipelines with multiple video outputs.
2143          * Revisit this when it will be implemented, and return -EBUSY for now.
2144          */
2145
2146         case PREV_PAD_SOURCE | MEDIA_ENT_T_DEVNODE:
2147                 /* write to memory */
2148                 if (flags & MEDIA_LNK_FL_ENABLED) {
2149                         if (prev->output & ~PREVIEW_OUTPUT_MEMORY)
2150                                 return -EBUSY;
2151                         prev->output |= PREVIEW_OUTPUT_MEMORY;
2152                 } else {
2153                         prev->output &= ~PREVIEW_OUTPUT_MEMORY;
2154                 }
2155                 break;
2156
2157         case PREV_PAD_SOURCE | MEDIA_ENT_T_V4L2_SUBDEV:
2158                 /* write to resizer */
2159                 if (flags & MEDIA_LNK_FL_ENABLED) {
2160                         if (prev->output & ~PREVIEW_OUTPUT_RESIZER)
2161                                 return -EBUSY;
2162                         prev->output |= PREVIEW_OUTPUT_RESIZER;
2163                 } else {
2164                         prev->output &= ~PREVIEW_OUTPUT_RESIZER;
2165                 }
2166                 break;
2167
2168         default:
2169                 return -EINVAL;
2170         }
2171
2172         return 0;
2173 }
2174
2175 /* media operations */
2176 static const struct media_entity_operations preview_media_ops = {
2177         .link_setup = preview_link_setup,
2178 };
2179
2180 void omap3isp_preview_unregister_entities(struct isp_prev_device *prev)
2181 {
2182         v4l2_device_unregister_subdev(&prev->subdev);
2183         omap3isp_video_unregister(&prev->video_in);
2184         omap3isp_video_unregister(&prev->video_out);
2185 }
2186
2187 int omap3isp_preview_register_entities(struct isp_prev_device *prev,
2188         struct v4l2_device *vdev)
2189 {
2190         int ret;
2191
2192         /* Register the subdev and video nodes. */
2193         ret = v4l2_device_register_subdev(vdev, &prev->subdev);
2194         if (ret < 0)
2195                 goto error;
2196
2197         ret = omap3isp_video_register(&prev->video_in, vdev);
2198         if (ret < 0)
2199                 goto error;
2200
2201         ret = omap3isp_video_register(&prev->video_out, vdev);
2202         if (ret < 0)
2203                 goto error;
2204
2205         return 0;
2206
2207 error:
2208         omap3isp_preview_unregister_entities(prev);
2209         return ret;
2210 }
2211
2212 /* -----------------------------------------------------------------------------
2213  * ISP previewer initialisation and cleanup
2214  */
2215
2216 /*
2217  * preview_init_entities - Initialize subdev and media entity.
2218  * @prev : Pointer to preview structure
2219  * return -ENOMEM or zero on success
2220  */
2221 static int preview_init_entities(struct isp_prev_device *prev)
2222 {
2223         struct v4l2_subdev *sd = &prev->subdev;
2224         struct media_pad *pads = prev->pads;
2225         struct media_entity *me = &sd->entity;
2226         int ret;
2227
2228         prev->input = PREVIEW_INPUT_NONE;
2229
2230         v4l2_subdev_init(sd, &preview_v4l2_ops);
2231         sd->internal_ops = &preview_v4l2_internal_ops;
2232         strlcpy(sd->name, "OMAP3 ISP preview", sizeof(sd->name));
2233         sd->grp_id = 1 << 16;   /* group ID for isp subdevs */
2234         v4l2_set_subdevdata(sd, prev);
2235         sd->flags |= V4L2_SUBDEV_FL_HAS_DEVNODE;
2236
2237         v4l2_ctrl_handler_init(&prev->ctrls, 2);
2238         v4l2_ctrl_new_std(&prev->ctrls, &preview_ctrl_ops, V4L2_CID_BRIGHTNESS,
2239                           ISPPRV_BRIGHT_LOW, ISPPRV_BRIGHT_HIGH,
2240                           ISPPRV_BRIGHT_STEP, ISPPRV_BRIGHT_DEF);
2241         v4l2_ctrl_new_std(&prev->ctrls, &preview_ctrl_ops, V4L2_CID_CONTRAST,
2242                           ISPPRV_CONTRAST_LOW, ISPPRV_CONTRAST_HIGH,
2243                           ISPPRV_CONTRAST_STEP, ISPPRV_CONTRAST_DEF);
2244         v4l2_ctrl_handler_setup(&prev->ctrls);
2245         sd->ctrl_handler = &prev->ctrls;
2246
2247         pads[PREV_PAD_SINK].flags = MEDIA_PAD_FL_SINK;
2248         pads[PREV_PAD_SOURCE].flags = MEDIA_PAD_FL_SOURCE;
2249
2250         me->ops = &preview_media_ops;
2251         ret = media_entity_init(me, PREV_PADS_NUM, pads, 0);
2252         if (ret < 0)
2253                 return ret;
2254
2255         preview_init_formats(sd, NULL);
2256
2257         /* According to the OMAP34xx TRM, video buffers need to be aligned on a
2258          * 32 bytes boundary. However, an undocumented hardware bug requires a
2259          * 64 bytes boundary at the preview engine input.
2260          */
2261         prev->video_in.type = V4L2_BUF_TYPE_VIDEO_OUTPUT;
2262         prev->video_in.ops = &preview_video_ops;
2263         prev->video_in.isp = to_isp_device(prev);
2264         prev->video_in.capture_mem = PAGE_ALIGN(4096 * 4096) * 2 * 3;
2265         prev->video_in.bpl_alignment = 64;
2266         prev->video_out.type = V4L2_BUF_TYPE_VIDEO_CAPTURE;
2267         prev->video_out.ops = &preview_video_ops;
2268         prev->video_out.isp = to_isp_device(prev);
2269         prev->video_out.capture_mem = PAGE_ALIGN(4096 * 4096) * 2 * 3;
2270         prev->video_out.bpl_alignment = 32;
2271
2272         ret = omap3isp_video_init(&prev->video_in, "preview");
2273         if (ret < 0)
2274                 goto error_video_in;
2275
2276         ret = omap3isp_video_init(&prev->video_out, "preview");
2277         if (ret < 0)
2278                 goto error_video_out;
2279
2280         /* Connect the video nodes to the previewer subdev. */
2281         ret = media_entity_create_link(&prev->video_in.video.entity, 0,
2282                         &prev->subdev.entity, PREV_PAD_SINK, 0);
2283         if (ret < 0)
2284                 goto error_link;
2285
2286         ret = media_entity_create_link(&prev->subdev.entity, PREV_PAD_SOURCE,
2287                         &prev->video_out.video.entity, 0, 0);
2288         if (ret < 0)
2289                 goto error_link;
2290
2291         return 0;
2292
2293 error_link:
2294         omap3isp_video_cleanup(&prev->video_out);
2295 error_video_out:
2296         omap3isp_video_cleanup(&prev->video_in);
2297 error_video_in:
2298         media_entity_cleanup(&prev->subdev.entity);
2299         return ret;
2300 }
2301
2302 /*
2303  * omap3isp_preview_init - Previewer initialization.
2304  * @dev : Pointer to ISP device
2305  * return -ENOMEM or zero on success
2306  */
2307 int omap3isp_preview_init(struct isp_device *isp)
2308 {
2309         struct isp_prev_device *prev = &isp->isp_prev;
2310
2311         init_waitqueue_head(&prev->wait);
2312
2313         preview_init_params(prev);
2314
2315         return preview_init_entities(prev);
2316 }
2317
2318 void omap3isp_preview_cleanup(struct isp_device *isp)
2319 {
2320         struct isp_prev_device *prev = &isp->isp_prev;
2321
2322         v4l2_ctrl_handler_free(&prev->ctrls);
2323         omap3isp_video_cleanup(&prev->video_in);
2324         omap3isp_video_cleanup(&prev->video_out);
2325         media_entity_cleanup(&prev->subdev.entity);
2326 }